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WO2022053504A1 - Procédé mis en œuvre par ordinateur, système intégré et programme informatique pour exécuter une instruction de régulation et/ou de commande - Google Patents

Procédé mis en œuvre par ordinateur, système intégré et programme informatique pour exécuter une instruction de régulation et/ou de commande Download PDF

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Publication number
WO2022053504A1
WO2022053504A1 PCT/EP2021/074691 EP2021074691W WO2022053504A1 WO 2022053504 A1 WO2022053504 A1 WO 2022053504A1 EP 2021074691 W EP2021074691 W EP 2021074691W WO 2022053504 A1 WO2022053504 A1 WO 2022053504A1
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WO
WIPO (PCT)
Prior art keywords
regulation
control
embedded system
data
neural network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2021/074691
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German (de)
English (en)
Inventor
Tobias Ehlgen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ZF Friedrichshafen AG
Original Assignee
ZF Friedrichshafen AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ZF Friedrichshafen AG filed Critical ZF Friedrichshafen AG
Priority to EP21773395.5A priority Critical patent/EP4211516A1/fr
Publication of WO2022053504A1 publication Critical patent/WO2022053504A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B13/00—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion
    • G05B13/02—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric
    • G05B13/0265—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric the criterion being a learning criterion
    • G05B13/027—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric the criterion being a learning criterion using neural networks only
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B13/00—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion
    • G05B13/02—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric
    • G05B13/04—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric involving the use of models or simulators
    • G05B13/048—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric involving the use of models or simulators using a predictor
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/044—Recurrent networks, e.g. Hopfield networks
    • G06N3/0442—Recurrent networks, e.g. Hopfield networks characterised by memory or gating, e.g. long short-term memory [LSTM] or gated recurrent units [GRU]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/0464—Convolutional networks [CNN, ConvNet]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G06N3/09—Supervised learning

Definitions

  • the invention relates to a computer-implemented method, an embedded system and a computer program for executing a regulation and/or control regulation. Furthermore, the invention relates to the use of the embedded system for safeguarding safety-critical regulation and/or control processes and a data carrier signal that transmits the computer program.
  • processors are known as A1 accelerators, which are particularly efficient in deriving, also called inferencing, from artificial neural networks.
  • WO 2016/010601 A2 discloses a method for adaptive non-linear model-predictive control.
  • the object of the invention was how complex, runtime-intensive processes can be executed with classic embedded systems.
  • the invention provides a computer-implemented method for executing a regulation and/or control regulation on an embedded system.
  • the procedure includes the steps
  • the invention provides an embedded system for a vehicle system or a machine for executing a regulation and/or control regulation.
  • the embedded system includes hardware artificial intelligence accelerators executing a learned artificial neural network according to the invention.
  • the hardware accelerators include at least one central and/or graphics processor with a respective microarchitecture for parallel execution of arithmetic operations and/or for execution of matrix multiplications, a multi-core processor, a programmable logic gate, an application-specific integrated circuit and/or a phase transition memory.
  • the invention proposes using an embedded system according to the invention for safeguarding safety-critical regulation and/or control processes.
  • the invention provides a computer program for executing a regulation and/or control regulation.
  • the computer program comprises instructions which, when executed by a computer of an embedded system, cause it to execute a learned artificial neural network according to the invention.
  • the invention proposes a data carrier signal that transmits the computer program according to the invention.
  • An embedded system is a computer system that comprises at least one processor, according to one aspect of the invention in the form of a microcontroller, a memory area comprising read-only memory and random access memory, input-output capabilities and peripheral functions.
  • the individual elements are connected to one another via a bus system so that signals can be transmitted.
  • the peripherals include input and output devices, external storage and the corresponding interfaces.
  • Peripheral functions include Controller Area Network, abbreviated CAN, Local Interconnect Network, abbreviated LIN, Universal Serial Bus, abbreviated USB, serial or Ethernet interfaces and WLAN interfaces.
  • the embedded system includes a microcontroller of a control unit, also known as an electronic control unit, developed for use in the automotive sector.
  • the control device prepares input signals, processes them using the microcontroller and provides logic and/or power levels as regulation and/or control signals, according to one aspect of the invention for the automated operation of a driving system.
  • the known embedded systems have a relatively limited computing and storage capacity relative to a personal computer or a development computer. This makes the application of complex and/or runtime-intensive regulation and/or control regulations difficult.
  • Many algorithms cannot currently be used in a driving system because the calculation is not possible on today's processors of electronic control units, also known as electronic control units, ECU for short, or a corresponding processor would be too expensive for the application.
  • model-predictive control algorithms for example for transmission control, engine control or trajectory planning, or the determination of target values for the control of an e-machine, cannot be easily executed by a conventional ECU.
  • such an algorithm is developed in a development environment, for example Matlab, and then ported into a programming language, for example C/C++.
  • the algorithm is first optimized, for example runtime optimized.
  • the respective runtime-optimized algorithm is executed on the embedded system.
  • the algorithm is learned from an artificial neural network.
  • the learned, also referred to as trained, artificial neural network is performed on the embedded system.
  • the resulting artificial neural network is flashed onto a chip and executed at runtime.
  • the artificial neural network and thus the regulation and/or control regulation are particularly optimized, at runtime, by special hardware accelerators for artificial intelligence. Conventional runtime optimizations are not required.
  • a further advantage associated with the invention is a shortening of the development time of applications since the time-consuming transfer of prototypical algorithms to a target platform can be accelerated. This is achieved in that the development environment, for example Matlab, can be implemented directly on the target hardware with an AI accelerator.
  • the calculation of the output data using the regulation and/or control regulation and/or the learning of the artificial neural network is carried out on a personal computer or a development computer with high computing and storage power, around the learning phase, which is generally very computationally intensive to use the most efficient time possible.
  • the input data and the output data calculated in this way represent a training data record for supervised learning, with the output data corresponding to target data or labels.
  • the calculation of the initial data and/or the learning of the artificial neural network is carried out by cloud computing in the form of software, platform or infrastructure as a service. This completes the calculation of the initial data and the learning of the artificial neural network is further accelerated by accessing and using large computing and storage capacities provided by the cloud.
  • Machine learning is a technology that teaches computers and other data processing devices to perform tasks by learning from data, rather than being programmed to do the tasks.
  • input data is processed by the artificial neural network together with desired output data, and actual output data is calculated. Based on a comparison of the target and actual output data, a cost function of the artificial neural network is minimized, for example based on gradients.
  • Supervised learning is relatively easy to control and an artificial neural network trained by supervised learning is relatively easy to validate.
  • Hardware accelerators for artificial intelligence also known as artificial intelligence accelerators, accelerate artificial intelligence applications.
  • Hardware accelerators include low-precision arithmetic, for example special data formats including half-precision format and bfloatl 6 floating-point format are processed, in-memory computing and special micro-architectures for parallelized processing of calculations or sequences.
  • the input data includes a state of a driving system or a machine, including speed, acceleration, roll, pitch and/or yaw angle, steering angle, component temperatures, engine, transmission and/or energy state data and/or target torques.
  • the output data include regulation and/or control signals for actuators of the driving system or the machine. This allows complex and runtime-intensive regulation and/or control processes, including trajectory planning for an automated driving system, for example for a highly automated or autonomous passenger vehicle, and control of machines, to be executed in an embedded system at runtime.
  • Energy status data includes tank volume of a vehicle with an internal combustion engine and state of charge of a battery-operated electric vehicle. For example, the range of the electric vehicle is taken into account when planning the trajectory.
  • Target torques as input data a regulation and/or control regulation include torques desired by the driver for the regulation of electrical machines.
  • the associated output data include current strengths of electrical currents for controlling the machine.
  • the artificial neural network comprises layers of a convolutional network, recurrent network and/or radial basis function network.
  • Convolutional networks also called convolutional neural networks, abbreviated to CNN, recurrent networks comprising long-term short-memory units, abbreviated to LSTM, and/or radial basis function networks are advantageous for time series predictions. Time-series predictions are particularly computationally intensive and are important in closed-loop and/or open-loop control processes, such as trajectory planning. The invention thus makes it possible to predict time series for regulation and/or control regulations on an embedded system.
  • the regulation and/or control regulation comprises a model-predictive regulation, comprising a non-linear model-predictive regulation, in particular in combination with the feature that the artificial neural network has layers of a convolutional network, recurrent network and/or radial basis function -Network includes.
  • a model-predictive regulation comprising a non-linear model-predictive regulation, in particular in combination with the feature that the artificial neural network has layers of a convolutional network, recurrent network and/or radial basis function -Network includes.
  • linear and non-linear model predictive control a time-discrete dynamic model of the process to be controlled is used to calculate the future behavior of the process depending on the input data.
  • Known algorithms for linear and in particular for non-linear model predictive control are very computationally intensive and previously had to be optimized during runtime before they could be executed by an embedded system.
  • the invention makes it possible to carry out model-predictive control, in particular non-linear model-predictive control, on an embedded system
  • the embedded system includes a field programmable gate array chip, FPGA for short.
  • An FPGA chip includes programmable logic units and a hierarchy of reconfigurable interconnections that allow the logic units to be selectively controlled interconnected, specified by a configuration file. This allows an FPGA to be configured and reconfigured to perform various functions.
  • the configuration file includes a plurality of learned artificial neural networks. This allows various regulation and/or control regulations to be executed on one chip.
  • Phase transition memory also called phase change memory
  • phase change memory enables high performance in applications that require fast reading of the memory.
  • a phase-change memory can be switched faster than other memory devices.
  • individual bits can be changed to either 0 or 1 without first having to erase a memory block. This enables in-memory computing.
  • this comprises a first hardware and/or software path in which the regulation and/or control specification is executed by a first algorithm.
  • the embedded system comprises a second hardware and/or software path comprising the hardware accelerators for artificial intelligence, in which the regulation and/or control rule is executed by a second algorithm which is diverse relative to the first, the second algorithm executing the artificial neural network .
  • the embedded system includes a logic unit that receives output data from the first and second hardware and/or software path and checks for consistency. The embedded system only controls actuators that are in a data exchange with it if the logic unit checks that they match.
  • a hardware and/or software path includes hardware components including data transmission units and data processing units and a sequence of distributed software processes, with the individual software processes reading in data, processing it and passing on the respective results to subsequent software processes.
  • the first hardware and/or software path is redundant to the second hardware and/or software path. This allows a regulation and / or control of safety-critical applications on an embedded validate, especially at the algorithm level. This also ensures that the same errors cannot occur at the processor level.
  • an ASIL D level is achieved at the software level.
  • the embedded system is designed as a one-chip system, also known as a system on chip, or SoC for short.
  • a one-chip system for example a one-chip computer system, all or at least a large part of the functions of a programmable electronic system, for example a computer, are integrated on one chip, ie a die.
  • the FPGA chip is integrated on the one-chip system.
  • the computer program instructions comprise sections of software code, machine code or binary code.
  • the commands include configuration files for the FPGA chip.
  • the data carrier signal is transmitted from a server comprising a cloud server to the embedded system, in particular in combination with the feature that the calculation of the output data and/or the learning of the artificial neural network by cloud computing in the form of software -, Platform- or Infrastructure as a Service.
  • FIG. 2 shows an exemplary embodiment of an embedded system according to the invention.
  • data pairs (x, y) are entered into an artificial neural network ANN.
  • the data pairs (x, y) are a training data set for the supervised learning of the regulation and/or control rule f by the artificial neural network ANN.
  • the learned artificial neural network ANN approximates the regulation and/or control rule f as precisely as desired.
  • the learned artificial neural network ANN is executed on hardware accelerators for artificial intelligence of the embedded system ECU.
  • the second path Path2 shows a first hardware and/or software path path1 and a second hardware and/or software path path2 of the embedded system ECU.
  • the regulation and/or control specification f is executed by a first algorithm Algol.
  • the regulation and/or control rule f is executed by a second algorithm Algo2 that is diverse relative to the first Algo1.
  • the second algorithm Algo2 runs the artificial neural network ANN.
  • the logic unit Log checks the output data of the first path path1 and of the second path path2 for consistency and controls actuators of a driving system or a machine if they match.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Artificial Intelligence (AREA)
  • Health & Medical Sciences (AREA)
  • Evolutionary Computation (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biomedical Technology (AREA)
  • Biophysics (AREA)
  • Computing Systems (AREA)
  • Molecular Biology (AREA)
  • General Engineering & Computer Science (AREA)
  • General Health & Medical Sciences (AREA)
  • Mathematical Physics (AREA)
  • Data Mining & Analysis (AREA)
  • Computational Linguistics (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Medical Informatics (AREA)
  • Automation & Control Theory (AREA)
  • Neurology (AREA)
  • Combined Controls Of Internal Combustion Engines (AREA)
  • Feedback Control In General (AREA)

Abstract

L'invention concerne un procédé mis en œuvre par ordinateur pour exécuter une instruction de régulation et/ou de commande (f) sur un un système intégré (ECU), qui comprend les étapes consistant à fournir des données d'entrée (x) pour l'instruction de régulation et/ou de commande et à calculer des données de sortie (y) au moyen de l'instruction de régulation et/ou de commande (f) (V1), à entrer des paires de données, comprenant respectivement un élément de données des données d'entrée (x) et un élément de données correspondant des données de sortie (y) dans un réseau de neurones artificiels (ANN) et à assurer un apprentissage supervisé de l'instruction de régulation et/ou de commande (f) (V2), et à exécuter le réseau de neurones artificiels appris (ANN) sur des accélérateurs matériels pour l'intelligence artificielle du système intégré (ECU) (V3).
PCT/EP2021/074691 2020-09-08 2021-09-08 Procédé mis en œuvre par ordinateur, système intégré et programme informatique pour exécuter une instruction de régulation et/ou de commande Ceased WO2022053504A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP21773395.5A EP4211516A1 (fr) 2020-09-08 2021-09-08 Procédé mis en oeuvre par ordinateur, système intégré et programme informatique pour exécuter une instruction de régulation et/ou de commande

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102020211250.9 2020-09-08
DE102020211250.9A DE102020211250A1 (de) 2020-09-08 2020-09-08 Computerimplementiertes Verfahren, eingebettetes System und Computerprogramm zum Ausführen einer Regelungs- und/oder Steuerungsvorschrift

Publications (1)

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WO2022053504A1 true WO2022053504A1 (fr) 2022-03-17

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PCT/EP2021/074691 Ceased WO2022053504A1 (fr) 2020-09-08 2021-09-08 Procédé mis en œuvre par ordinateur, système intégré et programme informatique pour exécuter une instruction de régulation et/ou de commande

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EP (1) EP4211516A1 (fr)
DE (1) DE102020211250A1 (fr)
WO (1) WO2022053504A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102023203744A1 (de) * 2023-04-24 2024-10-24 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren und Vorrichtung zum Trainieren eines maschinellen Lernsystems
DE102023211942A1 (de) * 2023-11-29 2025-06-05 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren und Vorrichtung zum Trainieren eines maschinellen Lernsystems

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016010601A2 (fr) 2014-04-23 2016-01-21 The Florida State University Research Foundation, Inc. Commande prédictive de modèle non linéaire adaptative au moyen d'un réseau neuronal et d'un échantillonnage d'entrée
US9928460B1 (en) * 2017-06-16 2018-03-27 Google Llc Neural network accelerator tile architecture with three-dimensional stacking
DE102018110380A1 (de) * 2017-04-28 2018-10-31 Intel Corporation Tool zum Ermöglichen der Effizienz beim Maschinenlernen
DE102019122790A1 (de) * 2018-08-24 2020-02-27 Nvidia Corp. Robotersteuerungssystem
WO2020119268A1 (fr) * 2018-12-13 2020-06-18 阿里巴巴集团控股有限公司 Procédé et dispositif de prédiction sur la base d'un modèle

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016010601A2 (fr) 2014-04-23 2016-01-21 The Florida State University Research Foundation, Inc. Commande prédictive de modèle non linéaire adaptative au moyen d'un réseau neuronal et d'un échantillonnage d'entrée
DE102018110380A1 (de) * 2017-04-28 2018-10-31 Intel Corporation Tool zum Ermöglichen der Effizienz beim Maschinenlernen
US9928460B1 (en) * 2017-06-16 2018-03-27 Google Llc Neural network accelerator tile architecture with three-dimensional stacking
DE102019122790A1 (de) * 2018-08-24 2020-02-27 Nvidia Corp. Robotersteuerungssystem
WO2020119268A1 (fr) * 2018-12-13 2020-06-18 阿里巴巴集团控股有限公司 Procédé et dispositif de prédiction sur la base d'un modèle

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
KIDGERLYONS, TERRY: "Universal Approximation with Deep Narrow Networks", CONFERENCE ON LEARNING THEORY, July 2020 (2020-07-01)

Also Published As

Publication number Publication date
EP4211516A1 (fr) 2023-07-19
DE102020211250A1 (de) 2022-03-10

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