WO2022047170A1 - Fixture design for epitaxial lift-off systems with high etch selectivity - Google Patents
Fixture design for epitaxial lift-off systems with high etch selectivity Download PDFInfo
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- WO2022047170A1 WO2022047170A1 PCT/US2021/047972 US2021047972W WO2022047170A1 WO 2022047170 A1 WO2022047170 A1 WO 2022047170A1 US 2021047972 W US2021047972 W US 2021047972W WO 2022047170 A1 WO2022047170 A1 WO 2022047170A1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
- H10F71/139—Manufacture or treatment of devices covered by this subclass using temporary substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- This disclosure relates to fixtures used in the fabrication of photovoltaic devices, and in particular, to certain fixture designs for epitaxial lift-off (ELO) systems with high etch selectivity used in the fabrication of PV devices to reduce staining.
- ELO epitaxial lift-off
- a known technique for making certain types of photovoltaic structures or devices is to use a substrate on which to epitaxially grow the photovoltaic structure and then remove the photovoltaic structure from the substrate to further reuse the substrate.
- a thin layer typically referred to as a sacrificial layer or sacrificial release layer, is deposited on the substrate and the photovoltaic structure is gown on top of the sacrificial layer.
- the sacrificial layer is removed through a chemical process to separate the photovoltaic structure from the substrate. This separation process is generally referred to as an epitaxial lift-off (ELO) process.
- ELO epitaxial lift-off
- the sacrificial layer is made of AlAs and the photovoltaic structure is made of GaAs or some other compound semiconductor including different alloys formed from group lll-V compound semiconductors, for example.
- a wafer e.g., substrate with sacrificial release layer and photovoltaic structure
- HF hydrofluoric
- GaAs etch rate is increased appreciably with increased mass transport through convection.
- uniformity of HF solution e.g., uniformity of mass, heat, or momentum
- the GaAs etch rate is increased, non-uniformly within the process vessel, resulting in poor process control and defective device films, including defects known as ELO staining defects.
- FIG. 1A illustrates a perspective view of a first example of a mat platform used with a wafer base to reduce staining, in accordance with aspects of this disclosure.
- FIG. 1 B illustrates a perspective view of a second example of a mat platform used with a wafer base to reduce staining, in accordance with aspects of this disclosure.
- FIG. 2A illustrates a side view of the first example in FIG. 1A, in accordance with aspects of this disclosure.
- FIG. 2B illustrates a side view of the second example in FIG. 1 B, in accordance with aspects of this disclosure.
- FIG. 3 illustrates a top view of an example of a mat platform, in accordance with aspects of this disclosure.
- FIG. 4A illustrates an example of an ELO process that produces staining.
- FIG. 4B illustrates an example of an ELO process with the mat platform to reduce or eliminate staining, in accordance with aspects of this disclosure.
- FIG. 5 illustrates an example of how convection causes loss of selectivity in the ELO process.
- FIG. 6 illustrates an example of a flow diagram of a process or method for using a fixture for processing a photovoltaic structure, in accordance with aspects of this disclosure.
- a fixture for processing a wafer includes a mat platform configured to be movably attached to a first wafer base through a pusher such that the mat platform exerts pressure during an ELO process on a surface of the wafer placed on a second wafer base positioned below the first wafer base, the wafer having a photovoltaic structure to be separated from a substrate of the wafer by the ELO process.
- a method of using a fixture for processing a photovoltaic structure includes placing a wafer having the photovoltaic structure, a sacrificial layer, and a substrate on a first wafer base; lowering a mat platform movably attached to a second wafer base placed over the first wafer base, the mat platform making contact with and exerting pressure on the wafer on the first wafer base; performing an ELO process on the wafer while the mat platform exerts the pressure on the wafer, the ELO process removing the sacrificial layer and separate the photovoltaic structure from the substrate; raising the mat platform so that is no longer in contact with and exerting pressure on the wafer; and removing the photovoltaic structure from the first wafer base for further processing.
- This disclosure describes a wafer fixture design that incorporates a removable mat to limit the distance between the substrate and the film being released. Limiting the spacing distance yields consistently high selectivity between the sacrificial etch layer (e.g., AlAs layer) and the protective layer (e.g., GaAs layer), resulting in devices with no ELO staining defect.
- the sacrificial etch layer e.g., AlAs layer
- the protective layer e.g., GaAs layer
- a fixture may refer to a mat platform by itself or a combination of a mat platform with a corresponding wafer base.
- photovoltaics photovoltaic structures
- PVs photovoltaic structures
- PV cells solar cells
- a PV layer may refer to a layer (e.g., epitaxial layer, semiconductor layer) that includes one or more photovoltaics, photovoltaic structures, PVs, PV cells, and/or solar cells.
- an ELO process based on AlAs sacrificial release layer is allowed to take place by submerging a wafer (e.g., substrate with sacrificial release layer and photovoltaic structure), either in part or in whole, into a solution of HF acid.
- a wafer e.g., substrate with sacrificial release layer and photovoltaic structure
- Such approach is feasible for device fabrication based on the high etch selectivity of AlAs in HF versus, for example, a photovoltaic structure made of GaAs (selectivity — 10 7 ). This is in general true for a well-controlled, stagnant bath. Etch rate of GaAs is increased appreciably with increased mass transport through convection.
- uniformity of HF solution e.g., uniformity of mass, heat, or momentum
- uniformity of mass, heat, or momentum may not be well-controlled, resulting in natural or forced convection within the bath.
- the GaAs etch rate is increased, non-uniformly within the process vessel, resulting in poor process control and defective device films.
- This disclosure describes the use of a flat mat-like design, referred to as a mat platform, to exert sufficient force or pressure on a wafer to limit the spacing between flexible device film (e.g., thin-film photovoltaic structure) and the substrate during the ELO process.
- a mat platform to exert sufficient force or pressure on a wafer to limit the spacing between flexible device film (e.g., thin-film photovoltaic structure) and the substrate during the ELO process.
- aspects of this disclosure describe the technique of limiting the distance between flexible device film and substrate for robust process control and the design or implementation of a mat attachment for multi-tiered (e.g., stackable) wafer bases in high-volume ELO process systems.
- the mat platform (also referred simply as a mat) described in this disclosure is an add-on feature to stackable wafer bases on which wafers are placed for ELO processing.
- a mat e.g., a flat mat
- the film may refer to the photovoltaic structure and/or other layers above the sacrificial layer (e.g., a laminate or handle).
- the mat is also lifted or raised with the wafer base above by, for example, fasteners such as countersunk screws.
- the mat may be attached to a pusher that sits on a pocket on the wafer base above such that only the mat’s weight and the pusher’s weight are exerted onto the film below.
- the mat may be integrated into a top clamp since there may only be one wafer base, the one holding a wafer below the mat.
- the mat may be installed as a wafer base.
- the mat may not be flat overall, but wavy or other shapes (e.g., non-flat or non-uniform surface) and yet configured to keep film flat against substrate.
- the mat may be flexible and not rigid, but also exerts enough force to keep film fiat against substrate.
- the mat may be porous.
- the mat may consist of multiple mats, or an array of pin-like materials.
- the present disclosure describes the use of a mat or mat platform, that can be made of a plastic or similar material, and is introduced to improve or increase the robustness of high-volume ELO process by reducing or eliminating defects such as staining defects (e.g., discolorations in certain regions of the photovoltaic device).
- staining defects e.g., discolorations in certain regions of the photovoltaic device.
- the non-uniformity in the process e.g., non-uniform temperature, concentration, pressure, etc.
- the implementation of the mat platform needs to provide an appropriate level of pressure or force, and may take into consideration processing aspects such as the film structure and/or the buoyancy of the mat platform in the acid bath, to name a few.
- FIG. 1A illustrates a diagram 100a with a perspective view of a first example of a mat platform 120 used with a wafer base 110 to reduce staining, in accordance with aspects of this disclosure.
- the mat platform 120 is placed or positioned below the wafer base 110.
- the mat platform 120 may be rigid or soft and may have a bottom surface that is flat, substantially flat (e.g., flat is a majority of the surface), or non-flat (e.g., wavy or with surface structures).
- the bottom surface of the mat platform 120 is used to contact and exert pressure or force on a wafer below the mat platform 120, this pressure limits the distance between a film and a substrate in the wafer that are being separated during an ELO process, thereby reducing or eliminating staining defects caused by convection effects that may occur near the place of separation.
- fasteners 130 used to mount the mat platform 120 below the wafer base 110.
- the fasteners 130 may be countersunk screws, for example, that screw into holes in the mat platform 120 and allow for the mat platform 120 to be movably attached to the wafer base 110.
- the mat platform 120 may include mounting posts with holes into which the countersunk screws may be screwed (see e.g., FIG. 2A). Additionally or alternatively, the mat platform 120 may have holes in it to screw the countersunk screws (see e.g., FIG. 2B).
- the mat platform 120 may movably hang from the wafer base 110 while still being attached or connected to it. That is, when the wafer base 110 is raised, the mat platform 120 is raised along with the wafer base 110. When the wafer base 110 is lowered, the mat platform 120 is also lowered until it makes contact with a wafer below, in which case the weight of the mat platform 120 (but not that of the wafer base 110) is exerted on the wafer.
- the countersunk screws can be made of any one of different materials, including thermoplastics such as polyvinylidene fluoride or polyvinylidene difluoride (PVDF), for example.
- the diagram 100a also shows holes 115a and 115b in the wafer base 110 that can be used to insert the wafer base 110 into a couple of posts to allow for multiple wafer bases 110 to be movably stacked on top of each other.
- the mat platform 120 of one wafer base 110 is used to exert pressure on the wafer being held by the wafer base 110 below, and in turn the mat platform 120 of the wafer base 110 below may exert pressure on the wafer being held by the wafer base 110 below that one.
- FIG. 1B illustrates a diagram 100b with a perspective view of a second example of the mat platform 120 used with the wafer base 110 to reduce staining, in accordance with aspects of this disclosure.
- the wafer base 110 in this example has a slightly different configuration (e.g., shape, form factor) than the one shown in the diagram 100a. Additionally or alternatively, the fasteners 130 are located in different positions than as described above.
- the mat platform 120 may have a unique set of holes (either directly on the mat platform 120 or on mounting posts on the mat platform 120) to which the fasteners 130 (e.g., countersunk screws) attach. In that case, the set of holes would be different (e.g., placed in different locations) for the examples shown in the diagrams 100a and 100b.
- the mat platform 120 may have more than one set of holes to which the fasteners 130 attach. In such a case, the same mat platform 120 may be flexible and may be used with the wafer base 110 in the diagram 100a or with the wafer base 110 in the diagram 100b, or with other types of wafer bases.
- FIG. 2A illustrates a diagram 200a that shows a side or cross-sectional view of the first example in FIG. 1A, in accordance with aspects of this disclosure.
- the wafer base 110 is shown to be positioned above the mat platform 120 (a separate wafer base with a wafer on top would be placed below this one).
- the mat platform 120 may include multiple mounting posts 210 with holes that are used to screw countersunk screws used as the fasteners 130.
- the countersunk screws are not attached to the wafer base 110 and the heads of the countersunk screws may rest on a pocket or similar cavity in the wafer base 110 such that the mat platform 120 may move up or down.
- FIG. 2B illustrates a diagram 200b that shows a side or cross-sectional view of the second example in FIG. 1 B, in accordance with aspects of this disclosure.
- the wafer base 110 is shown to be positioned above the mat platform 120 (a separate wafer base with a wafer on top would be placed below this one).
- the mat platform 120 may include multiple holes 220 that are used to screw countersunk screws used as the fasteners 130.
- the countersunk screws are again not attached to the wafer base 110 and the heads of the countersunk screws may rest on a pocket or similar cavity in the wafer base 110 such that the mat platform 120 may move up or down.
- FIG. 3 illustrates a diagram 300 that shows a top view of an example of a mat platform 120, in accordance with aspects of this disclosure.
- the mat platform 120 is substantially rectangular (corners are cut), although square, circular, or other shapes may also be used depending on the shape of the wafers being processed.
- the mat platform 120 may include one or more sets of holes 310 for attaching (e.g., screwing) the fasteners 130 used to mount the mat platform 120 to the wafer base 110.
- the mat platform 120 may also include multiple holes 320 to drain the acid used during the ELO process. For example, when the wafer base 110 to which the mat platform 120 is attached is raised to allow access to the wafer below, the holes 320 allow any acid (e.g., HF acid) to be drained.
- any acid e.g., HF acid
- FIG. 4A illustrates a diagram 400a that shows an example of an ELO process that produces staining.
- it is very difficult to control the acid in the bath. For example, it is very difficult to ensure uniform temperature, concentration, or other physical parameters. This lack of uniformity induces convection, which is shown in the diagram 400a by the circulating arrows.
- the diagram 400a shows how convection results in staining defects on a photovoltaic device 430 (which includes a photovoltaic structure).
- a top or first wafer base 110a is shown on top of a bottom or second wafer base 110b that holds a wafer for ELO processing.
- the first wafer base 110a is not shown holding a wafer, it is possible that the first wafer base 110a also holds a wafer for ELO processing.
- the wafer in this case is shown by a film 410 placed over a substrate 420, where the film 410 typically includes the photovoltaic structure or layer(s) that is being separated from the substrate 420.
- the convection increases undesired etching of the film 410 (e.g., undesired etching of GaAs on the device), which is reflected in the discoloration or staining of the photovoltaic device 430. If it were possible to limit the space between the film 410 and the substrate 420 to avoid convection, the convection would occur somewhere else and not immediately in from of the film 410.
- FIG. 4B illustrates a diagram 400b that shows an example of an ELO process with the mat platform 120 to reduce or eliminate staining, in accordance with aspects of this disclosure.
- the mat platform 120 keeps the film 410 flat against the substrate 420 forcing the convection (circular arrows) to take place somewhere other than in from of the film 410.
- staining defects can be avoided or significantly reduced.
- Limiting space between film & substrate during ELO ⁇ 1 mm eliminates ELO stain.
- FIG. 5 illustrates a diagram 500 that shows an example of how convection causes loss of selectivity in the ELO process.
- This example shows the separation of the wafer during the ELO process as the substrate 570 (an example of the substrate 420 in FIGS. 4A and 4B) is separated from a film including a laminate 510, a back metal 520, a rest of the device (e.g., photovoltaic layers) 530, a front window 540, and a GaAs front-contact layer 550 (labeled as front-contact layer 550), by removing or etching away a sacrificial release layer 560 made of AlAs using ELO chemistry (e.g., HF acid).
- ELO chemistry e.g., HF acid
- the staining defect results from a loss of selectivity in the etching of the sacrificial release layer 560 when the front of the film lifts and the GaAs front-contact layer 550 is unintentionally etched during the ELO process. This is perceived as a form of discoloration or staining as shown at the left and bottom edges of the photovoltaic device 430 in the diagram 400a. There is a color change because of the reduced thickness of the GaAs front-contact layer 550. A severe stain may result if there is a total loss (complete etching) of at least part of the GaAs front-contact layer 550. These staining defects may also result in poor passivation of the device.
- the use of the mat platform 120 as illustrated in the diagram 400b in FIG. 4B ensures that the spacing or distance between the film 410 and the substrate 420 is limited such that the GaAs front-contact layer 550 is not etched away along with the sacrificial release layer 560.
- FIG. 6 illustrates an example of a flow diagram of a process or method 600 for using a fixture for processing a photovoltaic structure, in accordance with aspects of this disclosure.
- the method 600 includes placing a wafer having the photovoltaic structure, a sacrificial layer, and a substrate on a first wafer base (see e.g., wafer base 110b in the diagram 400b of FIG. 4B).
- the method 600 includes lowering a mat platform (e.g., mat platform 120) attached to a bottom portion of a second wafer base placed over the first wafer base, the mat platform making contact with and exerting pressure on the wafer on the first wafer base (see e.g., wafer base 110a in the diagram 400b of FIG. 4B).
- a mat platform e.g., mat platform 120
- the method 600 includes performing an ELO process on the wafer while the mat platform exerts the pressure on the wafer, the ELO process removing the sacrificial layer and separating the photovoltaic structure from the substrate.
- the method 600 includes raising the mat platform so that is no longer in contact with and exerting pressure on the wafer.
- the method 600 includes removing the photovoltaic structure (e.g., the film 410) from the first wafer base for further processing.
- the photovoltaic structure e.g., the film 410
- performing the ELO process may include placing the first wafer base with the wafer and the second wafer base with the mat platform inside an acid tank or bath tor removing the sacrificial layer.
- the first wafer base and the second wafer base are stackable.
- the mat platform is made of a plastic material that is compatible with an acid used in the ELO process to remove a sacrificial layer in the wafer.
- the mat platform may include multiple holes for draining of an acid used in the ELO process (see e.g., holes 320 in the mat platform 120 in the diagram 300 of FIG. 3).
- a shape of the mat platform corresponds to a shape of the wafer.
- a bottom surface of the mat platform in contact with the wafer to exert the pressure on the wafer during the ELO process is substantially flat.
- the bottom surface of the mat platform is configured to contact a laminate or handle on a top portion of the wafer (see e.g., the laminate 510 in the diagram 500 of FIG. 5).
- the mat platform is attached to a lower portion of a pusher and the second wafer base has a pocket within which an upper portion of the pusher is configured to move vertically to allow the mat platform to be lowered away from the second wafer base by the weight of the pusher to make contact with and exert pressure on the wafer placed on the first wafer base.
- a center portion of the mat platform may be attached to the lower portion of the pusher.
- the pusher may act as a single but larger fastener 130 that by having some weight provides additional force or pressure on the wafer by adding its weight to the weight of the mat platform.
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Abstract
Various aspects of this disclosure relate to a fixture design for epitaxial lift-off (ELO) systems with high etch sensitivity. In one aspect, a fixture for processing a wafer includes a mat platform configured to be movably attached to a bottom portion of a first wafer base such that the mat platform exerts pressure during an ELO process on a surface of the wafer placed on a second wafer base positioned below the first wafer base, the wafer having a photovoltaic structure to be separated from a substrate of the wafer by the ELO process, In another aspect, a method of using a fixture for processing a photovoltaic structure is described.
Description
FIXTURE DESIGN FOR EPITAXIAL LIFT-OFF SYSTEMS WITH HIGH ETCH SELECTIVITY
CROSS-REFERENCE TO RELATED APPLICATIONS
[001] This application claims priority to U.S. Patent Provisional Application No. 63/071 ,266, filed August 27, 2020, the entire contents of which are hereby incorporated by reference.
TECHNICAL FIELD
[002] This disclosure relates to fixtures used in the fabrication of photovoltaic devices, and in particular, to certain fixture designs for epitaxial lift-off (ELO) systems with high etch selectivity used in the fabrication of PV devices to reduce staining.
BACKGROUND
[003] A known technique for making certain types of photovoltaic structures or devices is to use a substrate on which to epitaxially grow the photovoltaic structure and then remove the photovoltaic structure from the substrate to further reuse the substrate. A thin layer, typically referred to as a sacrificial layer or sacrificial release layer, is deposited on the substrate and the photovoltaic structure is gown on top of the sacrificial layer. The sacrificial layer is removed through a chemical process to separate the photovoltaic structure from the substrate. This separation process is generally referred to as an epitaxial lift-off (ELO) process.
[004] In some implementations, the sacrificial layer is made of AlAs and the photovoltaic structure is made of GaAs or some other compound semiconductor including different alloys formed from group lll-V compound semiconductors, for example. Usually an ELO process based on AlAs sacrificial release layer is allowed to take place by submerging a wafer (e.g., substrate with sacrificial release layer and photovoltaic structure), either in part or in whole, into a solution of hydrofluoric (HF) acid. Such approach is feasible for device fabrication based on the high etch selectivity of AlAs in HF versus, for example, a photovoltaic structure made of GaAs (selectivity —
107). This is in general true for a well-controlled, stagnant bath. The etch rate of GaAs is increased appreciably with increased mass transport through convection. In larger scale applications, uniformity of HF solution (e.g., uniformity of mass, heat, or momentum) may not be well-controlled, resulting in natural or forced convection within the bath. In such cases, the GaAs etch rate is increased, non-uniformly within the process vessel, resulting in poor process control and defective device films, including defects known as ELO staining defects.
[005] Techniques that reduce or eliminate the defects that may result from the natural or forced convection within the acid bath are desirable.
BRIEF DESCRIPTION OF THE DRAWINGS
[006] FIG. 1A illustrates a perspective view of a first example of a mat platform used with a wafer base to reduce staining, in accordance with aspects of this disclosure.
[007] FIG. 1 B illustrates a perspective view of a second example of a mat platform used with a wafer base to reduce staining, in accordance with aspects of this disclosure.
[008] FIG. 2A illustrates a side view of the first example in FIG. 1A, in accordance with aspects of this disclosure.
[009] FIG. 2B illustrates a side view of the second example in FIG. 1 B, in accordance with aspects of this disclosure.
[0010] FIG. 3 illustrates a top view of an example of a mat platform, in accordance with aspects of this disclosure.
[0011] FIG. 4A illustrates an example of an ELO process that produces staining.
[0012] FIG. 4B illustrates an example of an ELO process with the mat platform to reduce or eliminate staining, in accordance with aspects of this disclosure.
[0013] FIG. 5 illustrates an example of how convection causes loss of selectivity in the ELO process.
[0014] FIG. 6 illustrates an example of a flow diagram of a process or method for using a fixture for processing a photovoltaic structure, in accordance with aspects of this disclosure.
SUMMARY OF THE DISCLOSURE
[0015] The following presents a simplified summary of one or more aspects in order to provide a basic understanding of such aspects. This summary is not an extensive overview of all contemplated aspects, and is intended to neither identify key or critical elements of all aspects nor delineate the scope of any or all aspects. Its purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that is presented later.
[0016] In one aspect, a fixture for processing a wafer includes a mat platform configured to be movably attached to a first wafer base through a pusher such that the mat platform exerts pressure during an ELO process on a surface of the wafer placed on a second wafer base positioned below the first wafer base, the wafer having a photovoltaic structure to be separated from a substrate of the wafer by the ELO process.
[0017] In another aspect, a method of using a fixture for processing a photovoltaic structure includes placing a wafer having the photovoltaic structure, a sacrificial layer, and a substrate on a first wafer base; lowering a mat platform movably attached to a second wafer base placed over the first wafer base, the mat platform making contact with and exerting pressure on the wafer on the first wafer base; performing an ELO process on the wafer while the mat platform exerts the pressure on the wafer, the ELO process removing the sacrificial layer and separate the photovoltaic structure from the substrate; raising the mat platform so that is no longer in contact with and exerting pressure on the wafer; and removing the photovoltaic structure from the first wafer base for further processing.
[0018] This disclosure describes a wafer fixture design that incorporates a removable mat to limit the distance between the substrate and the film being released. Limiting the spacing distance yields consistently high selectivity between the sacrificial etch layer (e.g., AlAs layer) and the protective layer (e.g., GaAs layer), resulting in devices with no ELO staining defect.
DETAILED DESCRIPTION
[0019] This disclosure describes various aspects related to fixtures used in the fabrication of photovoltaic devices, and in particular, to certain fixture designs for epitaxial lift-off (ELO) systems with high etch selectivity used in the fabrication of PV devices to reduce staining. In this disclosure, a fixture may refer to a mat platform by itself or a combination of a mat platform with a corresponding wafer base. As used herein the terms “photovoltaics,” “photovoltaic structures,” “PVs,” “PV cells,” and “solar cells” may be used interchangeably to refer to one or more portions of an optoelectronic component that produce voltage and/or electric current when exposed to light. A PV layer may refer to a layer (e.g., epitaxial layer, semiconductor layer) that includes one or more photovoltaics, photovoltaic structures, PVs, PV cells, and/or solar cells.
[0020] As described above, an ELO process based on AlAs sacrificial release layer is allowed to take place by submerging a wafer (e.g., substrate with sacrificial release layer and photovoltaic structure), either in part or in whole, into a solution of HF acid. Such approach is feasible for device fabrication based on the high etch selectivity of AlAs in HF versus, for example, a photovoltaic structure made of GaAs (selectivity — 107). This is in general true for a well-controlled, stagnant bath. Etch rate of GaAs is increased appreciably with increased mass transport through convection. In larger scale applications, uniformity of HF solution (e.g., uniformity of mass, heat, or momentum) may not be well-controlled, resulting in natural or forced convection within the bath. In such cases, the GaAs etch rate is increased, non-uniformly within the process vessel, resulting in poor process control and defective device films.
[0021] This disclosure describes the use of a flat mat-like design, referred to as a mat platform, to exert sufficient force or pressure on a wafer to limit the spacing between flexible device film (e.g., thin-film photovoltaic structure) and the substrate during the ELO process. Thus, aspects of this disclosure describe the technique of limiting the distance between flexible device film and substrate for robust process control and the design or implementation of a mat attachment for multi-tiered (e.g., stackable) wafer bases in high-volume ELO process systems.
[0022] The mat platform (also referred simply as a mat) described in this disclosure is an add-on feature to stackable wafer bases on which wafers are placed for
ELO processing. A mat (e.g., a flat mat) may be installed under the wafer base above. During ELO process, the mat sits on top of the film, keeping the film flat against its substrate. The film may refer to the photovoltaic structure and/or other layers above the sacrificial layer (e.g., a laminate or handle). During load/unload of the wafers into the wafer bases, while the wafer base above is lifted, the mat is also lifted or raised with the wafer base above by, for example, fasteners such as countersunk screws. The countersunk screws are lifted when the mat sits on top of a film, thereby exerting only the mat’s weight onto the film without the weight of the wafer bases above. Additionally or alternatively, the mat may be attached to a pusher that sits on a pocket on the wafer base above such that only the mat’s weight and the pusher’s weight are exerted onto the film below. In one implementation, for a single wafer ELO, the mat may be integrated into a top clamp since there may only be one wafer base, the one holding a wafer below the mat. In another implementation, where substrate and film are upsidedown the mat may be installed as a wafer base. In yet another embodiment, the mat may not be flat overall, but wavy or other shapes (e.g., non-flat or non-uniform surface) and yet configured to keep film flat against substrate. In yet another embodiment, the mat may be flexible and not rigid, but also exerts enough force to keep film fiat against substrate. In yet another embodiment, the mat may be porous. In another embodiment, the mat may consist of multiple mats, or an array of pin-like materials.
[0023] Accordingly, the present disclosure describes the use of a mat or mat platform, that can be made of a plastic or similar material, and is introduced to improve or increase the robustness of high-volume ELO process by reducing or eliminating defects such as staining defects (e.g., discolorations in certain regions of the photovoltaic device). By using the mat platform, the non-uniformity in the process (e.g., non-uniform temperature, concentration, pressure, etc.) that introduces convection and can cause the staining defects, can be countered by moving the convection effects away from the critical places in the ELO process. The implementation of the mat platform needs to provide an appropriate level of pressure or force, and may take into consideration processing aspects such as the film structure and/or the buoyancy of the mat platform in the acid bath, to name a few.
[0024] Additional details related to this disclosure are provided in connection with the description of FIGS. 1A-6 provided below.
[0025] FIG. 1A illustrates a diagram 100a with a perspective view of a first example of a mat platform 120 used with a wafer base 110 to reduce staining, in accordance with aspects of this disclosure. The mat platform 120 is placed or positioned below the wafer base 110. The mat platform 120 may be rigid or soft and may have a bottom surface that is flat, substantially flat (e.g., flat is a majority of the surface), or non-flat (e.g., wavy or with surface structures). The bottom surface of the mat platform 120 is used to contact and exert pressure or force on a wafer below the mat platform 120, this pressure limits the distance between a film and a substrate in the wafer that are being separated during an ELO process, thereby reducing or eliminating staining defects caused by convection effects that may occur near the place of separation.
[0026] Also shown are multiple fasteners 130 used to mount the mat platform 120 below the wafer base 110. In this example, three (3) fasteners 130 are shown, although more or fewer may be used. The fasteners 130 may be countersunk screws, for example, that screw into holes in the mat platform 120 and allow for the mat platform 120 to be movably attached to the wafer base 110. The mat platform 120 may include mounting posts with holes into which the countersunk screws may be screwed (see e.g., FIG. 2A). Additionally or alternatively, the mat platform 120 may have holes in it to screw the countersunk screws (see e.g., FIG. 2B). By using countersunk screws, or other similar fasteners (e.g., a pusher), the mat platform 120 may movably hang from the wafer base 110 while still being attached or connected to it. That is, when the wafer base 110 is raised, the mat platform 120 is raised along with the wafer base 110. When the wafer base 110 is lowered, the mat platform 120 is also lowered until it makes contact with a wafer below, in which case the weight of the mat platform 120 (but not that of the wafer base 110) is exerted on the wafer. The countersunk screws can be made of any one of different materials, including thermoplastics such as polyvinylidene fluoride or polyvinylidene difluoride (PVDF), for example.
[0027] The diagram 100a also shows holes 115a and 115b in the wafer base 110 that can be used to insert the wafer base 110 into a couple of posts to allow for multiple wafer bases 110 to be movably stacked on top of each other. By having multiple wafer bases 110 stacked on top of each other, the mat platform 120 of one wafer base 110 is used to exert pressure on the wafer being held by the wafer base 110 below, and in
turn the mat platform 120 of the wafer base 110 below may exert pressure on the wafer being held by the wafer base 110 below that one.
[0028] FIG. 1B illustrates a diagram 100b with a perspective view of a second example of the mat platform 120 used with the wafer base 110 to reduce staining, in accordance with aspects of this disclosure. The wafer base 110 in this example has a slightly different configuration (e.g., shape, form factor) than the one shown in the diagram 100a. Additionally or alternatively, the fasteners 130 are located in different positions than as described above.
[0029] The mat platform 120 may have a unique set of holes (either directly on the mat platform 120 or on mounting posts on the mat platform 120) to which the fasteners 130 (e.g., countersunk screws) attach. In that case, the set of holes would be different (e.g., placed in different locations) for the examples shown in the diagrams 100a and 100b. On the other hand, the mat platform 120 may have more than one set of holes to which the fasteners 130 attach. In such a case, the same mat platform 120 may be flexible and may be used with the wafer base 110 in the diagram 100a or with the wafer base 110 in the diagram 100b, or with other types of wafer bases.
[0030] FIG. 2A illustrates a diagram 200a that shows a side or cross-sectional view of the first example in FIG. 1A, in accordance with aspects of this disclosure. The wafer base 110 is shown to be positioned above the mat platform 120 (a separate wafer base with a wafer on top would be placed below this one). The mat platform 120 may include multiple mounting posts 210 with holes that are used to screw countersunk screws used as the fasteners 130. The countersunk screws are not attached to the wafer base 110 and the heads of the countersunk screws may rest on a pocket or similar cavity in the wafer base 110 such that the mat platform 120 may move up or down.
[0031] FIG. 2B illustrates a diagram 200b that shows a side or cross-sectional view of the second example in FIG. 1 B, in accordance with aspects of this disclosure. Like in the example above, the wafer base 110 is shown to be positioned above the mat platform 120 (a separate wafer base with a wafer on top would be placed below this one). The mat platform 120 may include multiple holes 220 that are used to screw countersunk screws used as the fasteners 130. The countersunk screws are again not
attached to the wafer base 110 and the heads of the countersunk screws may rest on a pocket or similar cavity in the wafer base 110 such that the mat platform 120 may move up or down.
[0032] FIG. 3 illustrates a diagram 300 that shows a top view of an example of a mat platform 120, in accordance with aspects of this disclosure. In this example, the mat platform 120 is substantially rectangular (corners are cut), although square, circular, or other shapes may also be used depending on the shape of the wafers being processed. The mat platform 120 may include one or more sets of holes 310 for attaching (e.g., screwing) the fasteners 130 used to mount the mat platform 120 to the wafer base 110.
[0033] The mat platform 120 may also include multiple holes 320 to drain the acid used during the ELO process. For example, when the wafer base 110 to which the mat platform 120 is attached is raised to allow access to the wafer below, the holes 320 allow any acid (e.g., HF acid) to be drained.
[0034] FIG. 4A illustrates a diagram 400a that shows an example of an ELO process that produces staining. In large-scale manufacturing applications, it is very difficult to control the acid in the bath. For example, it is very difficult to ensure uniform temperature, concentration, or other physical parameters. This lack of uniformity induces convection, which is shown in the diagram 400a by the circulating arrows.
[0035] The diagram 400a shows how convection results in staining defects on a photovoltaic device 430 (which includes a photovoltaic structure). In this example, a top or first wafer base 110a is shown on top of a bottom or second wafer base 110b that holds a wafer for ELO processing. Although the first wafer base 110a is not shown holding a wafer, it is possible that the first wafer base 110a also holds a wafer for ELO processing. The wafer in this case is shown by a film 410 placed over a substrate 420, where the film 410 typically includes the photovoltaic structure or layer(s) that is being separated from the substrate 420. The convection (circular arrows) increases undesired etching of the film 410 (e.g., undesired etching of GaAs on the device), which is reflected in the discoloration or staining of the photovoltaic device 430. If it were possible to limit the space between the film 410 and the substrate 420 to avoid
convection, the convection would occur somewhere else and not immediately in from of the film 410.
[0036] FIG. 4B illustrates a diagram 400b that shows an example of an ELO process with the mat platform 120 to reduce or eliminate staining, in accordance with aspects of this disclosure. In this case, the mat platform 120 keeps the film 410 flat against the substrate 420 forcing the convection (circular arrows) to take place somewhere other than in from of the film 410. By limiting the space that there is between the film 410 and the substrate 420 to less than 1 mm, for example, staining defects can be avoided or significantly reduced. Limiting space between film & substrate during ELO < 1 mm = eliminates ELO stain.
[0037] FIG. 5 illustrates a diagram 500 that shows an example of how convection causes loss of selectivity in the ELO process. This example shows the separation of the wafer during the ELO process as the substrate 570 (an example of the substrate 420 in FIGS. 4A and 4B) is separated from a film including a laminate 510, a back metal 520, a rest of the device (e.g., photovoltaic layers) 530, a front window 540, and a GaAs front-contact layer 550 (labeled as front-contact layer 550), by removing or etching away a sacrificial release layer 560 made of AlAs using ELO chemistry (e.g., HF acid). It is to be understood that the wafer shown in this example (e.g., substrate, sacrificial release layer, and film) is provided by way of illustration and not of limitation, and other structural arrangements may be similarly used.
[0038] The staining defect results from a loss of selectivity in the etching of the sacrificial release layer 560 when the front of the film lifts and the GaAs front-contact layer 550 is unintentionally etched during the ELO process. This is perceived as a form of discoloration or staining as shown at the left and bottom edges of the photovoltaic device 430 in the diagram 400a. There is a color change because of the reduced thickness of the GaAs front-contact layer 550. A severe stain may result if there is a total loss (complete etching) of at least part of the GaAs front-contact layer 550. These staining defects may also result in poor passivation of the device.
[0039] The use of the mat platform 120 as illustrated in the diagram 400b in FIG. 4B ensures that the spacing or distance between the film 410 and the substrate 420 is
limited such that the GaAs front-contact layer 550 is not etched away along with the sacrificial release layer 560.
[0040] FIG. 6 illustrates an example of a flow diagram of a process or method 600 for using a fixture for processing a photovoltaic structure, in accordance with aspects of this disclosure.
[0041] At 605, the method 600 includes placing a wafer having the photovoltaic structure, a sacrificial layer, and a substrate on a first wafer base (see e.g., wafer base 110b in the diagram 400b of FIG. 4B).
[0042] At 610, the method 600 includes lowering a mat platform (e.g., mat platform 120) attached to a bottom portion of a second wafer base placed over the first wafer base, the mat platform making contact with and exerting pressure on the wafer on the first wafer base (see e.g., wafer base 110a in the diagram 400b of FIG. 4B).
[0043] At 615, the method 600 includes performing an ELO process on the wafer while the mat platform exerts the pressure on the wafer, the ELO process removing the sacrificial layer and separating the photovoltaic structure from the substrate.
[0044] At 620, the method 600 includes raising the mat platform so that is no longer in contact with and exerting pressure on the wafer.
[0045] At 625, the method 600 includes removing the photovoltaic structure (e.g., the film 410) from the first wafer base for further processing.
[0046] In another aspect of the method 600, performing the ELO process may include placing the first wafer base with the wafer and the second wafer base with the mat platform inside an acid tank or bath tor removing the sacrificial layer.
[0047] In another aspect of the method 600, the first wafer base and the second wafer base are stackable.
[0048] In another aspect of the method 600, the mat platform is made of a plastic material that is compatible with an acid used in the ELO process to remove a sacrificial layer in the wafer.
[0049] In another aspect of the method 600, the mat platform may include multiple holes for draining of an acid used in the ELO process (see e.g., holes 320 in the mat platform 120 in the diagram 300 of FIG. 3).
[0050] In another aspect of the method 600, a shape of the mat platform corresponds to a shape of the wafer.
[0051] In yet another aspect of the method 600, a bottom surface of the mat platform in contact with the wafer to exert the pressure on the wafer during the ELO process is substantially flat. The bottom surface of the mat platform is configured to contact a laminate or handle on a top portion of the wafer (see e.g., the laminate 510 in the diagram 500 of FIG. 5).
[0052] In yet another aspect of the method 600, the mat platform is attached to a lower portion of a pusher and the second wafer base has a pocket within which an upper portion of the pusher is configured to move vertically to allow the mat platform to be lowered away from the second wafer base by the weight of the pusher to make contact with and exert pressure on the wafer placed on the first wafer base. A center portion of the mat platform may be attached to the lower portion of the pusher. The pusher may act as a single but larger fastener 130 that by having some weight provides additional force or pressure on the wafer by adding its weight to the weight of the mat platform.
[0053] The above description of various embodiments of the claimed subject matter has been provided for the purposes of illustration and description. It is not intended to be exhaustive or to limit the claimed subject matter to the precise forms disclosed. Many modifications and variations will be apparent to one skilled in the art. Embodiments were chosen and described in order to best describe certain principles and practical applications, thereby enabling others skilled in the relevant art to understand the subject matter, the various embodiments and the various modifications that are suited to the particular uses contemplated.
Claims
1 . A fixture for processing a wafer, comprising: a mat platform constructed to be movably attached to a bottom portion of a first wafer base such that the mat platform exerts pressure during an epitaxial lift-off (ELO) process on a surface of the first wafer placed on a second wafer base positioned below the first wafer base, wherein the wafer comprises a photovoltaic structure constructed to be separated from a substrate of the wafer by the ELO process.
2. The fixture of claim 1 , wherein the mat platform is made of a plastic material that is compatible with an acid used in the ELO process to remove a sacrificial layer in the wafer.
3. The fixture of claim 1 , wherein the mat platform includes multiple holes for draining of an acid used in the ELO process.
4. The fixture of claim 1 , wherein a shape of the mat platform corresponds to a shape of the wafer.
5. The fixture of claim 4, wherein the shape of the mat platform is substantially rectangular to match the shape of the wafer.
6. The fixture of claim 1 , wherein a bottom surface of the mat platform in contact with the wafer to exert the pressure on the wafer during the ELO process is substantially flat.
7. The fixture of claim 6, wherein the bottom surface of the mat platform is configured to contact a laminate or handle on a top portion of the wafer, the substrate of the wafer rests on the second wafer base and is separated from the photovoltaic structure when a sacrificial layer of the wafer is removed by the ELO process.
8. The fixture of claim 1 , wherein a bottom surface of the mat platform in contact with the wafer to exert the pressure on the wafer during the ELO process is not flat.
9. The fixture of claim 1 , wherein the mat platform is attached to a lower portion of a pusher, the first wafer base having a pocket within which an upper portion of the pusher is configured to move vertically to allow the mat platform to be lowered away from the first wafer base by the weight of the pusher to make contact with and exert pressure on the wafer placed on the second wafer base.
10. The fixture of claim 9, wherein a center portion of the mat platform is attached to the lower portion of the pusher.
11. The fixture of claim 1 , further comprising one or more fasteners to mount the mat platform on the bottom portion of the first wafer base, the one or more fasteners configured to allow the mat platform to be raised or lowered relative to the first wafer base.
12. A method of using a fixture for processing a photovoltaic structure, comprising: placing a wafer having the photovoltaic structure, a sacrificial layer, and a substrate on a first wafer base; lowering a mat platform attached to a bottom portion of a second wafer base placed over the first wafer base, the mat platform making contact with and exerting pressure on the wafer on the first wafer base; performing an epitaxial lift-off (ELO) process on the wafer while the mat platform exerts the pressure on the wafer, the ELO process removing the sacrificial layer and separate the photovoltaic structure from the substrate; raising the mat platform so that is no longer in contact with and exerting pressure on the wafer; and removing the photovoltaic structure from the first wafer base for further processing.
13. The method of claim 12, wherein performing the ELO process includes placing the first wafer base with the wafer and the second wafer base with the mat platform inside an acid tank tor removing the sacrificial layer.
14. The method of claim 12, wherein the first wafer base and the second wafer base are stackable.
15. The method of claim 12, wherein the mat platform is made of a plastic material that is compatible with an acid used in the ELO process to remove a sacrificial layer in the wafer.
16. The method of claim 12, wherein the mat platform includes multiple holes for draining of an acid used in the ELO process.
17. The method of claim 12, wherein a shape of the mat platform corresponds to a shape of the wafer.
18. The method of claim 12, wherein a bottom surface of the mat platform in contact with the wafer to exert the pressure on the wafer during the ELO process is substantially flat.
19. The method of claim 18, wherein the bottom surface of the mat platform is configured to contact a laminate or handle on a top portion of the wafer.
20. The method of claim 12, wherein the mat platform is attached to a lower portion of a pusher and the second wafer base has a pocket within which an upper portion of the pusher is configured to move vertically to allow the mat platform to be lowered away from the second wafer base by the weight of the pusher to make contact with and exert pressure on the wafer placed on the first wafer base.
21. The method of claim 20, wherein a center portion of the mat platform is attached to the lower portion of the pusher.
-14-
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US202063071266P | 2020-08-27 | 2020-08-27 | |
| US63/071,266 | 2020-08-27 |
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| Publication Number | Publication Date |
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| WO2022047170A1 true WO2022047170A1 (en) | 2022-03-03 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2021/047972 Ceased WO2022047170A1 (en) | 2020-08-27 | 2021-08-27 | Fixture design for epitaxial lift-off systems with high etch selectivity |
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| WO (1) | WO2022047170A1 (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100101725A1 (en) * | 2008-10-28 | 2010-04-29 | Eric Ting-Shan Pan | Apparatus for Making Epitaxial Film |
| US20100147370A1 (en) * | 2008-12-08 | 2010-06-17 | Alta Devices, Inc. | Multiple stack deposition for epitaxial lift off |
| US20150279741A1 (en) * | 2008-05-30 | 2015-10-01 | Alta Devices, Inc. | Epitaxial lift off stack having a pre-curved handle and methods thereof |
| US20160049334A1 (en) * | 2008-12-17 | 2016-02-18 | Alta Devices, Inc. | Tape-based epitaxial lift off apparatuses and methods |
| US20170047471A1 (en) * | 2012-01-19 | 2017-02-16 | Alta Devices, Inc. | Thin-film semiconductor optoelectronic device with textured front and/or back surface prepared from template layer and etching |
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2021
- 2021-08-27 WO PCT/US2021/047972 patent/WO2022047170A1/en not_active Ceased
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20150279741A1 (en) * | 2008-05-30 | 2015-10-01 | Alta Devices, Inc. | Epitaxial lift off stack having a pre-curved handle and methods thereof |
| US20100101725A1 (en) * | 2008-10-28 | 2010-04-29 | Eric Ting-Shan Pan | Apparatus for Making Epitaxial Film |
| US20100147370A1 (en) * | 2008-12-08 | 2010-06-17 | Alta Devices, Inc. | Multiple stack deposition for epitaxial lift off |
| US20160049334A1 (en) * | 2008-12-17 | 2016-02-18 | Alta Devices, Inc. | Tape-based epitaxial lift off apparatuses and methods |
| US20170047471A1 (en) * | 2012-01-19 | 2017-02-16 | Alta Devices, Inc. | Thin-film semiconductor optoelectronic device with textured front and/or back surface prepared from template layer and etching |
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