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WO2021115472A1 - Micro-led chip and manufacturing method therefor - Google Patents

Micro-led chip and manufacturing method therefor Download PDF

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Publication number
WO2021115472A1
WO2021115472A1 PCT/CN2020/136038 CN2020136038W WO2021115472A1 WO 2021115472 A1 WO2021115472 A1 WO 2021115472A1 CN 2020136038 W CN2020136038 W CN 2020136038W WO 2021115472 A1 WO2021115472 A1 WO 2021115472A1
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WIPO (PCT)
Prior art keywords
layer
metal backing
backing layer
led unit
led
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Ceased
Application number
PCT/CN2020/136038
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French (fr)
Chinese (zh)
Inventor
蒋振宇
闫春辉
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Shenzhen Institute Of Wide-Bandgap Semiconductors
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Shenzhen Institute Of Wide-Bandgap Semiconductors
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Publication of WO2021115472A1 publication Critical patent/WO2021115472A1/en
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/10Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00
    • H10H29/14Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00 comprising multiple light-emitting semiconductor components
    • H10H29/142Two-dimensional arrangements, e.g. asymmetric LED layout

Definitions

  • This application relates to the field of light-emitting diodes, in particular to a Micro-LED chip and a manufacturing method thereof.
  • Micro-LED Micro Light Emitting Diode
  • OLED Organic Light Emitting Diode
  • Micro-LED technology uses thin film, miniaturization, and array design of LED structure, and its size is only about 1-50 ⁇ m.
  • the Micro-LED chip needs to be transferred to the display substrate through a mass transfer method after manufacturing to form a display array.
  • all Micro-LED chips only include one light-emitting unit, so that after the Micro-LED chips are arranged on the display substrate, the arrangement density between the light-emitting units is relatively large.
  • each pixel of a color display requires at least three different color light-emitting units, at least three massive transfers are required to transfer the Micro-LED chips of different colors to the display substrate, and the transfer cost and error rate are high.
  • the present application provides a Micro-LED chip and a manufacturing method thereof, which can increase the arrangement density of LED units and reduce the transfer cost of the Micro-LED chip.
  • the Micro-LED chip includes: a first metal backing layer; a first LED unit attached and electrically connected to the first metal On the backing layer; the first planarization layer is attached to the first metal backing layer and exposes the side of the first LED unit away from the first metal backing layer; the second metal backing layer is attached to the first metal backing layer The second LED unit is attached to and electrically connected to the second metal backing layer, wherein the projection of the second LED unit on the first metal backing layer is the same as that of the first LED unit The projections on the first metal backing layer are staggered with each other, and the first LED unit and the second LED unit are displayed in any of the three primary colors of blue, green and red.
  • the Micro-LED chip includes: a first metal backing layer; a first LED unit attached and electrically connected to the first On the metal backing layer; the first planarization layer is attached to the first metal backing layer and exposes the side of the first LED unit away from the first metal backing layer; the second metal backing layer is attached to the first metal backing layer On the first planarization layer on the periphery of an LED unit; the second LED unit is attached and electrically connected to the second metal backing layer, wherein the projection of the second LED unit on the first metal backing layer is the same as that of the first LED unit The projections on the first metal backing layer are staggered from each other.
  • another technical solution adopted in this application is to provide a method for manufacturing a Micro-LED chip, the method comprising: providing a first epitaxial wafer and a second epitaxial wafer, wherein the first epitaxial wafer includes a first epitaxial wafer A growth substrate, a first light-emitting epitaxial layer attached to the first growth substrate, and a first metal backing layer attached and electrically connected to the side of the first light-emitting epitaxial layer away from the first growth substrate, and the second epitaxial layer
  • the sheet includes a second growth substrate, a second light-emitting epitaxial layer attached to the second growth substrate, and a second metal backing layer attached and electrically connected to the side of the second light-emitting epitaxial layer away from the second growth substrate; Attach the side of the first metal backing layer away from the first light-emitting epitaxial layer to the transfer substrate, peel off the first growth substrate, and pattern the first light-emitting epitaxial layer to form a plurality of first LED
  • each LED chip of the present application includes at least a first LED unit and a second LED unit that are stacked on top of each other and staggered.
  • the size of the Micro-LED chip is compact, which can improve the arrangement density of the LED units on the metal backing layer. Reduce the manufacturing cost of Micro-LED chips. Further, by combining the different output percentages of the first LED unit and the second LED unit, the Micro-LED chip can present different colors, thereby realizing the display effect of the full-color Micro-LED chip.
  • Fig. 1 is a schematic diagram of the structure of a Micro-LED chip according to a second embodiment of the present application
  • FIG. 2 is a schematic diagram of a first top view structure of a Micro-LED chip according to the present application
  • FIG. 3 is a schematic diagram of a second top view structure of the Micro-LED chip according to the present application.
  • FIG. 4 is a schematic diagram of the first process of the manufacturing method of the Micro-LED chip of the present application.
  • FIG. 5 is a schematic diagram of the structure corresponding to each stage of the manufacturing method of the substrate shown in FIG. 4;
  • FIG. 6 is a schematic diagram of the second process of the manufacturing method of the Micro-LED chip of the present application.
  • FIG. 7 is a schematic diagram of the structure corresponding to each stage of the manufacturing method of the substrate shown in FIG. 6;
  • FIG. 8 is a schematic diagram of the third process of the manufacturing method of the Micro-LED chip of the present application.
  • FIG. 9 is a schematic diagram of the structure corresponding to each stage of the manufacturing method of the substrate shown in FIG. 8.
  • the Micro-LED chip 10 includes: a first metal backing layer 11, a first LED unit 12, a first planarization layer 13, a second metal backing layer 21, and a second LED unit 22.
  • the first LED unit 12 and the second LED unit 22 can display any light color among the three primary colors of blue, green and red.
  • the first LED unit 12 and the second LED unit 22 can be the same color or different colors. limited.
  • the Micro-LED chip 10 can generate multi-color linear light, the main colors are blue, cyan, dark green, green, yellow, and orange. He Hong, etc., are not limited here.
  • the first LED unit 12 is attached and electrically connected to the first metal backing layer 11, and the first planarization layer 13 is attached to the first metal backing layer 11, and makes the first LED unit 12 away from the first metal backing layer 11 One side of the lining layer 11 is exposed.
  • the second metal backing layer 21 is attached to the first planarization layer 13 on the periphery of the first LED unit 12.
  • the second LED unit 22 is attached and electrically connected to the second metal backing layer 21.
  • the projection of the second LED unit 22 on the first metal backing layer 11 and the projection of the first LED unit 12 on the first metal backing layer 11 are staggered from each other.
  • the Micro-LED chip 10 according to the second embodiment of the present application further includes: a second planarization layer 23, a third metal backing layer 31 and a third LED unit 32.
  • Fig. 1 is only a conventional example.
  • the Micro-LED chip 10 only includes the first LED unit 12, the second LED unit 22, and the corresponding planarization layer and metal backing layer.
  • the Micro-LED chip 10 also includes a fourth LED unit, a fifth LED unit or more LED units, and a corresponding planarization layer and a metal backing layer. The multiple projections on the first metal backing layer 11 corresponding to the multiple LED units are staggered.
  • the third LED unit 32 can display any light color among the three primary colors of blue, green and red.
  • the third LED unit 32 can be the same color as the first LED unit 12 and the second LED unit 22, or Different colors are not limited here.
  • the Micro-LED chip 10 can produce multi-color line light, the main colors are blue, cyan, and dark green. , Green, yellow, orange and red, etc., are not limited here.
  • the materials of the first metal backing layer 11, the second metal backing layer 21, and the third metal backing layer 31 are semiconductors or metals with good electrical and thermal conductivity, for example, the first metal backing layer 11 and the second metal backing layer
  • the material of the liner layer 21 and the third metal backing layer 31 may be at least one of In, Cu, Au, Ni, Ti, Sn or an alloy thereof, which is not limited herein.
  • the functions of the first metal backing layer 11, the second metal backing layer 21, and the third metal backing layer 31 are to form an effective support for the first LED unit 12, the second LED unit 22, and the third LED unit 32.
  • As a conductive member power is supplied to the first LED unit 12, the second LED unit 22, and the third LED unit 32.
  • the first metal backing layer 11, the second metal backing layer 21, and the third metal backing layer 31 can also be used as metal bonding layers to improve the first LED unit 12, the second LED unit 22, and the third LED unit 32.
  • the adhesion strength is provided to the first LED unit 12, the second LED unit 22, and the third LED unit 32.
  • the material of the first planarization layer 13 and the second planarization layer 23 can be at least one of SoG (Spin-on-Glass), RDL, BCB, and Photoresist, which are not limited here. .
  • the second planarization layer 23 is attached to the second metal backing layer 21 and makes the side of the second LED unit 22 away from the first metal backing layer 11 exposed.
  • the third metal backing layer 31 is attached to the second planarization layer 23 on the periphery of the second LED unit 22.
  • the third LED unit 32 is attached and electrically connected to the third metal backing layer 31.
  • the projection of the third LED unit 32 on the first metal backing layer 11 is the same as the projection of the first LED unit 12 on the first metal backing layer 11 and the projection of the second LED unit 22 on the first metal backing layer 11, respectively.
  • the projections are staggered from each other.
  • the first planarization layer 13 and the second planarization layer 23 are provided with a first through hole 130 and a second through hole 230, respectively.
  • the first planarization layer 13 may be provided with a plurality of first through holes 130 spaced apart from each other, and the arrangement of the plurality of first through holes 130 may be regular or irregularly distributed.
  • the second planarization layer 23 may be provided with a plurality of second through holes 230 spaced apart from each other, and the arrangement of the plurality of second through holes 230 may be regular or irregularly distributed.
  • the projection of the first through hole 130 on the first metal backing layer 11 and the projection of the second through hole 230 on the first metal backing layer 11 are staggered from each other.
  • the Micro-LED chip 10 further includes: a first conductive body 14 and a second conductive body 24 arranged in the first through hole 130 and the second through hole 230.
  • the material of the first conductive body 14 and the second conductive body 24 may be at least one of metals such as Cu, Ti, Ni, Al, W, Pt, Au, etc., which is not limited herein.
  • Both ends of the first conductive body 14 respectively contact the first metal backing layer 11 and the second metal backing layer 21, and then electrically connect the first LED unit 12 and the second LED unit 22 toward one of the first metal backing layer 11 side.
  • Both ends of the second conductor 24 respectively contact the second metal backing layer 21 and the third metal backing layer 31, and then electrically connect the second LED unit 22 and the third unit LED unit facing one of the first metal backing layer 11 side.
  • the Micro-LED chip 10 further includes: a first reflector 15, a second reflector 25 and a third reflector 35.
  • the first reflector 15 is provided between the first LED unit 12 and the first metal backing layer 11
  • the second reflector 25 is provided between the second LED unit 22 and the second metal backing layer 21
  • the third reflector The mirror 35 is disposed between the third LED unit 32 and the third metal backing layer 31.
  • the first reflector 15, the second reflector 25, and the third reflector 35 can be made of transparent conductive materials for ohmic contact, such as indium tin oxide (ITO), and other metal reflectors or DBR reflectors are plated on the ITO.
  • ITO indium tin oxide
  • the first reflector 15, the second reflector 25, and the third reflector 35 may have the functions of a reflector and ohmic contact at the same time, such as including silver (Ag), aluminum (Al), and nickel (Ni). , Chromium (Cr), platinum (Pt) or other suitable metal metal layer.
  • the Micro-LED chip 10 further includes a first metal bonding layer 16 and a second metal bonding layer 26, and the first metal bonding layer 16 is disposed between the first planarization layer 13 and the second metal backing layer 21 , The second metal bonding layer 26 is disposed between the second planarization layer 23 and the third metal backing layer 31.
  • the material of the first metal bonding layer 16 and the second metal bonding layer 26 may be at least one of In, Cu, Au, Ni, Ti, Sn or an alloy thereof, which is not limited herein.
  • the Micro-LED chip 10 further includes a first insulating layer 17, a second insulating layer 27 and a third insulating layer 37.
  • the first insulating layer 17, the second insulating layer 27, and the third insulating layer 37 can be made of at least aluminum nitride, silicon dioxide, silicon nitride, aluminum oxide, Bragg reflective layer DBR, silica gel, resin, or acrylic.
  • One type of production not limited here.
  • the above-mentioned first insulating layer 17 covers the periphery of the first LED unit 12 and exposes the side of the first LED unit 12 away from the first metal backing layer 11, and the second insulating layer 27 covers the second LED unit 22 The periphery of the second LED unit 22 is exposed away from the side of the first metal backing layer 11, and the third insulating layer 37 covers the periphery of the third LED unit 32 and keeps the third LED unit 32 away from the first metal backing layer. One side of 11 is exposed.
  • the side of the first LED unit 12 away from the first metal backing layer 11 is exposed, that is, the first exposed surface 18.
  • the side of the second LED unit 22 away from the first metal backing layer 11 is exposed, that is, the second exposed surface 28.
  • the side of the third LED unit 32 away from the first metal backing layer 11 is exposed, that is, the third exposed surface 38.
  • the first exposed surface 18, the second exposed surface 28, and the third exposed surface 38 can be respectively manufactured by printing and electroplating techniques to form a first pad (not shown) and a second pad (not shown) that are insulated from each other. Out) and a third pad (not shown in the figure), wherein the first pad is electrically connected to the first LED unit 12 by directly contacting the first LED unit 12, and the second pad is electrically connected to the first LED unit 12 by directly contacting the second LED unit 22 To be electrically connected to the second LED unit 22, the third pad is electrically connected to the third LED unit 32 by directly contacting the third LED unit 32.
  • each LED chip of the present application includes at least a first LED unit 12 and a second LED unit 22 that are stacked on top of each other and staggered.
  • the size of the Micro-LED chip 10 is compact, which can improve the arrangement of LED units on the metal backing layer.
  • the cloth density reduces the manufacturing cost of the Micro-LED chip 10. Further, by combining the different output percentages of the first LED unit 12 and the second LED unit 22, the Micro-LED chip 10 can present different colors, thereby improving the display effect of the Micro-LED chip 10.
  • the present application also proposes a method for manufacturing the Micro-LED chip 10, which is used to manufacture the Micro-LED chip 10 in the above-mentioned embodiment.
  • the method includes the following steps:
  • S101 Provide a first epitaxial wafer 100 and a second epitaxial wafer 200.
  • the first epitaxial wafer 100 includes a first growth substrate 110, a first light emitting epitaxial layer 120, and a first metal backing layer 11
  • the second epitaxial wafer 200 includes a second growth substrate 210, a second light emitting epitaxial layer 220, and The second metal backing layer 21.
  • the first light-emitting epitaxial layer 120 is attached to the first growth substrate 110, and the first metal backing layer 11 is attached and electrically connected to the side of the first light-emitting epitaxial layer 120 away from the first growth substrate 110.
  • the second light-emitting epitaxial layer 220 is attached to the second growth substrate 210, and the second metal backing layer 21 is attached and electrically connected to the side of the second light-emitting epitaxial layer 220 away from the second growth substrate 210.
  • the material of the first growth substrate 110 and the second growth substrate 210 may be at least one of sapphire, silicon, silicon carbide, gallium nitride, and gallium arsenide, which is not limited herein.
  • the above-mentioned first light-emitting epitaxial layer 120 may have a multilayer structure.
  • the MOCVD method may be used to sequentially grow the first conductive type semiconductor layer 121 and the quantum well layer on the side of the first growth substrate 110. 122.
  • the first conductive type semiconductor layer 121 is grown on the side of the first growth substrate 110.
  • the first conductive type semiconductor layer 121 may be an n-type GaN layer, such as GaN doped with at least one of Si, Ge, and Sn. Floor.
  • a quantum well layer 122 is grown on the first conductive type semiconductor layer 121.
  • the quantum well layer 122 can have any of the following structures: single-layer quantum well (SQW) and InGaN/GaN multilayer quantum well (MQW).
  • a second conductive type semiconductor layer 123 is grown on the quantum well layer 122.
  • the second conductive type semiconductor layer 123 is a p-type GaN layer, such as GaN doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba. Floor. In this way, the first light-emitting epitaxial layer 120 is completed.
  • the manufacturing method of the second light-emitting epitaxial layer 220 is the same as that of the first light-emitting epitaxial layer 120, and will not be repeated here.
  • Transparent conductive materials can be used for ohmic contact, such as indium tin oxide (ITO), and other metal mirrors or DBR mirrors are plated on the ITO.
  • the reflector may have the function of reflector and ohmic contact at the same time, such as including silver (Ag), aluminum (Al), nickel (Ni), chromium (Cr), platinum (Pt), or other suitable metals Metal mirror layer.
  • the material of the above-mentioned transfer substrate 40 may specifically include sapphire, silicon wafer, temporary bonding substrate, etc., which is not limited herein.
  • the first growth substrate 110 may be peeled off by dry etching, wet etching, laser lift-off or other suitable techniques.
  • the first growth substrate 110 is etched with a specific etchant to peel off the first growth substrate 110.
  • the above-mentioned patterning process may use a suitable patterning technique to form a plurality of first LED units 12 spaced apart from each other, for example, dry etching, wet etching or other suitable techniques.
  • the first conductive type semiconductor layer 121, the quantum well layer 122, and the second conductive type semiconductor layer 123 may be patterned once to form a plurality of mesa structures.
  • the above-mentioned etching process may include dry etching, wet etching, or a combination thereof.
  • the etching process may include various etching steps, and each step is designed to use a specific etchant to effectively remove the corresponding light-emitting epitaxial layer.
  • a hard mask may be further used to form the first channel through the following processes: forming a hard mask on the second conductivity type semiconductor layer 123, patterning the hard mask using a photolithography process, and using a pattern
  • the modified hard mask serves as an etching mask to etch the light-emitting epitaxial layer to form a first channel. In this way, a plurality of first LED units 12 spaced apart from each other are formed.
  • S104 Attach the side of the second metal backing layer 21 away from the second light-emitting epitaxial layer 220 to the first planarization layer 13, peel off the second growth substrate 210, and pattern the second light-emitting epitaxial layer 220 to form each other A plurality of second LED units 22 are arranged at intervals.
  • the second growth substrate 210 may be peeled off by dry etching, wet etching, laser lift-off or other suitable techniques.
  • the second growth substrate 210 is etched with a specific etchant to peel off the second growth substrate 210.
  • the structure of the second LED unit 22 is the same as the structure of the first LED unit 12, and the manufacturing method of the second LED unit 22 is the same as the manufacturing method of the first LED unit 12.
  • the manufacturing method of the second LED unit 22 is the same as the manufacturing method of the first LED unit 12.
  • the projection of the second LED unit 22 on the first metal backing layer 11 and the projection of the first LED unit 12 on the first metal backing layer 11 are staggered from each other. That is, the LED chip of the embodiment of the present application includes a first LED unit 12 and a second LED unit 22 that are stacked on top of each other and staggered.
  • the size of the Micro-LED chip 10 is compact, which can improve the arrangement of the LED units on the metal backing layer. Density reduces the manufacturing cost of the Micro-LED chip 10. Further, by combining the different output percentages of the first LED unit 12 and the second LED unit 22, the Micro-LED chip 10 can present different colors, thereby improving the display effect of the Micro-LED chip 10.
  • the method further includes the following steps:
  • S106 Provide a third epitaxial wafer 300.
  • the third epitaxial wafer 300 includes a third growth substrate 310, a third light emitting epitaxial layer 320 attached to the third growth substrate 310, and a third light emitting epitaxial layer 320 attached and electrically connected to the third light emitting epitaxial layer 320 away from the third growth substrate 310.
  • the third metal backing layer 31 on one side.
  • the structure of the third LED unit 32 is the same as the structure of the first LED unit 12, and the manufacturing method of the third LED unit 32 is the same as the manufacturing method of the first LED unit 12.
  • the manufacturing method of the third LED unit 32 is the same as the manufacturing method of the first LED unit 12.
  • the projection of the third LED unit 32 on the first metal backing layer 11 is the same as the projection of the first LED unit 12 on the first metal backing layer 11 and the projection of the second LED unit 22 on the first metal backing layer 11 respectively.
  • the projections on are staggered from each other. That is, the LED chip of the embodiment of the present application includes a first LED unit 12, a second LED unit 22, and a third LED unit 32 stacked on top of each other and staggered.
  • the size of the Micro-LED chip 10 is compact, which can improve the LED unit on the metal back
  • the arrangement density on the lining layer reduces the manufacturing cost of the Micro-LED chip 10. Further, by combining the different output percentages of the first LED unit 12, the second LED unit 22, and the third LED unit 32, the Micro-LED chip 10 can present different colors, thereby improving the display of the Micro-LED chip 10 effect.
  • the material of the third growth substrate 310 may be at least one of sapphire, silicon, silicon carbide, gallium nitride, and gallium arsenide, which is not limited herein.
  • the second growth substrate 210 may be peeled off by dry etching, wet etching, laser lift-off or other suitable techniques.
  • the third growth substrate 310 is etched with a specific etchant to peel off the third growth substrate 310.
  • the first epitaxial wafer 100 further includes a first reflector 15 located between the first light-emitting epitaxial layer 120 and the first metal backing layer 11 and corresponding to the position of the first LED unit 12.
  • the second epitaxial wafer 200 further includes a second reflector 25 located between the second light-emitting epitaxial layer 220 and the second metal backing layer 21 and corresponding to the position of the second LED unit 22.
  • the third epitaxial wafer 300 further includes a third reflector 35 located between the third light emitting epitaxial layer 320 and the third metal backing layer 31 and corresponding to the position of the third LED unit 32.
  • the first reflector 15, the second reflector 25, and the third reflector 35 can be made of transparent conductive materials for ohmic contact, such as indium tin oxide (ITO), and other metal reflectors or DBR reflectors are plated on the ITO.
  • ITO indium tin oxide
  • the reflector may have the function of reflector and ohmic contact at the same time, such as including silver (Ag), aluminum (Al), nickel (Ni), chromium (Cr), platinum (Pt), or other suitable metals Metal mirror layer.
  • the method further includes the following steps:
  • S108 Pattern the third metal backing layer 31, the second planarization layer 23, the second metal backing layer 21, and the first planarization layer 13, so that the first LED unit 12 and the second LED unit 22 are far away from the first One side of the metal backing layer 11 is exposed.
  • each Micro-LED chip 10 includes at least one first LED unit 12, at least one second LED unit 22, and At least one third LED unit 32.
  • step S103 the method further includes the following step: covering the first LED unit 12 with the first insulating layer 17.
  • step S105 the method further includes the following step: covering the second LED unit 22 with the second insulating layer 27.
  • step S108 the method further includes the following step: covering the third LED unit 32 with the third insulating layer 37.
  • the outer surfaces of the first LED unit 12, the second LED unit 22, and the third LED unit 32 are respectively covered with the first insulating layer 17, the second insulating layer 27, and
  • the third insulating layer 37, the first insulating layer 17, the second insulating layer 27, and the third insulating layer 37 can be made of aluminum nitride, silicon dioxide, silicon nitride, aluminum oxide, Bragg reflective layer DBR, silica gel, and resin. Or made of acrylic.
  • step S108 further includes: patterning the first insulating layer 17, the second insulating layer 27, and the third insulating layer 37 to expose the first LED unit 12, the second LED unit 22, and the third LED unit 32, respectively. The side away from the first metal backing layer 11.
  • the side of the first LED unit 12 away from the first metal backing layer 11 is exposed, that is, the first exposed surface 18.
  • the side of the second LED unit 22 away from the first metal backing layer 11 is exposed, that is, the second exposed surface 28.
  • the side of the third LED unit 32 away from the first metal backing layer 11 is exposed, that is, the third exposed surface 38.
  • the first exposed surface 18, the second exposed surface 28, and the third exposed surface 38 can be insulated from each other by coating techniques such as printing, electroplating, thermal evaporation, electron beam evaporation, or magnetron sputtering.
  • the second LED unit 22 is electrically connected, and the third pad is electrically connected with the third LED unit 32 by directly contacting the third LED unit 32.
  • the method further includes the following steps: forming a first through hole 130 on the first planarization layer 13, and forming a first conductive body 14 in the first through hole 130, so that After the two metal backing layers 21 are attached to the first planarization layer 13, the two ends of the first conductor 14 respectively contact the first metal backing layer 11 and the second metal backing layer 21, thereby electrically connecting the first LED unit 12 And the second LED unit 22 faces one side of the first metal backing layer 11.
  • the method further includes the following steps: forming a second through hole 230 on the second planarization layer 23, and forming a second electrical conductor 24 in the second through hole 230, so that the third After the metal backing layer 31 is attached to the second planarization layer 23, the two ends of the second conductor 24 respectively contact the second metal backing layer 21 and the third metal backing layer 31, thereby electrically connecting the second LED unit 22 and The third unit LED unit faces the side of the first metal backing layer 11.
  • the method further includes the following steps: forming a first metal bonding layer 16 on the transfer substrate 40, and patterning the transfer substrate 40 and the first metal bonding layer 16 to form a plurality of substrates.
  • the first metal backing layer 11 is bonded to the first metal bonding pattern 161.
  • the first metal bonding layer 16 can be formed on the transfer substrate 40 by methods such as thermal evaporation, electron beam evaporation, and magnetron sputtering evaporation.
  • the material of the first metal bonding layer 16 may be at least one of In, Cu, Au, Ni, Ti, Sn or an alloy thereof, which is not limited herein.
  • the above-mentioned patterning process may use a suitable patterning technique to form a plurality of substrate protrusions 401 and the first metal bonding pattern 161 formed on the top of the substrate protrusions 401, for example, dry etching, wet etching, laser lift-off or Other suitable technologies.
  • a mask is covered on the transfer substrate 40 and the first metal bonding layer 16.
  • the transfer substrate 40 and the first metal bonding layer 16 at positions not covered by the mask are removed by etching technology to form a plurality of substrate protrusions 401 and a first metal bonding pattern 161 formed on the top of the substrate protrusions 401.
  • the method further includes the following steps: forming a second metal bonding layer 26 on the first planarization layer 13.
  • the second metal backing layer 21 is bonded to the second metal bonding layer 26.
  • the method further includes the following steps: forming a third metal bonding layer 36 on the second planarization layer 23, wherein the third metal backing layer 31 is bonded to the third metal bonding layer 36.
  • the second metal bonding layer 26 can be formed on the first planarization layer 13 by methods such as thermal evaporation, electron beam evaporation, and magnetron sputtering evaporation. Thermal evaporation, electron beam evaporation, and The third metal bonding layer 36 is formed on the second planarization layer 23 by methods such as magnetron sputtering and evaporation.
  • the material of the second metal bonding layer 26 and the third metal bonding layer 36 may be at least one of In, Cu, Au, Ni, Ti, Sn or an alloy thereof, which is not limited herein.
  • the first LED unit 12 and the second LED unit 22 of the embodiment of the present application are stacked and arranged, and the projection of the second LED unit 22 on the first metal backing layer 11 is consistent with the projection of the second LED unit 22 on the first metal backing layer 11.
  • the projections of the first LED unit 12 on the first metal backing layer 11 are staggered. That is, each LED chip of the present application includes at least a first LED unit 12 and a second LED unit 22 that are stacked on top of each other and staggered.
  • the size of the Micro-LED chip 10 is compact, which can improve the arrangement of LED units on the metal backing layer.
  • the cloth density reduces the manufacturing cost of the Micro-LED chip 10. Further, by combining the different output percentages of the first LED unit 12 and the second LED unit 22, the Micro-LED chip 10 can present different colors, thereby improving the display effect of the Micro-LED chip 10.

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Abstract

Disclosed are a micro-LED chip and a manufacturing method therefor. The micro-LED chip comprises: a first metal backing layer; a first LED unit attached and electrically connected to the first metal backing layer; a first planarization layer, which is attached to the first metal backing layer and exposes the side of the first LED unit away from the first metal backing layer; a second metal backing layer attached to the first planarization layer on the periphery of the first LED unit; and a second LED unit attached and electrically connected to the second metal backing layer, wherein the projection of the second LED unit on the first metal backing layer is staggered from the projection of the first LED unit on the first metal backing layer. Through the above means, each LED chip provided in the present application at least comprises first LED units and second LED units that are stacked above and below one another and are staggered from each other. The micro-LED chip is compact in size, and can improve the arrangement density of the LED units and reduce the transfer costs of the micro-LED chip.

Description

Micro-LED芯片及其制造方法Micro-LED chip and its manufacturing method 【技术领域】【Technical Field】

本申请涉及发光二极管领域,特别是一种Micro-LED芯片及其制造方法。This application relates to the field of light-emitting diodes, in particular to a Micro-LED chip and a manufacturing method thereof.

【背景技术】【Background technique】

Micro-LED(微型发光二极管)是新一代显示技术,比现有的OLED(有机发光二极管)技术亮度更高、发光效率更好、但功耗更低。Micro-LED技术,将LED结构设计进行薄膜化、微小化、阵列化,其尺寸仅在1~50μm等级左右。Micro-LED (Micro Light Emitting Diode) is a new generation of display technology, which has higher brightness, better luminous efficiency, and lower power consumption than the existing OLED (Organic Light Emitting Diode) technology. Micro-LED technology uses thin film, miniaturization, and array design of LED structure, and its size is only about 1-50μm.

Micro-LED芯片需要制造后通过巨量转移方式转移到显示基板,进而形成显示阵列。目前,Micro-LED芯片都仅包括一个发光单元,进而使得Micro-LED芯片在排布于显示基板上后,各发光单元之间的排布密度相对较大。进一步,由于彩色显示的每个像素需要至少三种不同颜色的发光单元,因此至少需要三次巨量转移将不同颜色的Micro-LED芯片转移到显示基板上,转移成本和出错率高。The Micro-LED chip needs to be transferred to the display substrate through a mass transfer method after manufacturing to form a display array. At present, all Micro-LED chips only include one light-emitting unit, so that after the Micro-LED chips are arranged on the display substrate, the arrangement density between the light-emitting units is relatively large. Furthermore, since each pixel of a color display requires at least three different color light-emitting units, at least three massive transfers are required to transfer the Micro-LED chips of different colors to the display substrate, and the transfer cost and error rate are high.

【发明内容】[Summary of the invention]

本申请提供一种Micro-LED芯片及其制造方法,能够提高LED单元的排布密度,并降低Micro-LED芯片的转移成本。The present application provides a Micro-LED chip and a manufacturing method thereof, which can increase the arrangement density of LED units and reduce the transfer cost of the Micro-LED chip.

为解决上述技术问题,本申请采用的一个技术方案是:提供了一种Micro-LED芯片,Micro-LED芯片包括:第一金属背衬层;第一LED单元,附着且电连接于第一金属背衬层上;第一平坦化层,附着于第一金属背衬层上,并使得第一LED单元远离第一金属背衬层的一侧外露;第二金属背衬层,附着于第一LED单元外围的第一平坦化层上;第二LED单元,附着且电连接于第二金属背衬层上,其中第二LED单元在第一金属背衬层上的投影与第一LED单元在第一金属背衬层上的投影彼此错开,其中第一LED单元与第二LED单元显示为蓝、绿和红三原色中的任一光色。In order to solve the above technical problems, a technical solution adopted in this application is to provide a Micro-LED chip, the Micro-LED chip includes: a first metal backing layer; a first LED unit attached and electrically connected to the first metal On the backing layer; the first planarization layer is attached to the first metal backing layer and exposes the side of the first LED unit away from the first metal backing layer; the second metal backing layer is attached to the first metal backing layer The second LED unit is attached to and electrically connected to the second metal backing layer, wherein the projection of the second LED unit on the first metal backing layer is the same as that of the first LED unit The projections on the first metal backing layer are staggered with each other, and the first LED unit and the second LED unit are displayed in any of the three primary colors of blue, green and red.

为解决上述技术问题,本申请采用的另一个技术方案是:提供了一种Micro-LED芯片,Micro-LED芯片包括:第一金属背衬层;第一LED单元,附着且电连接于第一金属背衬层上;第一平坦化层,附着于第一金属背衬层上,并使得第一LED单元远离第一金属背衬层的一侧外露;第二金属背衬层,附着于第一LED单元外围的第一平坦化层上;第二LED单元,附着且电连接于第二金属背衬层上,其中第二LED单元在第一金属背衬层上的投影与第一LED单元在第一金属背衬层上的投影彼此错开。In order to solve the above technical problems, another technical solution adopted in this application is to provide a Micro-LED chip. The Micro-LED chip includes: a first metal backing layer; a first LED unit attached and electrically connected to the first On the metal backing layer; the first planarization layer is attached to the first metal backing layer and exposes the side of the first LED unit away from the first metal backing layer; the second metal backing layer is attached to the first metal backing layer On the first planarization layer on the periphery of an LED unit; the second LED unit is attached and electrically connected to the second metal backing layer, wherein the projection of the second LED unit on the first metal backing layer is the same as that of the first LED unit The projections on the first metal backing layer are staggered from each other.

为解决上述技术问题,本申请采用的又一个技术方案是:提供了一种Micro-LED芯片的制造方法,该方法包括:提供第一外延片和第二外延片,其中第一外延片包括第一生长衬底、附着于第一生长衬底上的第一发光外延层以及附着且电连接于第一发光外延层远离第一生长衬底的一侧的第一金属背衬层,第二外延片包括第二生长衬底、附着于第二生长衬底上的第二发光外延层以及附着且电连接于第二发光外延层远离第二生长衬底的一侧的第二金属背衬层;将第一金属背衬层远离第一发光 外延层的一侧附着于转移衬底上,剥离第一生长衬底,并图案化第一发光外延层以形成彼此间隔设置的多个第一LED单元;在多个第一LED单元和第一金属背衬层上形成第一平坦化层;将第二金属背衬层远离第二发光外延层的一侧附着于第一平坦化层上,剥离第二生长衬底,并图案化第二发光外延层以形成彼此间隔设置的多个第二LED单元,其中第二LED单元在第一金属背衬层的投影与第一LED单元在第一金属背衬层的投影彼此错开。In order to solve the above technical problems, another technical solution adopted in this application is to provide a method for manufacturing a Micro-LED chip, the method comprising: providing a first epitaxial wafer and a second epitaxial wafer, wherein the first epitaxial wafer includes a first epitaxial wafer A growth substrate, a first light-emitting epitaxial layer attached to the first growth substrate, and a first metal backing layer attached and electrically connected to the side of the first light-emitting epitaxial layer away from the first growth substrate, and the second epitaxial layer The sheet includes a second growth substrate, a second light-emitting epitaxial layer attached to the second growth substrate, and a second metal backing layer attached and electrically connected to the side of the second light-emitting epitaxial layer away from the second growth substrate; Attach the side of the first metal backing layer away from the first light-emitting epitaxial layer to the transfer substrate, peel off the first growth substrate, and pattern the first light-emitting epitaxial layer to form a plurality of first LED units spaced apart from each other Form a first planarization layer on the plurality of first LED units and the first metal backing layer; attach the second metal backing layer away from the second light-emitting epitaxial layer to the first planarization layer, and peel off the first planarization layer Two growth substrates, and pattern the second light-emitting epitaxial layer to form a plurality of second LED units spaced apart from each other, wherein the projection of the second LED unit on the first metal backing layer and the first LED unit on the first metal back The projections of the underlayers are staggered from each other.

本申请的有益效果是:区别于现有技术的情况,本申请的第一LED单元与第二LED单元层叠设置,且所述第二LED单元在所述第一金属背衬层上的投影与所述第一LED单元在所述第一金属背衬层上的投影彼此错开。即本申请的每个LED芯片包括上下层叠且相互错开的至少第一LED单元与第二LED单元,该Micro-LED芯片的尺寸紧凑,可以提高LED单元在金属背衬层上的排布密度,降低Micro-LED芯片的制造成本。进一步地,通过第一LED单元、第二LED单元输出百分比的不同进行组合,使得Micro-LED芯片可以呈现出不同的颜色,从而实现全彩色化的Micro-LED芯片的显示效果。The beneficial effects of the present application are: different from the prior art, the first LED unit and the second LED unit of the present application are stacked, and the projection of the second LED unit on the first metal backing layer is similar to that of the second LED unit. The projections of the first LED units on the first metal backing layer are staggered. That is, each LED chip of the present application includes at least a first LED unit and a second LED unit that are stacked on top of each other and staggered. The size of the Micro-LED chip is compact, which can improve the arrangement density of the LED units on the metal backing layer. Reduce the manufacturing cost of Micro-LED chips. Further, by combining the different output percentages of the first LED unit and the second LED unit, the Micro-LED chip can present different colors, thereby realizing the display effect of the full-color Micro-LED chip.

【附图说明】【Explanation of the drawings】

为了更清楚地说明本申请实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。其中:In order to more clearly describe the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings that need to be used in the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work. among them:

图1是根据本申请第二实施例的Micro-LED芯片的结构示意图;Fig. 1 is a schematic diagram of the structure of a Micro-LED chip according to a second embodiment of the present application;

图2是根据本申请Micro-LED芯片的第一俯视结构示意图;FIG. 2 is a schematic diagram of a first top view structure of a Micro-LED chip according to the present application;

图3是根据本申请Micro-LED芯片的第二俯视结构示意图;3 is a schematic diagram of a second top view structure of the Micro-LED chip according to the present application;

图4是本申请Micro-LED芯片的制造方法的第一流程示意图;4 is a schematic diagram of the first process of the manufacturing method of the Micro-LED chip of the present application;

图5是图4所示的衬底的制造方法的各阶段对应的结构示意图;5 is a schematic diagram of the structure corresponding to each stage of the manufacturing method of the substrate shown in FIG. 4;

图6是本申请Micro-LED芯片的制造方法的第二流程示意图;FIG. 6 is a schematic diagram of the second process of the manufacturing method of the Micro-LED chip of the present application;

图7是图6所示的衬底的制造方法的各阶段对应的结构示意图;7 is a schematic diagram of the structure corresponding to each stage of the manufacturing method of the substrate shown in FIG. 6;

图8是本申请Micro-LED芯片的制造方法的第三流程示意图;FIG. 8 is a schematic diagram of the third process of the manufacturing method of the Micro-LED chip of the present application;

图9是图8所示的衬底的制造方法的各阶段对应的结构示意图。FIG. 9 is a schematic diagram of the structure corresponding to each stage of the manufacturing method of the substrate shown in FIG. 8.

【具体实施方式】【Detailed ways】

下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部实施例。基于本申请中的实施例,本领域普通技术人员在没有做出创造性的劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of this application.

根据本申请第一实施例的Micro-LED芯片10包括:第一金属背衬层11、第一LED单元12、第一平坦化层13、第二金属背衬层21以及第二LED单元22。The Micro-LED chip 10 according to the first embodiment of the present application includes: a first metal backing layer 11, a first LED unit 12, a first planarization layer 13, a second metal backing layer 21, and a second LED unit 22.

其中,第一LED单元12、第二LED单元22可以显示为蓝、绿和红三原色中 的任一光色,第一LED单元12、第二LED单元22可以同色,也可以不同色,在此不做限定。进一步地,通过第一LED单元12、第二LED单元22的两色光的叠加,可以使Micro-LED芯片10产生多色的线光,主要颜色有蓝、青、深绿、绿、黄、橘黄和红等,在此不做限定。Among them, the first LED unit 12 and the second LED unit 22 can display any light color among the three primary colors of blue, green and red. The first LED unit 12 and the second LED unit 22 can be the same color or different colors. limited. Further, through the superposition of the two-color light of the first LED unit 12 and the second LED unit 22, the Micro-LED chip 10 can generate multi-color linear light, the main colors are blue, cyan, dark green, green, yellow, and orange. He Hong, etc., are not limited here.

其中,第一LED单元12附着且电连接于第一金属背衬层11上,第一平坦化层13附着于第一金属背衬层11上,并使得第一LED单元12远离第一金属背衬层11的一侧外露。第二金属背衬层21附着于第一LED单元12外围的第一平坦化层13上。第二LED单元22附着且电连接于第二金属背衬层21上。Wherein, the first LED unit 12 is attached and electrically connected to the first metal backing layer 11, and the first planarization layer 13 is attached to the first metal backing layer 11, and makes the first LED unit 12 away from the first metal backing layer 11 One side of the lining layer 11 is exposed. The second metal backing layer 21 is attached to the first planarization layer 13 on the periphery of the first LED unit 12. The second LED unit 22 is attached and electrically connected to the second metal backing layer 21.

其中,第二LED单元22在第一金属背衬层11上的投影与第一LED单元12在第一金属背衬层11上的投影彼此错开。The projection of the second LED unit 22 on the first metal backing layer 11 and the projection of the first LED unit 12 on the first metal backing layer 11 are staggered from each other.

进一步如图1所示,根据本申请第二实施例的Micro-LED芯片10还包括:第二平坦化层23、第三金属背衬层31以及第三LED单元32。As further shown in FIG. 1, the Micro-LED chip 10 according to the second embodiment of the present application further includes: a second planarization layer 23, a third metal backing layer 31 and a third LED unit 32.

可以理解的是,图1仅作为常规示例。当所需的Micro-LED芯片10的功能较单一时,Micro-LED芯片10仅包括第一LED单元12、第二LED单元22以及相应的平坦化层和金属背衬层。而当所需的Micro-LED芯片10的功能更全面时,Micro-LED芯片10还包括第四LED单元、第五LED单元或更多个LED单元以及相应的平坦化层和金属背衬层,多个LED单元所对应的在第一金属背衬层11上的多个投影彼此错开。It can be understood that Fig. 1 is only a conventional example. When the required function of the Micro-LED chip 10 is relatively single, the Micro-LED chip 10 only includes the first LED unit 12, the second LED unit 22, and the corresponding planarization layer and metal backing layer. When the required functions of the Micro-LED chip 10 are more comprehensive, the Micro-LED chip 10 also includes a fourth LED unit, a fifth LED unit or more LED units, and a corresponding planarization layer and a metal backing layer. The multiple projections on the first metal backing layer 11 corresponding to the multiple LED units are staggered.

参阅图2-3,进一步地,第三LED单元32可以显示为蓝、绿和红三原色中的任一光色,第三LED单元32可以与第一LED单元12、第二LED单元22同色,也可以不同色,在此不做限定。Referring to FIGS. 2-3, further, the third LED unit 32 can display any light color among the three primary colors of blue, green and red. The third LED unit 32 can be the same color as the first LED unit 12 and the second LED unit 22, or Different colors are not limited here.

进一步地,通过第一LED单元12、第二LED单元22、第三LED单元32的三色光的叠加,可以使Micro-LED芯片10产生多色的线光,主要颜色有蓝、青、深绿、绿、黄、橘黄和红等,在此不做限定。Further, through the superposition of the three-color light of the first LED unit 12, the second LED unit 22, and the third LED unit 32, the Micro-LED chip 10 can produce multi-color line light, the main colors are blue, cyan, and dark green. , Green, yellow, orange and red, etc., are not limited here.

上述第一金属背衬层11、第二金属背衬层21、第三金属背衬层31的材料为导电导热性能良好的半导体或金属,例如,第一金属背衬层11、第二金属背衬层21、第三金属背衬层31的材料可以为In,Cu,Au,Ni,Ti,Sn中的至少一种或其合金,在此不做限定。第一金属背衬层11、第二金属背衬层21、第三金属背衬层31的作用是对第一LED单元12、第二LED单元22、第三LED单元32形成有效支撑,并可作为导电部件为第一LED单元12、第二LED单元22、第三LED单元32进行供电。进一步,第一金属背衬层11、第二金属背衬层21、第三金属背衬层31还可以作为金属键合层提高第一LED单元12、第二LED单元22、第三LED单元32的附着强度。The materials of the first metal backing layer 11, the second metal backing layer 21, and the third metal backing layer 31 are semiconductors or metals with good electrical and thermal conductivity, for example, the first metal backing layer 11 and the second metal backing layer The material of the liner layer 21 and the third metal backing layer 31 may be at least one of In, Cu, Au, Ni, Ti, Sn or an alloy thereof, which is not limited herein. The functions of the first metal backing layer 11, the second metal backing layer 21, and the third metal backing layer 31 are to form an effective support for the first LED unit 12, the second LED unit 22, and the third LED unit 32. As a conductive member, power is supplied to the first LED unit 12, the second LED unit 22, and the third LED unit 32. Further, the first metal backing layer 11, the second metal backing layer 21, and the third metal backing layer 31 can also be used as metal bonding layers to improve the first LED unit 12, the second LED unit 22, and the third LED unit 32. The adhesion strength.

上述第一平坦化层13、第二平坦化层23的材料可以为SoG(Spin-on-Glass)、RDL、BCB、光刻胶(Photoresist)等材料中的至少一种,在此不做限定。The material of the first planarization layer 13 and the second planarization layer 23 can be at least one of SoG (Spin-on-Glass), RDL, BCB, and Photoresist, which are not limited here. .

第二平坦化层23附着于第二金属背衬层21上,并使得第二LED单元22远离第一金属背衬层11的一侧外露。第三金属背衬层31附着于第二LED单元22外围的第二平坦化层23上。第三LED单元32附着且电连接于第三金属背衬层31上。The second planarization layer 23 is attached to the second metal backing layer 21 and makes the side of the second LED unit 22 away from the first metal backing layer 11 exposed. The third metal backing layer 31 is attached to the second planarization layer 23 on the periphery of the second LED unit 22. The third LED unit 32 is attached and electrically connected to the third metal backing layer 31.

第三LED单元32在第一金属背衬层11上的投影分别与第一LED单元12在第一金属背衬层11上的投影和第二LED单元22在第一金属背衬层11上的投影彼此错开。The projection of the third LED unit 32 on the first metal backing layer 11 is the same as the projection of the first LED unit 12 on the first metal backing layer 11 and the projection of the second LED unit 22 on the first metal backing layer 11, respectively. The projections are staggered from each other.

第一平坦化层13和第二平坦化层23分别设置有第一通孔130和第二通孔230。第一平坦化层13可以设置有彼此间隔排布的多个第一通孔130,多个第一通孔130的排列可以呈现规则状,也可以是不规则分布。第二平坦化层23可以设置有彼此间隔排布的多个第二通孔230,多个第二通孔230的排列可以呈现规则状,也可以是不规则分布。第一通孔130在第一金属背衬层11上的投影与第二通孔230在第一金属背衬层11上的投影彼此错开。The first planarization layer 13 and the second planarization layer 23 are provided with a first through hole 130 and a second through hole 230, respectively. The first planarization layer 13 may be provided with a plurality of first through holes 130 spaced apart from each other, and the arrangement of the plurality of first through holes 130 may be regular or irregularly distributed. The second planarization layer 23 may be provided with a plurality of second through holes 230 spaced apart from each other, and the arrangement of the plurality of second through holes 230 may be regular or irregularly distributed. The projection of the first through hole 130 on the first metal backing layer 11 and the projection of the second through hole 230 on the first metal backing layer 11 are staggered from each other.

其中,Micro-LED芯片10还包括:设置于第一通孔130和第二通孔230内的第一导电体14和第二导电体24。Wherein, the Micro-LED chip 10 further includes: a first conductive body 14 and a second conductive body 24 arranged in the first through hole 130 and the second through hole 230.

上述第一导电体14和第二导电体24的材料可以为Cu、Ti、Ni、Al、W、Pt、Au等金属中的至少一种,在此不做限定。The material of the first conductive body 14 and the second conductive body 24 may be at least one of metals such as Cu, Ti, Ni, Al, W, Pt, Au, etc., which is not limited herein.

第一导电体14的两端分别接触第一金属背衬层11和第二金属背衬层21,进而电连接第一LED单元12和第二LED单元22朝向第一金属背衬层11的一侧。第二导电体24的两端分别接触第二金属背衬层21和第三金属背衬层31,进而电连接第二LED单元22和第三单元LED单元朝向第一金属背衬层11的一侧。Both ends of the first conductive body 14 respectively contact the first metal backing layer 11 and the second metal backing layer 21, and then electrically connect the first LED unit 12 and the second LED unit 22 toward one of the first metal backing layer 11 side. Both ends of the second conductor 24 respectively contact the second metal backing layer 21 and the third metal backing layer 31, and then electrically connect the second LED unit 22 and the third unit LED unit facing one of the first metal backing layer 11 side.

其中,Micro-LED芯片10还包括:第一反射镜15、第二反射镜25以及第三反射镜35。Among them, the Micro-LED chip 10 further includes: a first reflector 15, a second reflector 25 and a third reflector 35.

上述第一反射镜15设置于第一LED单元12和第一金属背衬层11之间,第二反射镜25设置于第二LED单元22和第二金属背衬层21之间,第三反射镜35设置于第三LED单元32和第三金属背衬层31之间。The first reflector 15 is provided between the first LED unit 12 and the first metal backing layer 11, the second reflector 25 is provided between the second LED unit 22 and the second metal backing layer 21, and the third reflector The mirror 35 is disposed between the third LED unit 32 and the third metal backing layer 31.

上述第一反射镜15、第二反射镜25以及第三反射镜35可以采用透明导电材料做欧姆接触,比如氧化铟锡(ITO),ITO上再镀上其他的金属反射镜或DBR反射镜。在其他实施例中,第一反射镜15、第二反射镜25以及第三反射镜35可以同时具备反射镜和欧姆接触的功能,如包括银(Ag)、铝(Al)、镍(Ni)、铬(Cr)、铂(Pt)或其他适当金属的金属层。The first reflector 15, the second reflector 25, and the third reflector 35 can be made of transparent conductive materials for ohmic contact, such as indium tin oxide (ITO), and other metal reflectors or DBR reflectors are plated on the ITO. In other embodiments, the first reflector 15, the second reflector 25, and the third reflector 35 may have the functions of a reflector and ohmic contact at the same time, such as including silver (Ag), aluminum (Al), and nickel (Ni). , Chromium (Cr), platinum (Pt) or other suitable metal metal layer.

其中,Micro-LED芯片10进一步包括第一金属键合层16和第二金属键合层26,第一金属键合层16设置于第一平坦化层13和第二金属背衬层21之间,第二金属键合层26设置于第二平坦化层23和第三金属背衬层31之间。Wherein, the Micro-LED chip 10 further includes a first metal bonding layer 16 and a second metal bonding layer 26, and the first metal bonding layer 16 is disposed between the first planarization layer 13 and the second metal backing layer 21 , The second metal bonding layer 26 is disposed between the second planarization layer 23 and the third metal backing layer 31.

上述第一金属键合层16、第二金属键合层26的材料可以为In,Cu,Au,Ni,Ti,Sn中的至少一种或其合金,在此不做限定。The material of the first metal bonding layer 16 and the second metal bonding layer 26 may be at least one of In, Cu, Au, Ni, Ti, Sn or an alloy thereof, which is not limited herein.

其中,Micro-LED芯片10进一步包括第一绝缘层17、第二绝缘层27以及第三绝缘层37。Wherein, the Micro-LED chip 10 further includes a first insulating layer 17, a second insulating layer 27 and a third insulating layer 37.

上述第一绝缘层17、第二绝缘层27以及第三绝缘层37可采用氮化铝、二氧化硅、氮化硅、三氧化二铝、布拉格反射层DBR、硅胶、树脂或丙烯酸中的至少一种制成,在此不做限定。The first insulating layer 17, the second insulating layer 27, and the third insulating layer 37 can be made of at least aluminum nitride, silicon dioxide, silicon nitride, aluminum oxide, Bragg reflective layer DBR, silica gel, resin, or acrylic. One type of production, not limited here.

上述第一绝缘层17包覆于第一LED单元12的外围且使得第一LED单元12远 离第一金属背衬层11的一侧外露,第二绝缘层27包覆于第二LED单元22的外围且使得第二LED单元22远离第一金属背衬层11的一侧外露,第三绝缘层37包覆于第三LED单元32的外围且使得第三LED单元32远离第一金属背衬层11的一侧外露。The above-mentioned first insulating layer 17 covers the periphery of the first LED unit 12 and exposes the side of the first LED unit 12 away from the first metal backing layer 11, and the second insulating layer 27 covers the second LED unit 22 The periphery of the second LED unit 22 is exposed away from the side of the first metal backing layer 11, and the third insulating layer 37 covers the periphery of the third LED unit 32 and keeps the third LED unit 32 away from the first metal backing layer. One side of 11 is exposed.

需要注意的是,第一LED单元12远离第一金属背衬层11的一侧外露,即为第一外露表面18。第二LED单元22远离第一金属背衬层11的一侧外露,即为第二外露表面28。第三LED单元32远离第一金属背衬层11的一侧外露,即为第三外露表面38。It should be noted that the side of the first LED unit 12 away from the first metal backing layer 11 is exposed, that is, the first exposed surface 18. The side of the second LED unit 22 away from the first metal backing layer 11 is exposed, that is, the second exposed surface 28. The side of the third LED unit 32 away from the first metal backing layer 11 is exposed, that is, the third exposed surface 38.

可以通过印刷和电镀技术,分别在第一外露表面18、第二外露表面28以及第三外露表面38上制造相互绝缘的第一焊盘(图未示出)、第二焊盘(图未示出)以及第三焊盘(图未示出),其中,第一焊盘通过直接接触第一LED单元12以与第一LED单元12电连接,第二焊盘通过直接接触第二LED单元22以与第二LED单元22电连接,第三焊盘通过直接接触第三LED单元32以与第三LED单元32电连接。The first exposed surface 18, the second exposed surface 28, and the third exposed surface 38 can be respectively manufactured by printing and electroplating techniques to form a first pad (not shown) and a second pad (not shown) that are insulated from each other. Out) and a third pad (not shown in the figure), wherein the first pad is electrically connected to the first LED unit 12 by directly contacting the first LED unit 12, and the second pad is electrically connected to the first LED unit 12 by directly contacting the second LED unit 22 To be electrically connected to the second LED unit 22, the third pad is electrically connected to the third LED unit 32 by directly contacting the third LED unit 32.

区别于现有技术的情况,本申请实施例的第一LED单元12与第二LED单元22层叠设置,且所述第二LED单元22在所述第一金属背衬层11上的投影与所述第一LED单元12在所述第一金属背衬层11上的投影彼此错开。即本申请的每个LED芯片包括上下层叠且相互错开的至少第一LED单元12与第二LED单元22,该Micro-LED芯片10的尺寸紧凑,可以提高LED单元在金属背衬层上的排布密度,降低Micro-LED芯片10的制造成本。进一步地,通过第一LED单元12、第二LED单元22输出百分比的不同进行组合,使得Micro-LED芯片10可以呈现出不同的颜色,从而提升Micro-LED芯片10的显示效果。Different from the prior art, the first LED unit 12 and the second LED unit 22 in the embodiment of the present application are stacked, and the projection of the second LED unit 22 on the first metal backing layer 11 is consistent with the projection of the second LED unit 22 on the first metal backing layer 11. The projections of the first LED unit 12 on the first metal backing layer 11 are staggered. That is, each LED chip of the present application includes at least a first LED unit 12 and a second LED unit 22 that are stacked on top of each other and staggered. The size of the Micro-LED chip 10 is compact, which can improve the arrangement of LED units on the metal backing layer. The cloth density reduces the manufacturing cost of the Micro-LED chip 10. Further, by combining the different output percentages of the first LED unit 12 and the second LED unit 22, the Micro-LED chip 10 can present different colors, thereby improving the display effect of the Micro-LED chip 10.

如图4和图5所示,本申请还提出一种Micro-LED芯片10的制造方法,该方法用于制造上述实施例中的Micro-LED芯片10。该方法包括以下步骤:As shown in FIGS. 4 and 5, the present application also proposes a method for manufacturing the Micro-LED chip 10, which is used to manufacture the Micro-LED chip 10 in the above-mentioned embodiment. The method includes the following steps:

S101:提供第一外延片100和第二外延片200。S101: Provide a first epitaxial wafer 100 and a second epitaxial wafer 200.

其中,第一外延片100包括第一生长衬底110、第一发光外延层120以及第一金属背衬层11,第二外延片200包括第二生长衬底210、第二发光外延层220以及第二金属背衬层21。Wherein, the first epitaxial wafer 100 includes a first growth substrate 110, a first light emitting epitaxial layer 120, and a first metal backing layer 11, and the second epitaxial wafer 200 includes a second growth substrate 210, a second light emitting epitaxial layer 220, and The second metal backing layer 21.

第一发光外延层120附着于第一生长衬底110上,第一金属背衬层11附着且电连接于第一发光外延层120远离第一生长衬底110的一侧。The first light-emitting epitaxial layer 120 is attached to the first growth substrate 110, and the first metal backing layer 11 is attached and electrically connected to the side of the first light-emitting epitaxial layer 120 away from the first growth substrate 110.

第二发光外延层220附着于第二生长衬底210上,第二金属背衬层21附着且电连接于第二发光外延层220远离第二生长衬底210的一侧。The second light-emitting epitaxial layer 220 is attached to the second growth substrate 210, and the second metal backing layer 21 is attached and electrically connected to the side of the second light-emitting epitaxial layer 220 away from the second growth substrate 210.

上述第一生长衬底110、第二生长衬底210的材料可以为蓝宝石、硅、碳化硅、氮化镓、砷化镓中的至少一种,在此不做限定。The material of the first growth substrate 110 and the second growth substrate 210 may be at least one of sapphire, silicon, silicon carbide, gallium nitride, and gallium arsenide, which is not limited herein.

以InGaN/GaN材料LED单元为例,上述第一发光外延层120可以为多层结构,具体可以采用MOCVD方法在第一生长衬底110一侧依次生长第一导电类型半导体层121、量子阱层122、第二导电类型半导体层123。Taking the InGaN/GaN LED unit as an example, the above-mentioned first light-emitting epitaxial layer 120 may have a multilayer structure. Specifically, the MOCVD method may be used to sequentially grow the first conductive type semiconductor layer 121 and the quantum well layer on the side of the first growth substrate 110. 122. The second conductivity type semiconductor layer 123.

具体地,在第一生长衬底110一侧上生长第一导电类型半导体层121,第一导电类型半导体层121可以为n型GaN层,例如掺杂Si、Ge及Sn中至少一种的GaN 层。接着在第一导电类型半导体层121上生长量子阱层122,量子阱层122可为下列任一种结构:单层量子阱(SQW)以及InGaN/GaN多层量子阱(MQW)。之后再在量子阱层122上生长第二导电类型半导体层123,第二导电类型半导体层123为p型GaN层,例如掺杂Mg、Zn、Be、Ca、Sr及Ba中至少一种的GaN层。如此便制作完成第一发光外延层120。第二发光外延层220与第一发光外延层120的制作方法相同,在此不做赘述。Specifically, the first conductive type semiconductor layer 121 is grown on the side of the first growth substrate 110. The first conductive type semiconductor layer 121 may be an n-type GaN layer, such as GaN doped with at least one of Si, Ge, and Sn. Floor. Next, a quantum well layer 122 is grown on the first conductive type semiconductor layer 121. The quantum well layer 122 can have any of the following structures: single-layer quantum well (SQW) and InGaN/GaN multilayer quantum well (MQW). Then, a second conductive type semiconductor layer 123 is grown on the quantum well layer 122. The second conductive type semiconductor layer 123 is a p-type GaN layer, such as GaN doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba. Floor. In this way, the first light-emitting epitaxial layer 120 is completed. The manufacturing method of the second light-emitting epitaxial layer 220 is the same as that of the first light-emitting epitaxial layer 120, and will not be repeated here.

进一步,还可以在使用电子束蒸镀或磁控溅射方法在第二导电类型半导体层123上生长一层反射镜。可以采用透明导电材料做欧姆接触,比如氧化铟锡(ITO),ITO上再镀上其他的金属反射镜或DBR反射镜。在其他实施例中,反射镜可以同时具备反射镜和欧姆接触的功能,如包括银(Ag)、铝(Al)、镍(Ni)、铬(Cr)、铂(Pt)、或其他适当金属的金属反射镜层。Further, it is also possible to grow a layer of mirror on the second conductivity type semiconductor layer 123 by using electron beam evaporation or magnetron sputtering. Transparent conductive materials can be used for ohmic contact, such as indium tin oxide (ITO), and other metal mirrors or DBR mirrors are plated on the ITO. In other embodiments, the reflector may have the function of reflector and ohmic contact at the same time, such as including silver (Ag), aluminum (Al), nickel (Ni), chromium (Cr), platinum (Pt), or other suitable metals Metal mirror layer.

S102:将第一金属背衬层11远离第一发光外延层120的一侧附着于转移衬底40上,剥离第一生长衬底110,并图案化第一发光外延层120以形成彼此间隔设置的多个第一LED单元12。S102: Attach the side of the first metal backing layer 11 away from the first light-emitting epitaxial layer 120 to the transfer substrate 40, peel off the first growth substrate 110, and pattern the first light-emitting epitaxial layer 120 to form spaced apart的Multiple first LED units12.

上述转移衬底40的材料具体可包括蓝宝石、硅片、临时键合衬底等,在此不做限定。The material of the above-mentioned transfer substrate 40 may specifically include sapphire, silicon wafer, temporary bonding substrate, etc., which is not limited herein.

可通过干蚀刻、湿蚀刻、激光剥离或其它适合的技术剥离第一生长衬底110。例如,利用特定蚀刻剂对第一生长衬底110进行蚀刻,以剥离第一生长衬底110。The first growth substrate 110 may be peeled off by dry etching, wet etching, laser lift-off or other suitable techniques. For example, the first growth substrate 110 is etched with a specific etchant to peel off the first growth substrate 110.

上述图案化工艺可藉由合适的图案化技术来以形成彼此间隔设置的多个第一LED单元12,例如,干蚀刻、湿蚀刻或其它适合的技术。The above-mentioned patterning process may use a suitable patterning technique to form a plurality of first LED units 12 spaced apart from each other, for example, dry etching, wet etching or other suitable techniques.

具体地,可以对第一导电类型半导体层121、量子阱层122以及第二导电类型半导体层123进行一次图案化,以形成多个台面结构。上述蚀刻工艺可以包括干式蚀刻、湿式蚀刻或其组合。蚀刻工艺可以包括各个蚀刻步骤,每一步都被设计使用特定的蚀刻剂以有效移除相应的发光外延层。Specifically, the first conductive type semiconductor layer 121, the quantum well layer 122, and the second conductive type semiconductor layer 123 may be patterned once to form a plurality of mesa structures. The above-mentioned etching process may include dry etching, wet etching, or a combination thereof. The etching process may include various etching steps, and each step is designed to use a specific etchant to effectively remove the corresponding light-emitting epitaxial layer.

在可选实施例中,可以进一步利用硬掩模,通过以下过程形成第一沟道:在第二导电类型半导体层123上形成硬掩模,使用光刻工艺图案化硬掩模,以及使用图案化的硬掩模作为蚀刻掩模蚀刻发光外延层以形成第一沟道。如此便形成彼此间隔设置的多个第一LED单元12。In an alternative embodiment, a hard mask may be further used to form the first channel through the following processes: forming a hard mask on the second conductivity type semiconductor layer 123, patterning the hard mask using a photolithography process, and using a pattern The modified hard mask serves as an etching mask to etch the light-emitting epitaxial layer to form a first channel. In this way, a plurality of first LED units 12 spaced apart from each other are formed.

值得注意的是,在本申请中,虽然以倒装结构LED为例进行了描述,但本申请同样适用于制造垂直结构LED和正装结构LED。It is worth noting that in this application, although the flip-chip structure LED is described as an example, this application is also applicable to manufacturing vertical structure LEDs and front-mounted structure LEDs.

S103:在多个第一LED单元12和第一金属背衬层11上形成第一平坦化层13。S103: forming a first planarization layer 13 on the plurality of first LED units 12 and the first metal backing layer 11.

S104:将第二金属背衬层21远离第二发光外延层220的一侧附着于第一平坦化层13上,剥离第二生长衬底210,并图案化第二发光外延层220以形成彼此间隔设置的多个第二LED单元22。S104: Attach the side of the second metal backing layer 21 away from the second light-emitting epitaxial layer 220 to the first planarization layer 13, peel off the second growth substrate 210, and pattern the second light-emitting epitaxial layer 220 to form each other A plurality of second LED units 22 are arranged at intervals.

其中,可通过干蚀刻、湿蚀刻、激光剥离或其它适合的技术剥离第二生长衬底210。例如,利用特定蚀刻剂对第二生长衬底210进行蚀刻,以剥离第二生长衬底210。Wherein, the second growth substrate 210 may be peeled off by dry etching, wet etching, laser lift-off or other suitable techniques. For example, the second growth substrate 210 is etched with a specific etchant to peel off the second growth substrate 210.

第二LED单元22的结构与第一LED单元12的结构相同,第二LED单元22 的制作方法与第一LED单元12的制作方法相同,具体请参见上述实施例部分,在此不做赘述。The structure of the second LED unit 22 is the same as the structure of the first LED unit 12, and the manufacturing method of the second LED unit 22 is the same as the manufacturing method of the first LED unit 12. For details, please refer to the above-mentioned embodiment, which will not be repeated here.

其中,第二LED单元22在第一金属背衬层11的投影与第一LED单元12在第一金属背衬层11的投影彼此错开。即本申请实施例的LED芯片包括上下层叠且相互错开的第一LED单元12以及第二LED单元22,该Micro-LED芯片10的尺寸紧凑,可以提高LED单元在金属背衬层上的排布密度,降低Micro-LED芯片10的制造成本。进一步地,通过第一LED单元12、第二LED单元22输出百分比的不同进行组合,使得Micro-LED芯片10可以呈现出不同的颜色,从而提升Micro-LED芯片10的显示效果。The projection of the second LED unit 22 on the first metal backing layer 11 and the projection of the first LED unit 12 on the first metal backing layer 11 are staggered from each other. That is, the LED chip of the embodiment of the present application includes a first LED unit 12 and a second LED unit 22 that are stacked on top of each other and staggered. The size of the Micro-LED chip 10 is compact, which can improve the arrangement of the LED units on the metal backing layer. Density reduces the manufacturing cost of the Micro-LED chip 10. Further, by combining the different output percentages of the first LED unit 12 and the second LED unit 22, the Micro-LED chip 10 can present different colors, thereby improving the display effect of the Micro-LED chip 10.

如图6和图7所示,该方法还包括以下步骤:As shown in Figure 6 and Figure 7, the method further includes the following steps:

S105:在多个第二LED单元22和第二金属背衬层21上形成第二平坦化层23。S105: forming a second planarization layer 23 on the plurality of second LED units 22 and the second metal backing layer 21.

S106:提供第三外延片300。S106: Provide a third epitaxial wafer 300.

其中第三外延片300包括第三生长衬底310、附着于第三生长衬底310上的第三发光外延层320以及附着且电连接于第三发光外延层320远离第三生长衬底310的一侧的第三金属背衬层31。The third epitaxial wafer 300 includes a third growth substrate 310, a third light emitting epitaxial layer 320 attached to the third growth substrate 310, and a third light emitting epitaxial layer 320 attached and electrically connected to the third light emitting epitaxial layer 320 away from the third growth substrate 310. The third metal backing layer 31 on one side.

S107:将第三金属背衬层31远离第三发光外延层320的一侧附着于第二平坦化层23上,剥离第三生长衬底310,并图案化第三发光外延层320以形成彼此间隔设置的多个第三LED单元32。S107: Attach a side of the third metal backing layer 31 away from the third light-emitting epitaxial layer 320 to the second planarization layer 23, peel off the third growth substrate 310, and pattern the third light-emitting epitaxial layer 320 to form each other A plurality of third LED units 32 are arranged at intervals.

第三LED单元32的结构与第一LED单元12的结构相同,第三LED单元32的制作方法与第一LED单元12的制作方法相同,具体请参见上述实施例部分,在此不做赘述。The structure of the third LED unit 32 is the same as the structure of the first LED unit 12, and the manufacturing method of the third LED unit 32 is the same as the manufacturing method of the first LED unit 12. For details, please refer to the above-mentioned embodiment, which will not be repeated here.

其中,第三LED单元32在第一金属背衬层11上的投影分别与第一LED单元12在第一金属背衬层11上的投影和第二LED单元22在第一金属背衬层11上的投影彼此错开。即本申请实施例的LED芯片包括上下层叠且相互错开的第一LED单元12、第二LED单元22以及第三LED单元32,该Micro-LED芯片10的尺寸紧凑,可以提高LED单元在金属背衬层上的排布密度,降低Micro-LED芯片10的制造成本。进一步地,通过第一LED单元12、第二LED单元22、第三LED单元32输出百分比的不同进行组合,使得Micro-LED芯片10可以呈现出不同的颜色,从而提升Micro-LED芯片10的显示效果。The projection of the third LED unit 32 on the first metal backing layer 11 is the same as the projection of the first LED unit 12 on the first metal backing layer 11 and the projection of the second LED unit 22 on the first metal backing layer 11 respectively. The projections on are staggered from each other. That is, the LED chip of the embodiment of the present application includes a first LED unit 12, a second LED unit 22, and a third LED unit 32 stacked on top of each other and staggered. The size of the Micro-LED chip 10 is compact, which can improve the LED unit on the metal back The arrangement density on the lining layer reduces the manufacturing cost of the Micro-LED chip 10. Further, by combining the different output percentages of the first LED unit 12, the second LED unit 22, and the third LED unit 32, the Micro-LED chip 10 can present different colors, thereby improving the display of the Micro-LED chip 10 effect.

上述第三生长衬底310的材料可以为蓝宝石、硅、碳化硅、氮化镓、砷化镓中的至少一种,在此不做限定。The material of the third growth substrate 310 may be at least one of sapphire, silicon, silicon carbide, gallium nitride, and gallium arsenide, which is not limited herein.

其中,可通过干蚀刻、湿蚀刻、激光剥离或其它适合的技术剥离第二生长衬底210。例如,利用特定蚀刻剂对第三生长衬底310进行蚀刻,以剥离第三生长衬底310。Wherein, the second growth substrate 210 may be peeled off by dry etching, wet etching, laser lift-off or other suitable techniques. For example, the third growth substrate 310 is etched with a specific etchant to peel off the third growth substrate 310.

其中,第一外延片100还包括位于第一发光外延层120和第一金属背衬层11之间且与第一LED单元12位置对应的第一反射镜15。第二外延片200还包括位于第二发光外延层220和第二金属背衬层21之间且与第二LED单元22位置对应的第二反射镜25。第三外延片300还包括位于第三发光外延层320和第三金属背衬层31 之间且与第三LED单元32位置对应的第三反射镜35。The first epitaxial wafer 100 further includes a first reflector 15 located between the first light-emitting epitaxial layer 120 and the first metal backing layer 11 and corresponding to the position of the first LED unit 12. The second epitaxial wafer 200 further includes a second reflector 25 located between the second light-emitting epitaxial layer 220 and the second metal backing layer 21 and corresponding to the position of the second LED unit 22. The third epitaxial wafer 300 further includes a third reflector 35 located between the third light emitting epitaxial layer 320 and the third metal backing layer 31 and corresponding to the position of the third LED unit 32.

上述第一反射镜15、第二反射镜25以及第三反射镜35可以采用透明导电材料做欧姆接触,比如氧化铟锡(ITO),ITO上再镀上其他的金属反射镜或DBR反射镜。在其他实施例中,反射镜可以同时具备反射镜和欧姆接触的功能,如包括银(Ag)、铝(Al)、镍(Ni)、铬(Cr)、铂(Pt)、或其他适当金属的金属反射镜层。The first reflector 15, the second reflector 25, and the third reflector 35 can be made of transparent conductive materials for ohmic contact, such as indium tin oxide (ITO), and other metal reflectors or DBR reflectors are plated on the ITO. In other embodiments, the reflector may have the function of reflector and ohmic contact at the same time, such as including silver (Ag), aluminum (Al), nickel (Ni), chromium (Cr), platinum (Pt), or other suitable metals Metal mirror layer.

如图8和图9所示,该方法还包括以下步骤:As shown in Figures 8 and 9, the method further includes the following steps:

S108:图案化第三金属背衬层31、第二平坦化层23、第二金属背衬层21和第一平坦化层13,以使得第一LED单元12和第二LED单元22远离第一金属背衬层11的一侧外露。S108: Pattern the third metal backing layer 31, the second planarization layer 23, the second metal backing layer 21, and the first planarization layer 13, so that the first LED unit 12 and the second LED unit 22 are far away from the first One side of the metal backing layer 11 is exposed.

S109:图案化第一金属背衬层11,以形成相互独立的多个Micro-LED芯片10,其中每个Micro-LED芯片10包括至少一第一LED单元12、至少一第二LED单元22以及至少一第三LED单元32。S109: Pattern the first metal backing layer 11 to form a plurality of independent Micro-LED chips 10, wherein each Micro-LED chip 10 includes at least one first LED unit 12, at least one second LED unit 22, and At least one third LED unit 32.

进一步地,在步骤S103之前,该方法还包括以下步骤:利用第一绝缘层17包覆第一LED单元12。在步骤S105之前,该方法还包括以下步骤:利用第二绝缘层27包覆第二LED单元22。在步骤S108之前,该方法还包括以下步骤:利用第三绝缘层37包覆第三LED单元32。Further, before step S103, the method further includes the following step: covering the first LED unit 12 with the first insulating layer 17. Before step S105, the method further includes the following step: covering the second LED unit 22 with the second insulating layer 27. Before step S108, the method further includes the following step: covering the third LED unit 32 with the third insulating layer 37.

具体地,采用溅射、喷涂、ALD或PECVD沉积工艺在第一LED单元12、第二LED单元22以及第三LED单元32的外表面分别包覆第一绝缘层17、第二绝缘层27以及第三绝缘层37,第一绝缘层17、第二绝缘层27以及第三绝缘层37可采用氮化铝、二氧化硅、氮化硅、三氧化二铝、布拉格反射层DBR、硅胶、树脂或丙烯酸之其一制成。Specifically, the outer surfaces of the first LED unit 12, the second LED unit 22, and the third LED unit 32 are respectively covered with the first insulating layer 17, the second insulating layer 27, and The third insulating layer 37, the first insulating layer 17, the second insulating layer 27, and the third insulating layer 37 can be made of aluminum nitride, silicon dioxide, silicon nitride, aluminum oxide, Bragg reflective layer DBR, silica gel, and resin. Or made of acrylic.

进一步地,步骤S108进一步包括:对第一绝缘层17、第二绝缘层27、第三绝缘层37进行图案化,以分别外露第一LED单元12、第二LED单元22和第三LED单元32远离第一金属背衬层11的一侧。Further, step S108 further includes: patterning the first insulating layer 17, the second insulating layer 27, and the third insulating layer 37 to expose the first LED unit 12, the second LED unit 22, and the third LED unit 32, respectively. The side away from the first metal backing layer 11.

需要注意的是,第一LED单元12远离第一金属背衬层11的一侧外露,即为第一外露表面18。第二LED单元22远离第一金属背衬层11的一侧外露,即为第二外露表面28。第三LED单元32远离第一金属背衬层11的一侧外露,即为第三外露表面38。It should be noted that the side of the first LED unit 12 away from the first metal backing layer 11 is exposed, that is, the first exposed surface 18. The side of the second LED unit 22 away from the first metal backing layer 11 is exposed, that is, the second exposed surface 28. The side of the third LED unit 32 away from the first metal backing layer 11 is exposed, that is, the third exposed surface 38.

可以通过印刷、电镀、热蒸镀、电子束蒸镀或磁控溅射等镀膜技术,分别在第一外露表面18、第二外露表面28以及第三外露表面38上制造相互绝缘的第一焊盘、第二焊盘以及第三焊盘,其中,第一焊盘通过直接接触第一LED单元12以与第一LED单元12电连接,第二焊盘通过直接接触第二LED单元22以与第二LED单元22电连接,第三焊盘通过直接接触第三LED单元32以与第三LED单元32电连接。The first exposed surface 18, the second exposed surface 28, and the third exposed surface 38 can be insulated from each other by coating techniques such as printing, electroplating, thermal evaporation, electron beam evaporation, or magnetron sputtering. The pad, the second pad and the third pad, wherein the first pad is electrically connected to the first LED unit 12 by directly contacting the first LED unit 12, and the second pad is electrically connected to the first LED unit 12 by directly contacting the second LED unit 22 The second LED unit 22 is electrically connected, and the third pad is electrically connected with the third LED unit 32 by directly contacting the third LED unit 32.

进一步地,在步骤S104步骤之前,该方法还包括以下步骤:在第一平坦化层13上形成第一通孔130,并在第一通孔130内形成第一导电体14,以使得在第二金属背衬层21附着于第一平坦化层13之后,第一导电体14的两端分别接触第一金属背衬层11和第二金属背衬层21,进而电连接第一LED单元12和第二LED单元22朝向第一金属背衬层11的一侧。Further, before step S104, the method further includes the following steps: forming a first through hole 130 on the first planarization layer 13, and forming a first conductive body 14 in the first through hole 130, so that After the two metal backing layers 21 are attached to the first planarization layer 13, the two ends of the first conductor 14 respectively contact the first metal backing layer 11 and the second metal backing layer 21, thereby electrically connecting the first LED unit 12 And the second LED unit 22 faces one side of the first metal backing layer 11.

进一步地,在步骤S107之前,该方法还包括以下步骤:在第二平坦化层23上形成第二通孔230,并在第二通孔230内形成第二导电体24,以使得在第三金属背衬层31附着于第二平坦化层23之后,第二导电体24的两端分别接触第二金属背衬层21和第三金属背衬层31,进而电连接第二LED单元22和第三单元LED单元朝向第一金属背衬层11的一侧。Further, before step S107, the method further includes the following steps: forming a second through hole 230 on the second planarization layer 23, and forming a second electrical conductor 24 in the second through hole 230, so that the third After the metal backing layer 31 is attached to the second planarization layer 23, the two ends of the second conductor 24 respectively contact the second metal backing layer 21 and the third metal backing layer 31, thereby electrically connecting the second LED unit 22 and The third unit LED unit faces the side of the first metal backing layer 11.

进一步地,在步骤S102之前,该方法还包括以下步骤:在转移衬底40上形成第一金属键合层16,图案化转移衬底40和第一金属键合层16,以形成多个衬底凸柱401以及形成于衬底凸柱401顶部的第一金属键合图案161。其中第一金属背衬层11键合于第一金属键合图案161上。Further, before step S102, the method further includes the following steps: forming a first metal bonding layer 16 on the transfer substrate 40, and patterning the transfer substrate 40 and the first metal bonding layer 16 to form a plurality of substrates. The bottom bump 401 and the first metal bonding pattern 161 formed on the top of the substrate bump 401. The first metal backing layer 11 is bonded to the first metal bonding pattern 161.

其中,可以采用热蒸镀、电子束蒸镀和磁控溅射蒸镀等方法在转移衬底40上形成第一金属键合层16。上述第一金属键合层16的材料可以为In,Cu,Au,Ni,Ti,Sn中的至少一种或其合金,在此不做限定。Wherein, the first metal bonding layer 16 can be formed on the transfer substrate 40 by methods such as thermal evaporation, electron beam evaporation, and magnetron sputtering evaporation. The material of the first metal bonding layer 16 may be at least one of In, Cu, Au, Ni, Ti, Sn or an alloy thereof, which is not limited herein.

上述图案化工艺可藉由合适的图案化技术来形成多个衬底凸柱401以及形成于衬底凸柱401顶部的第一金属键合图案161,例如,干蚀刻、湿蚀刻、激光剥离或其它适合的技术。例如,在转移衬底40和第一金属键合层16上覆盖一掩膜板。通过蚀刻技术除去掩膜板未覆盖位置的转移衬底40和第一金属键合层16,形成多个衬底凸柱401以及形成于衬底凸柱401顶部的第一金属键合图案161。The above-mentioned patterning process may use a suitable patterning technique to form a plurality of substrate protrusions 401 and the first metal bonding pattern 161 formed on the top of the substrate protrusions 401, for example, dry etching, wet etching, laser lift-off or Other suitable technologies. For example, a mask is covered on the transfer substrate 40 and the first metal bonding layer 16. The transfer substrate 40 and the first metal bonding layer 16 at positions not covered by the mask are removed by etching technology to form a plurality of substrate protrusions 401 and a first metal bonding pattern 161 formed on the top of the substrate protrusions 401.

在步骤S104之前,该方法还包括以下步骤:在第一平坦化层13上形成第二金属键合层26。其中第二金属背衬层21键合于第二金属键合层26上。Before step S104, the method further includes the following steps: forming a second metal bonding layer 26 on the first planarization layer 13. The second metal backing layer 21 is bonded to the second metal bonding layer 26.

在步骤S107之前,该方法还包括以下步骤:在第二平坦化层23上形成第三金属键合层36,其中第三金属背衬层31键合于第三金属键合层36上。Before step S107, the method further includes the following steps: forming a third metal bonding layer 36 on the second planarization layer 23, wherein the third metal backing layer 31 is bonded to the third metal bonding layer 36.

具体地,可以采用热蒸镀、电子束蒸镀和磁控溅射蒸镀等方法在第一平坦化层13上形成第二金属键合层26,可以采用热蒸镀、电子束蒸镀和磁控溅射蒸镀等方法在第二平坦化层23上形成第三金属键合层36。上述第二金属键合层26、第三金属键合层36的材料可以为In,Cu,Au,Ni,Ti,Sn中的至少一种或其合金,在此不做限定。Specifically, the second metal bonding layer 26 can be formed on the first planarization layer 13 by methods such as thermal evaporation, electron beam evaporation, and magnetron sputtering evaporation. Thermal evaporation, electron beam evaporation, and The third metal bonding layer 36 is formed on the second planarization layer 23 by methods such as magnetron sputtering and evaporation. The material of the second metal bonding layer 26 and the third metal bonding layer 36 may be at least one of In, Cu, Au, Ni, Ti, Sn or an alloy thereof, which is not limited herein.

区别于现有技术的情况,本申请实施例的第一LED单元12、第二LED单元22层叠设置,且所述第二LED单元22在所述第一金属背衬层11上的投影与所述第一LED单元12在所述第一金属背衬层11上的投影彼此错开。即本申请的每个LED芯片包括上下层叠且相互错开的至少第一LED单元12与第二LED单元22,该Micro-LED芯片10的尺寸紧凑,可以提高LED单元在金属背衬层上的排布密度,降低Micro-LED芯片10的制造成本。进一步地,通过第一LED单元12、第二LED单元22输出百分比的不同进行组合,使得Micro-LED芯片10可以呈现出不同的颜色,从而提升Micro-LED芯片10的显示效果。Different from the state of the art, the first LED unit 12 and the second LED unit 22 of the embodiment of the present application are stacked and arranged, and the projection of the second LED unit 22 on the first metal backing layer 11 is consistent with the projection of the second LED unit 22 on the first metal backing layer 11. The projections of the first LED unit 12 on the first metal backing layer 11 are staggered. That is, each LED chip of the present application includes at least a first LED unit 12 and a second LED unit 22 that are stacked on top of each other and staggered. The size of the Micro-LED chip 10 is compact, which can improve the arrangement of LED units on the metal backing layer. The cloth density reduces the manufacturing cost of the Micro-LED chip 10. Further, by combining the different output percentages of the first LED unit 12 and the second LED unit 22, the Micro-LED chip 10 can present different colors, thereby improving the display effect of the Micro-LED chip 10.

以上仅为本申请的实施方式,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。The above are only implementations of this application, and do not limit the scope of this application. Any equivalent structure or equivalent process transformation made using the content of the description and drawings of this application, or directly or indirectly applied to other related technical fields, The same reasoning is included in the scope of patent protection of this application.

Claims (19)

一种Micro-LED芯片,其中,所述Micro-LED芯片包括:A Micro-LED chip, wherein the Micro-LED chip includes: 第一金属背衬层;The first metal backing layer; 第一LED单元,附着且电连接于所述第一金属背衬层上;The first LED unit is attached and electrically connected to the first metal backing layer; 第一平坦化层,附着于所述第一金属背衬层上,并使得所述第一LED单元远离所述第一金属背衬层的一侧外露;The first planarization layer is attached to the first metal backing layer and exposes the side of the first LED unit away from the first metal backing layer; 第二金属背衬层,附着于所述第一LED单元外围的所述第一平坦化层上;A second metal backing layer attached to the first planarization layer on the periphery of the first LED unit; 第二LED单元,附着且电连接于所述第二金属背衬层上,其中所述第二LED单元在所述第一金属背衬层上的投影与所述第一LED单元在所述第一金属背衬层上的投影彼此错开;The second LED unit is attached and electrically connected to the second metal backing layer, wherein the projection of the second LED unit on the first metal backing layer is the same as that of the first LED unit on the first metal backing layer. The projections on a metal backing layer are staggered with each other; 其中所述第一LED单元与所述第二LED单元显示为蓝、绿和红三原色中的任一光色。The first LED unit and the second LED unit are displayed in any light color among the three primary colors of blue, green and red. 根据权利要求1所述的Micro-LED芯片,其中,所述Micro-LED芯片进一步包括:The Micro-LED chip according to claim 1, wherein the Micro-LED chip further comprises: 第二平坦化层,附着于所述第二金属背衬层上,并使得所述第二LED单元远离所述第一金属背衬层的一侧外露;The second planarization layer is attached to the second metal backing layer and exposes the side of the second LED unit away from the first metal backing layer; 第三金属背衬层,附着于所述第二LED单元外围的所述第二平坦化层上;A third metal backing layer attached to the second planarization layer on the periphery of the second LED unit; 第三LED单元,附着且电连接于所述第三金属背衬层上,其中所述第三LED单元在所述第一金属背衬层上的投影分别与所述第一LED单元在所述第一金属背衬层上的投影和所述第二LED单元在所述第一金属背衬层上的投影彼此错开。The third LED unit is attached and electrically connected to the third metal backing layer, wherein the projection of the third LED unit on the first metal backing layer is the same as that of the first LED unit on the The projection on the first metal backing layer and the projection of the second LED unit on the first metal backing layer are staggered from each other. 根据权利要求2所述的Micro-LED芯片,其中,所述第一平坦化层和第二平坦化层分别设置有第一通孔和第二通孔,所述Micro-LED芯片进一步包括设置于所述第一通孔和第二通孔内的第一导电体和第二导电体,所述第一导电体的两端分别接触所述第一金属背衬层和所述第二金属背衬层,进而电连接所述第一LED单元和所述第二LED单元朝向所述第一金属背衬层的一侧,所述第二导电体的两端分别接触所述第二金属背衬层和所述第三金属背衬层,进而电连接所述第二LED单元和所述第三单元LED单元朝向所述第一金属背衬层的一侧。The Micro-LED chip according to claim 2, wherein the first planarization layer and the second planarization layer are respectively provided with a first through hole and a second through hole, and the Micro-LED chip further comprises The first conductive body and the second conductive body in the first through hole and the second through hole, both ends of the first conductive body are in contact with the first metal backing layer and the second metal backing, respectively Layer, and then electrically connect the first LED unit and the second LED unit toward the side of the first metal backing layer, and both ends of the second conductive body are in contact with the second metal backing layer, respectively And the third metal backing layer, thereby electrically connecting the second LED unit and the third unit LED unit toward the side of the first metal backing layer. 根据权利要求2所述的Micro-LED芯片,其中,所述Micro-LED芯片进一步包括设置于所述第一LED单元和所述第一金属背衬层之间的第一反射镜、设置于所述第二LED单元和所述第二金属背衬层之间的第二反射镜以及设置于所述第三LED单元和所述第三金属背衬层之间的第三反射镜。The Micro-LED chip according to claim 2, wherein the Micro-LED chip further comprises a first reflector arranged between the first LED unit and the first metal backing layer, and A second reflector between the second LED unit and the second metal backing layer, and a third reflector disposed between the third LED unit and the third metal backing layer. 根据权利要求2所述的Micro-LED芯片,其中,所述Micro-LED芯片进一步包括分别设置于所述第一平坦化层和所述第二金属背衬层之间以及所述第二平坦化层和所述第三金属背衬层之间的两个金属键合层。The Micro-LED chip according to claim 2, wherein the Micro-LED chip further comprises a second planarization layer disposed between the first planarization layer and the second metal backing layer, and the second planarization layer, respectively. Two metal bonding layers between the layer and the third metal backing layer. 根据权利要求2所述的Micro-LED芯片,其中,所述Micro-LED芯片进一步包括包覆于所述第一LED单元的外围且使得所述第一LED单元远离所述第一金属背衬层的一侧外露的第一绝缘层、包覆于所述第二LED单元的外围且使得所述第二LED单元远离所述第一金属背衬层的一侧外露的第二绝缘层以及包覆于所述第 三LED单元的外围且使得所述第三LED单元远离所述第一金属背衬层的一侧外露的第三绝缘层。The Micro-LED chip according to claim 2, wherein the Micro-LED chip further comprises a cladding on the periphery of the first LED unit and keeping the first LED unit away from the first metal backing layer A first insulating layer exposed on one side of the second LED unit, a second insulating layer exposed on the side of the second LED unit that is away from the first metal backing layer and covering the periphery of the second LED unit A third insulating layer is exposed on the periphery of the third LED unit and makes the third LED unit away from the first metal backing layer. 一种Micro-LED芯片,其中,所述Micro-LED芯片包括:A Micro-LED chip, wherein the Micro-LED chip includes: 第一金属背衬层;The first metal backing layer; 第一LED单元,附着且电连接于所述第一金属背衬层上;The first LED unit is attached and electrically connected to the first metal backing layer; 第一平坦化层,附着于所述第一金属背衬层上,并使得所述第一LED单元远离所述第一金属背衬层的一侧外露;The first planarization layer is attached to the first metal backing layer and exposes the side of the first LED unit away from the first metal backing layer; 第二金属背衬层,附着于所述第一LED单元外围的所述第一平坦化层上;A second metal backing layer attached to the first planarization layer on the periphery of the first LED unit; 第二LED单元,附着且电连接于所述第二金属背衬层上,其中所述第二LED单元在所述第一金属背衬层上的投影与所述第一LED单元在所述第一金属背衬层上的投影彼此错开。The second LED unit is attached and electrically connected to the second metal backing layer, wherein the projection of the second LED unit on the first metal backing layer is the same as that of the first LED unit on the first metal backing layer. The projections on a metal backing layer are staggered from each other. 根据权利要求7所述的Micro-LED芯片,其中,所述Micro-LED芯片进一步包括:The Micro-LED chip according to claim 7, wherein the Micro-LED chip further comprises: 第二平坦化层,附着于所述第二金属背衬层上,并使得所述第二LED单元远离所述第一金属背衬层的一侧外露;The second planarization layer is attached to the second metal backing layer and exposes the side of the second LED unit away from the first metal backing layer; 第三金属背衬层,附着于所述第二LED单元外围的所述第二平坦化层上;A third metal backing layer attached to the second planarization layer on the periphery of the second LED unit; 第三LED单元,附着且电连接于所述第三金属背衬层上,其中所述第三LED单元在所述第一金属背衬层上的投影分别与所述第一LED单元在所述第一金属背衬层上的投影和所述第二LED单元在所述第一金属背衬层上的投影彼此错开。The third LED unit is attached and electrically connected to the third metal backing layer, wherein the projection of the third LED unit on the first metal backing layer is the same as that of the first LED unit on the The projection on the first metal backing layer and the projection of the second LED unit on the first metal backing layer are staggered from each other. 根据权利要求8所述的Micro-LED芯片,其中,所述第一平坦化层和第二平坦化层分别设置有第一通孔和第二通孔,所述Micro-LED芯片进一步包括设置于所述第一通孔和第二通孔内的第一导电体和第二导电体,所述第一导电体的两端分别接触所述第一金属背衬层和所述第二金属背衬层,进而电连接所述第一LED单元和所述第二LED单元朝向所述第一金属背衬层的一侧,所述第二导电体的两端分别接触所述第二金属背衬层和所述第三金属背衬层,进而电连接所述第二LED单元和所述第三单元LED单元朝向所述第一金属背衬层的一侧。The Micro-LED chip according to claim 8, wherein the first planarization layer and the second planarization layer are respectively provided with a first through hole and a second through hole, and the Micro-LED chip further comprises The first conductive body and the second conductive body in the first through hole and the second through hole, both ends of the first conductive body are in contact with the first metal backing layer and the second metal backing, respectively Layer, and then electrically connect the first LED unit and the second LED unit toward the side of the first metal backing layer, and both ends of the second conductive body are in contact with the second metal backing layer, respectively And the third metal backing layer, thereby electrically connecting the second LED unit and the third unit LED unit toward the side of the first metal backing layer. 根据权利要求8所述的Micro-LED芯片,其中,所述Micro-LED芯片进一步包括设置于所述第一LED单元和所述第一金属背衬层之间的第一反射镜、设置于所述第二LED单元和所述第二金属背衬层之间的第二反射镜以及设置于所述第三LED单元和所述第三金属背衬层之间的第三反射镜。The Micro-LED chip according to claim 8, wherein the Micro-LED chip further comprises a first reflector disposed between the first LED unit and the first metal backing layer, and A second reflector between the second LED unit and the second metal backing layer, and a third reflector disposed between the third LED unit and the third metal backing layer. 根据权利要求8所述的Micro-LED芯片,其中,所述Micro-LED芯片进一步包括分别设置于所述第一平坦化层和所述第二金属背衬层之间以及所述第二平坦化层和所述第三金属背衬层之间的两个金属键合层。The Micro-LED chip according to claim 8, wherein the Micro-LED chip further comprises the second planarization layer and the second metal backing layer respectively disposed between the second planarization layer and the second planarization layer. Two metal bonding layers between the layer and the third metal backing layer. 根据权利要求8所述的Micro-LED芯片,其中,所述Micro-LED芯片进一步包括包覆于所述第一LED单元的外围且使得所述第一LED单元远离所述第一金属背衬层的一侧外露的第一绝缘层、包覆于所述第二LED单元的外围且使得所述第二LED单元远离所述第一金属背衬层的一侧外露的第二绝缘层以及包覆于所述第三LED单元的外围且使得所述第三LED单元远离所述第一金属背衬层的一侧外露 的第三绝缘层。8. The Micro-LED chip according to claim 8, wherein the Micro-LED chip further comprises a periphery of the first LED unit and keeps the first LED unit away from the first metal backing layer A first insulating layer exposed on one side of the second LED unit, a second insulating layer exposed on the side of the second LED unit that is away from the first metal backing layer and covering the periphery of the second LED unit A third insulating layer that is exposed on the periphery of the third LED unit and makes the third LED unit away from the first metal backing layer. 一种Micro-LED芯片的制造方法,其中,所述方法包括:A method for manufacturing a Micro-LED chip, wherein the method includes: 提供第一外延片和第二外延片,其中所述第一外延片包括第一生长衬底、附着于所述第一生长衬底上的第一发光外延层以及附着且电连接于所述第一发光外延层远离所述第一生长衬底的一侧的第一金属背衬层,所述第二外延片包括第二生长衬底、附着于所述第二生长衬底上的第二发光外延层以及附着且电连接于所述第二发光外延层远离所述第二生长衬底的一侧的第二金属背衬层;A first epitaxial wafer and a second epitaxial wafer are provided, wherein the first epitaxial wafer includes a first growth substrate, a first light-emitting epitaxial layer attached to the first growth substrate, and attached and electrically connected to the first growth substrate. A first metal backing layer on a side of a light-emitting epitaxial layer away from the first growth substrate. The second epitaxial wafer includes a second growth substrate and a second light-emitting layer attached to the second growth substrate. An epitaxial layer and a second metal backing layer attached and electrically connected to a side of the second light-emitting epitaxial layer away from the second growth substrate; 将所述第一金属背衬层远离所述第一发光外延层的一侧附着于转移衬底上,剥离所述第一生长衬底,并图案化所述第一发光外延层以形成彼此间隔设置的多个第一LED单元;Attach the side of the first metal backing layer away from the first light-emitting epitaxial layer to a transfer substrate, peel off the first growth substrate, and pattern the first light-emitting epitaxial layer to form a gap between each other A plurality of first LED units provided; 在所述多个第一LED单元和所述第一金属背衬层上形成第一平坦化层;Forming a first planarization layer on the plurality of first LED units and the first metal backing layer; 将所述第二金属背衬层远离所述第二发光外延层的一侧附着于所述第一平坦化层上,剥离所述第二生长衬底,并图案化所述第二发光外延层以形成彼此间隔设置的多个第二LED单元,其中所述第二LED单元在所述第一金属背衬层的投影与所述第一LED单元在所述第一金属背衬层的投影彼此错开。Attach the side of the second metal backing layer away from the second light-emitting epitaxial layer to the first planarization layer, peel off the second growth substrate, and pattern the second light-emitting epitaxial layer To form a plurality of second LED units spaced apart from each other, wherein the projection of the second LED unit on the first metal backing layer and the projection of the first LED unit on the first metal backing layer are mutually stagger. 根据权利要求13所述的方法,其中,所述方法进一步包括:The method according to claim 13, wherein the method further comprises: 在所述多个第二LED单元和所述第二金属背衬层上形成第二平坦化层;Forming a second planarization layer on the plurality of second LED units and the second metal backing layer; 提供第三外延片,其中所述第三外延片包括第三生长衬底、附着于所述第三生长衬底上的第三发光外延层以及附着且电连接于所述第三发光外延层远离所述第三生长衬底的一侧的第三金属背衬层;A third epitaxial wafer is provided, wherein the third epitaxial wafer includes a third growth substrate, a third light-emitting epitaxial layer attached to the third growth substrate, and a third light-emitting epitaxial layer attached and electrically connected to the third light-emitting epitaxial layer away from A third metal backing layer on one side of the third growth substrate; 将所述第三金属背衬层远离所述第三发光外延层的一侧附着于所述第二平坦化层上,剥离所述第三生长衬底,并图案化所述第三发光外延层以形成彼此间隔设置的多个第三LED单元,其中所述第三LED单元在所述第一金属背衬层上的投影分别与所述第一LED单元在所述第一金属背衬层上的投影和所述第二LED单元在所述第一金属背衬层上的投影彼此错开。Attach the side of the third metal backing layer away from the third light-emitting epitaxial layer to the second planarization layer, peel off the third growth substrate, and pattern the third light-emitting epitaxial layer To form a plurality of third LED units spaced apart from each other, wherein the projection of the third LED unit on the first metal backing layer is the same as that of the first LED unit on the first metal backing layer. The projection of and the projection of the second LED unit on the first metal backing layer are staggered with each other. 根据权利要求14所述的方法,其中,所述方法进一步包括:The method according to claim 14, wherein the method further comprises: 图案化所述第三金属背衬层、所述第二平坦化层、所述第二金属背衬层和所述第一平坦化层,以使得所述第一LED单元和所述第二LED单元远离所述第一金属背衬层的一侧外露;The third metal backing layer, the second planarization layer, the second metal backing layer, and the first planarization layer are patterned so that the first LED unit and the second LED The side of the unit away from the first metal backing layer is exposed; 图案化所述第一金属背衬层,以形成相互独立的多个Micro-LED芯片,其中每个Micro-LED芯片包括至少一所述第一LED单元、至少一所述第二LED单元以及至少一所述第三LED单元。The first metal backing layer is patterned to form a plurality of independent Micro-LED chips, wherein each Micro-LED chip includes at least one of the first LED unit, at least one of the second LED unit, and at least 1. The third LED unit. 根据权利要求15所述的方法,其中,所述在所述多个第一LED单元和所述第一金属背衬层上形成第一平坦化层的步骤之前,进一步包括:利用第一绝缘层包覆所述第一LED单元;15. The method of claim 15, wherein before the step of forming a first planarization layer on the plurality of first LED units and the first metal backing layer, further comprising: using a first insulating layer Covering the first LED unit; 所述在所述多个第二LED单元和所述第二金属背衬层上形成第二平坦化层的步骤之前,进一步包括:利用第二绝缘层包覆所述第二LED单元;Before the step of forming a second planarization layer on the plurality of second LED units and the second metal backing layer, the method further includes: covering the second LED unit with a second insulating layer; 所述图案化所述第三金属背衬层、所述第二平坦化层、所述第二金属背衬层和 所述第一平坦化层的步骤之前,进一步包括:利用第三绝缘层包覆所述第三LED单元;Before the step of patterning the third metal backing layer, the second planarization layer, the second metal backing layer, and the first planarization layer, the method further includes: wrapping with a third insulating layer Covering the third LED unit; 所述图案化所述第三金属背衬层、所述第二平坦化层、所述第二金属背衬层和所述第一平坦化层的步骤进一步包括:The step of patterning the third metal backing layer, the second planarization layer, the second metal backing layer, and the first planarization layer further includes: 对所述第一绝缘层、第二绝缘层第一绝缘层进行图案化,以分别外露所述第一LED单元、第二LED单元和第三LED单元远离所述第一金属背衬层的一侧。The first insulating layer, the second insulating layer and the first insulating layer are patterned to respectively expose one of the first LED unit, the second LED unit, and the third LED unit away from the first metal backing layer. side. 根据权利要求14所述的方法,其中,所述将所述第二金属背衬层远离所述第二发光外延层的一侧附着于所述第一平坦化层的步骤之前,进一步包括:14. The method of claim 14, wherein before the step of attaching the second metal backing layer to the first planarization layer on the side of the second metal backing layer away from the second light-emitting epitaxial layer, the method further comprises: 在所述第一平坦化层上形成第一通孔,并在所述第一通孔内形成第一导电体,以使得在所述第二金属背衬层附着于所述第一平坦化层之后,所述第一导电体的两端分别接触所述第一金属背衬层和所述第二金属背衬层,进而电连接所述第一LED单元和所述第二LED单元朝向所述第一金属背衬层的一侧;A first through hole is formed on the first planarization layer, and a first electrical conductor is formed in the first through hole, so that the second metal backing layer is attached to the first planarization layer After that, both ends of the first conductive body respectively contact the first metal backing layer and the second metal backing layer, and then electrically connect the first LED unit and the second LED unit toward the One side of the first metal backing layer; 所述将所述第三金属背衬层远离所述第三发光外延层的一侧附着于所述第二平坦化层上的步骤之前,进一步包括:Before the step of attaching the third metal backing layer away from the third light-emitting epitaxial layer to the second planarization layer, the method further includes: 在所述第二平坦化层上形成第二通孔,并在所述第二通孔内形成第二导电体,以使得在所述第三金属背衬层附着于所述第二平坦化层之后,所述第二导电体的两端分别接触所述第二金属背衬层和所述第三金属背衬层,进而电连接所述第二LED单元和所述第三单元LED单元朝向所述第一金属背衬层的一侧。A second through hole is formed on the second planarization layer, and a second electrical conductor is formed in the second through hole, so that the third metal backing layer is attached to the second planarization layer After that, both ends of the second conductive body respectively contact the second metal backing layer and the third metal backing layer, and then electrically connect the second LED unit and the third unit LED unit facing all the way. Said one side of the first metal backing layer. 根据权利要求14所述的方法,其中,所述将所述第一金属背衬层远离所述第一发光外延层的一侧附着于转移衬底上的步骤之前,进一步包括:15. The method according to claim 14, wherein before the step of attaching the side of the first metal backing layer away from the first light-emitting epitaxial layer to the transfer substrate, the method further comprises: 在所述转移衬底上形成第一金属键合层;Forming a first metal bonding layer on the transfer substrate; 图案化所述转移衬底和第一金属键合层,以形成多个衬底凸柱以及形成于所述衬底凸柱顶部的第一金属键合图案;其中所述第一金属背衬层键合于所述第一金属键合图案上;The transfer substrate and the first metal bonding layer are patterned to form a plurality of substrate protrusions and a first metal bonding pattern formed on the top of the substrate protrusions; wherein the first metal backing layer Bonding to the first metal bonding pattern; 所述将所述第二金属背衬层远离所述第二发光外延层的一侧附着于所述第一平坦化层的步骤之前,进一步包括:Before the step of attaching the side of the second metal backing layer away from the second light-emitting epitaxial layer to the first planarization layer, the method further includes: 在所述第一平坦化层上形成第二金属键合层,其中所述第二金属背衬层键合于所述第二金属键合层上;Forming a second metal bonding layer on the first planarization layer, wherein the second metal backing layer is bonded to the second metal bonding layer; 所述将所述第三金属背衬层远离所述第三发光外延层的一侧附着于所述第二平坦化层的步骤之前,进一步包括:Before the step of attaching the third metal backing layer away from the third light-emitting epitaxial layer to the second planarization layer, the method further includes: 在所述第二平坦化层上形成第三金属键合层,其中所述第三金属背衬层键合于所述第三金属键合层上。A third metal bonding layer is formed on the second planarization layer, wherein the third metal backing layer is bonded to the third metal bonding layer. 根据权利要求14所述的方法,其中,所述第一外延片分别包括位于所述第一发光外延层和所述第一金属背衬层之间且与所述第一LED单元位置对应的第一反射镜,所述第二外延片进一步包括位于所述第二发光外延层和所述第二金属背衬层之间,且与所述第二LED单元位置对应的第二反射镜,所述第三外延片进一步包括位于所述第三发光外延层和所述第三金属背衬层之间,且与所述第三LED单元位置对应的第三反射镜。The method according to claim 14, wherein the first epitaxial wafers respectively comprise a first epitaxial wafer located between the first light emitting epitaxial layer and the first metal backing layer and corresponding to the position of the first LED unit. A reflector, the second epitaxial wafer further includes a second reflector located between the second light-emitting epitaxial layer and the second metal backing layer and corresponding to the position of the second LED unit, the The third epitaxial wafer further includes a third reflector located between the third light emitting epitaxial layer and the third metal backing layer and corresponding to the position of the third LED unit.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114725276A (en) * 2022-03-14 2022-07-08 湖南大学 Micro-LED Discrete Devices
CN114725150A (en) * 2022-03-14 2022-07-08 湖南大学 Micro-LED devices and microdisplays
CN115332285A (en) * 2022-07-22 2022-11-11 中国电子科技集团公司第五十五研究所 A kind of manufacturing method of multi-color Micro-LED display device
JPWO2023032314A1 (en) * 2021-09-03 2023-03-09

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111081730B (en) * 2019-12-13 2022-12-27 深圳第三代半导体研究院 Micro-LED chip and manufacturing method thereof
CN111596485A (en) 2020-06-08 2020-08-28 武汉华星光电技术有限公司 A color filter substrate, a display panel, and a display device
CN114843317B (en) * 2022-04-11 2024-11-15 诺视科技(苏州)有限公司 An inorganic-organic LED hybrid color display device and its preparation method
CN116154058B (en) * 2023-04-19 2023-08-15 河北光兴半导体技术有限公司 Preparation method of combined chip and combined chip
WO2025016477A1 (en) * 2023-07-19 2025-01-23 苏州秋水半导体科技有限公司 Led display device and manufacturing method for led display device
CN120112038B (en) * 2025-05-08 2025-08-05 镭昱光电科技(苏州)有限公司 Micro-LED display chip and preparation method thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101796638A (en) * 2007-09-04 2010-08-04 欧司朗光电半导体有限公司 Semiconductor component and method for producing a semiconductor component
CN103400835A (en) * 2013-07-12 2013-11-20 广东洲明节能科技有限公司 Integrated packaging method for LED (light emitting diode) module
US9806127B1 (en) * 2016-12-16 2017-10-31 Intel Corporation Micro wall light emitting diodes
CN109802019A (en) * 2019-04-17 2019-05-24 南京中电熊猫平板显示科技有限公司 A kind of transfer method of miniature LED
CN111081730A (en) * 2019-12-13 2020-04-28 深圳第三代半导体研究院 Micro-LED chip and manufacturing method thereof

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5236070B2 (en) * 2008-05-13 2013-07-17 シーメンス アクチエンゲゼルシヤフト LED array
CN207651525U (en) * 2017-12-25 2018-07-24 佛山市国星半导体技术有限公司 A kind of LED chip with speculum
CN109461380B (en) * 2018-06-26 2021-11-05 矽照光电(厦门)有限公司 Flexible active color display module

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101796638A (en) * 2007-09-04 2010-08-04 欧司朗光电半导体有限公司 Semiconductor component and method for producing a semiconductor component
CN103400835A (en) * 2013-07-12 2013-11-20 广东洲明节能科技有限公司 Integrated packaging method for LED (light emitting diode) module
US9806127B1 (en) * 2016-12-16 2017-10-31 Intel Corporation Micro wall light emitting diodes
CN109802019A (en) * 2019-04-17 2019-05-24 南京中电熊猫平板显示科技有限公司 A kind of transfer method of miniature LED
CN111081730A (en) * 2019-12-13 2020-04-28 深圳第三代半导体研究院 Micro-LED chip and manufacturing method thereof

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2023032314A1 (en) * 2021-09-03 2023-03-09
WO2023032314A1 (en) * 2021-09-03 2023-03-09 ソニーグループ株式会社 Light-emitting device and electronic equipment
JP7736073B2 (en) 2021-09-03 2025-09-09 ソニーグループ株式会社 Light-emitting devices and electronic devices
CN114725276A (en) * 2022-03-14 2022-07-08 湖南大学 Micro-LED Discrete Devices
CN114725150A (en) * 2022-03-14 2022-07-08 湖南大学 Micro-LED devices and microdisplays
CN114725276B (en) * 2022-03-14 2023-10-03 湖南大学 Micro-LED discrete devices
CN114725150B (en) * 2022-03-14 2023-10-03 湖南大学 Micro-LED device and Micro display screen
CN115332285A (en) * 2022-07-22 2022-11-11 中国电子科技集团公司第五十五研究所 A kind of manufacturing method of multi-color Micro-LED display device

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