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WO2021191629A1 - Procédé de fabrication d'un nanodispositif équipé d'une électrode à nanoespace - Google Patents

Procédé de fabrication d'un nanodispositif équipé d'une électrode à nanoespace Download PDF

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Publication number
WO2021191629A1
WO2021191629A1 PCT/GB2021/050746 GB2021050746W WO2021191629A1 WO 2021191629 A1 WO2021191629 A1 WO 2021191629A1 GB 2021050746 W GB2021050746 W GB 2021050746W WO 2021191629 A1 WO2021191629 A1 WO 2021191629A1
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nanoparticle
gap
electrode
voltage
electrically conductive
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John Joseph CULLY
Jan Mol
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Oxford University Innovation Ltd
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Oxford University Innovation Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/402—Single electron transistors; Coulomb blockade transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/014—Manufacture or treatment of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron transistors [SET] or Coulomb blockade transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/205—Nanosized electrodes, e.g. nanowire electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N99/00—Subject matter not provided for in other groups of this subclass
    • H10N99/05—Devices based on quantum mechanical effects, e.g. quantum interference devices or metal single-electron transistors
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/881—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being a two-dimensional material
    • H10D62/882—Graphene

Definitions

  • This invention relates generally to a method of fabricating a device comprising a nanoparticle junction, particularly, but not exclusively, using dielectrophoresis to trap assemble the device.
  • Nanoparticles are particles that exist on the nanometre scale, e.g. in the range 1 to 100 nm in at least one dimension. Many nanoparticles have unique and interesting electrical, optical and/or thermal properties and can now be synthesised with impressive chemical control. Examples include semiconducting, magnetic, core-shell, plasmonic and two- dimensional nanoparticles. Incorporating such nanoparticles into functional devices that can exploit their unusual properties at the nanoscale has long been of interest in various fields of science and technology due to myriad of potential applications including, but not limited to, quantum optics, plasmonics, bio-sensing, single molecular electronics, computing, energy-harvesting, data storage and synthetic biology. As the key physical processes that form the basis of the device operation occur within the nanoparticle or at the junction between a nanoparticle and an electrode, such devices are often referred to as “nanodevices”.
  • nanodevices There are currently two main approaches to fabricating such nanodevices. Either nanoparticles are grown or deposited on a substrate and the device is subsequently built- up around one or more nanoparticles; or one or more nanoparticles are deposited or placed directly onto the active area of an at least partially pre -fabricated device to either complete the device or enhance its properties.
  • the first approach requires sophisticated nanolithography techniques with accurate alignment, and in many cases is not scalable due to the random or irregular positions/distribution of nanoparticles on the substrate.
  • the second approach has more potential for scalability, but the lack of control over nanoparticle placement remains a longstanding barrier to the reproducible fabrication of such nanodevices.
  • nanoparticles are dispersed and/or suspended in a liquid medium which is introduced, e.g. by drop casting or via microfluidic channels, over the device so that nanoparticles can precipitate from a dispersion to “land” on the device.
  • a liquid medium which is introduced, e.g. by drop casting or via microfluidic channels, over the device so that nanoparticles can precipitate from a dispersion to “land” on the device.
  • this is a random process making it almost impossible to achieve accurate and reproducible placement of nanoparticles. While this is acceptable for academic studies, it is not scalable to a commercial level. There is therefore a need for innovative methods of fabricating nanodevices with improved placement of nanoparticles.
  • a nanoparticle junction may be or comprise a nanoparticle contacted by a first electrode and a second electrode.
  • the contact may be an electrical contact.
  • a nanoparticle junction may be or comprise a first and second electrode separated by a lateral distance or gap across which a nanoparticle or single nanoparticle is positioned to bridge the gap.
  • the method may comprise providing a trap in which a lateral gap has been formed in a unitary piece or layer of electrically conductive material by a process of electrical breakdown, thereby defining a first electrode and a second electrode separated by the lateral gap.
  • the method may comprise providing the unitary piece or layer of electrically conductive material.
  • the method may comprise forming the lateral gap by a process of electrical breakdown.
  • the method may comprise providing a substrate with the unitary piece or layer of conductive material provided thereon.
  • the electrically conductive material may be formed of or comprise a two dimensional material or a three-dimensional material.
  • the method may further comprise providing a volume of nanoparticle dispersion over the gap, and optionally over at least a portion of the first and second electrodes adjacent the gap.
  • the nanoparticle dispersion may comprise a plurality of nanoparticles dissolved, dispersed or suspended in a liquid suspending medium (e.g. a colloidal nanoparticle dispersion).
  • the method may further comprise trapping a nanoparticle out of or from the nanoparticle dispersion in a predefined location or operative position across the gap by dielectrophoresis (DEP) to form the nanoparticle junction.
  • the nanoparticle may bridge the gap.
  • the nanoparticle may electrically contact the first and second electrode in the operative position.
  • the nanoparticle may be immobilised in the operative position.
  • the nanoparticle may be immobilised in the operative position by adhering to the first and second electrode, and optionally also the substrate.
  • Adhesion may be based on a mutual attractive force or adhesion force between the nanoparticle and the first and second electrodes, such as van der-Waals forces, Casimir-Polder forces, and/or a coulomb interaction or chemical bonding between the electrodes (e.g. surface and/or edges) and the nanoparticle.
  • a mutual attractive force or adhesion force between the nanoparticle and the first and second electrodes such as van der-Waals forces, Casimir-Polder forces, and/or a coulomb interaction or chemical bonding between the electrodes (e.g. surface and/or edges) and the nanoparticle.
  • a nanoparticle may be an electrically polarisable particle with a size below 100 nm in at least one dimension e.g. length, width or diameter.
  • the gap may be a lateral separation between the first and second electrodes less than or equal to 20 nm, or 10 nm, e.g. in the range 0.5 to 20 nm or 0.5 nm to 10 nm.
  • the gap may be referred to as a nano-gap.
  • the gap between the first and second electrode may be in the range 1 to 20 nm, 1 to 15 nm, 1 to 10 nm, 1 to 8 nm, 1 to 6 nm, 1 to 5 nm, 1 to 4 nm, 1 to 3 nm, or 1 to 2 nm.
  • the first and second electrodes, once defined and prior to the trapping step, are electrically isolated from each other by the lateral gap.
  • Electrical breakdown refers to the irreversible breakdown or rupture of a material that occurs when a voltage is applied across it that induces a suitably high current to flow through it.
  • the electrical breakdown process may be referred to as a voltage controlled electrical breakdown process.
  • the process of electrical breakdown may also be referred to as voltage controlled electro-burning.
  • Feedback controlled electrical breakdown or electro-burning is a specific type of voltage controlled breakdown/electro-burning process, as described below.
  • an electrical breakdown process to form electrodes with sub- 10 nm gaps (which may be referred to as nano-gap electrodes) allows for the directed and reproducible integration of single nanoparticles into functional electrical, thermoelectric, photovoltaic and plasmonic devices using DEP.
  • the gap formed between the first and second electrodes provides a highly localised trap which is also ideal for electrically contacting the nanoparticle.
  • the highly localised trap allows the formation of a nanoparticle junction with high spatial resolution or positional accuracy.
  • the electrical breakdown process provides gaps with size control below 10 nm, in particular below 5 nm. The formation of such gaps has several advantages.
  • first and second electrodes from a two dimensional material can provide atomically sharp edges which greatly enhances the electric field gradient in the gap compared to conventional metal electrodes of the same size, which in turn enhances the DEP force and the effectiveness of the nanoparticle trapping.
  • Trapping a nanoparticle by DEP refers to the generation of an attractive force on the nanoparticle that pulls or drags the nanoparticle out of the dispersion and onto the predefined location or operative position.
  • the step of trapping a nanoparticle by DEP may comprise applying a voltage between the first and second electrode sufficient to generate an electric field and/or electric field gradient within at least a portion of the nanoparticle dispersion adjacent the gap to exert an attractive DEP force on the nanoparticle.
  • the voltage may be an AC voltage with an amplitude and frequency.
  • the method may comprise applying an AC voltage between the first and second electrode at a first amplitude and a first frequency so as to apply a first dielectrophoretic force on the nanoparticle sufficient to attract and trap the nanoparticle at or across the gap.
  • the voltage applied may be a DC voltage.
  • the sufficient voltage may be in the range 0.2 to 5 V, or 0.2 to 4 V, or 0.2 to 3V, or less than 5V, 4V, 3V, 2V, or IV.
  • the first frequency may in the range DC (0 Hz) to 1 GHz, or 10 kHz to 1 GHz, or 50 kHz to 1 GHz, or 10 kHz to 100 MHz, or 50 kHz to 100 MHz, or 100 kHz to 100 MHz.
  • the optimum frequency may depend on the nanoparticle being trapped.
  • a sufficient electric field gradient for attracting and/or trapping a nanoparticle may be in the range 10 22 to 10 25 V 2 /m 2 . In an embodiment, the electric field gradient is in the range 10 23 to 10 25 V 2 /m 2 .
  • the unitary layer of electrically conductive material may comprise a first portion, a second portion and a third portion between the first and second portions.
  • the third portion may have width that is less than the width of the first and second portions to form a constriction. This increases the current density in the third portion relative to the first and second portions so that a gap is formed in or at the third portion or constriction.
  • the width may be in a direction perpendicular to current flow through the third portion.
  • the method may comprise patterning or processing or shaping the unitary layer of electrically conductive material to form the first, second and third portions.
  • the step of forming a lateral gap in a unitary layer of electrically conductive material may comprise forming a lateral gap between the first and second electrode portions by inducing electrical breakdown (or by voltage or feedback controlled electro-burning) of at least a portion of the third portion to thereby form of define the first and second electrodes separated by the gap.
  • the first electrode may be or comprise the first electrode portion and the second electrode may be or comprise the second electrode portion.
  • the electrical breakdown process may comprise applying a controlled voltage between the first and second portions to drive a current through the third portion at or above a threshold current density for at least partially breaking and/or rupturing the third portion, so as to form a lateral gap between first and second portions (and thereby define a first and second electrode separated by a gap).
  • the voltage may be a DC voltage.
  • the electrical breakdown process may be a feedback controlled electrical breakdown/electro-burning process.
  • the feedback controlled electrical breakdown/electro-burning process may further comprise monitoring the current through the third portion for a feedback condition, and reducing the applied voltage between the first and second portions in response to the feedback condition being met.
  • the feedback controlled electrical breakdown/electro-burning process may further comprise ramping up the voltage between the first and second portions at a first predefined rate and monitoring the current through the third portion.
  • the process may further comprise monitoring for a feedback condition in the current, and ramping down the voltage at a second predefined rate in response to the feedback condition being met.
  • the second predefined rate may be greater than the first predefined rate.
  • the feedback condition may be a predefined drop in the current over a predefined voltage ramp range.
  • the voltage ramp up and ramp down may complete a voltage ramp cycle.
  • the process may comprise repeating the voltage ramp cycle one or more times, and optionally measuring the resistance between the first and second electrode portions after each voltage ramp cycle.
  • the electrically conducive material may have a thickness in the range of 0.2 to 10 nm, or 0.2 to 8 nm, or 0.2 to 6 nm, or 0.2 to 4 nm, or 0.2 to 3 nm, or 0.2 to 2 nm.
  • the thickness of the electrically conductive material may be less than or equal to 10 nm, 9 nm, 8 nm, 7 nm, 6 nm, 5 nm, 4 nm, 3nm, or 2 nm.
  • the electrically conductive material may be formed of or comprise a metallic material (such as a metal, e.g. gold, platinum, titanium or other suitable metals known in the art), a semi-metallic material (such as carbon allotropes, tin, tin alloys, bismuth, bismuth alloys or other suitable semimetals known in the art) or a semiconducting material (such as Si or GaAs, or other known semiconductors known in the art).
  • a metallic material such as a metal, e.g. gold, platinum, titanium or other suitable metals known in the art
  • a semi-metallic material such as carbon allotropes, tin, tin alloys, bismuth, bismuth alloys or other suitable semimetals known in the art
  • a semiconducting material such as Si or GaAs, or other known semiconductors known in the art.
  • a two dimensional material may be defined as a material having a thickness that is less than or equal to a threshold size required to exhibit quantum confinement in the thickness direction and a two dimensional electronic density of states.
  • a three dimensional material may be defined as a material having a thickness greater than the threshold size to as to exhibit a three dimensional electronic density of states.
  • the threshold size required to exhibit quantum confinement may be the Fermi wavelength of the charge carriers in the material.
  • the Fermi wavelength is the characteristic scale above which electrons and holes behave as bulk charge carriers.
  • the Fermi wavelength of a two dimensional material is inversely proportional to the Fermi wavevector which in turn is proportional to the square root of the charge carrier density in the material.
  • a two dimensional material may provide an atomically sharp edge, particularly adjacent the gap.
  • the two dimensional material may be a crystalline material.
  • the two dimensional material may consist of one or more atomic layers in the thickness direction.
  • the two dimensional material may be a single-layer material consisting of a single layer of atoms, or a few-layer material comprising a number N of atomic layers arranged on top of each other.
  • the number N may be in the range 2 to 10.
  • the two dimensional material may be a multi-layer material comprising a plurality of atomic layers arranged on top of each other.
  • the two dimensional material may be or comprise: a non-metal material, graphene, molybdenum disulphide, molybdenum diselenide, molybdenum ditelluride, tungsten disulphide, tungsten diselenide, or phosphorene.
  • the nanoparticles may be polarisable and/or consist of or comprise a polarisable material for manipulation by DEP.
  • a polarizable nanoparticle or material means that an electric dipole moment is formed within the nanoparticle or material in response to an electric field.
  • the nanoparticles may be formed of one material or comprise a plurality of different materials, at least one of which being a polarisable material.
  • the nanoparticles may be formed of or comprise a metal, a metallic material, a dielectric material, a semiconducting material.
  • the nanoparticles may be core-shell nanoparticles comprising two or more different materials, as is known in the art.
  • Example metals include, but are not limited to gold, silver, iron, platinum.
  • Example metallic materials include, but are not limited to carbon nanotubes, amorphous carbon.
  • Example dielectric materials include, but are not limited to, silicon oxide, and iron oxide.
  • Example semiconducting materials include, but are not limited to, silicon, cadmium selenide, zinc selenide, zinc sulphide, lead selenide, lead sulphide, indium phosphide.
  • the nanoparticles may be substantially regular or irregularly shaped.
  • the nanoparticles may be substantially spherical, cuboid, toroidal, elliptical, planar, pyramidal, non- spherical, or rod-like in shape.
  • the nanoparticles are gold nanoparticles with a rod-like shape.
  • Rod shaped nanoparticles may align to the electric field. This may be advantageous device applications for which the alignment or orientation is useful, such as polarizing light or magnetic nanoparticles.
  • the method may further comprise, after the trapping step: washing the device to remove the nanoparticle dispersion; and drying the device e.g. in an inert atmosphere.
  • the method may further comprise annealing or heating the device, e.g. in an inert atmosphere, at a predefined temperature and for a predefined period of time.
  • the temperature may be in the range 100 to 500 degrees C, e.g. 100 to 400 degrees C, 100 to 300 degrees C or 100 to 250 degrees C.
  • the maximum annealing temperature may depend on the material of the nanoparticle. For example, metal nanoparticles may require a lower range of annealing temperature to avoid melting, but other nanoparticles may not have this limitation.
  • the time may be between 30 mins and 5 hours, 30 mins to 3 hours, between 1 hour and 3 hours, or approximately 2 hours. In an embodiment the temperature is approximately 200 degrees C and the time is approximately 2 hours.
  • the substrate or device may comprise a third electrode for capacitively and/or electrostatically coupling to the nanoparticle trapped across the gap.
  • the third electrode may be or comprise a gate electrode.
  • the third electrode may be buried beneath an outer surface of the substrate on which the unitary layer of electrically conductive material is provided for capacitively coupling to the nanoparticle trapped across the gap.
  • the substrate may comprise an outer layer of insulating material and a third electrode beneath the layer of insulating material.
  • the insulating layer may have a thickness in the range 1 to 20 nm, 1 to 15 nm, or 1 to 10 nm.
  • the insulating layer may be formed of or comprise a metal-oxide, such FlfCE, ZrCE or AIO3.
  • the insulating layer may be deposited by a process of atomic layer deposition.
  • the substrate may comprise a layer of silicon and a layer of silicon oxide on top of the layer silicon layer.
  • the third/gate electrode may be used for controlling the electrical transport properties of the nanoparticle of the completed device.
  • the third/gate electrode may enhance the trapping of the nanoparticle by DEP by limiting the extent of the electric field to provide a smaller and more precise trapping volume.
  • the step of providing a substrate with a unitary layer of electrically conductive material provided thereon may comprise: providing a substrate comprising gate or third electrode buried beneath an outer surface of the substrate; and providing a unitary layer of electrically conductive material on the outer surface of the substrate above at least a portion of the third or gate electrode.
  • Providing the unitary layer of electrically conductive material on the outer surface of the substrate may comprise depositing or transferring a layer of unitary layer of electrically conductive material on the outer layer of the substrate.
  • Providing a substrate comprising gate or third electrode buried beneath an outer surface of the substrate may comprise depositing and/or forming a third or gate electrode on the substrate; and depositing a layer of insulating material over the third/gate electrode to form at least a portion of an outer surface of the substrate.
  • a device comprising a nanoparticle junction fabricated using the method of the first aspect.
  • a use of a device comprising a first electrode and second electrode separated by a lateral gap of less than 10 nm formed by a process of electrical breakdown, or voltage or feedback controlled electro-burning for trapping a nanoparticle from a dispersion provided over the gap in a predefined location across the gap by dielectrophoresis (DEP) to thereby form a nanoparticle junction device.
  • DEP dielectrophoresis
  • the device may comprise any corresponding feature(s) described above for the first aspect.
  • the first and second electrodes may be formed of an electrically conductive two dimensional material.
  • the electrically conductive two dimensional material may be single or multi-layer graphene.
  • Figure 1 shows a method of fabricating a device with a nanoparticle junction according to the invention
  • Figure 2a shows a device for an electro-burning process
  • Figure 2a shows a lateral gap formed in the device of figure 2a after an electro-burning process
  • Figure 3 shows the trapping of a rod-shaped nanoparticle across the gap by dielectrophoresis
  • Figure 4 shows the trapping of a spherical nanoparticle across the gap by dielectrophoresis
  • Figure 5 shows a scanning electron microscopy image of a device with a metal nanoparticle junction
  • Figure 6 shows a schematic cross-section of a device with a nanoparticle junction and a back-gate electrode
  • Figure 7 shows source-drain current-voltage characteristics of a device with a metal nanoparticle junction at different temperatures
  • Figure 8 shows the source-drain current-voltage characteristics of a device and the conductance of the device versus source-drain voltage at 4 degrees K;
  • Figure 9 shows the source-drain current versus gate voltage at 4 degrees K
  • Figure 10 shows an image plot of the conductance of a device as a function of the source -drain voltage and the gate voltage
  • Figure 11 shows an equivalent circuit of the device in figure 6.
  • DEP dielectrophoresis
  • the technique of dielectrophoresis is a means of moving and manipulating polarizable objects, such as micro- and nanoparticles, suspended within a suspending medium based on forces exerted on the particle by electrical field gradients in the vicinity of electrodes when a voltage is applied between the electrodes.
  • the force is referred to as the DEP force.
  • the magnitude and direction of the DEP force is related to the dielectric properties of the particle and the suspending medium, as characterized by their complex permittivity.
  • the DEP force also scales with the size of the particle, the applied voltage and the electrode separation.
  • the DEP force is frequency-dependent through the frequency dependence of the complex permittivities of the medium and particle, so that both the amplitude and frequency of an AC voltage applied between electrodes can be used to vary the DEP force and control the manipulation/movement of the particle in the suspending medium.
  • spherical which differ primarily in the form of the pre-factor, as is known in the art.
  • the ratio of complex permittivities known as the Clausius-Mossotti factor /CM, captures the frequency dependence of FDEP, and its sign determines whether a particle will be attracted to (i.e. positive DEP) or repelled by (i.e. negative DEP) regions of high electric field gradient.
  • metallic particles /CM can be assumed to be equal to 1, experiencing positive DEP across all experimental frequencies of V.
  • Large particles e.g. greater than 1 pm in at least one dimension (length, width or diameter), can be readily manipulated with large electrodes separated by gaps on the micron scale at moderate voltages.
  • the DEP force faces scaling competition from the thermal force associated with Brownian motion in the suspending medium, such that greater DEP forces are required for DEP control of nanoparticles.
  • Devices with 150 nm thick metal (gold) nano-gap electrodes with a sub- 10 nm lateral gap of 9 nm have been produced using a process of atomic layer lithography (ALL) for low-voltage DEP trapping of nanoparticles (see A. Barik et al. in “Ultralow-Power Electronic Trapping of Nanoparticles with Sub-10 nm Gold Nanogap Electrodes”, Nano Letters 16 6317-6324 (2016)).
  • ALL technique is typically only suitable for making long epitaxial gaps. It is extremely challenging to create point-like gaps and therefore trap nanoparticles in a precise location.
  • the ALL fabrication process is complicated, involving several steps including multiple deposition steps, etching, atomic layer deposition (ALD), and a peeling step using adhesive tape to break away excess material to form the nano-gap electrodes.
  • Two-dimensional (2D) materials such as graphene
  • graphene are an attractive electrode material for DEP due to being atomically thin with atomically sharp edges that produce significantly stronger electric field gradients for a given applied voltage than electrodes formed from conventional materials such as metals which are necessarily much thicker (e.g. greater than 100 nm thick).
  • graphene is a particularly good electrode material owing to its high electrical conductivity which is gate-tunable, as well as its stability up to high temperatures.
  • Single layer graphene has a thickness of approximately 0.4 nm, providing the sharpest possible edges that cannot be created using lithographically patterned metal electrodes.
  • single and multi-layer graphene can now be commercially grown on a wafer scale making it a suitable for large scale on-chip integration.
  • Figure 1 shows a method 100 of fabricating a nanodevice comprising a nanoparticle junction according to an embodiment of the invention.
  • the method 100 is based on DEP trapping of a single nanoparticle across nano-gap electrodes formed by a process of feedback controlled electro-burning.
  • the electrodes are formed of a conductive 2D material, such as graphene, molybdenum disulphide or tungsten disulphide.
  • Feedback controlled electro-burning is a process used to form or create a nano-gap between two previously connected and/or integral electrode portions with size control below 10 nm by controlled application of current through the device to break or rupture the electrode material at a predefined location by Joule heating.
  • Such nano-gaps lie at or close to the physical limit of electrode miniaturization and can be used to generate ultra-strong and highly localized electric field gradients suitable for the accurate/precise DEP trapping of single-nanoparticles from a bulk dispersion.
  • finite element modelling shows that electric field gradients in excess of 10 20 V 2 m 3 , required for trapping of nanoparticles with a radius of ⁇ 50 nm at a distance of up to 165 nm away, are generated by such nano-gaps with a moderate potential of 1.5V applied between the electrodes.
  • a substrate 400 is provided with a unitary piece or layer of electrically conductive 2D material 500 thereon.
  • the 2D material 500 is graphene, but the method can be applied to other conductive 2D materials suitable for use as an electrode such as molybdenum disulphide (M0S2), tungsten disulphide (WS2) etc., as well as thin 3D materials such as Au, Pt, Si etc.
  • a suitable electrode material is conductive, e.g. with an electrical conductivity of greater than 10 S/cm. DEP trapping parameters such as voltage may vary with conductivity of the electrode.
  • Figure 2a shows an example layer of graphene 500 provided on a substrate 400 for the electro-burning process.
  • the substrate 500 may be a doped Si substrate with a layer (e.g. 50 - 300 nm thick) of S1O2 on top to isolate the graphene from the Si.
  • the graphene layer 500 may be grown, deposited and/or transferred onto the substrate 400 using techniques known in the art.
  • the graphene layer 500 may be patterned, processed or shaped (e.g. using standard lithographic techniques such as photo or e-beam lithography and subtractive etching such as oxygen plasma etching) to form a device 10’ with a geometry suitable for the electro-burning process.
  • the device 10” comprises a first electrode portion 50G, a second electrode portion 502’, and a third electrode portion 503’ located between the first and second electrode portions 50 G, 502’.
  • the third electrode portion 503’ has width W3 that is less than the width W1 of the first electrode portion 50 G and the width W2 of the second electrode portion 502’ so as to form a constriction.
  • the device 10 forms a substantially bow-tie shaped constriction, but it will be appreciated that other types or shapes of constrictions can be used.
  • the constriction increases the current density in the third electrode portion 503’ relative to the first and second electrode portions 50G, 502’ when a bias voltage is applied between the first and second portions 50 G, 502’ so that Joule heating or the electro-burning process occurs predominantly in or at the third electrode portion 503’. In this way, a nano-gap can be reliably formed in or at the third electrode portion 503’, as described below.
  • a nano-gap G is formed by a process of feedback controlled electro-burning.
  • the nano-gap G physically separates the first and second electrode portions 50 G, 502’ forming a device 10’ with a first electrode 501 and a second electrode 501 separated by a nano-gap G, as shown in figure 2b.
  • the feedback controlled electro-burning process comprises ramping up a voltage applied between the first and second electrode portions 50 G, 502’ at a first predefined ramp rate and monitoring the current through the third electrode portion 503 or device 10” for a feedback condition.
  • the feedback condition is a predefined drop in the current over a predefined voltage range, which indicates the onset of breakdown of graphene in the third electrode portion 503’.
  • the voltage is then ramped down to zero at a second predefined rate that is greater that the first predefined ramp rate in response to the feedback condition being met. This completes a ramp cycle, which can be repeated one or more times until the desired nano-gap is formed.
  • the resistance of the device 10 increases with each ramp cycle as the constriction narrows. As such, the resistance between the first and second electrode portions 50 , 502’ is measured after each ramp cycle to give an indication of the formation of the nano-gap G.
  • the ramp cycle is repeated until the resistance of the device 10” exceeds a predefined threshold value.
  • the threshold resistance is in the range 500 MW to 1 GQ. At gaps G less than 5 nm, a tunnelling current exists providing a meaningful measurement of resistance.
  • the size of the nano-gap G can be estimated or determined from the electrical transport characteristics of the device 10’.
  • the gap size/length can be estimated by measuring the current- voltage characteristic (an I-V curve) of the device 10’ and fitting it to a suitable tunnelling model which includes gap size as a fit parameter.
  • a suitable tunnelling model for different types of tunnel junctions are known.
  • One such suitable model is the Simmons Model (J. G. Simmons, Journal of Applied Physics 34 1793-1803 (1963)).
  • Nano-gaps G greater than 5 nm in size may not yield a measurable tunnel current, in which case high resolution imaging techniques such as atomic form microscopy (AFM) can be used to estimate the gap size.
  • AFM atomic form microscopy
  • the graphene 500 is patterned using electron-beam lithography and oxygen plasma etching to form a bow tie constriction with a width W3 of 100-200 nm.
  • the applied voltage is ramped up at a rate of 0.75 V/s while the current is recorded at a 200 ps sampling rate, and the voltage is ramped down to zero at a rate of 225 V/s when a drop in the current DI over the past 15 mV is detected.
  • the feedback condition can be adjusted for each ramp cycle depending on the voltage at which the previous current drop occurred. For example, the feedback condition DI for the first voltage ramp can be lower than the second voltage ramp, as so on.
  • the electro-burning process is performed by a voltage controller 600 configured to output a voltage and measure and record an input voltage signal.
  • the voltage controller may be a data acquisition (DAQ) card/module, as is known in the art. Any DAQ is suitable as long as it has a sufficiently fast sample rate to catch the current drops current, e.g. greater than 10 kHz.
  • DAQ data acquisition
  • An input voltage signal proportional to the current in the device 10 is preferably provided by a current amplifier, due to the low current values involved (e.g. less than 1 mA, and down to mA and nA). Any current amplifier is suitable provided it has a sufficiently low rise time to filter out any high frequency noise.
  • a FEMTO DPLCA-200 current preamplifier is a data acquisition (DAQ) card/module, as is known in the art. Any DAQ is suitable as long as it has a sufficiently fast sample rate to catch the current drops current, e.g. greater than 10 kHz.
  • a volume of nanoparticle dispersion comprising nanoparticles in a suspending medium is provided over or on top of the electrodes 501, 502 to cover the nano-gap G.
  • 60 nm gold rod-shaped nanoparticles referred to hereafter as nano-rods
  • 2mM citrate solution is drop cast onto the electrodes 501, 502. It will be appreciated that other nanoparticle sizes and suspending mediums may be used instead depending on the application.
  • a nanoparticle NP from the nanoparticle dispersion is trapped across the nano-gap G by DEP to form a functional nanodevice 10.
  • DEP electrospray
  • FIG 3 shows a nano-rod NP is pulled out of the nanoparticle dispersion by an attractive DEP force to the nano-gap G where it is trapped, captured and/or immobilised.
  • the trapped/captured nanoparticle NP bridges the nano-gap G, contacting both the first and second electrodes 501, 502.
  • Figure 4 shows an equivalent nanodevice 10 comprising a substantially spherical nanoparticle NP across the nano-gap G.
  • an AC voltage is applied between the first and second electrodes 501, 502 to generate an electric field and electric field gradient within the nanoparticle dispersion around the nano-gap G and exert an attractive DEP force on a nanoparticle NP.
  • the optimum amplitude, frequency and duration of the applied AC voltage will depend on the specific nanoparticle dispersion and electrode geometry. Trapping of metallic nanoparticles is not expected to be frequency dependent, but dielectric nanoparticles can exhibit a frequency dependent DEP force so a frequency at which positive DEP (attractive) must be used (e.g. 10kHz to 10 MHz for most dielectric particles).
  • an applied voltage of 1.5 V (peak-to-peak) at 0.1-5 MHz for 30s provides a high probability of trapping a single nanoparticle NP at the nano-gap G without attracting a large aggregation of multiple nanoparticles.
  • the device 10 is washed (e.g. in deionised water) and dried in an inert atmosphere such as nitrogen.
  • Figure 5 shows a scanning electron microscopy (SEM) image of a graphene nanodevice 10 with a nano-gap G in the range 5 - 10 nm and comprising a single 60 nm gold nano rod nanoparticle junction fabricated by the method 100 described above.
  • the electric field gradient in the nano-gap G of the device 10’ can be estimated using finite element modelling, e.g. using commercially available COMSOL MultiphysicsTM software.
  • 2 of 2 x 10 24 V 2 /m 3 is estimated at the centre of a 2 nm wide nano-gap for an applied voltage of 1.5 V (peak-to-peak) at 1 MHz.
  • the dimensions of the device 10’ in the model were the same as those of the physical device shown in figure 5.
  • Graphene was approximated as a thin (1 nm thick) conductive layer with experimental values for conductivity and permittivity.
  • the citrate solution was found to have a conductivity of 600 pS/cm and was assumed to have a permittivity of
  • Equating equations 1 and 2 the electric field gradient required to overcome the thermal forces is: k B T
  • the finite element model also predicts that the electric field gradient condition of equation 3 is met within a volume of about 9.4 x 10 3 mih 3 around the nano-gap G, corresponding to a capture radius of approximately 200 nm.
  • a typical nanoparticle concentration in a nanoparticle dispersion is on the order of 0. 1 mhG 3 , with each nanoparticle NP exploring a volume of 1 mm 3 over the course of the experiment, e.g. 30-60 seconds.
  • trapping of nanoparticles using the device 10’ is typically diffusion limited, but this is an advantage for the capture and integration of single nanoparticles from a bulk dispersion, rather than clumps of nanoparticles.
  • the electrical contact between the nanoparticle NP and the first and second electrodes 501, 502 can be improved by a thermal annealing step (which would follow the drying step). This results in a significant increase in conductance (reduction in resistance) of the device 10.
  • Completed devices 10 with metal nanoparticles NP typically have a resistance of a few hundred MW, but can range between 10MW to 1 ⁇ W. Annealing is also known to remove contaminants from the surface of 2D materials such as graphene, which in turn can improve the electrical properties of the electrodes.
  • the annealing step comprises heating the device 10 at approximately 100-200 degrees C for a period of 1-3 hours in an inert atmosphere, such as nitrogen or argon.
  • an inert atmosphere such as nitrogen or argon.
  • the 60nm gold nano-rods retain their aspect ratio and form good electrical contact with graphene at or around 200 degrees C, whereas they relax into spheres at temperatures approaching 300 degrees C.
  • Nanoparticles formed of other materials may withstand higher temperatures, which are generally preferable to achieve better annealing.
  • the trapped nanoparticle NP forms a nanoparticle junction where charge transport from one electrode to the other is via the nanoparticle NP.
  • the transport characteristics of the device 10 measured at 295 degrees K (room temperature) after capture (and optionally annealing) is typically devoid of tunnelling behaviour, indicating transport is indeed occurring via the nanoparticle NP.
  • the nanodevice 10 is a single-electron transistor, as will be described in more detail below.
  • nanoparticles NP such as the 60 nm gold nano-rods transition from having a continuous three-dimensional electronic density of states to having a quantized set of energy levels according to a one-dimensional electronic density of states. Nanoparticles that show this behaviour are commonly referred to as quantum dot nanoparticles (QD-NP), and the spacing of their energy levels is dependent on their shape and the material(s) from which they are made.
  • QD-NP quantum dot nanoparticles
  • the first and second electrodes 501, 502 may be referred to as a source and a drain, respectively.
  • Applying a voltage between the source 501 and drain 502 raises or lowers the Fermi level in the source 501 relative to the QD-NP and the drain 502. If no energy levels of the QD-NP align with the Fermi level in the source 501 over the range of voltages applied then the QD-NP is said to be in a Coulomb blockade state, and charge transport through the QD- NP is heavily suppressed.
  • the presence of an third electrode electrostatically coupled to the QD-NP (a gate electrode) can be used to shift the energy levels in the QD-NP relative to the source 501 so as to permit or prevent/block charge carrier transport through the device 10 for a given source-drain bias, thus operating as a single electron transistor.
  • Figure 6 shows an embodiment of a nanodevice 10 including a gate electrode 402 positioned adjacent the nanoparticle NP for electrostatically coupling to it.
  • the gate electrode 403 is provided (buried) within the substrate 400 and positioned beneath the nano-gap G and nanoparticle NP. Fabrication of the substrate 400 with a gate electrode 402 occurs prior to the step of transferring or depositing the conductive 2D material onto the substrate 400.
  • the gate electrode is a metal electrode 402, such as gold, deposited on top of the S1O2 layer 401 of the Si/SiCL substrate 400 using standing lithography and lift-off techniques known in the art.
  • a thin gate insulating layer 403 is deposited over the top of the gate electrode 402 to electrically isolate the gate electrode 402 from the conductive 2D material.
  • the gate insulating layer 403 is a 10 nm thick layer of HfCL deposited by ALD.
  • the gate insulating layer 403 may be formed of any dielectric material with a high dielectric constant k (e.g. greater than 5) suitable as a gate insulator, and may be deposited by any means known in the art suitable for that material and having any thickness suitable for minimizing leakage current.
  • k e.g. greater than 5
  • ALD grown metal oxides ZrCh and AIO3 are suitable alternatives.
  • Figure 7 shows the source-drain current Isd plotted as a function of the source-drain voltage Vsd for a nanodevice 10 comprising a 60 nm gold nano-rod similar to that shown in figures 5 and 6 measured at 298 degrees K, 20 degrees K, and 4 degrees K.
  • the Isd-Vsd curve is substantially linear indicating Ohmic behaviour with a device 10 resistance of approximately 50 MW.
  • the Isd-Vsd curve begins to exhibit non-linear features, which develop into step-like features in the Isd- Vsd curve at 4 degrees K indicative of quantised conductance steps associated with the Coulomb blockage effect.
  • no excited states are observed, but would be expected to be resolved upon further cooling to mK temperatures.
  • Figure 8 left-hand axis, shows the Isd-Vsd characteristics of the same device 10 measured at 4 degrees K over a larger Vsd range.
  • the first derivative of the Isd-Vsd curve, the conductance is also shown on the right-hand axis plotted again Vsd demonstrating conductance spikes associated with the quantised conductance steps in figure 7 that occur each time an additional energy level of the QD-NP is brought into the bias window, allowing for electrons to transfer to and from the QD-NP.
  • Figure 9 shows the source-drain current Isd as a function of the gate voltage Vg applied between the gate electrode 402 and the drain 502 measured at 4 degrees K with a fixed source-drain voltage of 5mV.
  • Figure 10 shows a 2D image plot of the conductance (z-scale) as a function of the source-drain voltage Vsd (y-axis) and the gate voltage Vg (x-axis) measured at 4 degrees K.
  • the so called conductance stability plot exhibits characteristic diamond shaped regions CB of zero (or close to zero) conductance where the Coulomb blockade is effective (emphasized by the dashed lines that guide the eye).
  • the regular width the Coulomb diamonds implies that the charging energy Ec of the gold nano-rods is dominant over the level spacing DE in determining the conductance.
  • FIG 11 shows an equivalent circuit for the device of figure 6 comprising a source resistance Rs, source capacitance Cs, drain resistance RD, drain capacitance CD, and a gate capacitance CG ⁇
  • the large value of CG is a result of the close proximity of the gate electrode 402 to the QD-NP (10 nm separation) and the choice of high- K dielectric material for the insulating layer 403. This provides gate access to a substantially larger number of charge states than previously reported for gold metal nanoparticles.
  • the use of graphene as a source and drain electrode 501, 502 reduces screening of the gate electric field compared to electrodes formed of conventional metal materials.
  • the above described method 100 provides a platform process enabling top-down fabrication of functional nanodevices comprising a single nanoparticle junction, whose functionality and/or characteristics are influenced or determined by the properties of the nanoparticle.
  • devices comprising electroluminescent nanoparticles could function as single photon light sources
  • devices with spin-crossover nanoparticles could function as memory devices
  • devices with functionalised nanoparticles could act as electrical sensors for certain chemical species.
  • the nanodevice can operate as a single electron transistor.
  • the functionality and application of the nanodevices that can be fabricated using the disclosed method is determined largely by the physical, electrical, optical and/or thermal properties of the nanoparticle.
  • the size, shape, and material composition of the nanoparticle will influence the electrical, optical and thermal properties of the resulting nanodevice.
  • these nanodevices have a wide range of applications including, but not limited to, single electron transistors, nanoscale light sources, sensors and spintronic memory devices. From reading the present disclosure, other variations and modifications will be apparent to the skilled person within the scope of the appended claims. Such variations and modifications may involve equivalent and other features which are already known in the art, and which may be used instead of, or in addition to, features already described herein.

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Abstract

La divulgation concerne un procédé de fabrication d'un dispositif. Le procédé consiste à fournir un piège dans lequel un espace latéral (G) a été formé dans une couche unitaire de matériau électroconducteur par un processus de claquage électrique, délimitant ainsi une première et une seconde électrode (501, 502) séparées par l'espace latéral (G). Un volume de dispersion de nanoparticules est situé au-dessus de l'espace, la dispersion de nanoparticules comprenant une pluralité de nanoparticules dispersées ou en suspension dans un milieu de suspension liquide. Une nanoparticule (NP) est piégée depuis la dispersion dans un emplacement prédéfini à travers l'espace (G) par diélectrophorèse de manière à former la jonction de nanoparticules. Le matériau d'électrode peut être du graphène, le NP peut être une particule d'or et le dispositif résultant peut être un transistor à un électron (10), comprenant en outre un substrat (401) et une grille (402).
PCT/GB2021/050746 2020-03-27 2021-03-26 Procédé de fabrication d'un nanodispositif équipé d'une électrode à nanoespace Ceased WO2021191629A1 (fr)

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