WO2021056399A1

WO2021056399A1 - Feedback design for unequal error protection systems

Info

Publication number: WO2021056399A1
Application number: PCT/CN2019/108473
Authority: WO
Inventors: Changlong Xu; Jian Li; Liangming WU; Hao Xu
Original assignee: Qualcomm Inc
Current assignee: Qualcomm Inc
Priority date: 2019-09-27
Filing date: 2019-09-27
Publication date: 2021-04-01
Anticipated expiration: 2022-03-27

Abstract

Methods, systems, and devices for wireless communications are described. A wireless device may identify a set of information bits of a code block. The wireless device may generate one or more cyclic redundancy check (CRC) bits for the code block using at least a portion of the set of information bits. The wireless device may encode a first set of bits, the first set of bits and a second set of bits together including the set of information bits and the one or more CRC bits. The wireless device may map the encoded first set of bits to a first set of symbols and the second set of bits to a second set of symbols based on the reliabilities of the first set and the second set of symbols, for example, in accordance with a modulation scheme. The wireless device may transmit a signal including the symbols.

Description

FEEDBACK DESIGN FOR UNEQUAL ERROR PROTECTION SYSTEMS

FIELD OF TECHNOLOGY

The following relates generally to wireless communications and more specifically to feedback design for unequal error protection systems.

BACKGROUND

Wireless communications systems are widely deployed to provide various types of communication content such as voice, video, packet data, messaging, broadcast, and so on. These systems may be capable of supporting communication with multiple users by sharing the available system resources (e.g., time, frequency, and power) . Examples of such multiple-access systems include fourth generation (4G) systems such as Long Term Evolution (LTE) systems, LTE-Advanced (LTE-A) systems, or LTE-A Pro systems, and fifth generation (5G) systems which may be referred to as New Radio (NR) systems. These systems may employ technologies such as code division multiple access (CDMA) , time division multiple access (TDMA) , frequency division multiple access (FDMA) , orthogonal frequency division multiple access (OFDMA) , or discrete Fourier transform spread orthogonal frequency division multiplexing (DFT-S-OFDM) . A wireless multiple-access communications system may include a number of base stations or network access nodes, each simultaneously supporting communication for multiple communication devices, which may be otherwise known as user equipment (UE) .

A wireless device may send a transmission in a wireless communications system. The wireless device may encode information bits of the transmission before modulating the bits into a symbol. However, such a wireless communications system may not support efficient feedback techniques.

SUMMARY

The described techniques relate to improved methods, systems, devices, and apparatuses that support feedback design for unequal error protection (UEP) . Generally, the described techniques provide for a wireless device (e.g., a UE or a base station) to implement one or more feedback designs that support UEP and efficient feedback techniques (e.g., hybrid automatic repeat request (HARQ) feedback mechanisms) . For example, a transmitting device may identify a set of information bits associated with a code block, and demultiplex the set of information bits into portions, such as a first set of bits and a second set of bits. The transmitting device may encode a first set of bits such that a receiving device may successfully recover any encoded information bits lost to interference such as noise. Additionally or alternatively, the transmitting device may refrain from encoding a second set of bits to save power due to reduced processing complexity. The feedback designs may enable the transmitting device to implement error detecting code (e.g., cyclic redundancy check (CRC) bits) for the set of information bits, the first set of information bits, the second set of information bits, or a combination thereof. The feedback design may also enable a receiving device to utilize the error detecting code to transmit feedback (e.g., HARQ feedback such as an acknowledgment (ACK) message or a negative ACK (NACK) message) for the first set of information bits, the second set of information bits, or the set of information bits. In some examples the feedback may be 1 bit, or 2 bits, for a code block. Such a feedback design may ensure more reliable communications while realizing reduced power savings.

A method of wireless communication at a transmitting wireless device is described. The method may include identifying a set of information bits of a code block, generating one or more CRC bits for the code block using at least a portion of the set of information bits, encoding a first set of bits, the first set of bits and a second set of bits together including the set of information bits and the one or more CRC bits, mapping the encoded first set of bits to a first set of symbols of a set of symbols and the second set of bits to a second set of symbols of the set of symbols based on the first set of symbols being associated with a lower reliability than the second set of symbols, and transmitting a signal including the set of symbols.

An apparatus for wireless communication at a transmitting wireless device is described. The apparatus may include a processor, memory coupled with the processor, and instructions stored in the memory. The instructions may be executable by the processor to cause the apparatus to identify a set of information bits of a code block, generate one or more CRC bits for the code block using at least a portion of the set of information bits, encode a first set of bits, the first set of bits and a second set of bits together including the set of information bits and the one or more CRC bits, map the encoded first set of bits to a first set of symbols of a set of symbols and the second set of bits to a second set of symbols of the set of symbols based on the first set of symbols being associated with a lower reliability than the second set of symbols, and transmit a signal including the set of symbols.

Another apparatus for wireless communication at a transmitting wireless device is described. The apparatus may include means for identifying a set of information bits of a code block, generating one or more CRC bits for the code block using at least a portion of the set of information bits, encoding a first set of bits, the first set of bits and a second set of bits together including the set of information bits and the one or more CRC bits, mapping the encoded first set of bits to a first set of symbols of a set of symbols and the second set of bits to a second set of symbols of the set of symbols based on the first set of symbols being associated with a lower reliability than the second set of symbols, and transmitting a signal including the set of symbols.

A non-transitory computer-readable medium storing code for wireless communication at a transmitting wireless device is described. The code may include instructions executable by a processor to identify a set of information bits of a code block, generate one or more CRC bits for the code block using at least a portion of the set of information bits, encode a first set of bits, the first set of bits and a second set of bits together including the set of information bits and the one or more CRC bits, map the encoded first set of bits to a first set of symbols of a set of symbols and the second set of bits to a second set of symbols of the set of symbols based on the first set of symbols being associated with a lower reliability than the second set of symbols, and transmit a signal including the set of symbols.

Some examples of the method, apparatuses, and non-transitory computer-readable medium described herein may further include operations, features, means, or instructions for refraining from encoding the second set of bits that may be mapped to the second set of symbols.

Some examples of the method, apparatuses, and non-transitory computer-readable medium described herein may further include operations, features, means, or instructions for receiving, in response to the transmitted signal, an acknowledgement feedback message for the code block including one bit indicating that a first CRC may have passed for the encoded first set of bits and a second CRC may have passed for the second set of bits, or indicating that the first CRC may have failed for the encoded first set of bits and the second CRC may have failed for the second set of bits.

Some examples of the method, apparatuses, and non-transitory computer-readable medium described herein may further include operations, features, means, or instructions for receiving, in response to the transmitted signal, an acknowledgement feedback message for the code block including two bits indicating that a first CRC may have passed or failed for the encoded first set of bits, and indicating that a second CRC may have passed or failed for the second set of bits.

In some examples of the method, apparatuses, and non-transitory computer-readable medium described herein, generating the one or more CRC bits using at least a portion of the set of information bits may include operations, features, means, or instructions for generating the one or more CRC bits using the set of information bits.

Some examples of the method, apparatuses, and non-transitory computer-readable medium described herein may further include operations, features, means, or instructions for appending the one or more CRC bits to the set of information bits, selecting the first set of bits from the set of information bits and the one or more CRC bits, and selecting the second set of bits from a remaining portion of bits of the set of information bits and the one or more CRC bits.

In some examples of the method, apparatuses, and non-transitory computer-readable medium described herein, generating the one or more CRC bits using at least a portion of the set of information bits may include operations, features, means, or instructions for generating the one or more CRC bits using a first portion of the set of information bits, the first set of bits including the first portion of the set of information bits and the generated one or more CRC bits.

In some examples of the method, apparatuses, and non-transitory computer-readable medium described herein, generating the one or more CRC bits using at least a portion of the set of information bits may include operations, features, means, or instructions for generating the one or more CRC bits using a second portion of the set of information bits, the second set of bits including the second portion of the set of information bits and the generated one or more CRC bits.

In some examples of the method, apparatuses, and non-transitory computer-readable medium described herein, generating the one or more CRC bits using at least a portion of the set of information bits may include operations, features, means, or instructions for generating a first set of CRC bits using a first portion of the set of information bits, the first set of bits including the first portion of the set of information bits and the first set of CRC bits, and generating a second set of CRC bits using a second portion of the set of information bits, the second set of bits including the second portion of the set of information bits and the second set of CRC bits.

In some examples of the method, apparatuses, and non-transitory computer-readable medium described herein, encoding the first set of bits may include operations, features, means, or instructions for performing a forward error correction coding procedure, a polar coding procedure, a low density parity check coding procedure, a reference signal coding procedure, or a combination thereof.

In some examples of the method, apparatuses, and non-transitory computer-readable medium described herein, the mapping of the encoded first set of bits and the second set of bits may be according to an UEP modulation scheme.

In some examples of the method, apparatuses, and non-transitory computer-readable medium described herein, the UEP modulation scheme may be based on a quadrature amplitude modulation scheme, a quadrature phase shift keying scheme, a multi-layered quadrature amplitude modulation scheme, or a combination thereof.

Some examples of the method, apparatuses, and non-transitory computer-readable medium described herein may further include operations, features, means, or instructions for receiving control signaling from a second wireless device that indicates that the transmitting wireless device may be to use the UEP scheme for transmissions.

In some examples of the method, apparatuses, and non-transitory computer-readable medium described herein, the received control signaling includes downlink control information (DCI) , or a MAC control element, or a combination thereof.

Some examples of the method, apparatuses, and non-transitory computer-readable medium described herein may further include operations, features, means, or instructions for demultiplexing the set of information bits into a first portion of the set of information bits and a second portion of the set of information bits, where encoding the first set of bits includes encoding the first portion of the set of information bits and refraining from encoding the second portion of the set of information bits.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates an example of a system for wireless communications that supports feedback design for unequal error protection systems in accordance with aspects of the present disclosure.

FIG. 2 illustrates an example of a wireless communications system that supports feedback design for unequal error protection in accordance with aspects of the present disclosure.

FIG. 3 illustrates an example of a quadrature amplitude modulation (QAM) map that supports feedback design for unequal error protection in accordance with aspects of the present disclosure.

FIGs. 4 and 5 illustrate examples of processing chains that support feedback design for unequal error protection in accordance with aspects of the present disclosure.

FIGs. 6 and 7 show block diagrams of devices that support feedback design for unequal error protection systems in accordance with aspects of the present disclosure.

FIG. 8 shows a block diagram of a communications manager that supports feedback design for unequal error protection systems in accordance with aspects of the present disclosure.

FIG. 9 shows a diagram of a system including a device that supports feedback design for unequal error protection systems in accordance with aspects of the present disclosure.

FIGs. 10 through 12 show flowcharts illustrating methods that support feedback design for unequal error protection systems in accordance with aspects of the present disclosure.

DETAILED DESCRIPTION

Some wireless communications system may employ unequal error protection (UEP) techniques for encoding and decoding transmissions. For example, a wireless device (e.g., a base station or a user equipment (UE) ) may have information bits to transmit to another wireless device. The wireless device may encode a portion of the information bits (e.g., via channel coding) and refrain from encoding another portion of the information bits. However, such wireless communications systems may not support feedback mechanisms such as hybrid automatic repeat request (HARQ) feedback, which may ensure reception of data transmitted within the system.

According to some aspects, the techniques described herein may enable wireless communications systems to implement one or more feedback designs that support both UEP and efficient feedback mechanisms. For example, a transmitting device (e.g., a base station and/or a UE) may have a transmission for a receiving device. The transmission may include a number of information bits (e.g., information bits corresponding to a code block, which may be one of at least one code block associated with a transport block) . The feedback design may enable the transmitting device to implement both UEP techniques and feedback techniques in order to ensure reliable reception of the transmission and enhanced power savings. The transmitting device may demultiplex (e.g., divide) the information bits into a first set of information bits and a second set of information bits. The transmitting device may encode the first set of information bits (e.g., with an error correcting code such as a forward error correcting (FEC) ) and not encode the second set of information bits (e.g., such that the second set of information bits are uncoded bits) . The transmitting device may, in some examples, map the first set of information bits onto relatively low reliability bits of a quadrature amplitude modulation (QAM) map of any size and map the second set of information bits onto relatively high reliability bits of the QAM map.

The transmitting device may also employ error detection code such as cyclic redundancy check (CRC) code, which may enable a receiving device to detect transmission errors (e.g., lost information bits due to interference such as noisy channel conditions) . In some examples, the transmitting device may include bits of the error detection code with the information bits. For example, the transmitting device may append CRC bits to the information bits prior to demultiplexing the information bits. In some examples, the transmitting device may include bits of error detection code with the first set of information bits, the second set of information bits, or both (e.g., after demultiplexing the information bits) . For example, the transmitting device may generate a first set of CRC bits and append the first set of CRC bits to the first set of information bits, but not append CRC bits to the second set of information bits. In other examples, the transmitting device may generate a second set of CRC bits and append the second set of CRC bits to the second set of information bits, but not append CRC bits to the first set of information bits. In yet other examples, the transmitting device may append a first set of CRC bits to the first set of information bits, and append a second set of CRC bits to the second set of information bits.

Such feedback designs may enable a receiving device to perform error detection procedures (e.g., using the error detection code added to the information bits, the error detection code added to the set of coded bits, the error detection code added to the set of uncoded bits, or a combination thereof) , which may enable more reliable communications. For example, the receiving device may perform one or more error detection checks to determine whether the transmission was correctly received and decoded. The receiving device may transmit an ACK or a NACK based on the determination, which may result in retransmission of the information bits, the first set of information bits, the second set of information bits, or a combination thereof.

Aspects of the disclosure are initially described in the context of a wireless communications systems. Aspects of the disclosure are further illustrated by and described with reference to QAM maps, processing chains, apparatus diagrams, system diagrams, and flowcharts that relate to feedback design for unequal error protection.

FIG. 1 illustrates an example of a wireless communications system 100 that supports feedback design for unequal error protection systems in accordance with aspects of the present disclosure. The wireless communications system 100 may include one or more base stations 105, one or more UEs 115, and a core network 130. In some examples, the wireless communications system 100 may be a Long Term Evolution (LTE) network, an LTE-Advanced (LTE-A) network, an LTE-A Pro network, or a New Radio (NR) network. In some examples, the wireless communications system 100 may support enhanced broadband communications, ultra-reliable (e.g., mission critical) communications, low latency communications, communications with low-cost and low-complexity devices, or any combination thereof.

The base stations 105 may be dispersed throughout a geographic area to form the wireless communications system 100 and may be devices in different forms or having different capabilities. The base stations 105 and the UEs 115 may wirelessly communicate via one or more communication links 125. Each base station 105 may provide a coverage area 110 over which the UEs 115 and the base station 105 may establish one or more communication links 125. The coverage area 110 may be an example of a geographic area over which a base station 105 and a UE 115 may support the communication of signals according to one or more radio access technologies.

The UEs 115 may be dispersed throughout a coverage area 110 of the wireless communications system 100, and each UE 115 may be stationary, or mobile, or both at different times. The UEs 115 may be devices in different forms or having different capabilities. Some example UEs 115 are illustrated in FIG. 1. The UEs 115 described herein may be able to communicate with various types of devices, such as other UEs 115, the base stations 105, or network equipment (e.g., core network nodes, relay devices, integrated access and backhaul (IAB) nodes, or other network equipment) , as shown in FIG. 1.

The base stations 105 may communicate with the core network 130, or with one another, or both. For example, the base stations 105 may interface with the core network 130 through one or more backhaul links 120 (e.g., via an S1, N2, N3, or other interface) . The base stations 105 may communicate with one another over the backhaul links 120 (e.g., via an X2, Xn, or other interface) either directly (e.g., directly between base stations 105) , or indirectly (e.g., via core network 130) , or both. In some examples, the backhaul links 120 may be or include one or more wireless links.

One or more of the base stations 105 described herein may include or may be referred to by a person having ordinary skill in the art as a base transceiver station, a radio base station, an access point, a radio transceiver, a NodeB, an eNodeB (eNB) , a next-generation NodeB or a giga-NodeB (either of which may be referred to as a gNB) , a Home NodeB, a Home eNodeB, or other suitable terminology.

A UE 115 may include or may be referred to as a mobile device, a wireless device, a remote device, a handheld device, or a subscriber device, or some other suitable terminology, where the “device” may also be referred to as a unit, a station, a terminal, or a client, among other examples. A UE 115 may also include or may be referred to as a personal electronic device such as a cellular phone, a personal digital assistant (PDA) , a tablet computer, a laptop computer, or a personal computer. In some examples, a UE 115 may include or be referred to as a wireless local loop (WLL) station, an Internet of Things (IoT) device, an Internet of Everything (IoE) device, or a machine type communications (MTC) device, among other examples, which may be implemented in various objects such as appliances, or vehicles, meters, among other examples.

The UEs 115 described herein may be able to communicate with various types of devices, such as other UEs 115 that may sometimes act as relays as well as the base stations 105 and the network equipment including macro eNBs or gNBs, small cell eNBs or gNBs, or relay base stations, among other examples, as shown in FIG. 1.

The UEs 115 and the base stations 105 may wirelessly communicate with one another via one or more communication links 125 over one or more carriers. The term “carrier” may refer to a set of radio frequency spectrum resources having a defined physical layer structure for supporting the communication links 125. For example, a carrier used for a communication link 125 may include a portion of a radio frequency spectrum band (e.g., a bandwidth part (BWP) ) that is operated according to one or more physical layer channels for a given radio access technology (e.g., LTE, LTE-A, LTE-A Pro, NR) . Each physical layer channel may carry acquisition signaling (e.g., synchronization signals, system information) , control signaling that coordinates operation for the carrier, user data, or other signaling. The wireless communications system 100 may support communication with a UE 115 using carrier aggregation or multi-carrier operation. A UE 115 may be configured with multiple downlink component carriers and one or more uplink component carriers according to a carrier aggregation configuration. Carrier aggregation may be used with both frequency division duplexing (FDD) and time division duplexing (TDD) component carriers.

Signal waveforms transmitted over a carrier may be made up of multiple subcarriers (e.g., using multi-carrier modulation (MCM) techniques such as orthogonal frequency division multiplexing (OFDM) or discrete Fourier transform spread OFDM (DFT-S-OFDM) ) . In a system employing MCM techniques, a resource element may consist of one symbol period (e.g., a duration of one modulation symbol) and one subcarrier, where the symbol period and subcarrier spacing are inversely related. The number of bits carried by each resource element may depend on the modulation scheme (e.g., the order of the modulation scheme, the coding rate of the modulation scheme, or both) . Thus, the more resource elements that a UE 115 receives and the higher the order of the modulation scheme, the higher the data rate may be for the UE 115. A wireless communications resource may refer to a combination of a radio frequency spectrum resource, a time resource, and a spatial resource (e.g., spatial layers or beams) , and the use of multiple spatial layers may further increase the data rate or data integrity for communications with a UE 115.

The time intervals for the base stations 105 or the UEs 115 may be expressed in multiples of a basic time unit which may, for example, refer to a sampling period of T _s = 1/ (Δf _max·N _f) seconds, where Δf _max may represent the maximum supported subcarrier spacing, and N _f may represent the maximum supported discrete Fourier transform (DFT) size. Time intervals of a communications resource may be organized according to radio frames each having a specified duration (e.g., 10 milliseconds (ms) ) . Each radio frame may be identified by a system frame number (SFN) (e.g., ranging from 0 to 1023) .

Each frame may include multiple consecutively numbered subframes or slots, and each subframe or slot may have the same duration. In some examples, a frame may be divided (e.g., in the time domain) into subframes, and each subframe may be further divided into a number of slots. Alternatively, each frame may include a variable number of slots, and the number of slots may depend on subcarrier spacing. Each slot may include a number of symbol periods (e.g., depending on the length of the cyclic prefix prepended to each symbol period) . In some wireless communications systems 100, a slot may further be divided into multiple mini-slots containing one or more symbols. Excluding the cyclic prefix, each symbol period may contain one or more (e.g., N _f) sampling periods. The duration of a symbol period may depend on the subcarrier spacing or frequency band of operation.

A subframe, a slot, a mini-slot, or a symbol may be the smallest scheduling unit (e.g., in the time domain) of the wireless communications system 100 and may be referred to as a transmission time interval (TTI) . In some examples, the TTI duration (e.g., the number of symbol periods in a TTI) may be variable. Additionally or alternatively, the smallest scheduling unit of the wireless communications system 100 may be dynamically selected (e.g., in bursts of shortened TTIs (sTTIs) ) .

Physical channels may be multiplexed on a carrier according to various techniques. A physical control channel and a physical data channel may be multiplexed on a downlink carrier, for example, using one or more of time division multiplexing (TDM) techniques, frequency division multiplexing (FDM) techniques, or hybrid TDM-FDM techniques. A control region (e.g., a control resource set (CORESET) ) for a physical control channel may be defined by a number of symbol periods and may extend across the system bandwidth or a subset of the system bandwidth of the carrier. One or more control regions (e.g., CORESETs) may be configured for a set of the UEs 115. For example, one or more of the UEs 115 may monitor or search control regions for control information according to one or more search space sets, and each search space set may include one or multiple control channel candidates in one or more aggregation levels arranged in a cascaded manner. An aggregation level for a control channel candidate may refer to a number of control channel resources (e.g., control channel elements (CCEs) ) associated with encoded information for a control information format having a given payload size. Search space sets may include common search space sets configured for sending control information to multiple UEs 115 and UE-specific search space sets for sending control information to a specific UE 115.

In some examples, a base station 105 may be movable and therefore provide communication coverage for a moving geographic coverage area 110. In some examples, different geographic coverage areas 110 associated with different technologies may overlap, but the different geographic coverage areas 110 may be supported by the same base station 105. In other examples, the overlapping geographic coverage areas 110 associated with different technologies may be supported by different base stations 105. The wireless communications system 100 may include, for example, a heterogeneous network in which different types of the base stations 105 provide coverage for various geographic coverage areas 110 using the same or different radio access technologies.

The wireless communications system 100 may be configured to support ultra-reliable communications or low-latency communications, or various combinations thereof. For example, the wireless communications system 100 may be configured to support ultra-reliable low-latency communications (URLLC) or mission critical communications. The UEs 115 may be designed to support ultra-reliable, low-latency, or critical functions (e.g., mission critical functions) . Ultra-reliable communications may include private communication or group communication and may be supported by one or more mission critical services such as mission critical push-to-talk (MCPTT) , mission critical video (MCVideo) , or mission critical data (MCData) . Support for mission critical functions may include prioritization of services, and mission critical services may be used for public safety or general commercial applications. The terms ultra-reliable, low-latency, mission critical, and ultra-reliable low-latency may be used interchangeably herein.

In some examples, a UE 115 may also be able to communicate directly with other UEs 115 over a device-to-device (D2D) communication link 135 (e.g., using a peer-to-peer (P2P) or D2D protocol) . One or more UEs 115 utilizing D2D communications may be within the geographic coverage area 110 of a base station 105. Other UEs 115 in such a group may be outside the geographic coverage area 110 of a base station 105 or be otherwise unable to receive transmissions from a base station 105. In some examples, groups of the UEs 115 communicating via D2D communications may utilize a one-to-many (1: M) system in which each UE 115 transmits to every other UE 115 in the group. In some examples, a base station 105 facilitates the scheduling of resources for D2D communications. In other cases, D2D communications are carried out between the UEs 115 without the involvement of a base station 105.

The core network 130 may provide user authentication, access authorization, tracking, Internet Protocol (IP) connectivity, and other access, routing, or mobility functions. The core network 130 may be an evolved packet core (EPC) or 5G core (5GC) , which may include at least one control plane entity that manages access and mobility (e.g., a mobility management entity (MME) , an access and mobility management function (AMF) ) and at least one user plane entity that routes packets or interconnects to external networks (e.g., a serving gateway (S-GW) , a Packet Data Network (PDN) gateway (P-GW) , or a user plane function (UPF) ) . The control plane entity may manage non-access stratum (NAS) functions such as mobility, authentication, and bearer management for the UEs 115 served by the base stations 105 associated with the core network 130. User IP packets may be transferred through the user plane entity, which may provide IP address allocation as well as other functions. The user plane entity may be connected to the network operators IP services 150. The operators IP services 150 may include access to the Internet, Intranet (s) , an IP Multimedia Subsystem (IMS) , or a Packet-Switched Streaming Service.

Some of the network devices, such as a base station 105, may include subcomponents such as an access network entity 140, which may be an example of an access node controller (ANC) . Each access network entity 140 may communicate with the UEs 115 through one or more other access network transmission entities 145, which may be referred to as radio heads, smart radio heads, or transmission/reception points (TRPs) . Each access network transmission entity 145 may include one or more antenna panels. In some configurations, various functions of each access network entity 140 or base station 105 may be distributed across various network devices (e.g., radio heads and ANCs) or consolidated into a single network device (e.g., a base station 105) .

The wireless communications system 100 may operate using one or more frequency bands, typically in the range of 300 megahertz (MHz) to 300 gigahertz (GHz) . Generally, the region from 300 MHz to 3 GHz is known as the ultra-high frequency (UHF) region or decimeter band because the wavelengths range from approximately one decimeter to one meter in length. The UHF waves may be blocked or redirected by buildings and environmental features, but the waves may penetrate structures sufficiently for a macro cell to provide service to the UEs 115 located indoors. The transmission of UHF waves may be associated with smaller antennas and shorter ranges (e.g., less than 100 kilometers) compared to transmission using the smaller frequencies and longer waves of the high frequency (HF) or very high frequency (VHF) portion of the spectrum below 300 MHz.

The wireless communications system 100 may utilize both licensed and unlicensed radio frequency spectrum bands. For example, the wireless communications system 100 may employ License Assisted Access (LAA) , LTE-Unlicensed (LTE-U) radio access technology, or NR technology in an unlicensed band such as the 5 GHz industrial, scientific, and medical (ISM) band. When operating in unlicensed radio frequency spectrum bands, devices such as the base stations 105 and the UEs 115 may employ carrier sensing for collision detection and avoidance. In some examples, operations in unlicensed bands may be based on a carrier aggregation configuration in conjunction with component carriers operating in a licensed band (e.g., LAA) . Operations in unlicensed spectrum may include downlink transmissions, uplink transmissions, P2P transmissions, or D2D transmissions, among other examples.

A base station 105 or a UE 115 may be equipped with multiple antennas, which may be used to employ techniques such as transmit diversity, receive diversity, multiple-input multiple-output (MIMO) communications, or beamforming. The antennas of a base station 105 or a UE 115 may be located within one or more antenna arrays or antenna panels, which may support MIMO operations or transmit or receive beamforming. For example, one or more base station antennas or antenna arrays may be co-located at an antenna assembly, such as an antenna tower. In some examples, antennas or antenna arrays associated with a base station 105 may be located in diverse geographic locations. A base station 105 may have an antenna array with a number of rows and columns of antenna ports that the base station 105 may use to support beamforming of communications with a UE 115. Likewise, a UE 115 may have one or more antenna arrays that may support various MIMO or beamforming operations. Additionally or alternatively, an antenna panel may support radio frequency beamforming for a signal transmitted via an antenna port.

Beamforming, which may also be referred to as spatial filtering, directional transmission, or directional reception, is a signal processing technique that may be used at a transmitting device or a receiving device (e.g., a base station 105, a UE 115) to shape or steer an antenna beam (e.g., a transmit beam, a receive beam) along a spatial path between the transmitting device and the receiving device. Beamforming may be achieved by combining the signals communicated via antenna elements of an antenna array such that some signals propagating at particular orientations with respect to an antenna array experience constructive interference while others experience destructive interference. The adjustment of signals communicated via the antenna elements may include a transmitting device or a receiving device applying amplitude offsets, phase offsets, or both to signals carried via the antenna elements associated with the device. The adjustments associated with each of the antenna elements may be defined by a beamforming weight set associated with a particular orientation (e.g., with respect to the antenna array of the transmitting device or receiving device, or with respect to some other orientation) .

The UEs 115 and the base stations 105 may support retransmissions of data to increase the likelihood that data is received successfully. Hybrid automatic repeat request (HARQ) feedback is one technique for increasing the likelihood that data is received correctly over a communication link 125. HARQ may include a combination of error detection (e.g., using a cyclic redundancy check (CRC) ) , forward error correction (FEC) , and retransmission (e.g., automatic repeat request (ARQ) ) . HARQ may improve throughput at the media access control (MAC) layer in poor radio conditions (e.g., low signal-to-noise conditions) . In some examples, a device may support same-slot HARQ feedback, where the device may provide HARQ feedback in a specific slot for data received in a previous symbol in the slot. In other cases, the device may provide HARQ feedback in a subsequent slot, or according to some other time interval.

The wireless communications system 100 may support feedback designs for UEP systems. For example, a wireless device (e.g., a base station 105 or a UE 115) may identify a set of information bits of a code block for transmission to another wireless device. The wireless device may generate one or more error detection bits (e.g., CRC bits) for the code block using the information bits or one or more portions of the information bits (e.g., a set of bits to be coded and another set of uncoded bits in accordance with UEP schemes as described herein) . The wireless device may map the bits to one or more symbols for transmission in accordance with a modulation scheme (e.g., a UEP modulation scheme such as a multi-layer QAM constellation scheme) . Such feedback designs may enable more reliable communications (e.g., supporting HARQ feedback for the UEP systems) and less processing complexity.

FIG. 2 illustrates an example of a wireless communications system 200 that supports feedback design for unequal error protection in accordance with aspects of the present disclosure. In some examples, wireless communications system 200 may implement aspects of wireless communication system 100. The wireless communications system 200 may include a UE 115-a and a base station 105-a, which may be respective examples of a UE 115 and a base station 105 described with reference to FIG. 1. In some cases, the UE 115-a may be an example of a transmitting device, and the base station 105-a may be an example of a receiving device. In some other examples, the UE 115-a may be an example of the receiving device, and the base station 105-a may be an example of the transmitting device.

The wireless communications system 200 may employ UEP techniques for encoding and decoding transmissions. For example, a transmitting device (e.g., the UE 115-a or the base station 105-a) may have k information bits to send to a receiving device (e.g., a wireless device within the geographic coverage area 110-a) . The k information bits may be associated with a transport block and/or a code block to be transmitted to the receiving device. The transmitting device may demultiplex (e.g., divide) the k information bits into portions, for example, a first set of information bits and a second set of information bits. The transmitter may encode the first set of information bits via channel coding procedures, which may result in k _C coded bits 215 that will be encoded via channel coding. The transmitter may refrain from encoding the second set of information bits, which may result in k _U uncoded bits 220. In some cases, the first set of information bits and the second set of information bits may be modulated via UEP modulation (e.g., mapped into M modulated symbols 210) to be transmitted in a transmission 205 as, for example, a modulated symbol 210. For example, in a 64QAM format, each modulated symbol 210 may include four of the k _C coded bits 215 and two of the k _U uncoded bits 220, among other examples of QAM sizes and/or distributions of coded bits 215 and uncoded bits 220 in each modulated symbol 210 (e.g., in a 128QAM format, a modulated symbol 210 may include three coded bits 215 and four uncoded bits 220) . Such UEP techniques may be implemented for any QAM size to reduce power consumption while maintaining similar levels of communications quality.

As an example, the k information bits information bits may be ‘111001. ’ The transmitting device may demultiplex and encode (e.g., with an error correction code such as an FEC) the last four bits (e.g., the k _C coded bits 215) of ‘1001’ and the transmitting device may demultiplex and not encode the first two bits (e.g., the k _U uncoded bits 220) of ‘11. ’ The transmitting device may perform UEP modulation to map the coded bits 215 and the uncoded bits 220 to the modulation symbol 210 (e.g., the transmitting device may map the ‘11’ and the ‘1001’ bits to one or more points of one or more QAM constellations as described with reference to FIG. 3) . In some other examples, other modulation schemes may be applied. For example, the techniques described herein may be used for different QAM formats (e.g., 128QAM, 256QAM, etc. ) , or the split between coded bits and uncoded bits may be different (e.g., 64QAM may use four coded bits and two coded bits) .

In order to provide for more robust and reliable communications, the transmitting device and/or the receiving device may implement one or more feedback designs. For example, the transmitting device may include error detection bits (e.g., 16 CRC bits, 24 CRC bits, 32 CRC bits, etc. ) with the k information bits, the k _C coded bits 215, the k _U uncoded bits 220, or a combination thereof. Such a procedure may enable the wireless communications system 200 to implement feedback techniques, such as HARQ feedback (e.g., 1-bit ACK/NACK signaling, 2-bit ACK/NACK signaling, among other examples of feedback signaling) . In some examples, the transmitting device may generate and append the error detection bits to the k information bits before demultiplexing the k information bits (e.g., both the k information bits and appended CRC bits are divided into the k _C coded bits 215 and the k _U uncoded bits 220) . As an example, appending the error detection bits to the k information bits may enable 1-bit ACK and/or NACK signaling. For instance, a receiving device (e.g., the base station 105-a or the UE 115-a) may receive the transmission 205 and perform an error detection procedure using the error detection bits, which may enable the receiving device to transmit a 1-bit ACK or NACK message to the transmitting device depending on the result of the procedure. The transmitting device may retransmit the k information bits, for example, if the receiving device transmits a NACK.

In some examples, a feedback design may enable the transmitting device to generate error detection bits associated with the k _C coded bits 215, the k _U uncoded bits 220, or both. The transmitting device may include the generated error detection bits with the k _C coded bits 215 and/or the k _U uncoded bits 220. For example, the transmitting device may append a first set of CRC bits to the k _C coded bits 215 and perform subsequent channel coding to both the first set of CRC bits and the k _C coded bits 215. Additionally or alternatively, the transmitting device may append a second set of CRC bits to the k _U uncoded bits 220 and multiplex the k _U uncoded bits 220 (e.g., including the second set of CRC bits) with the k _C coded bits 215 (e.g., including the coded first set of CRC bits) . Such feedback designs may enable 2-bit ACK and/or NACK signaling. For instance, a receiving device may receive the transmission 205 and perform an error detection procedure using the error detection bits (e.g., the first set of CRC bits and/or the second set of CRC bits) , which may enable the receiving device to transmit a 1-bit ACK or NACK message or a 2-bit ACK or NACK message to the transmitting device depending on the feedback design used and the result of the error detection procedure. As an example, the receiving device may determine that some of the k _C coded bits 215 were lost to channel noise based on an error detection procedure using the first set of CRC bits (e.g., a check sum function of the CRC bits fails to satisfy a threshold) . The receiving device may transmit a NACK (e.g., associated with the coded bits 215) to the transmitting device, which may enable the transmitting device to retransmit the k _C coded bits 215 or the k information bits. Additionally or alternatively, the receiving device may transmit an ACK or a NACK associated with the k _U uncoded bits 220 (e.g., based on an error detection procedure using the second set of CRC bits) , which may enable the transmitting device to retransmit the k _U uncoded bits 220 or the k information bits.

FIG. 3 illustrates an example of a QAM map 300 that supports feedback design for unequal error protection in accordance with aspects of the present disclosure. In some examples, the QAM map 300 may implement aspects of

wireless communication systems

100 or 200. For example, the QAM map 300 may illustrate a modulation technique in order to exchange information (e.g., bits) over a wireless medium between wireless devices of the wireless communications systems 100 and/or 200. Specifically, the QAM map 300 illustrates a QAM technique, which is a modulation technique that maps bits in the amplitude of the waveform and in a phase shift as compared to a reference signal. That is, the bits are mapped in two dimensions (e.g., amplitude and phase shift) .

In some examples, the QAM map 300 may illustrate an example of a UEP modulation technique to map uncoded bits and coded bits on one or more QAM constellations. As an example, information bits of a symbol (e.g., a symbol of transmission 205 as described with reference to FIG. 2) may be mapped on a multi-layered QAM constellation such as inner and outer QAM constellations. For instance, a transmitting device may identify a set of uncoded bits and a set of coded bits for transmission using a multi-layer QAM constellation illustrated by the QAM map 300 (e.g., for a 64QAM format) . The transmitting device may map the set of uncoded bits to a first constellation point of an outer constellation and map the set of coded bits to a second constellation point of the inner constellation (i.e., the transmitting device may map the uncoded bits and the coded bits to a symbol of the multi-layer QAM constellation) . The inner constellation may correspond to the first constellation point of the outer constellation. Using this technique, the transmitting device may create or otherwise form the multi-layer QAM constellation for transmission. Accordingly, the transmitting device may transmit the set of uncoded bits and the set of coded bits according to the first constellation point and the second constellation point. The receiving device may receive the signal indicating the set of coded bits and the set of uncoded bits and identify the set of uncoded bits based on the first constellation point of the outer constellation and identify the set of coded bits based on the second constellation point of the inner constellation.

The number of bits in the set of coded bits and/or the number of bits in the set of uncoded bits may be selected depended upon the number of bits in the represented value being communicated in the signal. Accordingly, the number of bits in the set of coded bits and the set of uncoded bits may, collectively, determine the number of bits that can be communicated or otherwise indicated in the signal and, consequently, the size and/or shape of the QAM map 300 used to transmit the set of coded bits and the set of uncoded bits. For example, the QAM map 300 may be a QAM constellation that is formed based on the inner constellation and the outer constellation. Each of the inner constellation and the outer constellation may have a different shape (e.g., a QAM pattern) and/or size (e.g., QAM size) that is the same or is different.

For example, the QAM map 300 may illustrate a 64QAM format, although other QAM sizes and patterns are possible. The QAM map 300 may include outer constellation points 305 and inner constellation points 310. The outer constellation points 305 may be considered relatively high reliability bits (i.e., symbols associated with a high reliability) because there may be a relatively smaller chance for decoding errors occurring for bits indicated by the outer constellation points 305 (e.g., due to more separation between each of the outer constellation points 305) . The inner constellation points 310 may be considered relatively low reliability bits (e.g., symbols associated with a low reliability) because there may be a relatively higher chance for decoding errors occurring for bits indicated by the inner constellation points 310 (e.g., due to less separation between each of the inner constellation points 310) . In some examples, the gain of the high reliability bits may be greater than the gain of the low reliability bits (e.g., 6 dB greater, among other examples) .

The outer constellation points 305 may indicate one of the possible uncoded bits values 315. For example, as illustrated, the upper left outer constellation point 305 may indicate a bit value of ‘11, ’ the upper right outer constellation point 305 may indicate a bit value of ‘10, ’ the bottom left outer constellation point 305 may indicate a bit value of ‘01, ’ and the bottom right outer constellation point 305 may indicate a bit value of ‘00. ’ The inner constellation points 310 may correspond to the outer constellation points 305 and indicate one of the possible coded bit values 320. For example, the inner constellation points 310 included in the section 325 may correspond to the top right outer constellation points 305 (e.g., the uncoded bit value of ‘01’ ) . The locations of each inner constellation point 310 in the section 325 may indicate the corresponding possible bit values 320. Thus, a transmitted symbol may indicate six total bits in the QAM map 300. For instance, indicating a constellation point in the section 325, such as the inner constellation point 310 associated with the coded bit values of ‘1110, ’ may also indicate the corresponding outer constellation point 305, such as the uncoded bit values of ‘10, ’ which may result in the symbol indicating the six bits of ‘101110. ’ Accordingly, a receiving device may decode the coded bits (e.g., indicated by an inner constellation point 310) and use the decoding results to demodulate the coded bits and the coded bits.

The transmitting device and the receiving device may implement feedback designs (e.g., feedback designs utilized in the processing chains as described herein) to provide reliable communications and enhanced power savings. For example, the transmitting device may append bits of error detection code (e.g., CRC code) onto information bits of a transmission such that the information bits and the error detection code bits are mapped onto various locations of the QAM map 300 for one or more symbols. In some examples, the transmitting device may append bits of one or more error detection codes onto a set of coded bits (e.g., indicated by the inner constellation points 310) , a set of uncoded bits (e.g., indicated by the outer constellation points 305) , or both. For example, the transmitting device may generate a first set of CRC bits to append to the set of coded bits. Additionally or alternatively, the transmitting device may generate a second set of CRC bits to append to the set of uncoded bits after demultiplexing the information bits. The transmitting device may map the different sets of bits to one or more symbols as described with reference to the QAM map 300.

FIG. 4 illustrates an example of a processing chain 400 that supports feedback design for unequal error protection in accordance with aspects of the present disclosure. In some examples, the processing chain 400 may implement aspects of

wireless communications systems

100 and 200 and/or aspects of the QAM map 300. For example, FIG. 4 may illustrate an example of a transmission chain configuration employing one or more feedback designs as described herein, which may enable 1-bit HARQ feedback. The processing chain 400 may be implemented by a wireless device, which may be an example of a UE 115 or a base station 105 as described herein.

At 405, the wireless device may determine information bits to include in a transmission. For example, the wireless device may identify a message to transmit to another device, and may identify k information bits to include in a transport block or a code block associated with the message (e.g., the message may be divided into multiple transport blocks and/or code blocks and mapped to symbols for transmission via the processing chain 400) . The value of k may be selected and/or configured based on the size of a code block (or a transport block) and the implemented feedback design. For example, the wireless device may determine and/or may be configured to select k information bits such that the total number of bits (e.g., the k information bits in addition to any code added in the processing chain 400) satisfies a size threshold of the code block. Additionally or alternatively, the wireless device may determine and/or may be configured to select k information bits per symbol in accordance with a feedback design. For example, the wireless device may receive control signaling (e.g., downlink control information (DCI) received via a control channel such as a physical downlink control channel (PDCCH) , radio resource control (RRC) signaling, etc. ) configuring the wireless device with a modulation coding scheme (MCS) (e.g., QAM, QPSK, among other examples of an MCS) . The wireless device may select the k information bits based on the configured MCS. For example, the wireless device may be configured to use a 64QAM format, which may support 6 bits per symbol (e.g., 4 coded bits and 2 uncoded bits, among other examples of configured distributions) , and the wireless device may identify the k information bits to include in a code block and/or symbols associated with the code block accordingly.

The wireless device may implement feedback information at a CRC block 410. For example, the wireless device may generate error detection bits such as a set of CRC bits (e.g., 16 CRC bits, 24 CRC bits, 32 CRC bits, etc. ) based on the k information bits (e.g., the wireless device may perform an operation to determine the CRC bits corresponding to the k information bits, for example, such that the CRC bits are associated with a checksum function) . The wireless device may include the generated error detection bits with the k information bits (e.g., the wireless device may append the set of CRC bits on the k information bits) . In some examples, the wireless device may select a first set of bits (e.g., bits to be encoded) from the k information bits and the generated CRC bits. Additionally or alternatively, the wireless device may select a second set of bits (e.g., uncoded bits) from the k information bits and the generated CRC bits. In some examples, the error detection bits may be configured such that a receiving device may determine whether the transmission failed (e.g., the receiving device failed to correctly decode and/or receive the transmission, for example, due to noise or other interference) . For instance, the error detection bits may include CRC bits that the receiving device may use to perform an error detection procedure, such as a CRC check. The receiving device may determine a result of the error detection procedure (e.g., a checksum function using the CRC bits satisfies a threshold value or fails to satisfy a threshold value) . That is, the receiving device may determine that the CRC check passes for the k information bits and may, in some cases, transmit feedback (e.g., a 1-bit ACK message) . In some examples, the receiving device may determine that the CRC check fails for the k information bits and transmit feedback (e.g., a 1-bit NACK message) indicating that the k information bits were not correctly received and/or decoded (e.g., the symbols carrying the k information bits were corrupted or destroyed) . In such examples, the wireless device may re-transmit the k information bits (e.g., via processing chain 400) .

The wireless device may demultiplex the k information bits and the error detection bits at a demultiplexer block 415. For example, the demultiplexer block 415 may be an example of a serial-to-parallel (S/P) converter and a serial string of bits (e.g., the k information bits and the error detection bits) may be fed into the S/P converter, where the bits are divided into a set of uncoded bits (e.g., k _U uncoded bits 220 as described with reference to FIG. 2) and a set of bits to be coded (e.g., k _C coded bits 215 as described with reference to FIG. 2) .

The wireless device may perform channel coding for the set of bits to be coded at channel coding block 420. For example, the wireless device may have an encoder configured to perform error correction coding for the set of bits to be coded. In some examples, the encoder may be an example of a forward error correction (FEC) encoder. For example, the encoder may code the set of bits to be coded using polar codes, low density parity check (LDPC) codes, reference signal codes, among other examples of coding techniques.

The wireless device may modulate the set of coded bits (e.g., the k _C coded bits) and the set of uncoded bits (e.g., the k _U uncoded bits) at UEP modulation 425. For example, the wireless device may map the bits into one or more symbols as described herein (e.g., with reference to FIGs. 2 and 3) . In some cases, the set of coded bits may be mapped onto low reliability bits of a modulation scheme (e.g., locations of a QAM constellation indicating bits with a relatively low reliability) and the set of uncoded bits may be mapped onto high reliability bits of a modulation scheme (e.g., locations of a QAM constellation indicating bits with a relatively high reliability) .

The wireless device may perform further processing for the modulated symbol (s) including the mapped coded bits and uncoded bits at a signal generation block 430. In some examples, the further processing may include other examples of transmission chain steps. For example, the further processing may include generation of an OFDM signal for transmission of the modulated symbol from one or more antenna ports of the wireless device. The further processing may also include scrambling, transmission layer mapping, precoding, mapping to resource elements, rate matching procedures, among other examples of transmission chain processes. The wireless device may send the OFDM signal (e.g., including the modulated symbol) to the antenna ports for transmission to another wireless device. For example, the wireless device may send the OFDM signal to the antenna 435 for subsequent transmission.

FIG. 5 illustrates an example of a processing chain 500 that supports feedback design for unequal error protection in accordance with aspects of the present disclosure. In some examples, the processing chain 500 may implement aspects of

wireless communications systems

100 and 200 and/or aspects of the QAM map 300. For example, FIG. 4 may illustrate an example of a transmission chain configuration employing one or more feedback designs as described herein, which may enable HARQ feedback (e.g., 1-bit HARQ feedback and/or 2-bit HARQ feedback) . The processing chain 500 may be implemented by a wireless device, which may be an example of a UE 115 or a base station 105 as described herein.

At 505, the wireless device may determine information bits to include in a transmission. For example, the wireless device may identify a message to transmit to another device, and may identify k information bits to include in a transport block and/or a code block associated with the message. The value of k may be selected and/or configured based on the size of the transport block or the code block and the implemented feedback design. For example, the wireless device may determine and/or may be configured to select k information bits such that the total number of bits (e.g., the k information bits in addition to any code added in the processing chain 500) satisfies a size threshold of the code block. Additionally or alternatively, the wireless device may determine and/or may be configured to select k information bits per symbol in accordance with a feedback design. For example, the wireless device may receive control signaling (e.g., DCI received via a control channel such as a physical downlink control channel (PDCCH) , RRC signaling, etc. ) configuring the wireless device with an MCS. The wireless device may select the k information bits based on the configured MCS. For example, the wireless device may be configured to use a 64QAM format, which may support 6 bits per symbol (e.g., 4 coded bits and 2 uncoded bits, among other examples of configured distributions) , and the wireless device may identify the k information bits to include in a code block and/or symbols associated with the code block accordingly.

The wireless device may demultiplex the k information bits at a demultiplexer block 510. For example, the demultiplexer block 510 may be an example of a serial-to-parallel (S/P) converter and a serial string of bits (e.g., the k information bits) may be fed into the S/P converter, where the bits are divided into a set of uncoded bits (e.g., k _U uncoded bits 220 as described with reference to FIG. 2) and a set of bits to be coded (e.g., k _C coded bits 215 as described with reference to FIG. 2) .

In some examples, the wireless device may implement feedback information at a CRC block 515. For example, the wireless device may generate error detection bits such as CRC bits (e.g., 16 CRC bits, 24 CRC bits, 32 CRC bits, etc. ) for the set of bits to be coded (e.g., the k _C coded bits) . That is, the wireless device may generate CRC bits based on the set of bits to be coded (e.g., the wireless device may perform an operation to determine the CRC bits corresponding to the k _C coded bits, for example, such that the CRC bits are associated with a checksum function) . The wireless device may include the generated error detection bits (e.g., associated with the set of bits to be coded) with the set of bits to be coded. For example, the wireless device may append the set of CRC bits on the k _C coded bits. The error detection bits may be configured such that a receiving device may determine whether reception and/or decoding of the k _C coded bits failed (e.g., due to noise or other interference) .

Additionally or alternatively, the wireless device may implement feedback information at a CRC block 520. For example, the wireless device may generate error detection bits such as CRC bits (e.g., 16 CRC bits, 24 CRC bits, 32 CRC bits, etc. ) for the set of uncoded bits (e.g., the k _U uncoded bits) . That is, the wireless device may generate CRC bits based on the set of uncoded bits (e.g., the wireless device may perform an operation to determine the CRC bits corresponding to the k _U uncoded bits, for example, such that the CRC bits are associated with a checksum function) . The wireless device may include the generated error detection bits (e.g., associated with the set of uncoded bits) with the set of uncoded bits. For example, the wireless device may append the set of CRC bits on the k _U uncoded bits. The error detection bits may be configured such that a receiving device may determine whether reception and/or decoding of the k _U uncoded bits failed (e.g., due to noise or other interference) . In some examples, the wireless device may generate different CRC bits for the set of uncoded bits and the set of bits to be coded. In some other examples, the wireless device may generate the same CRC bits for each set of bits.

Implementing feedback at the CRC block 515, the CRC block 520, or both may support feedback techniques, which may result in more reliable communications. In some examples, the transmitting device may implement feedback information at CRC block 515 for the set of bits to be coded. Such an implementation may enable a receiving device to determine that reception or decoding of the set of coded bits (e.g., including CRC bits added to the set of bits to be coded) was unsuccessful, which may result in more reliable communications. For instance, the receiving device may transmit a feedback message (e.g., a 1-bit ACK/NACK message for the set of coded bits) , which may enable retransmission of the k information bits. In some other examples, the transmitting device may implement feedback information at CRC block 520 for the set of uncoded bits. Such an implementation may enable a receiving device to determine that reception or decoding of the set of uncoded bits (e.g., including CRC bits added to the set of uncoded bits) was unsuccessful, which may result in more reliable communications. For instance, the receiving device may transmit a feedback message (e.g., a 1-bit ACK/NACK message for the set of uncoded bits) , which may enable retransmission of the k information bits.

In some examples, the wireless device may generate CRC bits for the set of bits to be coded in addition to generating CRC bits for the set of uncoded bits. Such a procedure may enable, for example, 2-bit HARQ feedback. The CRC bits for each set of bits may enable a receiving to device to perform error detection procedures for the k _U uncoded bits and the k _C coded bits, respectively. For instance, the receiving device may perform a CRC check and determine a result (e.g., whether a checksum function of the CRC check satisfies a threshold value) for both the transmitted k _C coded bits and k _U uncoded bits. The receiving device may transmit a feedback message, such as a 2-bit ACK/NACK message, based on the results. Such messaging may be based on Table 1. Table 1 may illustrate some possible bit values to transmit in a 2-bit ACK/NACK message based on the results of the CRC check.

Table 1

In Table 1, an X may indicate that the error detection procedure failed (e.g., a checksum function of the CRC check fails to satisfy a threshold) and a √ may indicate that the error detection procedure was successful (e.g., a checksum function of the CRC check satisfies a threshold) . The receiving device may include the corresponding values associated with the results of the error detection procedure in a feedback message. Such feedback may enable the transmitting device to retransmit the k _U uncoded bits (e.g., when the receiving device indicates that the CRC_2 check failed) , the k _C coded bits (e.g., when the receiving device indicates that the CRC_1 check failed) , or both (e.g., when both checks are failed) , which may result in reduced processing complexity and more efficient communications (e.g., due to only transmitting a portion of the k information bits) .

The wireless device may perform channel coding for the set of bits to be coded (e.g., in addition to any error detection bits added at CRC block 515) at channel coding block 525. For example, the wireless device may have an encoder configured to perform error correction coding for the set of bits to be coded. In some examples, the encoder may be an example of a forward error correction (FEC) encoder. For example, the encoder may code the set of bits to be coded using polar codes, low density parity check (LDPC) codes, reference signal codes, among other examples of coding techniques.

The wireless device may modulate the set of coded bits (e.g., the k _C coded bits and, in some examples, the error detection bits added at CRC block 515) and the set of uncoded bits (e.g., the k _U uncoded bits and, in some examples, the error detection bits added at CRC block 520) at UEP modulation 530. For example, the wireless device may map the bits into one or more symbols as described herein (e.g., with reference to FIGs. 2 and 3) . In some cases, the set of coded bits may be mapped onto low reliability bits of a modulation scheme (e.g., locations of a QAM constellation indicating bits with a relatively low reliability) and the set of uncoded bits may be mapped onto high reliability bits of a modulation scheme (e.g., locations of a QAM constellation indicating bits with a relatively high reliability) .

The wireless device may perform further processing for the modulated symbol (s) including the mapped coded bits and uncoded bits at a signal generation block 535. In some examples, the further processing may include other examples of transmission chain steps. For example, the further processing may include generation of an OFDM signal for transmission of the modulated symbol from one or more antenna ports of the wireless device. The further processing may also include scrambling, transmission layer mapping, precoding, mapping to resource elements, rate matching procedures, among other examples of transmission chain processes. The wireless device may send the OFDM signal (e.g., including the modulated symbol) to the antenna ports for transmission to another wireless device. For example, the wireless device may send the OFDM signal to the antenna 540 for subsequent transmission.

FIG. 6 shows a block diagram 600 of a device 605 that supports feedback design for unequal error protection systems in accordance with aspects of the present disclosure. The device 605 may be an example of aspects of a device (e.g., a UE, a base station, a receiving device, a transmitting device, or a combination thereof) as described herein. The device 605 may include a receiver 610, a communications manager 615, and a transmitter 620. The device 605 may also include a processor. Each of these components may be in communication with one another (e.g., via one or more buses) .

The receiver 610 may receive information such as packets, user data, or control information associated with various information channels (e.g., control channels, data channels, and information related to feedback design for unequal error protection systems, etc. ) . Information may be passed on to other components of the device 605. The receiver 610 may be an example of aspects of the transceiver 920 described with reference to FIG. 9. The receiver 610 may utilize a single antenna or a set of antennas.

The communications manager 615 may identify a set of information bits of a code block, generate one or more cyclic redundancy check bits for the code block using at least a portion of the set of information bits, encode a first set of bits, the first set of bits and a second set of bits together including the set of information bits and the one or more cyclic redundancy check bits, map the encoded first set of bits to a first set of symbols of a set of symbols and the second set of bits to a second set of symbols of the set of symbols based on the first set of symbols being associated with a lower reliability than the second set of symbols, and transmit a signal including the set of symbols. The communications manager 615 may be an example of aspects of the communications manager 910 described herein.

The communications manager 615, or its sub-components, may be implemented in hardware, code (e.g., software or firmware) executed by a processor, or any combination thereof. If implemented in code executed by a processor, the functions of the communications manager 615, or its sub-components may be executed by a general-purpose processor, a digital signal processor (DSP) , an application-specific integrated circuit (ASIC) , a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described in the present disclosure.

The communications manager 615, or its sub-components, may be physically located at various positions, including being distributed such that portions of functions are implemented at different physical locations by one or more physical components. In some examples, the communications manager 615, or its sub-components, may be a separate and distinct component in accordance with various aspects of the present disclosure. In some examples, the communications manager 615, or its sub-components, may be combined with one or more other hardware components, including but not limited to an input/output (I/O) component, a transceiver, a network server, another computing device, one or more other components described in the present disclosure, or a combination thereof in accordance with various aspects of the present disclosure.

The actions performed by the communications manager 615 as described herein may be implemented to realize one or more potential advantages. One implementation may enable a wireless device, such as a UE or a base station, to implement feedback designs as described herein. For example, the wireless device may implement feedback information in accordance with a UEP modulation scheme (e.g., the wireless device may generate CRC bits for a set of information bits, a set of uncoded bits, a set of coded bits/bits to be coded, or a combination thereof) . Such an implementation may enable the wireless device to ensure more reliable communications. For instance, the wireless device may receive feedback messaging as described herein (e.g., ACK/NACK messaging) , which may ensure reliable reception and transmission of UEP modulated bits while realizing reduced power consumption (e.g., due to refraining from channel coding a portion of the bits) .

Based on implementing the techniques as described herein, a processor of the wireless device (e.g., a processor controlling the receiver 610, the communications manager 615, and the transmitter 620, etc. ) may, in some examples, generate a first set of CRC bits for bits to be coded and a second set of CRC bits for uncoded bits, which may result in more efficient communications. For example, the wireless device may determine that the set of coded bits was successfully received by another device (e.g., via feedback messaging based on the first set of CRC bits) and determine that the set of uncoded bits was not successfully received (e.g., via feedback messaging based on the second set of CRC bits) . The wireless device may retransmit the set of coded bits and refrain from retransmitting the set of uncoded bits, which may reduce processing complexity at the processor of the wireless device. Therefore, the wireless device may realize increased reliability and efficiency of communications at the processor of the wireless device.

The transmitter 620 may transmit signals generated by other components of the device 605. In some examples, the transmitter 620 may be collocated with a receiver 610 in a transceiver module. For example, the transmitter 620 may be an example of aspects of the transceiver 920 described with reference to FIG. 9. The transmitter 620 may utilize a single antenna or a set of antennas.

FIG. 7 shows a block diagram 700 of a device 705 that supports feedback design for unequal error protection systems in accordance with aspects of the present disclosure. The device 705 may be an example of aspects of a device 605 or a wireless device (e.g., a UE, a base station, a receiving device, a transmitting device, or a combination thereof) as described herein. The device 705 may include a receiver 710, a communications manager 715, and a transmitter 745. The device 705 may also include a processor. Each of these components may be in communication with one another (e.g., via one or more buses) .

The receiver 710 may receive information such as packets, user data, or control information associated with various information channels (e.g., control channels, data channels, and information related to feedback design for unequal error protection systems, etc. ) . Information may be passed on to other components of the device 705. The receiver 710 may be an example of aspects of the transceiver 920 described with reference to FIG. 9. The receiver 710 may utilize a single antenna or a set of antennas.

The communications manager 715 may be an example of aspects of the communications manager 615 as described herein. The communications manager 715 may include an information component 720, a CRC component 725, an encoding component 730, a mapping component 735, and a signal component 740. The communications manager 715 may be an example of aspects of the communications manager 910 described herein.

The information component 720 may identify a set of information bits of a code block.

The CRC component 725 may generate one or more cyclic redundancy check bits for the code block using at least a portion of the set of information bits.

The encoding component 730 may encode a first set of bits, the first set of bits and a second set of bits together including the set of information bits and the one or more cyclic redundancy check bits.

The mapping component 735 may map the encoded first set of bits to a first set of symbols of a set of symbols and the second set of bits to a second set of symbols of the set of symbols based on the first set of symbols being associated with a lower reliability than the second set of symbols.

The signal component 740 may transmit a signal including the set of symbols.

The transmitter 745 may transmit signals generated by other components of the device 705. In some examples, the transmitter 745 may be collocated with a receiver 710 in a transceiver module. For example, the transmitter 745 may be an example of aspects of the transceiver 920 described with reference to FIG. 9. The transmitter 745 may utilize a single antenna or a set of antennas.

FIG. 8 shows a block diagram 800 of a communications manager 805 that supports feedback design for unequal error protection systems in accordance with aspects of the present disclosure. The communications manager 805 may be an example of aspects of a communications manager 615, a communications manager 715, or a communications manager 910 described herein. The communications manager 805 may include an information component 810, a CRC component 815, an encoding component 820, a mapping component 825, a signal component 830, a feedback component 835, a control component 840, and a demultiplexing component 845. Each of these modules may communicate, directly or indirectly, with one another (e.g., via one or more buses) .

The information component 810 may identify a set of information bits of a code block.

The CRC component 815 may generate one or more cyclic redundancy check bits for the code block using at least a portion of the set of information bits. In some examples, the CRC component 815 may generate the one or more cyclic redundancy check bits using the set of information bits. In some examples, the CRC component 815 may append the one or more cyclic redundancy check bits to the set of information bits. In some examples, the CRC component 815 may select the first set of bits from the set of information bits and the one or more cyclic redundancy check bits. In some examples, the CRC component 815 may select the second set of bits from a remaining portion of bits of the set of information bits and the one or more cyclic redundancy check bits.

In some examples, the CRC component 815 may generate the one or more cyclic redundancy check bits using a first portion of the set of information bits, the first set of bits including the first portion of the set of information bits and the generated one or more cyclic redundancy check bits.

In some examples, the CRC component 815 may generate the one or more cyclic redundancy check bits using a second portion of the set of information bits, the second set of bits including the second portion of the set of information bits and the generated one or more cyclic redundancy check bits.

In some examples, the CRC component 815 may generate a first set of cyclic redundancy check bits using a first portion of the set of information bits, the first set of bits including the first portion of the set of information bits and the first set of cyclic redundancy check bits. In some examples, the CRC component 815 may generate a second set of cyclic redundancy check bits using a second portion of the set of information bits, the second set of bits including the second portion of the set of information bits and the second set of cyclic redundancy check bits.

The encoding component 820 may encode a first set of bits, the first set of bits and a second set of bits together including the set of information bits and the one or more cyclic redundancy check bits. In some examples, the encoding component 820 may refrain from encoding the second set of bits that are mapped to the second set of symbols. In some examples, encoding the first set of bits includes performing a forward error correction coding procedure, a polar coding procedure, a low density parity check coding procedure, a reference signal coding procedure, or a combination thereof.

The mapping component 825 may map the encoded first set of bits to a first set of symbols of a set of symbols and the second set of bits to a second set of symbols of the set of symbols based on the first set of symbols being associated with a lower reliability than the second set of symbols. In some cases, the mapping of the encoded first set of bits and the second set of bits is according to an unequal error protection modulation scheme. In some cases, the unequal error protection modulation scheme is based on a quadrature amplitude modulation scheme, a quadrature phase shift keying scheme, a multi-layered quadrature amplitude modulation scheme, or a combination thereof.

The signal component 830 may transmit a signal including the set of symbols.

The feedback component 835 may receive, in response to the transmitted signal, an acknowledgement feedback message for the code block including one bit indicating that a first cyclic redundancy check has passed for the encoded first set of bits and a second cyclic redundancy check has passed for the second set of bits, or indicating that the first cyclic redundancy check has failed for the encoded first set of bits and the second cyclic redundancy check has failed for the second set of bits.

In some examples, the feedback component 835 may receive, in response to the transmitted signal, an acknowledgement feedback message for the code block including two bits indicating that a first cyclic redundancy check has passed or failed for the encoded first set of bits, and indicating that a second cyclic redundancy check has passed or failed for the second set of bits.

The control component 840 may receive control signaling from a second wireless device that indicates that the transmitting wireless device is to use the unequal error protection scheme for transmissions. In some cases, the received control signaling includes downlink control information, or a MAC control element, or a combination thereof.

The demultiplexing component 845 may demultiplex the set of information bits into a first portion of the set of information bits and a second portion of the set of information bits, where encoding the first set of bits includes encoding the first portion of the set of information bits and refraining from encoding the second portion of the set of information bits.

FIG. 9 shows a diagram of a system 900 including a device 905 that supports feedback design for unequal error protection systems in accordance with aspects of the present disclosure. The device 905 may be an example of or include the components of device 605, device 705, or a device (e.g., a UE, a base station, a receiving device, a transmitting device, or a combination thereof) as described herein. The device 905 may include components for bi-directional voice and data communications including components for transmitting and receiving communications, including a communications manager 910, an I/O controller 915, a transceiver 920, an antenna 925, memory 930, and a processor 940. These components may be in electronic communication via one or more buses (e.g., bus 945) .

The communications manager 910 may identify a set of information bits of a code block, generate one or more cyclic redundancy check bits for the code block using at least a portion of the set of information bits, encode a first set of bits, the first set of bits and a second set of bits together including the set of information bits and the one or more cyclic redundancy check bits, map the encoded first set of bits to a first set of symbols of a set of symbols and the second set of bits to a second set of symbols of the set of symbols based on the first set of symbols being associated with a lower reliability than the second set of symbols, and transmit a signal including the set of symbols.

The I/O controller 915 may manage input and output signals for the device 905. The I/O controller 915 may also manage peripherals not integrated into the device 905. In some cases, the I/O controller 915 may represent a physical connection or port to an external peripheral. In some cases, the I/O controller 915 may utilize an operating system such as

or another known operating system. In other cases, the I/O controller 915 may represent or interact with a modem, a keyboard, a mouse, a touchscreen, or a similar device. In some cases, the I/O controller 915 may be implemented as part of a processor. In some cases, a user may interact with the device 905 via the I/O controller 915 or via hardware components controlled by the I/O controller 915.

The transceiver 920 may communicate bi-directionally, via one or more antennas, wired, or wireless links as described above. For example, the transceiver 920 may represent a wireless transceiver and may communicate bi-directionally with another wireless transceiver. The transceiver 920 may also include a modem to modulate the packets and provide the modulated packets to the antennas for transmission, and to demodulate packets received from the antennas.

In some cases, the wireless device may include a single antenna 925. However, in some cases the device may have more than one antenna 925, which may be capable of concurrently transmitting or receiving multiple wireless transmissions.

The memory 930 may include random-access memory (RAM) and read-only memory (ROM) . The memory 930 may store computer-readable, computer-executable code 935 including instructions that, when executed, cause the processor to perform various functions described herein. In some cases, the memory 930 may contain, among other things, a basic input/output system (BIOS) which may control basic hardware or software operation such as the interaction with peripheral components or devices.

The processor 940 may include an intelligent hardware device, (e.g., a general-purpose processor, a DSP, a CPU, a microcontroller, an ASIC, an FPGA, a programmable logic device, a discrete gate or transistor logic component, a discrete hardware component, or any combination thereof) . In some cases, the processor 940 may be configured to operate a memory array using a memory controller. In other cases, a memory controller may be integrated into the processor 940. The processor 940 may be configured to execute computer-readable instructions stored in a memory (e.g., the memory 930) to cause the device 905 to perform various functions (e.g., functions or tasks supporting feedback design for unequal error protection systems) .

The code 935 may include instructions to implement aspects of the present disclosure, including instructions to support wireless communications. The code 935 may be stored in a non-transitory computer-readable medium such as system memory or other type of memory. In some cases, the code 935 may not be directly executable by the processor 940 but may cause a computer (e.g., when compiled and executed) to perform functions described herein.

FIG. 10 shows a flowchart illustrating a method 1000 that supports feedback design for unequal error protection systems in accordance with aspects of the present disclosure. The operations of method 1000 may be implemented by a device (e.g., a UE, a base station, a receiving device, a transmitting device, or a combination thereof) as described herein or its components as described herein. For example, the operations of method 1000 may be performed by a communications manager as described with reference to FIGs. 6 through 9. In some examples, a device may execute a set of instructions to control the functional elements of the device to perform the functions described below. Additionally or alternatively, a device may perform aspects of the functions described below using special-purpose hardware.

At 1005, the device may identify a set of information bits of a code block. The operations of 1005 may be performed according to the methods described herein. In some examples, aspects of the operations of 1005 may be performed by an information component as described with reference to FIGs. 6 through 9.

At 1010, the device may generate one or more cyclic redundancy check bits for the code block using at least a portion of the set of information bits. The operations of 1010 may be performed according to the methods described herein. In some examples, aspects of the operations of 1010 may be performed by a CRC component as described with reference to FIGs. 6 through 9.

At 1015, the device may encode a first set of bits, the first set of bits and a second set of bits together including the set of information bits and the one or more cyclic redundancy check bits. The operations of 1015 may be performed according to the methods described herein. In some examples, aspects of the operations of 1015 may be performed by an encoding component as described with reference to FIGs. 6 through 9.

At 1020, the device may map the encoded first set of bits to a first set of symbols of a set of symbols and the second set of bits to a second set of symbols of the set of symbols based on the first set of symbols being associated with a lower reliability than the second set of symbols. The operations of 1020 may be performed according to the methods described herein. In some examples, aspects of the operations of 1020 may be performed by a mapping component as described with reference to FIGs. 6 through 9.

At 1025, the device may transmit a signal including the set of symbols. The operations of 1025 may be performed according to the methods described herein. In some examples, aspects of the operations of 1025 may be performed by a signal component as described with reference to FIGs. 6 through 9.

FIG. 11 shows a flowchart illustrating a method 1100 that supports feedback design for unequal error protection systems in accordance with aspects of the present disclosure. The operations of method 1100 may be implemented by a device (e.g., a UE, a base station, a receiving device, a transmitting device, or a combination thereof) or its components as described herein. For example, the operations of method 1100 may be performed by a communications manager as described with reference to FIGs. 6 through 9. In some examples, a device may execute a set of instructions to control the functional elements of the device to perform the functions described below. Additionally or alternatively, a device may perform aspects of the functions described below using special-purpose hardware.

At 1105, the device may identify a set of information bits of a code block. The operations of 1105 may be performed according to the methods described herein. In some examples, aspects of the operations of 1105 may be performed by an information component as described with reference to FIGs. 6 through 9.

At 1110, the device may generate one or more cyclic redundancy check bits for the code block using at least a portion of the set of information bits. The operations of 1110 may be performed according to the methods described herein. In some examples, aspects of the operations of 1110 may be performed by a CRC component as described with reference to FIGs. 6 through 9.

At 1115, the device may encode a first set of bits, the first set of bits and a second set of bits together including the set of information bits and the one or more cyclic redundancy check bits. The operations of 1115 may be performed according to the methods described herein. In some examples, aspects of the operations of 1115 may be performed by an encoding component as described with reference to FIGs. 6 through 9.

At 1120, the device may map the encoded first set of bits to a first set of symbols of a set of symbols and the second set of bits to a second set of symbols of the set of symbols based on the first set of symbols being associated with a lower reliability than the second set of symbols. The operations of 1120 may be performed according to the methods described herein. In some examples, aspects of the operations of 1120 may be performed by a mapping component as described with reference to FIGs. 6 through 9.

At 1125, the device may transmit a signal including the set of symbols. The operations of 1125 may be performed according to the methods described herein. In some examples, aspects of the operations of 1125 may be performed by a signal component as described with reference to FIGs. 6 through 9.

At 1130, the device may receive, in response to the transmitted signal, an acknowledgement feedback message for the code block including one bit indicating that a first cyclic redundancy check has passed for the encoded first set of bits and a second cyclic redundancy check has passed for the second set of bits, or indicating that the first cyclic redundancy check has failed for the encoded first set of bits and the second cyclic redundancy check has failed for the second set of bits. The operations of 1130 may be performed according to the methods described herein. In some examples, aspects of the operations of 1130 may be performed by a feedback component as described with reference to FIGs. 6 through 9.

FIG. 12 shows a flowchart illustrating a method 1200 that supports feedback design for unequal error protection systems in accordance with aspects of the present disclosure. The operations of method 1200 may be implemented by a device (e.g., a UE, a base station, a receiving device, a transmitting device, or a combination thereof) or its components as described herein. For example, the operations of method 1200 may be performed by a communications manager as described with reference to FIGs. 6 through 9. In some examples, a device may execute a set of instructions to control the functional elements of the device to perform the functions described below. Additionally or alternatively, a device may perform aspects of the functions described below using special-purpose hardware.

At 1205, the device may identify a set of information bits of a code block. The operations of 1205 may be performed according to the methods described herein. In some examples, aspects of the operations of 1205 may be performed by an information component as described with reference to FIGs. 6 through 9.

At 1210, the device may generate one or more cyclic redundancy check bits for the code block using at least a portion of the set of information bits. The operations of 1210 may be performed according to the methods described herein. In some examples, aspects of the operations of 1210 may be performed by a CRC component as described with reference to FIGs. 6 through 9.

At 1215, the device may encode a first set of bits, the first set of bits and a second set of bits together including the set of information bits and the one or more cyclic redundancy check bits. The operations of 1215 may be performed according to the methods described herein. In some examples, aspects of the operations of 1215 may be performed by an encoding component as described with reference to FIGs. 6 through 9.

At 1220, the device may map the encoded first set of bits to a first set of symbols of a set of symbols and the second set of bits to a second set of symbols of the set of symbols based on the first set of symbols being associated with a lower reliability than the second set of symbols. The operations of 1220 may be performed according to the methods described herein. In some examples, aspects of the operations of 1220 may be performed by a mapping component as described with reference to FIGs. 6 through 9.

At 1225, the device may transmit a signal including the set of symbols. The operations of 1225 may be performed according to the methods described herein. In some examples, aspects of the operations of 1225 may be performed by a signal component as described with reference to FIGs. 6 through 9.

At 1230, the device may receive, in response to the transmitted signal, an acknowledgement feedback message for the code block including two bits indicating that a first cyclic redundancy check has passed or failed for the encoded first set of bits, and indicating that a second cyclic redundancy check has passed or failed for the second set of bits. The operations of 1230 may be performed according to the methods described herein. In some examples, aspects of the operations of 1230 may be performed by a feedback component as described with reference to FIGs. 6 through 9.

It should be noted that the methods described herein describe possible implementations, and that the operations and the steps may be rearranged or otherwise modified and that other implementations are possible. Further, aspects from two or more of the methods may be combined.

Although aspects of an LTE, LTE-A, LTE-A Pro, or NR system may be described for purposes of example, and LTE, LTE-A, LTE-A Pro, or NR terminology may be used in much of the description, the techniques described herein are applicable beyond LTE, LTE-A, LTE-A Pro, or NR networks. For example, the described techniques may be applicable to various other wireless communications systems such as Ultra Mobile Broadband (UMB) , Institute of Electrical and Electronics Engineers (IEEE) 802.11 (Wi-Fi) , IEEE 802.16 (WiMAX) , IEEE 802.20, Flash-OFDM, as well as other systems and radio technologies not explicitly mentioned herein.

Information and signals described herein may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

The various illustrative blocks and components described in connection with the disclosure herein may be implemented or performed with a general-purpose processor, a DSP, an ASIC, a CPU, an FPGA or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general-purpose processor may be a microprocessor, but in the alternative, the processor may be any processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices (e.g., a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration) .

The functions described herein may be implemented in hardware, software executed by a processor, firmware, or any combination thereof. If implemented in software executed by a processor, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Other examples and implementations are within the scope of the disclosure and appended claims. For example, due to the nature of software, functions described herein may be implemented using software executed by a processor, hardware, firmware, hardwiring, or combinations of any of these. Features implementing functions may also be physically located at various positions, including being distributed such that portions of functions are implemented at different physical locations.

Computer-readable media includes both non-transitory computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A non-transitory storage medium may be any available medium that may be accessed by a general-purpose or special purpose computer. By way of example, and not limitation, non-transitory computer-readable media may include RAM, ROM, electrically erasable programmable ROM (EEPROM) , flash memory, compact disk (CD) ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other non-transitory medium that may be used to carry or store desired program code means in the form of instructions or data structures and that may be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) , or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of computer-readable medium. Disk and disc, as used herein, include CD, laser disc, optical disc, digital versatile disc (DVD) , floppy disk and Blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above are also included within the scope of computer-readable media.

As used herein, including in the claims, “or” as used in a list of items (e.g., a list of items prefaced by a phrase such as “at least one of” or “one or more of” ) indicates an inclusive list such that, for example, a list of at least one of A, B, or C means A or B or C or AB or AC or BC or ABC (i.e., A and B and C) . Also, as used herein, the phrase “based on” shall not be construed as a reference to a closed set of conditions. For example, an example step that is described as “based on condition A” may be based on both a condition A and a condition B without departing from the scope of the present disclosure. In other words, as used herein, the phrase “based on” shall be construed in the same manner as the phrase “based at least in part on. ”

In the appended figures, similar components or features may have the same reference label. Further, various components of the same type may be distinguished by following the reference label by a dash and a second label that distinguishes among the similar components. If just the first reference label is used in the specification, the description is applicable to any one of the similar components having the same first reference label irrespective of the second reference label, or other subsequent reference label.

The description set forth herein, in connection with the appended drawings, describes example configurations and does not represent all the examples that may be implemented or that are within the scope of the claims. The term “example” used herein means “serving as an example, instance, or illustration, ” and not “preferred” or “advantageous over other examples. ” The detailed description includes specific details for the purpose of providing an understanding of the described techniques. These techniques, however, may be practiced without these specific details. In some instances, known structures and devices are shown in block diagram form in order to avoid obscuring the concepts of the described examples.

The description herein is provided to enable a person having ordinary skill in the art to make or use the disclosure. Various modifications to the disclosure will be apparent to a person having ordinary skill in the art, and the generic principles defined herein may be applied to other variations without departing from the scope of the disclosure. Thus, the disclosure is not limited to the examples and designs deerein, but is to be accorded the broadest scope consistent with the principles and novel features disclosed herein.

Claims

A method for wireless communication at a transmitting wireless device, comprising:

identifying a set of information bits of a code block;

generating one or more cyclic redundancy check bits for the code block using at least a portion of the set of information bits;

encoding a first set of bits, the first set of bits and a second set of bits together comprising the set of information bits and the one or more cyclic redundancy check bits;

mapping the encoded first set of bits to a first set of symbols of a plurality of symbols and the second set of bits to a second set of symbols of the plurality of symbols based at least in part on the first set of symbols being associated with a lower reliability than the second set of symbols; and

transmitting a signal comprising the plurality of symbols.
The method of claim 1, further comprising:

refraining from encoding the second set of bits that are mapped to the second set of symbols.
The method of claim 1, further comprising:

receiving, in response to the transmitted signal, an acknowledgement feedback message for the code block comprising one bit indicating that a first cyclic redundancy check has passed for the encoded first set of bits and a second cyclic redundancy check has passed for the second set of bits, or indicating that the first cyclic redundancy check has failed for the encoded first set of bits and the second cyclic redundancy check has failed for the second set of bits.
The method of claim 1, further comprising:

receiving, in response to the transmitted signal, an acknowledgement feedback message for the code block comprising two bits indicating that a first cyclic redundancy check has passed or failed for the encoded first set of bits, and indicating that a second cyclic redundancy check has passed or failed for the second set of bits.
The method of claim 1, wherein generating the one or more cyclic redundancy check bits using at least a portion of the set of information bits comprises:

generating the one or more cyclic redundancy check bits using the set of information bits.
The method of claim 5, further comprising:

appending the one or more cyclic redundancy check bits to the set of information bits;

selecting the first set of bits from the set of information bits and the one or more cyclic redundancy check bits; and

selecting the second set of bits from a remaining portion of bits of the set of information bits and the one or more cyclic redundancy check bits.
The method of claim 1, wherein generating the one or more cyclic redundancy check bits using at least a portion of the set of information bits comprises:

generating the one or more cyclic redundancy check bits using a first portion of the set of information bits, the first set of bits comprising the first portion of the set of information bits and the generated one or more cyclic redundancy check bits.
The method of claim 1, wherein generating the one or more cyclic redundancy check bits using at least a portion of the set of information bits comprises:

generating the one or more cyclic redundancy check bits using a second portion of the set of information bits, the second set of bits comprising the second portion of the set of information bits and the generated one or more cyclic redundancy check bits.
The method of claim 1, wherein generating the one or more cyclic redundancy check bits using at least a portion of the set of information bits comprises:

generating a first set of cyclic redundancy check bits using a first portion of the set of information bits, the first set of bits comprising the first portion of the set of information bits and the first set of cyclic redundancy check bits; and

generating a second set of cyclic redundancy check bits using a second portion of the set of information bits, the second set of bits comprising the second portion of the set of information bits and the second set of cyclic redundancy check bits.
The method of claim 1, wherein:

encoding the first set of bits comprises performing a forward error correction coding procedure, a polar coding procedure, a low density parity check coding procedure, a reference signal coding procedure, or a combination thereof.
The method of claim 1, wherein the mapping of the encoded first set of bits and the second set of bits is according to an unequal error protection modulation scheme.
The method of claim 11, wherein the unequal error protection modulation scheme is based at least in part on a quadrature amplitude modulation scheme, a quadrature phase shift keying scheme, a multi-layered quadrature amplitude modulation scheme, or a combination thereof.
The method of claim 11, further comprising:

receiving control signaling from a second wireless device that indicates that the transmitting wireless device is to use the unequal error protection scheme for transmissions.
The method of claim 13, wherein the received control signaling comprises downlink control information, or a media access control (MAC) control element, or a combination thereof.
The method of claim 1, further comprising:

demultiplexing the set of information bits into a first portion of the set of information bits and a second portion of the set of information bits, wherein encoding the first set of bits comprises encoding the first portion of the set of information bits and refraining from encoding the second portion of the set of information bits.
An apparatus for wireless communication at a transmitting wireless device, comprising:

a processor,

memory coupled with the processor; and

instructions stored in the memory and executable by the processor to cause the apparatus to:

identify a set of information bits of a code block;

generate one or more cyclic redundancy check bits for the code block using at least a portion of the set of information bits;

encode a first set of bits, the first set of bits and a second set of bits together comprising the set of information bits and the one or more cyclic redundancy check bits;

map the encoded first set of bits to a first set of symbols of a plurality of symbols and the second set of bits to a second set of symbols of the plurality of symbols based at least in part on the first set of symbols being associated with a lower reliability than the second set of symbols; and

transmit a signal comprising the plurality of symbols.
The apparatus of claim 16, wherein the instructions are further executable by the processor to cause the apparatus to:

refrain from encoding the second set of bits that are mapped to the second set of symbols.
The apparatus of claim 16, wherein the instructions are further executable by the processor to cause the apparatus to:

receive, in response to the transmitted signal, an acknowledgement feedback message for the code block comprising one bit indicating that a first cyclic redundancy check has passed for the encoded first set of bits and a second cyclic redundancy check has passed for the second set of bits, or indicating that the first cyclic redundancy check has failed for the encoded first set of bits and the second cyclic redundancy check has failed for the second set of bits.
The apparatus of claim 16, wherein the instructions are further executable by the processor to cause the apparatus to:

receive, in response to the transmitted signal, an acknowledgement feedback message for the code block comprising two bits indicating that a first cyclic redundancy check has passed or failed for the encoded first set of bits, and indicating that a second cyclic redundancy check has passed or failed for the second set of bits.
The apparatus of claim 16, wherein the instructions to generate the one or more cyclic redundancy check bits using at least a portion of the set of information bits are executable by the processor to cause the apparatus to:

generate the one or more cyclic redundancy check bits using the set of information bits.
The apparatus of claim 20, wherein the instructions are further executable by the processor to cause the apparatus to:

append the one or more cyclic redundancy check bits to the set of information bits;

select the first set of bits from the set of information bits and the one or more cyclic redundancy check bits; and

select the second set of bits from a remaining portion of bits of the set of information bits and the one or more cyclic redundancy check bits.
The apparatus of claim 16, wherein the instructions to generate the one or more cyclic redundancy check bits using at least a portion of the set of information bits are executable by the processor to cause the apparatus to:

generate the one or more cyclic redundancy check bits using a first portion of the set of information bits, the first set of bits comprising the first portion of the set of information bits and the generated one or more cyclic redundancy check bits.
The apparatus of claim 16, wherein the instructions to generate the one or more cyclic redundancy check bits using at least a portion of the set of information bits are executable by the processor to cause the apparatus to:

generate the one or more cyclic redundancy check bits using a second portion of the set of information bits, the second set of bits comprising the second portion of the set of information bits and the generated one or more cyclic redundancy check bits.
The apparatus of claim 16, wherein the instructions to generate the one or more cyclic redundancy check bits using at least a portion of the set of information bits are executable by the processor to cause the apparatus to:

generate a first set of cyclic redundancy check bits using a first portion of the set of information bits, the first set of bits comprising the first portion of the set of information bits and the first set of cyclic redundancy check bits; and

generate a second set of cyclic redundancy check bits using a second portion of the set of information bits, the second set of bits comprising the second portion of the set of information bits and the second set of cyclic redundancy check bits.
The apparatus of claim 16, wherein the instructions to encode the first set of bits are executable by the processor to cause the apparatus to perform a forward error correction coding procedure, a polar coding procedure, a low density parity check coding procedure, a reference signal coding procedure, or a combination thereof.
The apparatus of claim 16, wherein the mapping of the encoded first set of bits and the second set of bits is according to an unequal error protection modulation scheme.
The apparatus of claim 26, wherein the unequal error protection modulation scheme is based at least in part on a quadrature amplitude modulation scheme, a quadrature phase shift keying scheme, a multi-layered quadrature amplitude modulation scheme, or a combination thereof.
The apparatus of claim 26, wherein the instructions are further executable by the processor to cause the apparatus to:

receive control signaling from a second wireless device that indicates that the transmitting wireless device is to use the unequal error protection scheme for transmissions.
The apparatus of claim 28, wherein the received control signaling comprises downlink control information, or a media access control (MAC) control element, or a combination thereof.
The apparatus of claim 16, wherein the instructions are further executable by the processor to cause the apparatus to:

demultiplex the set of information bits into a first portion of the set of information bits and a second portion of the set of information bits, wherein encoding the first set of bits are executable by the processor to cause the apparatus to encode the first portion of the set of information bits and refraining from encoding the second portion of the set of information bits.
An apparatus for wireless communication at a transmitting wireless device, comprising:

means for identifying a set of information bits of a code block;

means for generating one or more cyclic redundancy check bits for the code block using at least a portion of the set of information bits;

means for encoding a first set of bits, the first set of bits and a second set of bits together comprising the set of information bits and the one or more cyclic redundancy check bits;

means for mapping the encoded first set of bits to a first set of symbols of a plurality of symbols and the second set of bits to a second set of symbols of the plurality of symbols based at least in part on the first set of symbols being associated with a lower reliability than the second set of symbols; and

means for transmitting a signal comprising the plurality of symbols.
The apparatus of claim 31, further comprising:

means for refraining from encoding the second set of bits that are mapped to the second set of symbols.
The apparatus of claim 31, further comprising:

means for receiving, in response to the transmitted signal, an acknowledgement feedback message for the code block comprising one bit indicating that a first cyclic redundancy check has passed for the encoded first set of bits and a second cyclic redundancy check has passed for the second set of bits, or indicating that the first cyclic redundancy check has failed for the encoded first set of bits and the second cyclic redundancy check has failed for the second set of bits.
The apparatus of claim 31, further comprising:

means for receiving, in response to the transmitted signal, an acknowledgement feedback message for the code block comprising two bits indicating that a first cyclic redundancy check has passed or failed for the encoded first set of bits, and indicating that a second cyclic redundancy check has passed or failed for the second set of bits.
The apparatus of claim 31, wherein the means for generating the one or more cyclic redundancy check bits using at least a portion of the set of information bits comprises:

means for generating the one or more cyclic redundancy check bits using the set of information bits.
The apparatus of claim 35, further comprising:

means for appending the one or more cyclic redundancy check bits to the set of information bits;

means for selecting the first set of bits from the set of information bits and the one or more cyclic redundancy check bits; and

means for selecting the second set of bits from a remaining portion of bits of the set of information bits and the one or more cyclic redundancy check bits.
The apparatus of claim 31, wherein the means for generating the one or more cyclic redundancy check bits using at least a portion of the set of information bits comprises:

means for generating the one or more cyclic redundancy check bits using a first portion of the set of information bits, the first set of bits comprising the first portion of the set of information bits and the generated one or more cyclic redundancy check bits.
The apparatus of claim 31, wherein the means for generating the one or more cyclic redundancy check bits using at least a portion of the set of information bits comprises:

means for generating the one or more cyclic redundancy check bits using a second portion of the set of information bits, the second set of bits comprising the second portion of the set of information bits and the generated one or more cyclic redundancy check bits.
The apparatus of claim 31, wherein the means for generating the one or more cyclic redundancy check bits using at least a portion of the set of information bits comprises:

means for generating a first set of cyclic redundancy check bits using a first portion of the set of information bits, the first set of bits comprising the first portion of the set of information bits and the first set of cyclic redundancy check bits; and

means for generating a second set of cyclic redundancy check bits using a second portion of the set of information bits, the second set of bits comprising the second portion of the set of information bits and the second set of cyclic redundancy check bits.
The apparatus of claim 31, wherein the means for encoding the first set of bits comprises means for performing a forward error correction coding procedure, a polar coding procedure, a low density parity check coding procedure, a reference signal coding procedure, or a combination thereof.
The apparatus of claim 31, wherein the mapping of the encoded first set of bits and the second set of bits is according to an unequal error protection modulation scheme.
The apparatus of claim 41, wherein the unequal error protection modulation scheme is based at least in part on a quadrature amplitude modulation scheme, a quadrature phase shift keying scheme, a multi-layered quadrature amplitude modulation scheme, or a combination thereof.
The apparatus of claim 41, further comprising:

means for receiving control signaling from a second wireless device that indicates that the transmitting wireless device is to use the unequal error protection scheme for transmissions.
The apparatus of claim 43, wherein the received control signaling comprises downlink control information, or a media access control (MAC) control element, or a combination thereof.
The apparatus of claim 31, further comprising:

means for demultiplexing the set of information bits into a first portion of the set of information bits and a second portion of the set of information bits, wherein encoding the first set of bits comprises encoding the first portion of the set of information bits and refraining from encoding the second portion of the set of information bits.
A non-transitory computer-readable medium storing code for wireless communication at a transmitting wireless device, the code comprising instructions executable by a processor to:

identify a set of information bits of a code block;

generate one or more cyclic redundancy check bits for the code block using at least a portion of the set of information bits;

encode a first set of bits, the first set of bits and a second set of bits together comprising the set of information bits and the one or more cyclic redundancy check bits;

map the encoded first set of bits to a first set of symbols of a plurality of symbols and the second set of bits to a second set of symbols of the plurality of symbols based at least in part on the first set of symbols being associated with a lower reliability than the second set of symbols; and

transmit a signal comprising the plurality of symbols.
The non-transitory computer-readable medium of claim 46, wherein the instructions are further executable to:

refrain from encoding the second set of bits that are mapped to the second set of symbols.
The non-transitory computer-readable medium of claim 46, wherein the instructions are further executable to:

receive, in response to the transmitted signal, an acknowledgement feedback message for the code block comprising one bit indicating that a first cyclic redundancy check has passed for the encoded first set of bits and a second cyclic redundancy check has passed for the second set of bits, or indicating that the first cyclic redundancy check has failed for the encoded first set of bits and the second cyclic redundancy check has failed for the second set of bits.
The non-transitory computer-readable medium of claim 46, wherein the instructions are further executable to:

receive, in response to the transmitted signal, an acknowledgement feedback message for the code block comprising two bits indicating that a first cyclic redundancy check has passed or failed for the encoded first set of bits, and indicating that a second cyclic redundancy check has passed or failed for the second set of bits.
The non-transitory computer-readable medium of claim 46, wherein the instructions to generate the one or more cyclic redundancy check bits using at least a portion of the set of information bits are executable to:

generate the one or more cyclic redundancy check bits using the set of information bits.
The non-transitory computer-readable medium of claim 50, wherein the instructions are further executable to:

append the one or more cyclic redundancy check bits to the set of information bits;

select the first set of bits from the set of information bits and the one or more cyclic redundancy check bits; and

select the second set of bits from a remaining portion of bits of the set of information bits and the one or more cyclic redundancy check bits.
The non-transitory computer-readable medium of claim 46, wherein the instructions to generate the one or more cyclic redundancy check bits using at least a portion of the set of information bits are executable to:

generate the one or more cyclic redundancy check bits using a first portion of the set of information bits, the first set of bits comprising the first portion of the set of information bits and the generated one or more cyclic redundancy check bits.
The non-transitory computer-readable medium of claim 46, wherein the instructions to generate the one or more cyclic redundancy check bits using at least a portion of the set of information bits are executable to:

generate the one or more cyclic redundancy check bits using a second portion of the set of information bits, the second set of bits comprising the second portion of the set of information bits and the generated one or more cyclic redundancy check bits.
The non-transitory computer-readable medium of claim 46, wherein the instructions to generate the one or more cyclic redundancy check bits using at least a portion of the set of information bits are executable to:

generate a first set of cyclic redundancy check bits using a first portion of the set of information bits, the first set of bits comprising the first portion of the set of information bits and the first set of cyclic redundancy check bits; and

generate a second set of cyclic redundancy check bits using a second portion of the set of information bits, the second set of bits comprising the second portion of the set of information bits and the second set of cyclic redundancy check bits.
The non-transitory computer-readable medium of claim 46, wherein the instructions to encode the first set of bits are executable by the processor to cause the apparatus to perform a forward error correction coding procedure, a polar coding procedure, a low density parity check coding procedure, a reference signal coding procedure, or a combination thereof.
The non-transitory computer-readable medium of claim 46, wherein the mapping of the encoded first set of bits and the second set of bits is according to an unequal error protection modulation scheme.
The non-transitory computer-readable medium of claim 56, wherein the unequal error protection modulation scheme is based at least in part on a quadrature amplitude modulation scheme, a quadrature phase shift keying scheme, a multi-layered quadrature amplitude modulation scheme, or a combination thereof.
The non-transitory computer-readable medium of claim 56, wherein the instructions are further executable to:

receive control signaling from a second wireless device that indicates that the transmitting wireless device is to use the unequal error protection scheme for transmissions.
The non-transitory computer-readable medium of claim 58, wherein the received control signaling comprises downlink control information, or a media access control (MAC) control element, or a combination thereof.
The non-transitory computer-readable medium of claim 46, wherein the instructions are further executable to:

demultiplex the set of information bits into a first portion of the set of information bits and a second portion of the set of information bits, wherein encoding the first set of bits are executable by the processor to cause the apparatus to encode the first portion of the set of information bits and refraining from encoding the second portion of the set of information bits.