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WO2021045379A1 - Dispositif de commande de données pour déterminer un défaut de liaison, et dispositif d'affichage le comprenant - Google Patents

Dispositif de commande de données pour déterminer un défaut de liaison, et dispositif d'affichage le comprenant Download PDF

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Publication number
WO2021045379A1
WO2021045379A1 PCT/KR2020/009468 KR2020009468W WO2021045379A1 WO 2021045379 A1 WO2021045379 A1 WO 2021045379A1 KR 2020009468 W KR2020009468 W KR 2020009468W WO 2021045379 A1 WO2021045379 A1 WO 2021045379A1
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WO
WIPO (PCT)
Prior art keywords
voltage
bonding
level
data
driving device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2020/009468
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English (en)
Korean (ko)
Inventor
전재욱
최기백
김홍석
윤정배
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LX Semicon Co Ltd
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Silicon Works Co Ltd
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Publication of WO2021045379A1 publication Critical patent/WO2021045379A1/fr
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Ceased legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2203/00—Function characteristic
    • G02F2203/69—Arrangements or methods for testing or calibrating a device
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof

Definitions

  • the present invention relates to a data driving apparatus.
  • LCD liquid crystal display device
  • OLED organic light emitting display device
  • the display device includes data lines, gate lines, a display panel including a plurality of pixels connected to the data lines and gate lines, a gate driving device supplying gate signals to the gate lines, and a source signal to the data lines.
  • the data driving device may be mounted on a flexible film using a chip on film (COF) method or a chip on glass (COG) method, and bonded on the pads of the display panel using a tape automated bonding (TAB) method.
  • COF chip on film
  • COG chip on glass
  • TAB tape automated bonding
  • the bonding may be opened or may be shorted with another line.
  • a process of determining whether bonding is defective is essential.
  • An object of the present invention is to provide a data driving device capable of determining a bonding defect between a data driving device and a display panel, and a display device including the same.
  • Another object of the present invention is to provide a data driving apparatus for determining bonding defects capable of determining bonding defects in a data driving apparatus and a display device including the same.
  • another object of the present invention is to provide a data driving device and a display device including the same for determining bonding failure capable of measuring bonding resistance formed by bonding between a data driving device and a display panel.
  • a data driving device for determining bonding failure for achieving the above-described technical problem is to charge a first load capacitor of the first data line by supplying a voltage of a first level to a first data line.
  • a first channel processing unit A second channel processor configured to charge a second load capacitor of the second data line by supplying a second level voltage to a second data line;
  • a channel mux connecting the first channel processing unit to the first data line and connecting the second channel processing unit to the second data line;
  • a control unit for controlling the channel mux and the first switch; And a comparator for comparing the output voltage of the charge sharing line with a reference voltage and outputting a comparison voltage indicating whether bonding between the data driving device and the display panel is defective.
  • a display device for determining bonding failure includes: a first load capacitor connected to a first data line and charged with a voltage of a first level; A second load capacitor connected to the second data line and charged with a voltage of a second level; A charge sharing line connected to the first and second data lines when charging of the first and second load capacitors is completed to share the charges charged in the first and second load capacitors; And a determining unit for determining whether bonding between the data driving device and the display panel is defective by using the output voltage of the charge sharing line.
  • the present invention since it is possible to determine the bonding defect between the data driving device and the display panel, appropriate measures can be taken according to the bonding defect, so that the data voltage is not supplied from the data driving device to the display panel or an overcurrent occurs to the display panel. It has the effect of preventing it from flowing.
  • the data driving device itself can determine the bonding defect, a separate configuration for determining the bonding defect is not required, thus simplifying the manufacturing process and lowering the manufacturing cost. have.
  • the bonding defect can be determined by the data driving device itself, the bonding defect can be determined even before the display device is shipped, and the bonding defect can be determined even after the display device is shipped. There is an effect that immediate action is possible according to bonding defects.
  • the inspector since the bonding resistance can be measured, the inspector does not need to manually measure the bonding resistance each time, so not only the inspection efficiency is increased, but also the accuracy of the inspection is improved because it is performed automatically. .
  • FIG. 1 is a perspective view of a display device to which a data driving device for determining bonding failure according to an embodiment of the present invention is applied.
  • FIG. 2 is a diagram illustrating bonding of a data driving device and a display panel according to an exemplary embodiment of the present invention.
  • FIG. 3 is a timing diagram illustrating a method of determining bonding defects by charging first and second load capacitors by first and second channel processing units according to an embodiment of the present invention.
  • FIG. 4 is a diagram illustrating an example of an output voltage graph of a charge sharing line when the first switch is turned on and charges of the first and second load capacitors are shared.
  • FIG. 5 is a timing diagram illustrating a method of determining bonding defects by charging first and second load capacitors using a second switch and a ground switch according to an embodiment of the present invention.
  • FIG. 6 is a diagram illustrating that a charge sharing line according to another embodiment of the present invention further includes an external capacitor line connected to an external capacitor.
  • FIG. 7 is a flowchart showing a method of determining bonding defects using a data driving device according to an embodiment of the present invention.
  • FIG. 8 is a detailed flowchart illustrating a method of determining whether or not bonding is defective using an output voltage of a charge sharing line by a data driving device.
  • first, second, etc. are used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one component from another component. Accordingly, the first component mentioned below may be a second component within the technical idea of the present invention.
  • the term “at least one” is to be understood as including all possible combinations from one or more related items.
  • the meaning of “at least one of the first item, the second item, and the third item” means 2 among the first item, the second item, and the third item, as well as each of the first item, the second item, and the third item. It may mean a combination of all items that can be presented from more than one.
  • FIG. 1 is a perspective view of a display device to which a data driving device for determining bonding failure according to an embodiment of the present invention is applied.
  • the display device 100 is an organic light emitting display device, but the present invention is not limited thereto. That is, the display device 100 according to an embodiment of the present invention includes not only an organic light emitting display device, but also a liquid crystal display device, a field emission display device, and a quantum dot light emitting display device. Lighting Emitting Diode), and an electrophoresis display device (Electrophoresis Display) may be implemented.
  • a display device 100 determines a display panel 110, a timing control unit 130, a circuit board 140, a flexible film 150, and bonding defects. It includes a data driving device 200 (hereinafter referred to as a'data driving device').
  • a'data driving device' a data driving device 200
  • the display panel 110 includes a first substrate 111 and a second substrate 112.
  • the first substrate 110 may be a plastic film or a glass substrate.
  • the second substrate 112 may be a plastic film, a glass substrate, or an encapsulation film.
  • Gate lines, data lines, and pixels are formed on one surface of the first substrate 111 facing the second substrate 112.
  • the pixels are formed in a region defined by an intersection structure of gate lines and data lines.
  • Each pixel may include a thin film transistor and an organic light emitting device.
  • the organic light-emitting device may include a first electrode, an organic light-emitting layer, and a second electrode.
  • a gate signal is input from a gate line using a thin film transistor, each pixel supplies a predetermined current to the organic light emitting device according to a data voltage applied through the data line. Accordingly, the organic light emitting device of each pixel can emit light with a predetermined brightness according to a predetermined current.
  • the display panel 110 may be divided into a display area in which pixels are formed to display an image and a non-display area in which an image is not displayed. Gate lines, data lines, and pixels may be formed in the display area. Gate pads and data pads may be formed in the non-display area.
  • a gate driving device (not shown) supplies gate signals to the gate lines according to a gate control signal input from the timing controller 130.
  • the gate driving device may be formed on one or both sides of the display panel 110 in a GIP (Gate Driver In Panel) method.
  • the gate driving device may be manufactured as a driving chip and mounted on a flexible film, and may be attached to one or both outer edges of the display panel 110 in a TAB (Tape Automated Bonding) method.
  • the timing controller 130 receives digital video data and a timing signal from an external system board through a cable of the circuit board 140.
  • the timing signal includes a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), a data enable signal (Data Enable, DE), and the like.
  • the timing controller 130 generates a gate control signal for controlling an operation timing of the gate driving apparatus and a data control signal for controlling the data driving apparatus 200 based on the timing signal.
  • the timing controller 170 supplies a gate control signal to the gate driving device and a data control signal to the data driving devices 200.
  • the timing control unit 130 rearranges the digital video data from among the signals received from the receiving unit and the digital video data among the signals received from the external system board to match the display panel 110 and rearranged digital video data.
  • a video data processing unit that generates a video data processor, a control signal generation unit that generates a gate control signal and a data control signal for controlling the gate driving device and the data driving device 200 by using the timing signal received from the receiving unit, and the gate control signal.
  • a transmission unit for outputting to the gate driving device and outputting the rearranged digital video data and data control signal to the data driving device 200.
  • the gate control signal includes a gate clock (CLK), a start signal (VST), a gate output enable signal (GOE), and the like
  • the data control signal includes a source start pulse (SSP) and a source shift clock signal (SSC).
  • SSP source start pulse
  • SSC source shift clock signal
  • SOE source output enable signal
  • the flexible film 150 wirings connecting the pads of the display panel 110 and the data driving device 200, and wirings connecting the pads of the display panel 110 and the wirings of the circuit board 140 are formed. I can.
  • the flexible film 150 may be attached to the pads of the display panel 110 in a TAB (Tape Automated Bonding) method.
  • the flexible film 150 may be attached on the pads using an anisotropic conducting film, whereby the pads and wirings of the flexible film 150 may be connected.
  • the data driving device 200 receives digital video data and a data control signal from the timing control unit 170.
  • the data driving apparatus 200 converts digital video data into analog data voltages according to a data control signal and supplies them to data lines.
  • the data driving device 200 may be mounted on the flexible film 150 in a chip on film (COF) or chip on plastic (COP) method.
  • COF chip on film
  • COP chip on plastic
  • the data driving apparatus 200 may include a shift register unit, a latch unit, a digital-to-analog conversion unit, an output buffer, a channel mux, and the like.
  • the shift register unit outputs a sampling signal using data control signals received from the timing controller 130.
  • the latch unit latches the digital video data sequentially received from the timing controller 130 according to the sampling signal and simultaneously outputs the latched digital video data to the digital-to-analog converter.
  • the digital-to-analog conversion unit converts the digital video data transmitted from the latch unit into a data voltage and outputs it.
  • the output buffer outputs the data voltage transmitted from the digital-to-analog converter to data lines according to the data control signal.
  • the channel mux connects each output buffer terminal and data lines to supply the data voltage output to each output buffer to the data line.
  • the data driving apparatus 200 applies a data voltage to each data line connected to the display panel 110 to display an image on the display panel 110.
  • the data driving apparatus 200 may determine whether the bonding between the data driving apparatus 200 and the display panel 110 is defective.
  • the data driving apparatus 200 may operate in a display mode or a test mode.
  • the display mode refers to a mode in which the data driving device 200 applies a data voltage to each data line connected to the display panel 110 to display an image on the display panel 110, and the test mode determines whether bonding is defective. Means the mode.
  • the display mode or the test mode may be set by the data driving device 200. In another embodiment, the display mode or the test mode may be set by the timing controller 130. In another embodiment, the display mode or the test mode may be set by an external device (not shown).
  • FIG. 2 is a diagram illustrating bonding of a data driving device and a display panel according to an exemplary embodiment of the present invention.
  • the data driving apparatus 200 includes a first channel processing unit 210, a second channel processing unit 220, a channel mux 230 (MUX), a charge sharing line (CSL), a control unit 240, and a comparator ( 250).
  • the data driving device 200 is illustrated as including the first channel processing unit 210 and the second channel processing unit 220, but this is only one embodiment. It may include a channel processing unit or three or more channel processing units.
  • the first channel processing unit 210 charges the first load capacitor C Load1 of the first data line DL1 by supplying a first level voltage to the first data line DL1. Specifically, when the first channel processing unit 210 is connected to the first data line DL1 by the channel mux 230, the first data line DL1 is supplied by supplying a voltage of the first level to the first data line DL1. ) Of the first load capacitor C Load1 is charged with a voltage of the first level. In this case, the voltage of the first level may be a voltage of a level corresponding to the maximum gray level among the plurality of gray levels.
  • the first channel processing unit 210 includes a shift register unit, a latch unit, a digital-to-analog conversion unit, and an output buffer. Since the functions of each component have been described above, detailed descriptions are omitted.
  • the second channel processing unit 220 charges the second load capacitor C Load2 of the second data line DL2 by supplying a second level voltage to the second data line DL2.
  • the second data line DL2 is supplied by supplying a second level voltage to the second data line DL2.
  • the voltage of the second level may be a voltage of a level corresponding to the minimum gray level among the plurality of gray levels.
  • the second channel processing unit 220 includes a shift register unit, a latch unit, a digital-to-analog conversion unit, and an output buffer. Since the functions of each component have been described above, detailed descriptions are omitted.
  • the channel mux 230 (MUX) connects the first channel processing unit 210 to the first data line DL1 and connects the second channel processing unit 220 to the second data line DL2. Accordingly, the first load capacitor C Load1 is charged by the first channel processing unit 230 and the second load capacitor C Load2 is charged by the second channel processing unit 240.
  • the charge sharing line CSL charges charged in the first and second load capacitors C Load1 and C Load2 are shared with each other.
  • the charge sharing line CSL is a first switch S1 that selectively connects the first data line DL1 and the second data line DL2, and the external voltage Vexit of the third level is applied to the first load capacitor.
  • selectively fed to the (C Load1) includes a first load capacitor a second switch (S2), and a charge sharing line grounding switch (S3) for selectively connecting the (CSL) to the ground terminal for charging the (C Load1) .
  • the third level may be a voltage of a corresponding level corresponding to half of the maximum gray scale.
  • the control unit 240 operates the data driving device 200 in a display mode or a test mode.
  • the display mode refers to a mode in which an image is displayed on the display panel 110 by applying a data voltage to each data line connected to the display panel 110
  • the test mode is a data driving device 200 and a display panel 100.
  • the bonding defect means that the bonding between the data driving device 200 and the display panel 100 is open, and the bonding between the data driving device 200 and the display panel 100 is different from a line and a short ( It includes short-circuit defects, which means to be short.
  • the control unit 240 includes a first switch S1 included in a charge sharing line CSL in which charges charged in the channel mux 230 and the first and second load capacitors C Load1 and C Load2 are shared. Controls the 2 switch S2 and the ground switch S3.
  • the control unit 240 turns off the channel mux 230 and turns on the first switch S1 and the ground switch S3, so that the first load capacitor C Load1 and Discharge all the charges charged in the second load capacitor C Load2.
  • the controller 240 turns off the first switch S1 and the ground switch S3 when a predetermined time elapses. Through this, the first load capacitor C Load1 and the second load capacitor C Load1 are initialized.
  • Controller 240 includes a first load capacitor (C Load1) and a second load capacitor when the (C Load2) is initialized, the first load capacitor (C Load1) and a second so that the electric charge to the load capacitor (C Load2) can be filled
  • the channel mux 230 is turned on.
  • Channel multiplexer 230 is supplied to the first load capacitor (C Load1) of the voltage of the first level of the first data line (DL1) by a first channel processing unit 210 as the turn-on the first load capacitor (C Load1 ) is being charged, the two of the second level voltage by a second channel processor 220 2 is supplied to a second load capacitor (C Load2) of the data line (DL2) is a second load capacitor (C Load2) is charged with .
  • the voltage of the first level may be the maximum gray voltage
  • the voltage of the second level may be the minimum gray voltage.
  • the voltage of the second level may be a voltage of the ground level.
  • the control unit 240 turns off the channel mux 230 and turns on the first switch S1 to open the charge sharing line CSL. Through this, the charges charged in the first and second load capacitors C Load1 and C Load2 are shared with each other.
  • a first voltage (V CLoad1) of the load capacitor (C Load1), a first load capacitor (C Load1) as the charge is shared between the second load capacitor (C Load2) is lowered to a voltage (V1) of a constant level,
  • the voltage V CLoad2 of the second load capacitor C Load2 rises to a voltage V1 of a certain level.
  • the output voltage V CSL of the charge sharing line CSL is compared with the reference voltage Vref by the comparator 250 to be output as a comparison voltage Vout.
  • the controller 240 turns off the first switch S1 after a predetermined time has elapsed.
  • the predetermined time may mean a time when the open defect and the short defect are determined by the comparison voltage output by the comparator 250.
  • the comparator 250 outputs a comparison voltage by comparing the output voltage of the charge sharing line CSL with a predetermined reference voltage. Specifically, when the first switch S1 is turned on so that the charges charged in the first load capacitor C Load1 and the second load capacitor C Load2 are shared, the first output at the first point in time.
  • the voltage V CSL is compared with the first reference voltage Vref1 to output a first comparison voltage Vout at a first time point.
  • the first point in time refers to a point in time when the output voltage of the charge sharing line CSL is output as a transient response.
  • the comparator 250 outputs a high-level first comparison voltage indicating open bonding when the first output voltage at the first time point is less than or equal to the first reference voltage Vref1, and outputs the first comparison voltage at the first time point.
  • the first reference voltage may be set as the first output voltage when the bonding resistance has a value that can be determined to be open.
  • the comparator 250 is Is compared with the second reference voltage Vref2 to output a second comparison voltage Vout.
  • the second point in time refers to a point in time when the output voltage of the charge sharing line CSL is output as a Steady State Response.
  • the comparator 250 when the second output voltage at the second point of time is different from the second reference voltage Vref2, the comparator 250 outputs a high level second comparison voltage indicating short bonding, and 2 If the output voltage is the same as the second reference voltage Vref2, a low-level second comparison voltage indicating normal bonding is output.
  • the second reference voltage Vref2 may be set to a level at which the output voltage V CSL of the charge sharing line CSL converges in a steady state response when the short-circuit is normal.
  • FIG. 4 is a diagram illustrating an example of a graph of an output voltage V CSL of a charge sharing line when the first switch S1 is turned on and charges of the first and second load capacitors are shared.
  • the first graph a1 is an output voltage graph that is a reference for normal bonding.
  • the second graph (a2) indicates that the first output voltage at the first time point exceeds the first reference voltage (Vref1), so that the open is normal, and the second output voltage at the second time point is the second reference voltage (Vref2). Because it converges to, it indicates that the short is normal.
  • the third graph (a3) indicates that the short circuit is normal because the second output voltage at the second time point converges to the second reference voltage Vref2, but the first output voltage at the first time point is the first reference voltage Vref1 ) Or less, indicating that it is an open defect.
  • the fourth graph (a4) indicates that the first output voltage at the first time point exceeds the first reference voltage Vref1, so that the open is normal, but the second output voltage at the second time point is the second reference voltage (Vref1). It is different from ), indicating that the short circuit is defective.
  • the display device 100 may further include a determination unit 260 as shown in FIG. 2.
  • the determination unit 260 determines an open fault or a short fault according to the comparison voltage output from the comparator 250.
  • the determination unit 260 is illustrated as having a separate configuration from the data driving device 200, but in another embodiment, the determination unit 260 is implemented in one configuration with the data driving device 200 or is a timing control unit. It may be implemented in one configuration with 130. In another embodiment, the determination unit 260 is not included in the display device 100 and may be implemented as a separate external device.
  • the determination unit 260 may determine an open normal when the first comparison voltage Vout output from the comparator 250 at a first time point is at a low level, and a high level to determine an open failure. I can.
  • the determination unit 260 may determine that the second comparison voltage Vout output from the comparator 250 is at a low level as a short-circuit normal, and if the second comparison voltage Vout is a high level, it may be determined as a short-circuit failure. I can.
  • the determination unit 260 is a bonding resistance value table in which the bonding resistance value between the data driving device 200 and the display panel 110 is mapped for each output voltage when it is determined as normal bonding. It may be determined as a resistance value mapped to the first output voltage at a first point in time, which is a transient response.
  • the bonding resistance value table may be a table in which bonding resistance values according to the slope of the first output voltage are mapped.
  • the bonding resistance value table may be a table in which bonding resistance values according to the level of the first output voltage are mapped.
  • the channel mux 130 may be turned off to cut off the data voltage supplied to the data lines.
  • the first channel processing unit 210 and the second channel processing unit 220 charge the first and second load capacitors C Load1 and C Load2 to determine bonding failure.
  • the bonding defect may be determined by charging the first and second load capacitors C Load1 and C Load2 using the external voltage Vexit.
  • the control unit 240 turns off the channel mux 230 and turns on the first switch S1 and the ground switch S3 to thereby turn on the first load capacitor C Load1 and the second load. Discharge all the charges in the capacitor (C Load2).
  • the controller 240 turns off the first switch S1 and the ground switch S3 when a predetermined time elapses. Through this, the first load capacitor C Load1 and the second load capacitor C Load2 are initialized.
  • the controller 240 supplies a third level external voltage Vexit to the first data line DL1.
  • Turn on S2) to charge the first load capacitor (C Load1 ), and turn on the ground switch (S3) to connect the second data line (DL1) to the ground terminal to discharge the second load capacitor (C Load2).
  • a third level voltage is applied to the first data line DL1 by the external voltage Vexit, so that the first load capacitor C Load1 of the first data line DL1 is charged.
  • the second load capacitor C Load2 of the second data line DL2 is discharged.
  • the voltage of the third level may correspond to a voltage corresponding to half of the maximum gray scale.
  • the control unit 240 turns off the second switch (S2) and the ground switch (S3), and turns on the first switch (S1). Charges charged in the first and second load capacitors C Load1 and C Load2 are shared with each other through the charge sharing line CSL.
  • charge is shared between the first load capacitor (C Load1 ) and the second load capacitor (C Load2 ), so that the voltage (V CLoad1 ) of the first load capacitor (C Load1 ) falls to a predetermined level of the voltage (V2), The voltage V CLoad2 of the second load capacitor C Load2 rises to a voltage V2 of a predetermined level.
  • the output voltage V CSL of the charge sharing line CSL is compared with the reference voltage Vref by the comparator 250 to be output as a comparison voltage Vout.
  • the control unit 240 turns off the first switch S1 after a predetermined time has elapsed.
  • the predetermined time may mean a time when the open defect and the short defect are determined by the comparison voltage output by the comparator 250.
  • the comparator 250 is turned on the first switch S1 so that the charges charged in the first load capacitor C Load1 and the second load capacitor C Load2 are shared in the charge sharing line CSL.
  • the first output voltage at the first point in time is compared with the first reference voltage Vref1 to output the first comparison voltage Vout.
  • the first point in time refers to a point in time when the output voltage of the charge sharing line CSL is output as a transient response.
  • the comparator 250 outputs a high-level first comparison voltage indicating open bonding when the first output voltage at the first time point is less than or equal to the first reference voltage Vref1, and outputs the first comparison voltage at the first time point.
  • the first comparison voltage is output at a low level indicating normal bonding.
  • the first reference voltage may be set as the first output voltage when the bonding resistance has a value that can be determined to be open.
  • the comparator 250 is turned on the first switch S1 so that the charges charged in the first load capacitor C Load1 and the second load capacitor C Load2 are shared in the charge sharing line CSL.
  • the second output voltage at the second point in time is compared with the second reference voltage Vref2 to output a second comparison voltage Vout.
  • the second point in time refers to a point in time when the output voltage of the charge sharing line CSL is output as a Steady State Response.
  • the comparator 250 when the second output voltage is different from the second reference voltage Vref2, the comparator 250 outputs a high level second comparison voltage indicating short bonding, and the second output voltage is the second reference voltage. If it is equal to (Vref2), the second comparison voltage is output at a low level indicating normal bonding.
  • the second reference voltage may be set to a level at which the output voltage V CSL of the charge sharing line CSL converges in the steady state response when the short-circuit is normal.
  • the determination unit 260 may determine an open normal, and a high level may determine an open failure.
  • the determination unit 260 may determine that the short circuit is normal, and if the second comparison voltage Vout is at a high level, it may determine that the short circuit is defective.
  • the determination unit 260 determines the bonding resistance value between the data driving device 200 and the display panel 110 as normal bonding, a bonding resistance value table in which the bonding resistance value is mapped for each output voltage. It may be determined as a resistance value mapped to the first output voltage at a first point in time, which is a transient response.
  • the bonding resistance value table may be a table in which a bonding resistance value according to a slope of the first output voltage is mapped, or a bonding resistance value according to a level of the first output voltage is mapped.
  • the channel mux 130 may be turned off to cut off the data voltage supplied to the data lines.
  • FIG. 3 is a timing diagram illustrating a method of determining bonding defects by charging first and second load capacitors by first and second channel processing units according to an embodiment of the present invention.
  • the control unit 240 sets an operation mode.
  • the operation mode includes a display mode and a test mode.
  • the control unit 240 turns off the channel mux 230 so that all the charges charged in the first load capacitor C Load1 and the second load capacitor C Load2 are discharged, and the first switch S1 and the ground are discharged. Turn on the switch S3. Accordingly, the first load capacitor C Load1 and the second load capacitor C Load2 are discharged. The voltage V CLoad2 of the second load capacitor may appear at a low level.
  • the controller 240 turns off the first switch S1 and the ground switch S3.
  • the control unit 240 turns on the channel mux 230 so that electric charges can be charged in the first load capacitor C Load1 and the second load capacitor C Load2 between chargers. Accordingly, the first level voltage is applied to the first data line DL1 by the first channel processing unit 210 to charge the first load capacitor C Load1 of the first data line DL1. A second level voltage is applied to the second data line DL2 by the second channel processing unit 210 to charge the second load capacitor C Load2 of the second data line DL2.
  • the voltage of the first level when the voltage of the first level is set to the voltage of the level corresponding to the maximum gray scale and the voltage of the second level is set to the voltage of the level corresponding to the minimum gray scale, the voltage of the first load capacitor (V CLoad1 ) May appear as a high level, and the voltage of the second load capacitor (V CLoad2 ) may appear as a low level.
  • the controller 240 is a channel so that the charges charged in the first load capacitor C Load1 and the second load capacitor C Load2 are shared with each other through the charge sharing line CSL.
  • the mux 230 is turned off, and the first switch S1 is turned on.
  • charge is shared between the first load capacitor (C Load1 ) and the second load capacitor (C Load2 ), so that the voltage (V CLoad1 ) of the first load capacitor (C Load1 ) falls to a certain level of the voltage (V1), The voltage V CLoad2 of the second load capacitor C Load2 rises to a voltage V1 of a certain level.
  • the output voltage (V CSL) includes a first load capacitor (C Load1) and bonding resistance level higher than the voltage (V CLoad1) of the first load capacitor (C Load1) by (R Bonding) of the charge sharing line (CSL) It rises to the voltage Va.
  • the comparator 250 compares the output voltage at the first time point with the first reference voltage Vref1 and outputs the first comparison voltage Vout.
  • the first point in time refers to a point in time when the output voltage V CSL of the charge sharing line CSL is output in a transient response.
  • the comparator 250 outputs a low-level first comparison voltage indicating an open normal when the output voltage at the first point in time exceeds the first reference voltage Vref1 in the open defect determination period P1, and If the output voltage is less than or equal to the first reference voltage Vref1, a high-level first comparison voltage indicating an open failure is output.
  • the determination unit 260 determines that the first comparison voltage output by the comparator 250 is output as a low level, and the determination unit 260 determines that the second comparison voltage output by the comparator 250 is high. If it is output as level, it is judged as open defect.
  • the comparator 250 outputs a low-level second comparison voltage indicating an open normal when the output voltage at the second point in time is the same as the second reference voltage Vref2 in the short-circuit failure determination period P2, and When the output voltage is different from the second reference voltage, a second comparison voltage of a high level indicating a short circuit fault is output.
  • the determination unit 260 determines that a short circuit is normal, and the determination unit 260 determines that the second comparison voltage output by the comparator 250 is high. If it is output as level, it is judged as short circuit defect.
  • the determination unit 260 When determining that the bonding is normal, the determination unit 260 outputs the bonding resistance value between the data driving device 200 and the display panel 110 at the first point in time, which is a transient response on a table in which the bonding resistance value is mapped for each output voltage. It can be determined by the resistance value mapped to the voltage.
  • the bonding resistance value table may be a table in which a bonding resistance value according to a slope of an output voltage at a first time point is mapped, or a bonding resistance value according to a level of an output voltage at a first time point is mapped.
  • the channel mux 130 may be turned off to cut off the data voltage supplied to the data lines.
  • the controller 240 turns off the first switch S1.
  • FIG. 5 is a timing diagram illustrating a method of determining bonding defects by charging first and second load capacitors using a second switch and a ground switch according to another embodiment of the present invention.
  • the control unit 240 sets an operation mode.
  • the operation mode includes a display mode and a test mode.
  • the control unit 240 turns off the channel mux 230 so that all the charges charged in the first load capacitor C Load1 and the second load capacitor C Load2 are discharged, and the first switch S1 and ground Turn on the switch S3. Accordingly, the first load capacitor C Load1 and the second load capacitor C Load2 are discharged.
  • the voltage V CLoad2 of the second load capacitor may appear at a low level.
  • the controller 240 turns on the second switch S2 and the ground switch S3 so that electric charges can be charged in the first load capacitor C Load1 and the second load capacitor C Load2 between chargers.
  • the controller 240 When the open defect determination period P1 arrives, the controller 240 provides the charge charged in the first load capacitor C Load1 and the second load capacitor C Load2 to be shared with each other through the charge sharing line CSL. 2
  • the switch S2 and the ground switch S3 are turned off, and the first switch S1 is turned on.
  • charge is shared between the first load capacitor (C Load1 ) and the second load capacitor (C Load2 ), so that the voltage (V CLoad1 ) of the first load capacitor (C Load1 ) falls to a predetermined level of the voltage (V2), The voltage V CLoad2 of the second load capacitor C Load2 rises to a voltage V2 of a certain level.
  • the output voltage (V CSL) includes a first load capacitor (C Load1) and bonding resistance level higher than the voltage (V CLoad1) of the first load capacitor (C Load1) by (R Bonding) of the charge sharing line (CSL) It rises to the voltage (Vb) of.
  • the comparator 250 compares the output voltage V CSL at the first time point with the first reference voltage Vref1 and outputs the first comparison voltage Vout.
  • the first point in time refers to a point in time when the output voltage V CSL of the charge sharing line CSL is output in a transient response.
  • the comparator 250 outputs a low-level first comparison voltage indicating an open normal when the output voltage at the first point in time exceeds the first reference voltage Vref1 in the open defect determination period P1, and If the output voltage is less than or equal to the first reference voltage Vref1, a high-level first comparison voltage indicating an open failure is output.
  • the determination unit 260 determines that the first comparison voltage is open and normal, and the determination unit 260 determines that the first comparison voltage output by the comparator 250 is high. If it is output as level, it is judged as open defect.
  • the comparator 250 outputs a low-level second comparison voltage indicating an open normal when the output voltage at the second point in time is the same as the second reference voltage Vref2 in the short-circuit failure determination period P2, and If the output voltage is different from the second reference voltage Vref2, a high-level second comparison voltage indicating short circuit failure is output.
  • the determination unit 260 determines that a short circuit is normal, and the determination unit 260 determines that the second comparison voltage output by the comparator 250 is high. If it is output as level, it is judged as short circuit failure
  • the determination unit 260 determines the bonding resistance value between the data driving device 200 and the display panel 110 using the output voltage at the first time point.
  • the bonding resistance value by bonding with 110) can be determined.
  • the channel mux 130 may be turned off to cut off the data voltage supplied to the data lines.
  • the controller 240 turns off the first switch S1.
  • the charge sharing line CSL may further include an external capacitor line connected to the external capacitor.
  • an external capacitor line connected to the external capacitor.
  • FIG. 6 is a diagram illustrating that a charge sharing line according to another embodiment of the present invention further includes an external capacitor line connected to an external capacitor.
  • the charge sharing line CSL further includes an external capacitor line CL.
  • the external capacitor line CL is connected to the external capacitor Cexit.
  • the external capacitor Cexit is installed on one side of the display panel 110 and has a value greater than the capacitances of the first load capacitor C Load1 and the second load capacitor C Load2.
  • the external capacitor Cexit shares charges with each other through the first load capacitor C Load1 and the second load capacitor C Load2 and the charge sharing line CSL.
  • the external capacitor line CL according to the present invention is connected to the external capacitor Cexit, and the increase rate of the output voltage of the charge sharing line CSL is reduced by the external capacitor Cexit.
  • the stability of the data driving device operating in the test mode can be enhanced.
  • FIG. 7 is a flowchart showing a method of determining bonding defects using a data driving device according to an embodiment of the present invention.
  • the data driving device grounds the charge sharing line to initialize charges charged in the first load capacitor of the first data line and the second load capacitor of the second data line (S700).
  • the data driving device charges the first load capacitor of the first data line to a voltage of the first level, and the second load capacitor of the second data line is charged with the voltage of the second level. To be charged (S710).
  • the voltage of the first level may be a voltage corresponding to the maximum gradation
  • the voltage of the second level may be a voltage of the ground level as a voltage corresponding to the minimum gradation.
  • the first load capacitor may be charged with a voltage of a third level rather than the voltage of the first level and the second level
  • the second load capacitor may be charged with a voltage of the ground level. That is, the first load capacitor and the second load capacitor may be charged with voltages of different levels.
  • the data driving device shares the charges charged in the first and second load capacitors with each other through a charge sharing line connecting the first and second data lines (S720). .
  • the data driving apparatus determines whether the bonding between the data driving apparatus and the display panel is defective using the output voltage of the charge sharing line (S730).
  • FIG. 8 is a flowchart illustrating a method of determining whether or not bonding is defective by using an output voltage of a charge sharing line by a data driving apparatus according to an embodiment of the present invention.
  • the data driving apparatus determines whether a predetermined first time point has arrived (S800).
  • the first point in time refers to a point in time when the output voltage of the charge sharing line is output as a transient response.
  • the data driving apparatus compares the output voltage at the first time point with the first reference voltage to determine whether an open defect has occurred (S810). When the output voltage at the first point in time exceeds the first reference voltage, the data driving apparatus determines as open normal, and if the output voltage at the first point in time is less than or equal to the first reference voltage, it determines as open failure.
  • the data driving apparatus determines whether a second predetermined point in time has arrived (S820).
  • the second point in time refers to a point in time when the output voltage of the charge sharing line is output as a steady state response.
  • the data driving apparatus compares the output voltage at the second time point with the second reference voltage to determine whether a short circuit is defective (S830). If the output voltage at the second time point is the same as the second reference voltage, the data driving apparatus determines that the short circuit is normal, and if the output voltage at the second time point is different from the second reference voltage, it determines that the short circuit is defective.
  • the bonding resistance value may be determined using the output voltage at the first time point (S740). Specifically, the data driving device determines the bonding resistance value between the data driving device and the display panel as a resistance value mapped to the output voltage at the first point in time, which is a transient response, on the bonding resistance value table in which the bonding resistance value is mapped for each output voltage. I can.
  • the bonding resistance value table may be a table in which a bonding resistance value according to a slope of an output voltage at a first time point is mapped or a bonding resistance value according to a level of an output voltage at a first time point is mapped.
  • the data driving device reports to the user and cuts off the data voltage supplied to the data lines when operating in the display mode.
  • This component is a series of computer-readable or machine-readable media including volatile and nonvolatile memory such as RAM, ROM, flash memory, magnetic or optical disks, optical memory, or other storage media. It can be provided as computer directives.
  • the directives may be provided as software or firmware, and may, in whole or in part, be implemented in a hardware configuration such as ASICs, FPGAs, DSPs, or any other similar device.
  • the directives may be configured to be executed by one or more processors or other hardware configurations, wherein the processor or other hardware configurations perform all or part of the methods and procedures disclosed herein when executing the series of computer directives, or To be able to perform.

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  • Computer Hardware Design (AREA)
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Abstract

La présente invention concerne un dispositif de commande de données qui comprend : une première unité de traitement de canal servant à charger un premier condensateur de charge d'une première ligne de données; une seconde unité de traitement de canal servant à charger un second condensateur de charge d'une seconde ligne de données; un MUX de canal servant à connecter la première unité de traitement de canal à la première ligne de données et à connecter la seconde unité de traitement de canal à la seconde ligne de données; un premier commutateur servant à connecter sélectivement la première ligne de données et la seconde ligne de données; une ligne de partage de charge dans laquelle des charges chargées dans les premier et second condensateurs de charge sont partagées l'une avec l'autre lorsque le premier commutateur est mis en marche; une unité de commande; et un comparateur, qui compare la tension de sortie de la ligne de partage de charge à une tension de référence de façon à délivrer une tension comparative qui indique si la liaison entre le dispositif de commande de données et un panneau d'affichage est défectueuse.
PCT/KR2020/009468 2019-09-02 2020-07-17 Dispositif de commande de données pour déterminer un défaut de liaison, et dispositif d'affichage le comprenant Ceased WO2021045379A1 (fr)

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