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WO2020215249A1 - Chip interconnection device, substrate of integrated bridge structure, and manufacturing method therefor - Google Patents

Chip interconnection device, substrate of integrated bridge structure, and manufacturing method therefor Download PDF

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Publication number
WO2020215249A1
WO2020215249A1 PCT/CN2019/084082 CN2019084082W WO2020215249A1 WO 2020215249 A1 WO2020215249 A1 WO 2020215249A1 CN 2019084082 W CN2019084082 W CN 2019084082W WO 2020215249 A1 WO2020215249 A1 WO 2020215249A1
Authority
WO
WIPO (PCT)
Prior art keywords
chip
solder joint
bump
bridge structure
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2019/084082
Other languages
French (fr)
Chinese (zh)
Inventor
王红超
沈健
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Goodix Technology Co Ltd
Original Assignee
Shenzhen Goodix Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Goodix Technology Co Ltd filed Critical Shenzhen Goodix Technology Co Ltd
Priority to PCT/CN2019/084082 priority Critical patent/WO2020215249A1/en
Priority to CN201980000565.0A priority patent/CN112136212B/en
Publication of WO2020215249A1 publication Critical patent/WO2020215249A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/17Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • H01L2224/1701Structure
    • H01L2224/1703Bump connectors having different sizes, e.g. different diameters, heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81001Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus
    • H01L2224/81005Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias

Definitions

  • This application relates to the field of packaging technology, in particular to a chip interconnection device, a substrate with an integrated bridge structure and a preparation method thereof.
  • the purpose of some embodiments of the present application is to provide a chip interconnection device, a substrate with an integrated bridge structure and a preparation method thereof, so that the electrical interconnection between the chip and the chip is realized while the process flow is simpler and the assembly difficulty is reduced.
  • the embodiment of the application provides a chip interconnection device, including: a first chip, a second chip, a substrate, and a bridge structure; the bridge structure includes an insulating body, a conductive member located in the insulating body, and a first chip located on the surface of the insulating body.
  • a solder joint and a second solder joint the first end of the conductive member is connected with the first solder joint, and the second end is connected with the second solder joint; the first chip is connected with the first solder joint Point connection, the second chip is connected with the second solder joint; both the first chip and the second chip are connected with the substrate.
  • An embodiment of the present application also provides a method for manufacturing a chip interconnection device, including: manufacturing a bridge structure; wherein the bridge structure includes an insulating body, a conductive member located in the insulating body, and a first solder joint located on the surface of the insulating body And a second solder joint, the first end of the conductive member is connected with the first solder joint, and the second end is connected with the second solder joint; the first chip is connected with the first solder joint, The second chip is connected with the second solder joint; both the first chip and the second chip are connected with the substrate to form the chip interconnection device.
  • the embodiment of the present application also provides a substrate integrated with a bridge structure.
  • the bridge structure includes an insulating body, a conductive member located in the insulating body, a first solder joint and a second solder joint located on the surface of the insulating body The first end of the conductive member is connected to the first solder joint, and the second end is connected to the second solder joint, the first solder joint is used for connecting the first chip, and the second solder joint The dots are used for connecting the second chip; the bridge structure is attached to the surface of the substrate.
  • An embodiment of the present application also provides a method for preparing a substrate with an integrated bridge structure, including: making a bridge structure, wherein the bridge structure includes an insulating body, a conductive member located in the insulating body, and The first solder joint and the second solder joint on the surface, the first end of the conductive member is connected with the first solder joint, and the second end is connected with the second solder joint, and the first solder joint is used for The first chip is connected, and the second solder joint is used to connect the second chip; the bridge structure is attached to the substrate.
  • the embodiment of the present application includes: a first chip, a second chip, a substrate, and a bridge structure located outside the substrate.
  • the bridge structure includes an insulating body, a conductive member located in the insulating body, and The first welding spot and the second welding spot on the surface of the main body, the first end of the conductive member is connected with the first welding spot, and the second end is connected with the second welding spot, so that the bridge structure can provide a conductive path.
  • the first solder joint is connected with the first chip, and the second solder joint is connected with the second chip, so that the first chip and the second chip can be electrically connected through the conductive path provided by the bridge structure.
  • Both the first chip and the second chip are connected to the substrate, so that electrical interconnection between the chip and the substrate can be achieved. Since the bridge structure is located outside the substrate and does not need to be implanted inside the substrate, it is beneficial to reduce the difficulty of assembly. While simplifying the process flow, it can also realize the electrical interconnection between the first chip and the second chip.
  • the insulating body is manufactured through a 3D printing process.
  • the insulating body is fabricated by a 3D printing process to obtain a bridge structure containing the insulating body.
  • a 3D printing process to obtain a bridge structure containing the insulating body.
  • the manufacturing process is simpler and has the advantages of small investment and quick start-up.
  • the use of 3D printing can achieve rapid printing and molding of microstructures, and can produce a small-sized insulating body, thereby obtaining a small-sized bridge structure, which is beneficial to adapt to the continuous reduction of chip process scale.
  • the insulating body is fabricated on the surface of the first chip and the second chip by a 3D printing process; wherein, the first solder joints are attached to the pins of the first chip, and the The second solder joints are attached to the pins of the second chip, and the insulating body manufactured in the above manner enables the bridge structure including the insulating body to directly connect the bridge structure to the first chip and the second chip, which is simpler Convenience.
  • the insulating body is made of insulating polymer materials. Insulating polymer material with good insulation performance is beneficial to effectively reduce dielectric loss.
  • the first chip has a first bump and a third bump, and the height of the third bump is smaller than the height of the first bump; the second chip has a second bump and a third bump.
  • the height of the fourth bump is less than the height of the second bump; the heights of the first bump and the second bump are both greater than the height of the bridge structure; the height of the substrate
  • the surface has a first pad and a second pad, the first pad is connected with the first bump, the second pad is connected with the second bump; the third bump is connected with the The first solder joint is connected, and the fourth bump is connected with the second solder joint.
  • a method for realizing the connection between the chip and the bridge structure and the connection between the chip and the substrate that is, the connection between the chip and the substrate and the connection between the chip and the bridge structure are realized through bumps of different height levels.
  • the bridge structure is attached to the surface of the substrate.
  • the bridge structure When the bridge structure is attached to the surface of the substrate, that is, the bridge structure has the substrate as a support, which makes the interconnection between the chips more stable.
  • the bridge structure and the surface of the substrate are separated by a predetermined distance, which provides a way to arrange the bridge structure and the substrate, which makes the embodiments of the present invention flexible and diverse.
  • the bridge structure is located between the first chip and the second chip.
  • the paste and position it is more reasonable for the paste and position to be located between the positions of the two chips, which is conducive to reducing the length of the bridge structure and the length of the conductive element while realizing the chip interconnection, thereby reducing the cost.
  • the conductive element is formed by filling the conductive material in the conductive channel.
  • the conductive element located inside the bridge structure is less susceptible to external interference and has a better conductive effect.
  • the conductive material has fluidity, which is conducive to quickly filling the conductive channel.
  • FIG. 1 is a schematic diagram of a structure of the chip interconnection device in the first embodiment of the present application
  • FIG. 2 is a top view of the chip interconnection device in the first embodiment of the present application.
  • FIG. 3 is a schematic diagram of another structure of the chip interconnection device in the first embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a chip interconnection device in a second embodiment of the present application.
  • FIG. 5 is a flowchart of a method for manufacturing a chip interconnection device according to a third embodiment of the present application.
  • FIG. 6 is a flowchart of the manufacturing process of the bridge structure in the third embodiment of the present application.
  • FIG. 7 is a schematic diagram of the preparation process of the bridge structure in the third embodiment of the present application.
  • FIG. 8 is a flowchart of a method for preparing the chip interconnection device in a scenario according to the third embodiment of the present application.
  • FIG. 9 is a schematic diagram of a manufacturing process of the chip interconnection device in a scenario according to the third embodiment of the present application.
  • FIG. 10 is a flowchart of a method for preparing the chip interconnection device in another scenario according to the third embodiment of the present application.
  • FIG. 11 is a schematic diagram of a manufacturing process of the chip interconnection device in another scenario according to the third embodiment of the present application.
  • FIG. 12 is a flowchart of a method for manufacturing a chip interconnection device according to a fourth embodiment of the present application.
  • FIG. 13 is a schematic diagram of the manufacturing process of the chip interconnection device in the fourth embodiment of the present application.
  • FIG. 14 is a schematic diagram of the structure of the substrate of the integrated bridge structure according to the fifth embodiment of the present application.
  • FIG. 15 is a flowchart of a method for manufacturing a substrate with an integrated bridge structure according to the sixth embodiment of the present application.
  • the first embodiment of the present application relates to a chip interconnection device, including: a first chip, a second chip, a substrate, and a bridge structure located outside the substrate;
  • the bridge structure includes an insulating body, a conductive member located in the insulating body, The first solder joint and the second solder joint located on the surface of the insulating body, the first end of the conductive member is connected with the first solder joint, and the second end is connected with the second solder joint; the first The chip is connected with the first solder joint, and the second chip is connected with the second solder joint; both the first chip and the second chip are connected with the substrate.
  • the cross-sectional view of the chip interconnection device of this embodiment may be as shown in FIG. 1, and the top view may be as shown in FIG. 2, including: a substrate 101, a first chip 102, a second chip 103, and a bridge structure; wherein the bridge structure includes: The insulating body 104, the conductive member 111, the first solder joint 109 and the second solder joint 110.
  • the first chip 102 and the second chip 103 in this embodiment may be any two chips that need to be electrically interconnected.
  • the first chip 102 can be a storage type chip
  • the second chip 103 can be a logic type chip. After the first chip 102 and the second chip 103 are interconnected, the second chip 103 can obtain the data stored in the first chip 102.
  • the two types of chips that need to be interconnected are only storage type chips and logic type chips as examples, but in actual applications, it is not limited to this.
  • the first chip 102 and the second chip 103 may be connected to the substrate 101 respectively, wherein the connection method of the chip and the substrate includes but is not limited to welding, for example, a pressing process may also be used.
  • the substrate can be used as a carrier board for each component.
  • the power interface can be connected to the substrate first, and then the chip can be connected to the corresponding position on the substrate by welding to supply power to the chip.
  • the chip can also communicate with other components through the substrate.
  • the substrate can also provide protection, support, heat dissipation, assembly and other functions for the chip to achieve multi-pin, reduce the size of the packaged product, improve electrical performance and heat dissipation, ultra-high density or multi-chip modularization.
  • the following takes the connection method of the chip and the substrate as welding as an example for specific description:
  • the surface of the substrate 101 has a first pad 105 and a second pad 106, the first chip 102 has a first bump 107 on the surface, and the second chip 103 has a second bump 108 on the surface.
  • FIG. 1 The number of the first pad 105, the second pad 106, the first bump 107 and the second bump 108 is only two as an example, but it is not limited in practical applications.
  • the first pad 105 and the first bump 107 may be connected by a soldering process, so as to achieve electrical conduction between the substrate 101 and the first chip 102.
  • the second pad 106 and the second bump 108 may be connected by a soldering process, so as to achieve electrical conduction between the substrate 101 and the second chip 103.
  • first pad 105 and the second pad 106 may be metal pads, and the first bump 107 and the second bump 108 may both be metal bumps.
  • the height of the first bump 107 and the second bump 108 may be the same, and greater than or equal to the height of the insulating body 104. It should be noted that the height mentioned in this embodiment may all be the substrate 101 For reference.
  • the bridge structure used to connect the first chip 102 and the second chip 103 can be made in advance.
  • the bridge structure includes: an insulating body 104, a conductive member 111 located in the insulating body 104, and a bridge located on the surface of the insulating body 104.
  • the first solder joint 109 and the second solder joint 110, the first end of the conductive member 111 is connected to the first solder joint 109, and the second end is connected to the second solder joint 110, so that the first solder joint 109 and the second solder joint
  • the point 110 can be electrically connected through the conductive member 111.
  • the first chip 102 is connected to the first solder joint 109, and the second chip 103 is connected to the second solder joint 110, so that the first chip 102 passes through the first solder joint 109, the conductive member 111, the second solder joint 110 and the second chip 103 makes an electrical connection.
  • the insulating body 104 may be fabricated and formed in advance through a 3D printing process.
  • modeling can be carried out by 3D printing modeling software, and the specific size and shape of the insulating body 104 to be printed can be set, so that the required insulating body 104 can be obtained after 3D printing.
  • the materials used for 3D printing can be high Molecular insulating materials, for example, can be: polylactic acid (PLA), acrylonitrile-butadiene-styrene copolymer (Acrylonitrile Butadiene Styrene, ABS resin), high impact polystyrene (High Impact Polystyrene, HIPS), nylon, etc.
  • the insulating body 104 is produced by 3D printing using polymer insulating materials, which can effectively reduce the dielectric loss.
  • the insulating body 104 is fabricated by 3D printing, and the bridge structure including the insulating body 104 eliminates the complicated steps of mold opening, photolithography, and etching in the traditional semiconductor process, and has the advantages of small start-up capital and suitable for dedicated or small batch production.
  • the insulating body 104 can also be formed by an injection molding process.
  • the prefabricated bridge structure is located outside the substrate 101, for example, it can be attached to the substrate 101, as shown in FIG. 1.
  • the bridge structure and the substrate 101 may be glued through an adhesive layer, and the glue layer may be DAF (DNA Amplification Fingerprinting) glue.
  • the bonding position of the bridge structure 104 may be located between the first chip 102 and the second chip 103, for example, an intermediate position between the first chip 102 and the second chip 103.
  • the fabricated bridge structure can be attached to the substrate 101 first, and then the first chip 102 and the second chip 103 are respectively soldered on both sides of the bridge structure.
  • the prefabricated bridge structure can be separated from the substrate 101 by a preset distance. As shown in FIG. 3, the preset distance can be set according to actual needs, which is not specifically limited in this embodiment.
  • the conductive member 111 can be formed as follows: in the process of making the insulating body 104, the position of the conductive channel is reserved when modeling by 3D printing software, and the position of the conductive channel is printed with a polymer insulating material in 3D printing. In other locations, multiple printing layers are stacked to form an insulating body 104 with conductive channels.
  • the conductive member 111 is formed by filling a conductive material in the conductive channel, wherein the conductive material may have fluidity, for example, it may be silver paste. Since the conductive channel inside the insulating body 104 is generally a horizontal structure, the fluidity of the conductive material is more conducive to quickly filling the conductive channel.
  • the conductive member 111 may be formed by forming the conductive member 111 on the surface of the insulating body 104 by making a redistribution layer (RDL) process.
  • RDL redistribution layer
  • an insulating layer may be formed for protection, and the insulating layer may be SiO 2 .
  • the method of manufacturing the first solder joint 109 and the second solder joint 110 may be similar to the method of manufacturing the conductive member 111, which is used to form the first solder joint and the second solder joint when modeling through 3D printing software.
  • the two grooves and the conductive channel positions of the two ends of the conductive channel are respectively connected to the two grooves.
  • the polymer insulating material is used to print the positions other than the conductive channel position and the two grooves, and multi-layer printing Stacked to form an insulating body 104 with conductive channels and two grooves.
  • Two grooves corresponding to the first solder joint 109 and the second solder joint 110 may be provided on the surface of the bridge structure 104 and located at both ends of the conductive member 111.
  • the conductive material When the conductive material is filled, the conductive material enters and flows into the conductive channel from any of the above-mentioned solder joint positions, thereby gradually filling the conductive channel and the solder joint positions of the first solder joint 109 and the second solder joint 110, so that the conductive material is filled Then, the first solder joint 109 and the second solder joint 110 are formed, and the first solder joint 109 is connected to the first end of the conductive member 111, and the first solder joint 110 is connected to the second end of the conductive member 111.
  • the heights of the first bump 107 and the second bump 108 may both be greater than the height of the bridge structure 104. It should be noted that the heights mentioned in this embodiment may all be based on the substrate 101.
  • the first chip 102 is connected to the first solder joint 109, and the second chip 103 is connected to the second solder joint 110, so that the electrical conduction between the first chip 102 and the second chip 103 can be implemented as follows:
  • the surface of the first chip 102 also has a third bump 112, the height of the third bump 112 is smaller than the height of the first bump 107; the surface of the second chip 103 also has a fourth bump 113, the height of the fourth bump 113 is smaller than The height of the second bump 108.
  • the height of the third bump 112 and the fourth bump 113 may be the same, making it easier to achieve electrical conduction with the bridge structure.
  • the third bump 112 on the first chip 102 and the first solder joint 109 may be connected by a soldering process, so as to achieve electrical conduction between the first chip 102 and the bridge structure 104; the fourth bump on the second chip 103
  • the block 113 and the second solder joint 110 may be connected by a soldering process, so as to realize electrical conduction between the second chip 102 and the bridge structure.
  • the electrical conduction between the first chip 102 and the second chip 103 is realized through the bridge structure.
  • the height of the first bump 107 and the second bump 108 may be the same as the height of the bridge structure, the first chip 102 is connected to the first solder joint 109, and the second chip 103 is connected to the second solder joint 110
  • the specific implementation manner of connecting to realize electrical conduction between the first chip 102 and the second chip 103 may be as follows:
  • the pins of the first chip 102 are connected to the first solder joint 109 through a soldering process, and the pins of the second chip 103 are connected to the second solder joint 110 through a soldering process.
  • the chip interconnection device in this embodiment includes: a first chip, a second chip, a substrate, and a bridge structure located outside the substrate.
  • the bridge structure includes an insulating body, a conductive member located in the insulating body, and The first solder joint and the second solder joint on the surface of the conductive member are connected with the first solder joint at the first end and the second solder joint at the second end, so that the bridge structure can provide a conductive path.
  • the first solder joint is connected with the first chip, and the second solder joint is connected with the second chip, so that the first chip and the second chip can be electrically connected through the conductive path provided by the bridge structure.
  • Both the first chip and the second chip are connected to the substrate, so that electrical interconnection can be achieved between the chip and the substrate. Since the bridge structure is located outside the substrate and does not need to be implanted inside the substrate, it is beneficial to reduce the difficulty of assembly. While simplifying the process flow, it can also realize the electrical interconnection between the first chip and the second chip.
  • the second embodiment of the present application relates to a chip interconnection device.
  • This embodiment is roughly the same as the first embodiment. The difference is that the chip and the bridge structure are connected by a soldering process in the first embodiment, while the chip in this embodiment The bridge structure is connected by a 3D printing process.
  • the chip interconnection device in this embodiment can be shown in FIG. 4, specifically, the first chip 102 and the second chip 103 can be used as a substrate, and the first chip 102 and the second chip 103 can be directly printed by a 3D printing process.
  • the insulating body 104 is obtained. Before printing, the first chip 102 and the second chip 103 can be temporarily fixed on a carrier.
  • the carrier temporarily carrying the first chip 102 and the second chip 103 can be silicon wafer, glass, etc.
  • the thickness in this embodiment is Take 1mm glass as an example, but in practical applications, it is not limited to this. Then, a part of the insulating body 104 is printed on the surface of the first chip 102 and the second chip 103, and printed in layers during printing.
  • the conductive material is first filled into the solder joint positions and conductive channels.
  • the channel is used to form the first solder joint 109, the second solder joint 110 and the conductive member 111, and after the filled material dries, the remaining part of the insulating body 104 is printed to be closed to form a bridge structure.
  • the first solder joint 109 of the finally obtained bridge structure is attached to the pins of the first chip 101, and the second solder joint is attached to the pins of the second chip 103.
  • the positions of the first solder joints 109 and the second solder joints 110 can be set according to the pin positions of the first chip 101 and the second chip 103 when using the 3D modeling software, so that the printing and filling of conductive After the material, the first solder joint 109 can be attached to the pins of the first chip 101, and the second solder joint can be attached to the pins of the second chip 103, so as to realize the printing connection between the first chip 102 and the bridge structure 104.
  • the two chips 103 are connected to the bridge structure 104 by printing.
  • the insulating body is fabricated on the surface of the first chip and the second chip by a 3D printing process, the first solder joints are attached to the pins of the first chip, and the second solder joints are connected to the The pins of the second chip are attached so that the insulating body made by 3D printing on the surfaces of the first chip and the second chip can directly realize the connection of the bridge structure with the first chip and the second chip after being filled with conductive material. Simple and convenient, further simplifying the process flow.
  • the third embodiment of the present application relates to a method for manufacturing a chip interconnection device.
  • the flowchart of the method for manufacturing a chip interconnection device in this embodiment may be as shown in FIG. 5 and includes:
  • Step 201 Make a bridge structure.
  • the bridge structure includes an insulating body, a conductive member, a first solder joint and a second solder joint.
  • the insulating body with conductive channels and solder joint positions can be produced by 3D printing process or injection molding process, and conductive parts, first solder joints and second solder joints can be obtained after the conductive material is filled in the conductive channels and solder joint positions to complete the bridge structure.
  • the fabricated bridge structure is located outside the substrate, and in specific implementation, it can be attached to the surface of the substrate or separated from the surface of the substrate by a predetermined distance.
  • the insulating body in the bridge structure obtained by 3D printing is taken as an example for specific description.
  • the 3D printing process is also called additive printing technology, and the overall structure is sliced in layers after 3D modeling. After layer-by-layer additive printing is stacked to form the desired structure, as shown in Figure 6, the flow chart of the bridge structure obtained by 3D printing can include:
  • Step 301 Fabricate a lateral groove structure on the surface of the substrate by 3D printing technology.
  • a horizontal groove structure 402 is fabricated on the surface of the substrate 401 by 3D printing technology, and the number of the horizontal groove structure 402 is greater than or equal to one.
  • the width and spacing of the lateral trench structures 402 may be determined by the requirements of the first chip 102 and the second chip 103, for example, the width of each lateral trench structure 402 is 2um, and the mutual spacing is 40um.
  • Step 302 Continue to grow material on the surface of the substrate to form an upward channel 403.
  • the two ends of the upward channel 403 and the lateral groove structure 402 are interconnected.
  • the sum of the lateral trench structure 402 and the upward channel 403 can be regarded as a conductive channel formed in the bridge structure.
  • Step 303 Fabricate a frame 404 with a cushion structure at the end of the upward channel 403.
  • Step 304 Fill the inner channel of the base material with conductive material to form conductive elements and spacers.
  • the conductive channel is filled with a conductive material to form a conductive member.
  • the space position of the spacer structure on the left forms a first spacer after being filled with the conductive material 405, and the space position of the spacer structure on the right forms a second spacer after being filled with the conductive material.
  • the conductive material may have fluidity, for example, the conductive material may be silver paste.
  • the bridge structure can be attached to the substrate.
  • the bridge structure and the substrate may be glued through an adhesive layer, and the glue layer may be DAF (DNA Amplification Fingerprinting) glue.
  • Step 202 Connect the first chip with the first solder joint, and connect the second chip with the second solder joint.
  • the first bump and the third bump can be fabricated on the first chip, and the third bump and the fourth bump can be fabricated on the second chip; wherein the height of the third bump Is smaller than the height of the first bump, and the height of the fourth bump is smaller than the height of the second bump; the heights of the first bump and the second bump are both greater than the height of the bridge structure, and the third bump and the first solder joint Connect, connect the fourth bump with the second solder joint.
  • the pins of the first chip can be directly welded to the first solder joints, and the pins of the second chip can be directly connected to the second solder joints. It should be noted that the height mentioned in this embodiment may all be based on the substrate 101 as a reference.
  • Step 203 Connect the first chip and the second chip to the substrate to form a chip interconnection device.
  • the first pad and the second pad may be fabricated on the substrate; the first pad is welded to the first bump, and the second pad is welded to the second bump.
  • conductive glue may be applied to the first pad and the second pad respectively, and then the first pad and the first bump are pressed and connected by a pressing process, and the second pad and the second pad are pressed and connected. The two bumps are connected by pressing.
  • Scenario 1 The insulating body is fabricated in advance through the 3D printing process, and the bridge structure is obtained after filling the conductive material.
  • the chip interconnection device in which the bridge structure is bonded to the substrate is prepared through the following process.
  • the preparation process can refer to Figure 8, including:
  • Step 501 Fabricate a first spacer block and a second spacer block on a substrate.
  • the base substrate 101 to be packaged there is an area 1 interconnected with the first chip and an area 2 interconnected with the second chip.
  • a first pad 105 for interconnecting with the first chip is fabricated in area 1
  • a second pad 106 for interconnecting with the second chip is fabricated in area 2.
  • the first pad 105 and the second pad are 106 can all be metal spacers.
  • Step 502 bonding the pre-made bridge structure between the area 1 and the area 2.
  • area 1 is the placement position of the first chip
  • area 2 is the placement position of the second chip, that is, the fabricated bridge structure is attached to the first chip and Between the second chip.
  • Step 503 Interconnect the first bump on the first chip with the first pad on the substrate, and interconnect the second bump on the second chip with the second pad on the substrate.
  • the first bump 107 of the first chip 102 and the first pad 105 on the substrate 101 are interconnected by a soldering process, and the second bump 108 on the second chip 103 It is interconnected with the second pad 106 on the substrate 101 through a soldering process.
  • Step 504 Interconnect the third bump on the first chip with the first solder joint of the bridge structure, and interconnect the fourth bump on the second chip with the second solder joint of the bridge structure.
  • the third bump 112 on the first chip 102 and the first solder joint 109 of the bridge structure are interconnected by a soldering process
  • the fourth bump 113 on the second chip 102 The second solder joint 110 of the bridge structure is interconnected by a soldering process.
  • first bump and the third bump on the first chip, the third bump and the fourth bump on the second chip can be fabricated on the chip in advance, and they can be directly used to complete the Interconnection of substrate and bridge structure.
  • steps not described in FIG. 9 may also include the steps of making the solder joint metal required in the soldering process, applying flux, and filling the filler.
  • Scenario 2 The bridge structure is made in advance, and the chip interconnection device with the bridge structure and the substrate separated by a preset distance is prepared through the following process.
  • the preparation process can refer to Figure 10, including:
  • Step 601 Place a carrier for temporarily carrying the first chip and the second chip.
  • the slide 114 may be placed on the operating table, and the slide 114 may be a silicon wafer, glass, or the like.
  • Step 602 Temporarily fix the first chip and the second chip on the carrier.
  • the temporary fixing method can be to apply temporary glue, UV glue or paraffin wax.
  • the temporary glue can be to apply temporary glue, UV glue or paraffin wax.
  • apply temporary glue to the positions of the carrier 114 where the two chips need to be temporarily fixed, and then the first chip 102 and the second chip 103 are respectively placed at the positions coated with temporary glue, so that the first chip 102 and the second chip 103 are temporarily fixed on the carrier.
  • first bump 107 and the third bump 112 on the first chip 102, the second bump 108 and the fourth bump 113 on the second chip can be made on the chip in advance, and the chip with bumps Temporarily fix it on the carrier; you can also make the required bumps after the chip is temporarily fixed on the carrier.
  • Step 603 interconnect the pre-made bridge structure with the first chip and the second chip.
  • the first solder joint 109 of the bridge structure is soldered to the third bump 112 on the first chip 102, and the second solder joint 110 is soldered to the fourth bump on the second chip 103.
  • the block 113 is soldered to realize the electrical interconnection between the bridge structure and the first chip 102 and the second chip 103.
  • Step 604 After turning over the slide, both the first chip and the second chip are connected to the substrate.
  • the carrier chip on which the first chip 102 and the second chip 103 are soldered is turned over, and the bumps on each chip face downward after the turning.
  • the first bump 107 on the first chip 102 is soldered to the first pad 105 on the substrate 101 to realize the electrical interconnection between the first chip 102 and the substrate 101.
  • the second bump 108 on the second chip 103 is soldered to the second pad 106 to realize the electrical interconnection between the second chip 103 and the substrate 101.
  • the first pad 105 and the second pad 106 on the substrate 101 are pads that are pre-made on the substrate 101 and required for welding.
  • Step 605 Remove the slide.
  • the carrier 114 can be removed in a corresponding manner.
  • the slide can be removed by chemical agents or heating; if it is fixed by UV glue, the slide can be removed by irradiating UV light.
  • the manufacturing method of the chip interconnection device in this embodiment includes: fabricating a bridge structure and placing the bridge structure outside the substrate; wherein, the bridge structure includes an insulating body, a conductive member located in the insulating body, and The first solder joint and the second solder joint on the surface of the body, the first end of the conductive member is connected with the first metal solder joint, and the second end is connected with the second metal solder joint, so that the bridge structure can provide conductivity path.
  • the first chip is connected with the first solder joint, and the second chip is connected with the second solder joint; the first chip and the second chip can be electrically connected through the conductive path provided by the bridge structure.
  • Both the first chip and the second chip are connected with the substrate, so that electrical interconnection between the chip and the substrate can be realized.
  • the bridge structure since the bridge structure is located on the surface of the substrate, it does not need to be implanted inside the substrate, which is beneficial to reduce the difficulty of assembly. While simplifying the process flow, it can also achieve the first The electrical interconnection between a chip and a second chip.
  • this embodiment is an example of a preparation method corresponding to the first embodiment, and this embodiment can be implemented in cooperation with the first embodiment.
  • the related technical details mentioned in the first embodiment are still valid in this embodiment, and in order to reduce repetition, they will not be repeated here.
  • the related technical details mentioned in this embodiment can also be applied in the first embodiment.
  • the fourth embodiment of the present application relates to a method for manufacturing a chip interconnection device.
  • This embodiment is roughly the same as the fifth embodiment, except that the chip and the bridge structure are connected through a soldering process in the first embodiment, but in this embodiment In the example, the chip and the bridge structure are connected through a 3D printing process.
  • the flow chart of the manufacturing method of the chip interconnection device in this embodiment may be as shown in FIG. 12, including:
  • Step 701 Place a carrier for temporarily carrying the first chip and the second chip.
  • Step 702 Temporarily fix the first chip and the second chip on the carrier.
  • steps 701 to 702 are substantially the same as steps 601 to 602 in the third embodiment, they will not be repeated here to avoid repetition.
  • Step 703 Fabricate an insulating body by 3D printing on the surfaces of the first chip and the second chip, and form a bridge structure after being filled with conductive material.
  • a part of the insulating body 104 is printed on the surface of the first chip 102 and the second chip 103 through a 3D printing process.
  • the conductive material is first filled in The two grooves and conductive channels form the first solder joint 109, the second solder joint 110 and the conductive member 111.
  • the remaining part of the insulating body 104 is printed to be sealed to form a bridge structure.
  • the first solder joint 109 of the finally obtained bridge structure is attached to the pins (not shown in the figure) of the first chip 102, so as to realize the printing connection between the bridge structure and the first chip 102; the second solder joint 110 of the bridge structure It is attached to the pins of the second chip to realize the printing connection between the bridge structure and the second chip 103.
  • Step 704 Fabricate a first bump on the surface of the first chip and fabricate a second bump on the surface of the second chip.
  • first bumps 107 are formed on the first chip 102
  • second bumps 108 are formed on the second chip 103.
  • the first bump 107 and the second bump 108 can be fabricated separately after the two chips are temporarily fixed on the carrier 114, or they can be fabricated in advance, that is, after the first chip 102 and the The first bump 107 and the second bump 108 are pre-fabricated before the two chips 103 are temporarily fixed on the carrier.
  • the bumps are temporarily fixed on the slide as an example, but the actual application is not limited to this.
  • Step 705 After the slide is turned over, both the first chip and the second chip are connected to the substrate.
  • Step 706 Remove the slide.
  • Step 705 to step 706 are substantially the same as step 604 to step 605 in the third embodiment, and to avoid repetition, they will not be repeated here.
  • the insulating body in the bridge structure is fabricated on the surface of the first chip and the second chip through a 3D printing process, and the first solder joints are attached to the pins of the first chip.
  • the two solder joints are attached to the pins of the second chip, so that the insulating body made by 3D printing on the surface of the first chip and the second chip can directly realize the bridge structure and the first chip and the second chip after being filled with conductive material.
  • the connection is simpler and more convenient, which further simplifies the process flow.
  • this embodiment is an example of a preparation method corresponding to the second embodiment, and this embodiment can be implemented in cooperation with the second embodiment.
  • the related technical details mentioned in the second embodiment are still valid in this embodiment, and in order to reduce repetition, they will not be repeated here.
  • the related technical details mentioned in this embodiment can also be applied in the second embodiment.
  • the fifth embodiment of the present application relates to a substrate with an integrated bridge structure.
  • the bridge structure includes an insulating body 104, a conductive member 111 located in the insulating body 104, and a first solder joint 109 located on the surface of the insulating body 102.
  • the second solder joint 110 the first end of the conductive member 111 is connected to the first solder joint 109, and the second end is connected to the second solder joint 110; wherein the first solder joint 109 is used for connecting the first chip,
  • the two solder joints 110 are used for connecting the second chip; the bridge structure is attached to the surface of the substrate 101.
  • the insulating body can be made by a 3D printing process.
  • the material used in the 3D printing process can be an insulating polymer material.
  • the printed insulating body can have a conductive channel inside, and the conductive member can be filled with conductive material in the conductive channel. form.
  • the conductive material may have fluidity.
  • the substrate 101 can be directly used as a base, the insulating body is obtained by 3D printing on the substrate 101, and then the conductive material is filled to form a bridge structure, so that the bridge structure is attached to the surface of the substrate 101. It is also possible to make a bridge structure in advance, and glue the bridge structure to the substrate 101 through an adhesive layer, so that the bridge structure is attached to the surface of the substrate 101.
  • the substrate of the integrated bridge structure of this embodiment can electrically interconnect the first chip and the second chip, which simplifies the process flow.
  • the sixth embodiment of the present application relates to a method for preparing a substrate with an integrated bridge structure.
  • the flowchart may be as shown in FIG. 15 and includes:
  • Step 801 Make a bridge structure.
  • Step 802 bonding the bridge structure to the substrate to form a substrate of the integrated bridge structure.
  • this embodiment is an example of a preparation method corresponding to the fifth embodiment, and this embodiment can be implemented in cooperation with the fifth embodiment.
  • the related technical details mentioned in the fifth embodiment are still valid in this embodiment, and in order to reduce repetition, they will not be repeated here.
  • the related technical details mentioned in this embodiment can also be applied in the fifth embodiment.

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Abstract

Some embodiments of the present application provide a chip interconnection device and a manufacturing method therefor. The chip interconnection device comprises: a first chip 102, a second chip 103, a substrate 101 and a bridge structure, wherein the bridge structure comprises an insulating body 104, a conductive member 111 located in the insulating body, and a first welding spot 109 and a second welding spot 110 located at a surface of the insulating body; a first end of the conductive member 111 is connected to the first welding spot 109, and a second end is connected to the second welding spot 110; the first chip 102 is connected to the first welding spot 109, and the second chip 103 is connected to the second welding spot 110; and the first chip and the second chip are both connected to the substrate, so that a process flow is simpler while electrical interconnection between the chips is realized, and assembly difficulty is reduced.

Description

芯片互联装置、集成桥结构的基板及其制备方法Chip interconnection device, integrated bridge structure substrate and preparation method thereof 技术领域Technical field

本申请涉及封装技术领域,特别涉及一种芯片互联装置、集成桥结构的基板及其制备方法。This application relates to the field of packaging technology, in particular to a chip interconnection device, a substrate with an integrated bridge structure and a preparation method thereof.

背景技术Background technique

随着半导体技术的演进,半导体集成度越来越高,随之带来的是芯片工艺尺度的持续缩小。对于芯片的集成需要在更小的面积上封装更多的芯片,传统的二维的芯片排布显然已经无法满足需求。为提高芯片封装的密度,提出在第三维方向将芯片进行堆叠,在一个典型的3D封装结构中,芯片和芯片之间需要进行电气连接。With the evolution of semiconductor technology, the integration of semiconductors is getting higher and higher, which brings with it the continuous reduction of chip process scale. For the integration of chips, more chips need to be packaged in a smaller area. The traditional two-dimensional chip arrangement obviously cannot meet the demand. In order to increase the density of chip packaging, it is proposed to stack the chips in the third dimension. In a typical 3D packaging structure, an electrical connection between the chip and the chip is required.

然而,发明人发现,在相关技术中,将芯片与芯片之间进行互联的工艺流程复杂,组装较难。However, the inventor found that in related technologies, the process flow for interconnecting chips is complicated, and assembly is difficult.

发明内容Summary of the invention

本申请部分实施例的目的在于提供一种芯片互联装置、集成桥结构的基板及其制备方法,使得在实现芯片与芯片之间电气互联的同时工艺流程更加简单,降低了组装难度。The purpose of some embodiments of the present application is to provide a chip interconnection device, a substrate with an integrated bridge structure and a preparation method thereof, so that the electrical interconnection between the chip and the chip is realized while the process flow is simpler and the assembly difficulty is reduced.

本申请实施例提供了一种芯片互联装置,包括:第一芯片、第二芯片、 基板和桥结构;所述桥结构包括绝缘本体、位于绝缘本体内的导电件、位于绝缘本体的表面的第一焊点和第二焊点,所述导电件的第一端与所述第一焊点连接,且第二端与所述第二焊点连接;所述第一芯片与所述第一焊点连接,所述第二芯片与所述第二焊点连接;所述第一芯片和所述第二芯片均与所述基板连接。The embodiment of the application provides a chip interconnection device, including: a first chip, a second chip, a substrate, and a bridge structure; the bridge structure includes an insulating body, a conductive member located in the insulating body, and a first chip located on the surface of the insulating body. A solder joint and a second solder joint, the first end of the conductive member is connected with the first solder joint, and the second end is connected with the second solder joint; the first chip is connected with the first solder joint Point connection, the second chip is connected with the second solder joint; both the first chip and the second chip are connected with the substrate.

本申请实施例还提供了一种芯片互联装置的制作方法,包括:制作桥结构;其中,所述桥结构包括绝缘本体、位于绝缘本体内的导电件、位于绝缘本体的表面的第一焊点和第二焊点,所述导电件的第一端与所述第一焊点连接,且第二端与所述第二焊点连接;将第一芯片与所述第一焊点连接,将第二芯片与所述第二焊点连接;将所述第一芯片和所述第二芯片均与所述基板连接,以形成所述芯片互联装置。An embodiment of the present application also provides a method for manufacturing a chip interconnection device, including: manufacturing a bridge structure; wherein the bridge structure includes an insulating body, a conductive member located in the insulating body, and a first solder joint located on the surface of the insulating body And a second solder joint, the first end of the conductive member is connected with the first solder joint, and the second end is connected with the second solder joint; the first chip is connected with the first solder joint, The second chip is connected with the second solder joint; both the first chip and the second chip are connected with the substrate to form the chip interconnection device.

本申请实施例还提供了一种集成桥结构的基板,所述桥结构包括绝缘本体、位于所述绝缘本体内的导电件、位于所述绝缘本体的表面的第一焊点和第二焊点;所述导电件的第一端与所述第一焊点连接,且第二端与所述第二焊点连接,所述第一焊点用于供第一芯片连接,所述第二焊点用于供第二芯片连接;所述桥结构与所述基板的表面贴合。The embodiment of the present application also provides a substrate integrated with a bridge structure. The bridge structure includes an insulating body, a conductive member located in the insulating body, a first solder joint and a second solder joint located on the surface of the insulating body The first end of the conductive member is connected to the first solder joint, and the second end is connected to the second solder joint, the first solder joint is used for connecting the first chip, and the second solder joint The dots are used for connecting the second chip; the bridge structure is attached to the surface of the substrate.

本申请实施例还提供了一种集成桥结构的基板的制备方法,包括:制作桥结构,其中,所述桥结构包括绝缘本体、位于所述绝缘本体内的导电件、位于所述绝缘本体的表面的第一焊点和第二焊点,所述导电件的第一端与所述第一焊点连接,且第二端与所述第二焊点连接,所述第一焊点用于供第一芯片连接,所述第二焊点用于供第二芯片连接;将所述桥结构与所述基板贴合。An embodiment of the present application also provides a method for preparing a substrate with an integrated bridge structure, including: making a bridge structure, wherein the bridge structure includes an insulating body, a conductive member located in the insulating body, and The first solder joint and the second solder joint on the surface, the first end of the conductive member is connected with the first solder joint, and the second end is connected with the second solder joint, and the first solder joint is used for The first chip is connected, and the second solder joint is used to connect the second chip; the bridge structure is attached to the substrate.

本申请实施例相对于现有技术而言,芯片互联装置包括:第一芯片、第 二芯片、基板和位于基板外部的桥结构,桥结构包括绝缘本体、位于绝缘本体内的导电件、位于绝缘本体的表面的第一焊点和第二焊点,导电件的第一端与第一焊点连接,且第二端与第二焊点连接,使得桥结构能够提供导电通路。第一焊点和第一芯片连接,第二焊点和第二芯片连接,使得第一芯片与第二芯片通过桥结构提供的导电通路可以实现电气连接。第一芯片和第二芯片均与基板连接,使得芯片和基板之间能够实现电气互联。由于,桥结构位于基板外部,无需植入基板内部,有利于降低组装难度,在使得工艺流程更加简单的同时,还能很好的实现第一芯片与第二芯片之间的电气互联。Compared with the prior art, the embodiment of the present application includes: a first chip, a second chip, a substrate, and a bridge structure located outside the substrate. The bridge structure includes an insulating body, a conductive member located in the insulating body, and The first welding spot and the second welding spot on the surface of the main body, the first end of the conductive member is connected with the first welding spot, and the second end is connected with the second welding spot, so that the bridge structure can provide a conductive path. The first solder joint is connected with the first chip, and the second solder joint is connected with the second chip, so that the first chip and the second chip can be electrically connected through the conductive path provided by the bridge structure. Both the first chip and the second chip are connected to the substrate, so that electrical interconnection between the chip and the substrate can be achieved. Since the bridge structure is located outside the substrate and does not need to be implanted inside the substrate, it is beneficial to reduce the difficulty of assembly. While simplifying the process flow, it can also realize the electrical interconnection between the first chip and the second chip.

例如,绝缘本体通过3D打印工艺制作而成。通过3D打印工艺制作绝缘本体,从而得到包含绝缘本体的桥结构,相对于相关技术中采用Si材料桥,无需模具和光罩等费用投入,制作工艺更加简单,具有投入小启动快的优点。采用3D打印可以实现微细结构的快速打印成型,能够制作出尺寸微小的绝缘本体,从而得到尺寸微小的桥结构,有利于适应芯片工艺尺度的持续缩小。For example, the insulating body is manufactured through a 3D printing process. The insulating body is fabricated by a 3D printing process to obtain a bridge structure containing the insulating body. Compared with the Si material bridge used in the related technology, it does not require the cost of molds and masks. The manufacturing process is simpler and has the advantages of small investment and quick start-up. The use of 3D printing can achieve rapid printing and molding of microstructures, and can produce a small-sized insulating body, thereby obtaining a small-sized bridge structure, which is beneficial to adapt to the continuous reduction of chip process scale.

例如,所述绝缘本体通过3D打印工艺在所述第一芯片和所述第二芯片表面上制作而成;其中,所述第一焊点与所述第一芯片的引脚贴合,所述第二焊点与所述第二芯片的引脚贴合,通过上述方式制作的绝缘本体,使得包括绝缘本体的桥结构能够直接实现桥结构分别与第一芯片和第二芯片的连接,更加简单方便。For example, the insulating body is fabricated on the surface of the first chip and the second chip by a 3D printing process; wherein, the first solder joints are attached to the pins of the first chip, and the The second solder joints are attached to the pins of the second chip, and the insulating body manufactured in the above manner enables the bridge structure including the insulating body to directly connect the bridge structure to the first chip and the second chip, which is simpler Convenience.

例如,绝缘本体采用绝缘高分子材料制作而成。绝缘高分子材料,绝缘性能好,有利于有效降低介电损耗。For example, the insulating body is made of insulating polymer materials. Insulating polymer material with good insulation performance is beneficial to effectively reduce dielectric loss.

例如,所述第一芯片上具有第一凸块和第三凸块,所述第三凸块的高度小于所述第一凸块的高度;所述第二芯片上具有第二凸块和第四凸块,所述第 四凸块的高度小于所述第二凸块的高度;所述第一凸块与所述第二凸块的高度均大于所述桥结构的高度;所述基板的表面具有第一垫块和第二垫块,所述第一垫块与所述第一凸块连接,所述第二垫块与所述第二凸块连接;所述第三凸块与所述第一焊点连接,所述第四凸块与所述第二焊点连接。提供了一种芯片与桥结构连接、芯片与基板连接的实现方式,即通过不同高度水平的凸块实现芯片与基板的连接以及芯片与桥结构的连接。For example, the first chip has a first bump and a third bump, and the height of the third bump is smaller than the height of the first bump; the second chip has a second bump and a third bump. Four bumps, the height of the fourth bump is less than the height of the second bump; the heights of the first bump and the second bump are both greater than the height of the bridge structure; the height of the substrate The surface has a first pad and a second pad, the first pad is connected with the first bump, the second pad is connected with the second bump; the third bump is connected with the The first solder joint is connected, and the fourth bump is connected with the second solder joint. Provided is a method for realizing the connection between the chip and the bridge structure and the connection between the chip and the substrate, that is, the connection between the chip and the substrate and the connection between the chip and the bridge structure are realized through bumps of different height levels.

例如,桥结构与所述基板的表面贴合。桥结构与基板的表面贴合时,即桥结构有基板可以作为支撑,使得芯片之间的互联更加稳固。For example, the bridge structure is attached to the surface of the substrate. When the bridge structure is attached to the surface of the substrate, that is, the bridge structure has the substrate as a support, which makes the interconnection between the chips more stable.

例如,桥结构与所述基板的表面间隔预设距离,提供了一种桥结构与基板的设置方式,使得本发明实施方式灵活多样。For example, the bridge structure and the surface of the substrate are separated by a predetermined distance, which provides a way to arrange the bridge structure and the substrate, which makes the embodiments of the present invention flexible and diverse.

例如,桥结构位于所述第一芯片和所述第二芯片之间。同时考虑到第一芯片和第二芯片的位置,贴和位置位于两芯片的位置之间更加合理,有利于在实现芯片互联的同时减少桥结构的长度以及导电件的长度,从而减少成本。For example, the bridge structure is located between the first chip and the second chip. At the same time, considering the positions of the first chip and the second chip, it is more reasonable for the paste and position to be located between the positions of the two chips, which is conducive to reducing the length of the bridge structure and the length of the conductive element while realizing the chip interconnection, thereby reducing the cost.

例如,绝缘本体内部具有导电通道,所述导电件通过在所述导电通道内填充导电材料形成,位于桥结构内部的导电件不易受到外界干扰,导电效果更好。For example, there is a conductive channel inside the insulating body, and the conductive element is formed by filling the conductive material in the conductive channel. The conductive element located inside the bridge structure is less susceptible to external interference and has a better conductive effect.

例如,导电材料具有流动性,有利于快速填充满导电通道。For example, the conductive material has fluidity, which is conducive to quickly filling the conductive channel.

附图说明Description of the drawings

一个或多个实施例通过与之对应的附图中的图片进行示例性说明,这些示例性说明并不构成对实施例的限定,附图中具有相同参考数字标号的元件表示为类似的元件,除非有特别申明,附图中的图不构成比例限制。One or more embodiments are exemplified by the pictures in the corresponding drawings. These exemplified descriptions do not constitute a limitation on the embodiments. Elements with the same reference numbers in the drawings are represented as similar elements. Unless otherwise stated, the figures in the attached drawings do not constitute a limitation of scale.

图1是根据本申请第一实施例中的芯片互联装置的一种结构示意图;FIG. 1 is a schematic diagram of a structure of the chip interconnection device in the first embodiment of the present application;

图2是根据本申请第一实施例中的芯片互联装置的俯视图;2 is a top view of the chip interconnection device in the first embodiment of the present application;

图3是根据本申请第一实施例中的芯片互联装置的另一种结构示意图;3 is a schematic diagram of another structure of the chip interconnection device in the first embodiment of the present application;

图4是根据本申请第二实施例中的芯片互联装置的结构示意图;4 is a schematic structural diagram of a chip interconnection device in a second embodiment of the present application;

图5是根据本申请第三实施例中的芯片互联装置的制备方法的流程图;FIG. 5 is a flowchart of a method for manufacturing a chip interconnection device according to a third embodiment of the present application;

图6是根据本申请第三实施例中的桥结构的制备过程的流程图;FIG. 6 is a flowchart of the manufacturing process of the bridge structure in the third embodiment of the present application;

图7是根据本申请第三实施例中的桥结构的制备过程示意图;FIG. 7 is a schematic diagram of the preparation process of the bridge structure in the third embodiment of the present application;

图8是根据本申请第三实施例中的芯片互联装置在一种场景中的制备方法的流程图;FIG. 8 is a flowchart of a method for preparing the chip interconnection device in a scenario according to the third embodiment of the present application;

图9是根据本申请第三实施例中的芯片互联装置在一种场景中的制备过程的示意图;9 is a schematic diagram of a manufacturing process of the chip interconnection device in a scenario according to the third embodiment of the present application;

图10是根据本申请第三实施例中的芯片互联装置在另一种场景中的制备方法的流程图;10 is a flowchart of a method for preparing the chip interconnection device in another scenario according to the third embodiment of the present application;

图11是根据本申请第三实施例中的芯片互联装置在另一种场景中的制备过程的示意图;11 is a schematic diagram of a manufacturing process of the chip interconnection device in another scenario according to the third embodiment of the present application;

图12是根据本申请第四实施例中的芯片互联装置的制备方法的流程图;FIG. 12 is a flowchart of a method for manufacturing a chip interconnection device according to a fourth embodiment of the present application;

图13是根据本申请第四实施例中的芯片互联装置的制备过程的示意图;13 is a schematic diagram of the manufacturing process of the chip interconnection device in the fourth embodiment of the present application;

图14是根据本申请第五实施例中的集成桥结构的基板的结构示意图;14 is a schematic diagram of the structure of the substrate of the integrated bridge structure according to the fifth embodiment of the present application;

图15是根据本申请第六实施例中的集成桥结构的基板的制备方法的流程图。FIG. 15 is a flowchart of a method for manufacturing a substrate with an integrated bridge structure according to the sixth embodiment of the present application.

具体实施方式Detailed ways

为了使本申请的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本申请部分实施例进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本申请,并不用于限定本申请。In order to make the objectives, technical solutions, and advantages of the present application clearer, some embodiments of the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the application, and are not used to limit the application.

本申请第一实施例涉及一种芯片互联装置,包括:第一芯片、第二芯片、基板和位于所述基板外部的桥结构;所述桥结构包括绝缘本体、位于绝缘本体内的导电件、位于绝缘本体的表面的第一焊点和第二焊点,所述导电件的第一端与所述第一焊点连接,且第二端与所述第二焊点连接;所述第一芯片与所述第一焊点连接,所述第二芯片与所述第二焊点连接;所述第一芯片和所述第二芯片均与所述基板连接。下面对本实施例的互联结构的实现细节进行具体的说明,以下内容仅为方便理解提供的实现细节,并非实施本方案的必须。The first embodiment of the present application relates to a chip interconnection device, including: a first chip, a second chip, a substrate, and a bridge structure located outside the substrate; the bridge structure includes an insulating body, a conductive member located in the insulating body, The first solder joint and the second solder joint located on the surface of the insulating body, the first end of the conductive member is connected with the first solder joint, and the second end is connected with the second solder joint; the first The chip is connected with the first solder joint, and the second chip is connected with the second solder joint; both the first chip and the second chip are connected with the substrate. The implementation details of the interconnection structure of this embodiment will be described in detail below. The following content is only provided for ease of understanding and is not necessary for implementing this solution.

本实施例的芯片互联装置的截面图可以如图1所示,俯视图可以如图2所示,包括:基板101、第一芯片102、第二芯片103、和桥结构;其中,桥结构包括:绝缘本体104、导电件111、第一焊点109和第二焊点110。The cross-sectional view of the chip interconnection device of this embodiment may be as shown in FIG. 1, and the top view may be as shown in FIG. 2, including: a substrate 101, a first chip 102, a second chip 103, and a bridge structure; wherein the bridge structure includes: The insulating body 104, the conductive member 111, the first solder joint 109 and the second solder joint 110.

具体的说,本实施例中的第一芯片102和第二芯片103可以为任意两个需要进行电气互联的芯片。比如说,第一芯片102可以为存储类型的芯片,第二芯片103可以为逻辑类型的芯片,第一芯片102和第二芯片103互联后,第二芯片103可以获取第一芯片102中存储的数据,需要说明的是,本实施例中的,两种需要互联的芯片只是以存储类型的芯片和逻辑类型的芯片为例,但在实际应用中,并不以此为限。Specifically, the first chip 102 and the second chip 103 in this embodiment may be any two chips that need to be electrically interconnected. For example, the first chip 102 can be a storage type chip, and the second chip 103 can be a logic type chip. After the first chip 102 and the second chip 103 are interconnected, the second chip 103 can obtain the data stored in the first chip 102. For the data, it should be noted that, in this embodiment, the two types of chips that need to be interconnected are only storage type chips and logic type chips as examples, but in actual applications, it is not limited to this.

本实施例中,可以将第一芯片102和第二芯片103分别与基板101连接,其中,芯片与基板的连接方式包括但不限于焊接,比如还可以通过压合工艺。基板可以作为各个元件的承载板,比如说,电源的接口可以先和基板连接,然 后通过焊接将芯片连接到基板上的对应位置,从而对芯片供电。基板与芯片连接后,该芯片还可以通过基板与其他元件进行数据通信。另外,基板还可以为芯片提供保护、支撑、散热、组装等功效,以实现多引脚化,缩小封装产品体积、改善电性能及散热性、超高密度或多芯片模块化的目的。下面以芯片与基板的连接方式为焊接为例,进行具体说明:In this embodiment, the first chip 102 and the second chip 103 may be connected to the substrate 101 respectively, wherein the connection method of the chip and the substrate includes but is not limited to welding, for example, a pressing process may also be used. The substrate can be used as a carrier board for each component. For example, the power interface can be connected to the substrate first, and then the chip can be connected to the corresponding position on the substrate by welding to supply power to the chip. After the substrate is connected to the chip, the chip can also communicate with other components through the substrate. In addition, the substrate can also provide protection, support, heat dissipation, assembly and other functions for the chip to achieve multi-pin, reduce the size of the packaged product, improve electrical performance and heat dissipation, ultra-high density or multi-chip modularization. The following takes the connection method of the chip and the substrate as welding as an example for specific description:

基板101的表面具有第一垫块105、第二垫块106,第一芯片102表面上具有第一凸块107,第二芯片103表面上具有第二凸块108,需要说明的是,图1中第一垫块105、第二垫块106、第一凸块107和第二凸块108的数量只是以两个为例,但在实际应用中并不以此为限。其中,第一垫块105与第一凸块107可以通过焊接工艺连接,从而实现基板101与第一芯片102的电气导通。第二垫块106与第二凸块108可以通过焊接工艺连接,从而实现基板101与第二芯片103的电气导通。The surface of the substrate 101 has a first pad 105 and a second pad 106, the first chip 102 has a first bump 107 on the surface, and the second chip 103 has a second bump 108 on the surface. It should be noted that FIG. 1 The number of the first pad 105, the second pad 106, the first bump 107 and the second bump 108 is only two as an example, but it is not limited in practical applications. Wherein, the first pad 105 and the first bump 107 may be connected by a soldering process, so as to achieve electrical conduction between the substrate 101 and the first chip 102. The second pad 106 and the second bump 108 may be connected by a soldering process, so as to achieve electrical conduction between the substrate 101 and the second chip 103.

在一个例子中,上述第一垫块105、第二垫块106可以均为金属垫块,上述第一凸块107和第二凸块108可以均为金属凸块。在一个例子中,第一凸块107和第二凸块108的高度可以相同,且大于或等于绝缘本体104的高度,需要说明的是,本实施方式中所提到的高度可以均以基板101为参照物。In an example, the first pad 105 and the second pad 106 may be metal pads, and the first bump 107 and the second bump 108 may both be metal bumps. In an example, the height of the first bump 107 and the second bump 108 may be the same, and greater than or equal to the height of the insulating body 104. It should be noted that the height mentioned in this embodiment may all be the substrate 101 For reference.

本实施例中,用于连接第一芯片102和第二芯片103的桥结构可以预先制作好,桥结构包括:绝缘本体104、位于绝缘本体104内的导电件111、位于绝缘本体104的表面的第一焊点109和第二焊点110,导电件111的第一端与第一焊点109连接,且第二端与第二焊点110连接,以使得第一焊点109与第二焊点110可通过导电件111产生电连接。第一芯片102与第一焊点109连接,第二芯片103与第二焊点110连接,从而使得第一芯片102通过第一焊点109、 导电件111、第二焊点110与第二芯片103产生电连接。In this embodiment, the bridge structure used to connect the first chip 102 and the second chip 103 can be made in advance. The bridge structure includes: an insulating body 104, a conductive member 111 located in the insulating body 104, and a bridge located on the surface of the insulating body 104. The first solder joint 109 and the second solder joint 110, the first end of the conductive member 111 is connected to the first solder joint 109, and the second end is connected to the second solder joint 110, so that the first solder joint 109 and the second solder joint The point 110 can be electrically connected through the conductive member 111. The first chip 102 is connected to the first solder joint 109, and the second chip 103 is connected to the second solder joint 110, so that the first chip 102 passes through the first solder joint 109, the conductive member 111, the second solder joint 110 and the second chip 103 makes an electrical connection.

在一个例子中,绝缘本体104可以预先通过3D打印工艺制作形成。首先,可以通过3D打印的建模软件进行建模,设置要打印出来的绝缘本体104的具体尺寸和形状,使得在完成3D打印后得到需要的绝缘本体104。3D打印所使用的材料可以为高分子绝缘材料,比如说,可以为:聚乳酸(polylactic acid,PLA)、丙烯腈-丁二烯-苯乙烯共聚物(Acrylonitrile Butadiene Styrene,ABS树脂)、耐冲击性聚苯乙烯(High Impact Polystyrene,HIPS)、尼龙等。采用高分子绝缘材料,进行3D打印制作出绝缘本体104,可以有效的降低介电损耗。通过3D打印制作绝缘本体104,制作包括绝缘本体104的桥结构省去了传统半导体工艺的开模、光刻、刻蚀等复杂步骤,具有启动资金小,适用于专用或小批量生产的优点。在另一个例子中,绝缘本体104还可以通过注塑工艺制作形成。In an example, the insulating body 104 may be fabricated and formed in advance through a 3D printing process. First of all, modeling can be carried out by 3D printing modeling software, and the specific size and shape of the insulating body 104 to be printed can be set, so that the required insulating body 104 can be obtained after 3D printing. The materials used for 3D printing can be high Molecular insulating materials, for example, can be: polylactic acid (PLA), acrylonitrile-butadiene-styrene copolymer (Acrylonitrile Butadiene Styrene, ABS resin), high impact polystyrene (High Impact Polystyrene, HIPS), nylon, etc. The insulating body 104 is produced by 3D printing using polymer insulating materials, which can effectively reduce the dielectric loss. The insulating body 104 is fabricated by 3D printing, and the bridge structure including the insulating body 104 eliminates the complicated steps of mold opening, photolithography, and etching in the traditional semiconductor process, and has the advantages of small start-up capital and suitable for dedicated or small batch production. In another example, the insulating body 104 can also be formed by an injection molding process.

在一个例子中,预先制作好的桥结构位于基板101的外部,比如可以与基板101贴合,如图1所示。比如说,桥结构与基板101可以是通过粘合层胶合,该胶合层可以是DAF(DNA Amplification Fingerprinting)胶。桥结构104的贴合位置可以位于第一芯片102与第二芯片103之间,比如说第一芯片102与第二芯片103之间的中间位置。在具体实现中,可以先将制作好的桥结构贴合在基板101上,再将第一芯片102与第二芯片103分别焊接在桥结构的两边。在另一个例子中,预先制作好的桥结构可以与基板101间隔预设距离,如图3所示,预设距离可以根据实际需要进行设置,对此,本实施例不做具体限定。In an example, the prefabricated bridge structure is located outside the substrate 101, for example, it can be attached to the substrate 101, as shown in FIG. 1. For example, the bridge structure and the substrate 101 may be glued through an adhesive layer, and the glue layer may be DAF (DNA Amplification Fingerprinting) glue. The bonding position of the bridge structure 104 may be located between the first chip 102 and the second chip 103, for example, an intermediate position between the first chip 102 and the second chip 103. In a specific implementation, the fabricated bridge structure can be attached to the substrate 101 first, and then the first chip 102 and the second chip 103 are respectively soldered on both sides of the bridge structure. In another example, the prefabricated bridge structure can be separated from the substrate 101 by a preset distance. As shown in FIG. 3, the preset distance can be set according to actual needs, which is not specifically limited in this embodiment.

在一个例子中,导电件111的形成方式可以为:在制作绝缘本体104的过程中,通过3D打印的软件建模时预留导电通道位置,3D打印时利用高分子 绝缘材料打印除导电通道位置以外的位置,多层打印堆叠而形成具有导电通道的绝缘本体104。通过在导电通道内填充导电材料形成导电件111,其中,导电材料可以具有流动性,比如说,可以为银浆。由于,通常绝缘本体104内部的导电通道为横向结构,因此导电材料具有流动性更有利于快速填满导电通道。In an example, the conductive member 111 can be formed as follows: in the process of making the insulating body 104, the position of the conductive channel is reserved when modeling by 3D printing software, and the position of the conductive channel is printed with a polymer insulating material in 3D printing. In other locations, multiple printing layers are stacked to form an insulating body 104 with conductive channels. The conductive member 111 is formed by filling a conductive material in the conductive channel, wherein the conductive material may have fluidity, for example, it may be silver paste. Since the conductive channel inside the insulating body 104 is generally a horizontal structure, the fluidity of the conductive material is more conducive to quickly filling the conductive channel.

在另一个例子中,导电件111的形成方式可以为:在绝缘本体104的表面通过制作重布线层RDL(Redistribution Layer,RDL)工艺形成导电件111。另外,在绝缘本体104的表面形成导电件111后,还可以制作绝缘层进行保护,绝缘层可以为SiO 2In another example, the conductive member 111 may be formed by forming the conductive member 111 on the surface of the insulating body 104 by making a redistribution layer (RDL) process. In addition, after the conductive member 111 is formed on the surface of the insulating body 104, an insulating layer may be formed for protection, and the insulating layer may be SiO 2 .

在一个例子中,第一焊点109和第二焊点110的制作方式可以与导电件111的制作方式类似,通过3D打印的软件建模时制作用于形成第一焊点和第二焊点的两个凹槽和导电通道位置,导电通道的两端分别与两个凹槽联通,3D打印时利用高分子绝缘材料打印除导电通道位置、两个凹槽以外的位置,并通过多层打印堆叠而形成具有导电通道、两个凹槽的绝缘本体104。第一焊点109和第二焊点110对应的两个凹槽可以设置在桥结构104的表面且位于导电件111的两端。在填充导电材料时,导电材料从上述任意一个焊点位置进入并流入导电通道,从而渐渐填满导电通道和第一焊点109和第二焊点110的焊点位置,使得在完成填充导电材料后,形成第一焊点109和第二焊点110,并实现第一焊点109与导电件111的第一端连接,第一焊点110与导电件111的第二端连接。In an example, the method of manufacturing the first solder joint 109 and the second solder joint 110 may be similar to the method of manufacturing the conductive member 111, which is used to form the first solder joint and the second solder joint when modeling through 3D printing software. The two grooves and the conductive channel positions of the two ends of the conductive channel are respectively connected to the two grooves. In 3D printing, the polymer insulating material is used to print the positions other than the conductive channel position and the two grooves, and multi-layer printing Stacked to form an insulating body 104 with conductive channels and two grooves. Two grooves corresponding to the first solder joint 109 and the second solder joint 110 may be provided on the surface of the bridge structure 104 and located at both ends of the conductive member 111. When the conductive material is filled, the conductive material enters and flows into the conductive channel from any of the above-mentioned solder joint positions, thereby gradually filling the conductive channel and the solder joint positions of the first solder joint 109 and the second solder joint 110, so that the conductive material is filled Then, the first solder joint 109 and the second solder joint 110 are formed, and the first solder joint 109 is connected to the first end of the conductive member 111, and the first solder joint 110 is connected to the second end of the conductive member 111.

在一个例子中,第一凸块107与第二凸块108的高度可以均大于桥结构104的高度,需要说明的是,本实施方式中所提到的高度可以均以基板101为参照物。第一芯片102与第一焊点109连接,第二芯片103与第二焊点110连 接,从而实现第一芯片102与第二芯片103的电气导通的具体实现方式可以如下:In an example, the heights of the first bump 107 and the second bump 108 may both be greater than the height of the bridge structure 104. It should be noted that the heights mentioned in this embodiment may all be based on the substrate 101. The first chip 102 is connected to the first solder joint 109, and the second chip 103 is connected to the second solder joint 110, so that the electrical conduction between the first chip 102 and the second chip 103 can be implemented as follows:

第一芯片102表面还具有第三凸块112,第三凸块112的高度小于第一凸块107的高度;第二芯片103表面还具有第四凸块113,第四凸块113的高度小于第二凸块108的高度。第三凸块112和第四凸块113的高度可以相同,使得更容易与桥结构实现电气导通。具体的,第一芯片102上的第三凸块112与第一焊点109可以通过焊接工艺连接,从而实现第一芯片102与桥结构104的电气导通;第二芯片103上的第四凸块113与第二焊点110可以通过焊接工艺连接,从而实现第二芯片102与桥结构的电气导通。最终,实现通过桥结构实现第一芯片102和第二芯片103的电气导通。The surface of the first chip 102 also has a third bump 112, the height of the third bump 112 is smaller than the height of the first bump 107; the surface of the second chip 103 also has a fourth bump 113, the height of the fourth bump 113 is smaller than The height of the second bump 108. The height of the third bump 112 and the fourth bump 113 may be the same, making it easier to achieve electrical conduction with the bridge structure. Specifically, the third bump 112 on the first chip 102 and the first solder joint 109 may be connected by a soldering process, so as to achieve electrical conduction between the first chip 102 and the bridge structure 104; the fourth bump on the second chip 103 The block 113 and the second solder joint 110 may be connected by a soldering process, so as to realize electrical conduction between the second chip 102 and the bridge structure. Finally, the electrical conduction between the first chip 102 and the second chip 103 is realized through the bridge structure.

在另一个例子中,第一凸块107与第二凸块108的高度可以均与桥结构的高度相同,第一芯片102与第一焊点109连接,第二芯片103与第二焊点110连接,从而实现第一芯片102与第二芯片103的电气导通的具体实现方式可以如下:In another example, the height of the first bump 107 and the second bump 108 may be the same as the height of the bridge structure, the first chip 102 is connected to the first solder joint 109, and the second chip 103 is connected to the second solder joint 110 The specific implementation manner of connecting to realize electrical conduction between the first chip 102 and the second chip 103 may be as follows:

第一芯片102的引脚与第一焊点109通过焊接工艺连接,第二芯片103的引脚与第二焊点110通过焊接工艺连接。The pins of the first chip 102 are connected to the first solder joint 109 through a soldering process, and the pins of the second chip 103 are connected to the second solder joint 110 through a soldering process.

本实施例相对于现有技术而言,芯片互联装置包括:第一芯片、第二芯片、基板和位于基板外部的桥结构,桥结构包括绝缘本体、位于绝缘本体内的导电件、位于绝缘本体的表面的第一焊点和第二焊点,导电件的第一端与第一焊点连接,且第二端与第二焊点连接,使得桥结构能够提供导电通路。第一焊点和第一芯片连接,第二焊点和第二芯片连接,使得第一芯片与第二芯片通过桥结构提供的导电通路可以实现电气连接。第一芯片和第二芯片均与基板连接, 使得芯片和基板之间能够实现电气互联。由于,桥结构位于基板外部,无需植入基板内部,有利于降低组装难度,在使得工艺流程更加简单的同时,还能很好的实现第一芯片与第二芯片之间的电气互联。Compared with the prior art, the chip interconnection device in this embodiment includes: a first chip, a second chip, a substrate, and a bridge structure located outside the substrate. The bridge structure includes an insulating body, a conductive member located in the insulating body, and The first solder joint and the second solder joint on the surface of the conductive member are connected with the first solder joint at the first end and the second solder joint at the second end, so that the bridge structure can provide a conductive path. The first solder joint is connected with the first chip, and the second solder joint is connected with the second chip, so that the first chip and the second chip can be electrically connected through the conductive path provided by the bridge structure. Both the first chip and the second chip are connected to the substrate, so that electrical interconnection can be achieved between the chip and the substrate. Since the bridge structure is located outside the substrate and does not need to be implanted inside the substrate, it is beneficial to reduce the difficulty of assembly. While simplifying the process flow, it can also realize the electrical interconnection between the first chip and the second chip.

本申请第二实施例涉及一种芯片互联装置,本实施例与第一实施例大致相同,不同之处在于,第一实施例中芯片与桥结构通过焊接工艺连接,而在本实施例中芯片与桥结构通过3D打印工艺连接。The second embodiment of the present application relates to a chip interconnection device. This embodiment is roughly the same as the first embodiment. The difference is that the chip and the bridge structure are connected by a soldering process in the first embodiment, while the chip in this embodiment The bridge structure is connected by a 3D printing process.

本实施例中的芯片互联装置可以如图4所示,具体的说,可以以第一芯片102和第二芯片103为基底,直接在第一芯片102和第二芯片103上通过3D打印工艺打印得到绝缘本体104。打印前,可以先将第一芯片102和第二芯片103临时固定在一个载片上,临时承载第一芯片102和第二芯片103的载片可以是硅片,玻璃等,本实施例以厚度为1mm的玻璃为例,但在实际应用中,并不以此为限。然后,在第一芯片102和第二芯片103表面上先打印绝缘本体104的一部分,在打印时分层打印,打印完焊点位置和导电通道后,先将导电材料填充进焊点位置和导电通道以形成第一焊点109、第二焊点110和导电件111,等到填充的材料干了以后继续打印绝缘本体104剩余的一部分以封闭起来形成桥结构。最终得到的桥结构的第一焊点109与第一芯片101的引脚贴合,第二焊点与第二芯片103的引脚贴合。在实际应用中,可以在通过3D建模软件时,根据第一芯片101和第二芯片103的引脚位置分别设置第一焊点109和第二焊点110的位置,使得完成打印和填充导电材料后,第一焊点109可以与第一芯片101的引脚贴合,第二焊点可以与第二芯片103的引脚贴合,从而实现第一芯片102与桥结构104打印连接,第二芯片103与桥结构104打印连接。The chip interconnection device in this embodiment can be shown in FIG. 4, specifically, the first chip 102 and the second chip 103 can be used as a substrate, and the first chip 102 and the second chip 103 can be directly printed by a 3D printing process. The insulating body 104 is obtained. Before printing, the first chip 102 and the second chip 103 can be temporarily fixed on a carrier. The carrier temporarily carrying the first chip 102 and the second chip 103 can be silicon wafer, glass, etc. The thickness in this embodiment is Take 1mm glass as an example, but in practical applications, it is not limited to this. Then, a part of the insulating body 104 is printed on the surface of the first chip 102 and the second chip 103, and printed in layers during printing. After the solder joint positions and conductive channels are printed, the conductive material is first filled into the solder joint positions and conductive channels. The channel is used to form the first solder joint 109, the second solder joint 110 and the conductive member 111, and after the filled material dries, the remaining part of the insulating body 104 is printed to be closed to form a bridge structure. The first solder joint 109 of the finally obtained bridge structure is attached to the pins of the first chip 101, and the second solder joint is attached to the pins of the second chip 103. In practical applications, the positions of the first solder joints 109 and the second solder joints 110 can be set according to the pin positions of the first chip 101 and the second chip 103 when using the 3D modeling software, so that the printing and filling of conductive After the material, the first solder joint 109 can be attached to the pins of the first chip 101, and the second solder joint can be attached to the pins of the second chip 103, so as to realize the printing connection between the first chip 102 and the bridge structure 104. The two chips 103 are connected to the bridge structure 104 by printing.

本实施例相对于现有技术而言,绝缘本体通过3D打印工艺在第一芯片和 第二芯片表面上制作而成,第一焊点与第一芯片的引脚贴合,第二焊点与第二芯片的引脚贴合,使得在第一芯片和第二芯片表面通过3D打印制作完成的绝缘本体在填充导电材料后能够直接实现桥结构分别与第一芯片和第二芯片的连接,更加简单方便,进一步简化了工艺流程。Compared with the prior art, in this embodiment, the insulating body is fabricated on the surface of the first chip and the second chip by a 3D printing process, the first solder joints are attached to the pins of the first chip, and the second solder joints are connected to the The pins of the second chip are attached so that the insulating body made by 3D printing on the surfaces of the first chip and the second chip can directly realize the connection of the bridge structure with the first chip and the second chip after being filled with conductive material. Simple and convenient, further simplifying the process flow.

本申请第三实施例涉及一种芯片互联装置的制备方法,本实施例中芯片互联装置的制备方法的流程图可以如图5所示,包括:The third embodiment of the present application relates to a method for manufacturing a chip interconnection device. The flowchart of the method for manufacturing a chip interconnection device in this embodiment may be as shown in FIG. 5 and includes:

步骤201:制作桥结构。Step 201: Make a bridge structure.

具体的说,桥结构包括绝缘本体、导电件、第一焊点和第二焊点。可以通过3D打印工艺或是注塑成型工艺制作具有导电通道、焊点位置的绝缘本体,在导电通道和焊点位置填充导电材料后得到导电件、第一焊点和第二焊点从而制作完成桥结构。制作好的桥结构位于基板外部,具体实现中可以为与基板表面贴合,或与基板表面间隔预设距离。Specifically, the bridge structure includes an insulating body, a conductive member, a first solder joint and a second solder joint. The insulating body with conductive channels and solder joint positions can be produced by 3D printing process or injection molding process, and conductive parts, first solder joints and second solder joints can be obtained after the conductive material is filled in the conductive channels and solder joint positions to complete the bridge structure. The fabricated bridge structure is located outside the substrate, and in specific implementation, it can be attached to the surface of the substrate or separated from the surface of the substrate by a predetermined distance.

本实施例以通过3D打印得到桥结构中的绝缘本体为例进行具体说明,3D打印工艺又叫增材打印技术,通过3D建模后将整体结构分层切片后。逐层进行增材打印堆叠后形成所需结构,如图6所示,3D打印得到的桥结构的流程图可以包括:In this embodiment, the insulating body in the bridge structure obtained by 3D printing is taken as an example for specific description. The 3D printing process is also called additive printing technology, and the overall structure is sliced in layers after 3D modeling. After layer-by-layer additive printing is stacked to form the desired structure, as shown in Figure 6, the flow chart of the bridge structure obtained by 3D printing can include:

步骤301:通过3D打印技术在基底表面制作横向沟槽结构。Step 301: Fabricate a lateral groove structure on the surface of the substrate by 3D printing technology.

具体的说,可以参考图7中的S301,通过3D打印技术在基底401表面制作一个横向沟槽结构402,该横向沟槽结构402的数量大于或等于一条。横向沟槽结构402的宽度和间隔可以由第一芯片102和第二芯片103的需求而定,例如各横向沟槽结构402宽度是2um,互相间隔是40um。Specifically, referring to S301 in FIG. 7, a horizontal groove structure 402 is fabricated on the surface of the substrate 401 by 3D printing technology, and the number of the horizontal groove structure 402 is greater than or equal to one. The width and spacing of the lateral trench structures 402 may be determined by the requirements of the first chip 102 and the second chip 103, for example, the width of each lateral trench structure 402 is 2um, and the mutual spacing is 40um.

步骤302:在基底表面继续生长材料形成向上的通道403。Step 302: Continue to grow material on the surface of the substrate to form an upward channel 403.

具体的说,可以参考图7中的S302,向上的通道403和横向沟槽结构402的两端互联。该横向沟槽结构402和向上的通道403加起来可以视为在桥结构中形成的导电通道。Specifically, referring to S302 in FIG. 7, the two ends of the upward channel 403 and the lateral groove structure 402 are interconnected. The sum of the lateral trench structure 402 and the upward channel 403 can be regarded as a conductive channel formed in the bridge structure.

步骤303:在向上的通道403的末端制作垫块结构的框架404。Step 303: Fabricate a frame 404 with a cushion structure at the end of the upward channel 403.

具体的说,可以参考图7中的S303,制作垫块结构的框架404可以为两个,即图中左右各一个。Specifically, referring to S303 in FIG. 7, there may be two frames 404 for making the cushion structure, that is, one on each side in the figure.

步骤304,在基底材料内部通道填充导电材料形成导电件和垫块。Step 304: Fill the inner channel of the base material with conductive material to form conductive elements and spacers.

具体的说,可以参考图7中的S304,导电通道填充导电材料后形成导电件。左边的垫块结构的空间位置在填充导电材料405后形成第一垫块,右边的垫块结构的空间位置在填充导电材料后形成第二垫块。导电材料可以具有流动性,比如说导电材料可以为银浆。Specifically, referring to S304 in FIG. 7, the conductive channel is filled with a conductive material to form a conductive member. The space position of the spacer structure on the left forms a first spacer after being filled with the conductive material 405, and the space position of the spacer structure on the right forms a second spacer after being filled with the conductive material. The conductive material may have fluidity, for example, the conductive material may be silver paste.

进一步的,在制作完桥结构后,可以将桥结构贴合在基板上。比如说,桥结构与基板可以是通过粘合层胶合,该胶合层可以是DAF(DNA Amplification Fingerprinting)胶。Further, after fabricating the bridge structure, the bridge structure can be attached to the substrate. For example, the bridge structure and the substrate may be glued through an adhesive layer, and the glue layer may be DAF (DNA Amplification Fingerprinting) glue.

步骤202:将第一芯片与第一焊点连接,将第二芯片与第二焊点连接。Step 202: Connect the first chip with the first solder joint, and connect the second chip with the second solder joint.

具体的说,在一个例子中,可以在第一芯片上制作第一凸块和第三凸块,在第二芯片上制作第三凸块和第四凸块;其中,第三凸块的高度小于第一凸块的高度,第四凸块的高度小于第二凸块的高度;第一凸块与第二凸块的高度均大于桥结构的高度,将第三凸块与第一焊点连接,将第四凸块与第二焊点连接。在另一个例子中,可以将第一芯片的引脚直接与第一焊点焊接,将第二芯片的引脚直接与第二焊点连接。需要说明的是,本实施方式中所提到的高度可以均以基板101为参照物。Specifically, in an example, the first bump and the third bump can be fabricated on the first chip, and the third bump and the fourth bump can be fabricated on the second chip; wherein the height of the third bump Is smaller than the height of the first bump, and the height of the fourth bump is smaller than the height of the second bump; the heights of the first bump and the second bump are both greater than the height of the bridge structure, and the third bump and the first solder joint Connect, connect the fourth bump with the second solder joint. In another example, the pins of the first chip can be directly welded to the first solder joints, and the pins of the second chip can be directly connected to the second solder joints. It should be noted that the height mentioned in this embodiment may all be based on the substrate 101 as a reference.

步骤203:将第一芯片和第二芯片均与基板连接,以形成芯片互联装置。Step 203: Connect the first chip and the second chip to the substrate to form a chip interconnection device.

具体的说,在一个例子中,可以在基板上制作第一垫块和第二垫块;将第一垫块与第一凸块焊接,将第二垫块与第二凸块焊接。在另一个例子中,可以在第一垫块和第二垫块上分别涂上导电胶,然后通过压合工艺将第一垫块与第一凸块压合连接,将第二垫块与第二凸块压合连接。Specifically, in an example, the first pad and the second pad may be fabricated on the substrate; the first pad is welded to the first bump, and the second pad is welded to the second bump. In another example, conductive glue may be applied to the first pad and the second pad respectively, and then the first pad and the first bump are pressed and connected by a pressing process, and the second pad and the second pad are pressed and connected. The two bumps are connected by pressing.

为便于对本实施方式中的制备方法的理解,下面提供两种具体的场景下的制备流程:To facilitate the understanding of the preparation method in this embodiment, the following provides the preparation process in two specific scenarios:

场景1:预先通过3D打印工艺制作绝缘本体,在填充导电材料后得到桥结构,通过以下流程制备桥结构与基板贴合的芯片互联装置,制备流程可参考图8,包括:Scenario 1: The insulating body is fabricated in advance through the 3D printing process, and the bridge structure is obtained after filling the conductive material. The chip interconnection device in which the bridge structure is bonded to the substrate is prepared through the following process. The preparation process can refer to Figure 8, including:

步骤501:在基板上制作第一垫块和第二垫块。Step 501: Fabricate a first spacer block and a second spacer block on a substrate.

具体的说,可以参考图9中的S501,在需要封装的衬底基板101的表面上有和第一芯片互联的区域1,和第二芯片互联的区域2。在区域1中制作用于和第一芯片互联的第一垫块105,在区域2中制作用于和第二芯片互联的第二垫块106;其中,第一垫块105和第二垫块106可以均为金属垫块。Specifically, referring to S501 in FIG. 9, on the surface of the base substrate 101 to be packaged, there is an area 1 interconnected with the first chip and an area 2 interconnected with the second chip. A first pad 105 for interconnecting with the first chip is fabricated in area 1, and a second pad 106 for interconnecting with the second chip is fabricated in area 2. Among them, the first pad 105 and the second pad are 106 can all be metal spacers.

步骤502:将预先制作好的桥结构贴合在区域1和区域2之间。Step 502: bonding the pre-made bridge structure between the area 1 and the area 2.

具体的说,可以参考图9中的S502,其中区域1为第一芯片的放置位置,区域2为第二芯片的放置位置,也就是说,将制作好的桥结构贴合在第一芯片和第二芯片之间。Specifically, you can refer to S502 in FIG. 9, where area 1 is the placement position of the first chip, area 2 is the placement position of the second chip, that is, the fabricated bridge structure is attached to the first chip and Between the second chip.

步骤503:将第一芯片上的第一凸块与基板上的第一垫块互联,将第二芯片上的第二凸块与基板上的第二垫块互联。Step 503: Interconnect the first bump on the first chip with the first pad on the substrate, and interconnect the second bump on the second chip with the second pad on the substrate.

具体的说,可参考图9中的S503,将第一芯片102的第一凸块107与基 板101上的第一垫块105通过焊接工艺互联,将第二芯片103上的第二凸块108与基板101上的第二垫块106通过焊接工艺互联。Specifically, referring to S503 in FIG. 9, the first bump 107 of the first chip 102 and the first pad 105 on the substrate 101 are interconnected by a soldering process, and the second bump 108 on the second chip 103 It is interconnected with the second pad 106 on the substrate 101 through a soldering process.

步骤504:将第一芯片上的第三凸块与桥结构的第一焊点互联,将第二芯片上的第四凸块与桥结构的第二焊点互联。Step 504: Interconnect the third bump on the first chip with the first solder joint of the bridge structure, and interconnect the fourth bump on the second chip with the second solder joint of the bridge structure.

具体的说,可参考图9中的S503,将第一芯片102上的第三凸块112与桥结构的第一焊点109通过焊接工艺互联,将第二芯片102上的第四凸块113与桥结构的第二焊点110通过焊接工艺互联。Specifically, referring to S503 in FIG. 9, the third bump 112 on the first chip 102 and the first solder joint 109 of the bridge structure are interconnected by a soldering process, and the fourth bump 113 on the second chip 102 The second solder joint 110 of the bridge structure is interconnected by a soldering process.

需要说明的是,第一芯片上的第一凸块和第三凸块,第二芯片上的第三凸块和第四凸块可以预先在芯片上制作形成,制作完成后直接用来完成与基板和桥结构的互联。It should be noted that the first bump and the third bump on the first chip, the third bump and the fourth bump on the second chip can be fabricated on the chip in advance, and they can be directly used to complete the Interconnection of substrate and bridge structure.

另外,图9中未说明的步骤,还可以包括在焊接工艺所需要的焊点金属制作,助焊剂涂敷,填充剂填充等步骤。In addition, the steps not described in FIG. 9 may also include the steps of making the solder joint metal required in the soldering process, applying flux, and filling the filler.

场景2:预先制作好桥结构,通过以下流程制备桥结构与基板相隔预设距离的芯片互联装置,制备流程可参考图10,包括:Scenario 2: The bridge structure is made in advance, and the chip interconnection device with the bridge structure and the substrate separated by a preset distance is prepared through the following process. The preparation process can refer to Figure 10, including:

步骤601:摆放用于临时承载第一芯片和第二芯片的载片。Step 601: Place a carrier for temporarily carrying the first chip and the second chip.

具体的说,可以参考图11中S601,将载片114可以摆放在操作台上,载片114可以为硅片,玻璃等。Specifically, referring to S601 in FIG. 11, the slide 114 may be placed on the operating table, and the slide 114 may be a silicon wafer, glass, or the like.

步骤602:将第一芯片和第二芯片临时固定在载片上。Step 602: Temporarily fix the first chip and the second chip on the carrier.

具体的说,可以参考图11中S601,将第一芯片102和第二芯片103临时固定在载片114上。其中,临时固定的方式可以为涂临时胶、UV胶或是石蜡,比如说,在载片114的需要临时固定两个芯片的位置均涂上临时胶,再将第一芯片102和第二芯片103分别摆放在涂有临时胶的位置,从而将第一芯片102 和第二芯片103临时固定在载片上。Specifically, referring to S601 in FIG. 11, the first chip 102 and the second chip 103 are temporarily fixed on the carrier 114. Wherein, the temporary fixing method can be to apply temporary glue, UV glue or paraffin wax. For example, apply temporary glue to the positions of the carrier 114 where the two chips need to be temporarily fixed, and then the first chip 102 and the second chip 103 are respectively placed at the positions coated with temporary glue, so that the first chip 102 and the second chip 103 are temporarily fixed on the carrier.

另外,第一芯片102上的第一凸块107和第三凸块112,第二芯片上的第二凸块108和第四凸块113可以预先在芯片上制作,将带有凸块的芯片临时固定在载片上;也可以在将芯片临时固定在载片上后,再分别制作需要的凸块。In addition, the first bump 107 and the third bump 112 on the first chip 102, the second bump 108 and the fourth bump 113 on the second chip can be made on the chip in advance, and the chip with bumps Temporarily fix it on the carrier; you can also make the required bumps after the chip is temporarily fixed on the carrier.

步骤603:将预先制作好的桥结构与第一芯片和第二芯片互联。Step 603: interconnect the pre-made bridge structure with the first chip and the second chip.

具体的说,可以参考图11中S603,将桥结构的第一焊点109与第一芯片102上的第三凸块112焊接,将第二焊点110与第二芯片103上的第四凸块113焊接,从而实现桥结构与第一芯片102和第二芯片103的电气互联。Specifically, referring to S603 in FIG. 11, the first solder joint 109 of the bridge structure is soldered to the third bump 112 on the first chip 102, and the second solder joint 110 is soldered to the fourth bump on the second chip 103. The block 113 is soldered to realize the electrical interconnection between the bridge structure and the first chip 102 and the second chip 103.

步骤604:将载片翻转后,将第一芯片和第二芯片均与基板连接。Step 604: After turning over the slide, both the first chip and the second chip are connected to the substrate.

具体的说,可以参考图11中的S604,将焊接有第一芯片102和第二芯片103的载片进行翻转,翻转后各芯片上的各凸块方向朝下。将第一芯片102上的第一凸块107与基板101上的第一垫块105焊接,从而实现第一芯片102与基板101的电气互联。将第二芯片103上的第二凸块108与第二垫块106焊接,从而实现第二芯片103与基板101的电气互联。其中,基板101上的第一垫块105和第二垫块106为预先在基板101上制作的焊接需要的垫块。Specifically, referring to S604 in FIG. 11, the carrier chip on which the first chip 102 and the second chip 103 are soldered is turned over, and the bumps on each chip face downward after the turning. The first bump 107 on the first chip 102 is soldered to the first pad 105 on the substrate 101 to realize the electrical interconnection between the first chip 102 and the substrate 101. The second bump 108 on the second chip 103 is soldered to the second pad 106 to realize the electrical interconnection between the second chip 103 and the substrate 101. Among them, the first pad 105 and the second pad 106 on the substrate 101 are pads that are pre-made on the substrate 101 and required for welding.

步骤605:去除载片。Step 605: Remove the slide.

具体的说,可以根据将第一芯片和第二芯片临时固定在载片114上的方式,选择对应的方式去除载片114。比如说,如果采用临时胶的方式固定,可以采用化学剂或是加热的方式去除载片,如果采用UV胶的方式固定,可以采用照射UV光的方式去除载片。Specifically, according to the method of temporarily fixing the first chip and the second chip on the carrier 114, the carrier 114 can be removed in a corresponding manner. For example, if it is fixed by temporary glue, the slide can be removed by chemical agents or heating; if it is fixed by UV glue, the slide can be removed by irradiating UV light.

本实施例相对于现有技术而言,芯片互联装置的制备方法包括:制作桥结构,并将桥结构置于基板外部;其中,桥结构包括绝缘本体、位于绝缘本体内 的导电件、位于绝缘本体的表面的第一焊点和第二焊点,导电件的第一端与所述第一金属焊点连接,且第二端与所述第二金属焊点连接,使得桥结构能够提供导电通路。将第一芯片与第一焊点连接,将第二芯片与第二焊点连接;使得第一芯片与第二芯片通过桥结构提供的导电通路可以实现电气连接。将第一芯片和第二芯片均与基板连接,使得芯片和基板之间能够实现电气互联。采用本实施例的制备方法制备得到的芯片互联装置,由于桥结构位于基板的表面,无需植入基板内部,有利于降低组装难度,在使得工艺流程更加简单的同时,还能很好的实现第一芯片与第二芯片之间的电气互联。Compared with the prior art, the manufacturing method of the chip interconnection device in this embodiment includes: fabricating a bridge structure and placing the bridge structure outside the substrate; wherein, the bridge structure includes an insulating body, a conductive member located in the insulating body, and The first solder joint and the second solder joint on the surface of the body, the first end of the conductive member is connected with the first metal solder joint, and the second end is connected with the second metal solder joint, so that the bridge structure can provide conductivity path. The first chip is connected with the first solder joint, and the second chip is connected with the second solder joint; the first chip and the second chip can be electrically connected through the conductive path provided by the bridge structure. Both the first chip and the second chip are connected with the substrate, so that electrical interconnection between the chip and the substrate can be realized. For the chip interconnection device prepared by the preparation method of this embodiment, since the bridge structure is located on the surface of the substrate, it does not need to be implanted inside the substrate, which is beneficial to reduce the difficulty of assembly. While simplifying the process flow, it can also achieve the first The electrical interconnection between a chip and a second chip.

不难发现,本实施方式为与第一实施例相对应的制备方法实施例,本实施方式可与第一实施例互相配合实施。第一实施例中提到的相关技术细节在本实施例中依然有效,为了减少重复,这里不再赘述。相应地,本实施方式中提到的相关技术细节也可应用在第一实施例中。It is not difficult to find that this embodiment is an example of a preparation method corresponding to the first embodiment, and this embodiment can be implemented in cooperation with the first embodiment. The related technical details mentioned in the first embodiment are still valid in this embodiment, and in order to reduce repetition, they will not be repeated here. Correspondingly, the related technical details mentioned in this embodiment can also be applied in the first embodiment.

本申请第四实施例涉及一种芯片互联装置的制备方法,本实施例与第五实施例大致相同,不同之处在于,第一实施例中芯片与桥结构通过焊接工艺连接,而在本实施例中芯片与桥结构通过3D打印工艺连接。The fourth embodiment of the present application relates to a method for manufacturing a chip interconnection device. This embodiment is roughly the same as the fifth embodiment, except that the chip and the bridge structure are connected through a soldering process in the first embodiment, but in this embodiment In the example, the chip and the bridge structure are connected through a 3D printing process.

本实施例中芯片互联装置的制备方法的流程图可以如图12所示,包括:The flow chart of the manufacturing method of the chip interconnection device in this embodiment may be as shown in FIG. 12, including:

步骤701:摆放用于临时承载第一芯片和第二芯片的载片。Step 701: Place a carrier for temporarily carrying the first chip and the second chip.

步骤702:将第一芯片和第二芯片临时固定在载片上。Step 702: Temporarily fix the first chip and the second chip on the carrier.

具体的说,可参考图13中的S701至S702,由于,步骤701至步骤702与第三实施例中步骤601至步骤602大致相同,为避免重复在此不再赘述。Specifically, refer to S701 to S702 in FIG. 13. Since steps 701 to 702 are substantially the same as steps 601 to 602 in the third embodiment, they will not be repeated here to avoid repetition.

步骤703:在第一芯片和第二芯片表面通过3D打印制作绝缘本体, 填充导电材料后形成桥结构。Step 703: Fabricate an insulating body by 3D printing on the surfaces of the first chip and the second chip, and form a bridge structure after being filled with conductive material.

具体的说,可参考图13中的S703,通过3D打印工艺在第一芯片102和第二芯片103表面上打印绝缘本体104的一部分,打印形成凹槽和导电通道后,先将导电材料填充进两个凹槽和导电通道以形成第一焊点109、第二焊点110和导电件111,等到填充的材料干了以后继续打印绝缘本体104剩余的一部分以封闭起来形成桥结构。最终得到的桥结构的第一焊点109与第一芯片102的引脚(图中未示出)贴合,从而实现桥结构与第一芯片102的打印连接;桥结构的第二焊点110与第二芯片得引脚贴合,从而实现桥结构与第二芯片103的打印连接。Specifically, referring to S703 in FIG. 13, a part of the insulating body 104 is printed on the surface of the first chip 102 and the second chip 103 through a 3D printing process. After the grooves and conductive channels are formed by printing, the conductive material is first filled in The two grooves and conductive channels form the first solder joint 109, the second solder joint 110 and the conductive member 111. After the filled material dries, the remaining part of the insulating body 104 is printed to be sealed to form a bridge structure. The first solder joint 109 of the finally obtained bridge structure is attached to the pins (not shown in the figure) of the first chip 102, so as to realize the printing connection between the bridge structure and the first chip 102; the second solder joint 110 of the bridge structure It is attached to the pins of the second chip to realize the printing connection between the bridge structure and the second chip 103.

步骤704:在第一芯片表面制作第一凸块,在第二芯片表面制作第二凸块。Step 704: Fabricate a first bump on the surface of the first chip and fabricate a second bump on the surface of the second chip.

需要说明的是,本实施例中第一芯片102上制作有第一凸块107,第二芯片103上制作有第二凸块108。具体的,可以在将两个芯片临时固定在载片114上之后再分别制作第一凸块107和第二凸块108,也可以预先制作好,也就是说,在将第一芯片102和第二芯片103临时固定在载片之前就已经预先制作好了第一凸块107和第二凸块108。图13中只是以先临时固定在载片上再制作凸块为例,但在实际应用中并不以此为限。It should be noted that, in this embodiment, first bumps 107 are formed on the first chip 102, and second bumps 108 are formed on the second chip 103. Specifically, the first bump 107 and the second bump 108 can be fabricated separately after the two chips are temporarily fixed on the carrier 114, or they can be fabricated in advance, that is, after the first chip 102 and the The first bump 107 and the second bump 108 are pre-fabricated before the two chips 103 are temporarily fixed on the carrier. In FIG. 13, the bumps are temporarily fixed on the slide as an example, but the actual application is not limited to this.

步骤705:将载片翻转后,将第一芯片和第二芯片均与基板连接。Step 705: After the slide is turned over, both the first chip and the second chip are connected to the substrate.

步骤706:去除载片。Step 706: Remove the slide.

步骤705至步骤706与第三实施例中步骤604至步骤605大致相同,为避免重复,在此不再赘述。Step 705 to step 706 are substantially the same as step 604 to step 605 in the third embodiment, and to avoid repetition, they will not be repeated here.

本实施例相对于现有技术而言,桥结构中的绝缘本体通过3D打印工 艺在第一芯片和第二芯片表面上制作而成,第一焊点与第一芯片的引脚贴合,第二焊点与第二芯片的引脚贴合,使得在第一芯片和第二芯片表面通过3D打印制作完成的绝缘本体在填充导电材料后能够直接实现桥结构分别与第一芯片和第二芯片的连接,更加简单方便,进一步简化了工艺流程。Compared with the prior art, in this embodiment, the insulating body in the bridge structure is fabricated on the surface of the first chip and the second chip through a 3D printing process, and the first solder joints are attached to the pins of the first chip. The two solder joints are attached to the pins of the second chip, so that the insulating body made by 3D printing on the surface of the first chip and the second chip can directly realize the bridge structure and the first chip and the second chip after being filled with conductive material. The connection is simpler and more convenient, which further simplifies the process flow.

不难发现,本实施方式为与第二实施方式相对应的制备方法实施例,本实施方式可与第二实施方式互相配合实施。第二实施方式中提到的相关技术细节在本实施方式中依然有效,为了减少重复,这里不再赘述。相应地,本实施方式中提到的相关技术细节也可应用在第二实施方式中。It is not difficult to find that this embodiment is an example of a preparation method corresponding to the second embodiment, and this embodiment can be implemented in cooperation with the second embodiment. The related technical details mentioned in the second embodiment are still valid in this embodiment, and in order to reduce repetition, they will not be repeated here. Correspondingly, the related technical details mentioned in this embodiment can also be applied in the second embodiment.

上面各种方法的步骤划分,只是为了描述清楚,实现时可以合并为一个步骤或者对某些步骤进行拆分,分解为多个步骤,只要包括相同的逻辑关系,都在本专利的保护范围内;对算法中或者流程中添加无关紧要的修改或者引入无关紧要的设计,但不改变其算法和流程的核心设计都在该专利的保护范围内。The division of the steps of the various methods above is only for clarity of description. When implemented, it can be combined into one step or some steps can be split into multiple steps, as long as they include the same logical relationship, they are all within the protection scope of this patent. ; Adding insignificant modifications to the algorithm or process or introducing insignificant design, but not changing the core design of the algorithm and process are within the scope of protection of the patent.

本申请第五实施例涉及一种集成桥结构的基板,如图14所示,桥结构包括绝缘本体104、位于绝缘本体104内的导电件111、位于绝缘本体102的表面的第一焊点109和第二焊点110;导电件111的第一端与第一焊点109连接,且第二端与第二焊点110连接;其中,第一焊点109用于供第一芯片连接,第二焊点110用于供第二芯片连接;桥结构与基板101的表面贴合。The fifth embodiment of the present application relates to a substrate with an integrated bridge structure. As shown in FIG. 14, the bridge structure includes an insulating body 104, a conductive member 111 located in the insulating body 104, and a first solder joint 109 located on the surface of the insulating body 102. And the second solder joint 110; the first end of the conductive member 111 is connected to the first solder joint 109, and the second end is connected to the second solder joint 110; wherein the first solder joint 109 is used for connecting the first chip, The two solder joints 110 are used for connecting the second chip; the bridge structure is attached to the surface of the substrate 101.

在一个例子中,绝缘本体可以通过3D打印工艺制作而成,3D打印工艺使用的材料可以为绝缘高分子材料,打印得到的绝缘本体内部可以具有导电通道,导电件通过在导电通道内填充导电材料形成。其中,导电材料可以具有流动性。In one example, the insulating body can be made by a 3D printing process. The material used in the 3D printing process can be an insulating polymer material. The printed insulating body can have a conductive channel inside, and the conductive member can be filled with conductive material in the conductive channel. form. Among them, the conductive material may have fluidity.

在一个例子中,可以直接以基板101为基底,在基板101上通过3D 打印得到绝缘本体,再填充导电材料形成桥结构,使得桥结构与基板101的表面贴合。也可以预先制作好桥结构,将桥结构通过粘合层与基板101胶合,使得桥结构与基板101的表面贴合。In an example, the substrate 101 can be directly used as a base, the insulating body is obtained by 3D printing on the substrate 101, and then the conductive material is filled to form a bridge structure, so that the bridge structure is attached to the surface of the substrate 101. It is also possible to make a bridge structure in advance, and glue the bridge structure to the substrate 101 through an adhesive layer, so that the bridge structure is attached to the surface of the substrate 101.

与现有技术先比,本实施方式的集成桥结构的基板,可以将第一芯片和第二芯片电气互联,简化了工艺流程。Compared with the prior art, the substrate of the integrated bridge structure of this embodiment can electrically interconnect the first chip and the second chip, which simplifies the process flow.

本申请第六实施例涉及一种集成桥结构的基板的制备方法,流程图可以如图15所示,包括:The sixth embodiment of the present application relates to a method for preparing a substrate with an integrated bridge structure. The flowchart may be as shown in FIG. 15 and includes:

步骤801:制作桥结构。Step 801: Make a bridge structure.

步骤802:将桥结构与基板贴合,以形成集成桥结构的基板。Step 802: bonding the bridge structure to the substrate to form a substrate of the integrated bridge structure.

需要说明的是,本实施方式中制作桥结构的方式以及将桥结构与基板贴合的实现方式可以参考第三实施方式中的相关描述,为避免重复,在此不再一一赘述。It should be noted that the method of fabricating the bridge structure and the method of bonding the bridge structure to the substrate in this embodiment can refer to the related description in the third embodiment. To avoid repetition, the details are not repeated here.

不难发现,本实施方式为与第五实施方式相对应的制备方法实施例,本实施方式可与第五实施方式互相配合实施。第五实施方式中提到的相关技术细节在本实施方式中依然有效,为了减少重复,这里不再赘述。相应地,本实施方式中提到的相关技术细节也可应用在第五实施方式中。It is not difficult to find that this embodiment is an example of a preparation method corresponding to the fifth embodiment, and this embodiment can be implemented in cooperation with the fifth embodiment. The related technical details mentioned in the fifth embodiment are still valid in this embodiment, and in order to reduce repetition, they will not be repeated here. Correspondingly, the related technical details mentioned in this embodiment can also be applied in the fifth embodiment.

本领域的普通技术人员可以理解,上述各实施例是实现本申请的具体实施例,而在本实施例中,可以在形式上和细节上对其作各种改变,而不偏离本申请的精神和范围。Those of ordinary skill in the art can understand that the above-mentioned embodiments are specific embodiments for realizing the application, and in this embodiment, various changes can be made in form and details without departing from the spirit of the application. And scope.

Claims (21)

一种芯片互联装置,其特征在于,包括:第一芯片、第二芯片、基板和桥结构;A chip interconnection device, characterized by comprising: a first chip, a second chip, a substrate and a bridge structure; 所述桥结构包括绝缘本体、位于所述绝缘本体内的导电件、位于所述绝缘本体的表面的第一焊点和第二焊点,所述导电件的第一端与所述第一焊点连接,且第二端与所述第二焊点连接;The bridge structure includes an insulating body, a conductive member located in the insulating body, a first solder joint and a second solder joint located on the surface of the insulating body, a first end of the conductive member and the first solder joint Point connection, and the second end is connected to the second solder point; 所述第一芯片与所述第一焊点连接,所述第二芯片与所述第二焊点连接;The first chip is connected with the first solder joint, and the second chip is connected with the second solder joint; 所述第一芯片和所述第二芯片均与所述基板连接。Both the first chip and the second chip are connected to the substrate. 根据权利要求1所述的芯片互联装置,其特征在于,所述绝缘本体通过3D打印工艺制作而成。The chip interconnection device according to claim 1, wherein the insulating body is manufactured by a 3D printing process. 根据权利要求2所述的芯片互联装置,其特征在于,所述绝缘本体通过3D打印工艺在所述第一芯片和所述第二芯片表面上制作而成;The chip interconnection device according to claim 2, wherein the insulating body is fabricated on the surfaces of the first chip and the second chip by a 3D printing process; 所述第一焊点与所述第一芯片的引脚贴合,所述第二焊点与所述第二芯片的引脚贴合。The first solder joint is attached to the pin of the first chip, and the second solder joint is attached to the pin of the second chip. 根据权利要求1所述的芯片互联装置,其特征在于,所述绝缘本体采用绝缘高分子材料制作而成。The chip interconnection device according to claim 1, wherein the insulating body is made of insulating polymer materials. 根据权利要求1所述的芯片互联装置,其特征在于,所述第一芯片上具有第一凸块和第三凸块,所述第三凸块的高度小于所述第一凸块的高度;所述第二芯片上具有第二凸块和第四凸块,所述第四凸块的高度小于所述第二凸块的高度;所述第一凸块与所述第二凸块的高度均大于所述桥结构的高度;The chip interconnection device of claim 1, wherein the first chip has a first bump and a third bump, and the height of the third bump is smaller than the height of the first bump; The second chip has a second bump and a fourth bump, the height of the fourth bump is smaller than the height of the second bump; the height of the first bump and the second bump Are greater than the height of the bridge structure; 所述基板的表面具有第一垫块和第二垫块,所述第一垫块与所述第一凸块 连接,所述第二垫块与所述第二凸块连接;The surface of the substrate has a first pad and a second pad, the first pad is connected with the first bump, and the second pad is connected with the second bump; 所述第三凸块与所述第一焊点连接,所述第四凸块与所述第二焊点连接。The third bump is connected with the first solder joint, and the fourth bump is connected with the second solder joint. 根据权利要求1所述的芯片互联装置,其特征在于,所述桥结构与所述基板的表面贴合。The chip interconnection device of claim 1, wherein the bridge structure is attached to the surface of the substrate. 根据权利要求1所述的芯片互联装置,其特征在于,所述桥结构与所述基板的表面间隔预设距离。The chip interconnection device of claim 1, wherein the bridge structure is separated from the surface of the substrate by a predetermined distance. 根据权利要求1至7中任一项所述的芯片互联装置,其特征在于,所述绝缘本体内部具有导电通道,所述导电件通过在所述导电通道内填充导电材料形成。The chip interconnection device according to any one of claims 1 to 7, wherein the insulating body has a conductive channel inside, and the conductive member is formed by filling the conductive material in the conductive channel. 根据权利要求8所述的芯片互联装置,其特征在于,所述导电材料具有流动性。8. The chip interconnection device of claim 8, wherein the conductive material has fluidity. 一种芯片互联装置的制备方法,其特征在于,包括:A manufacturing method of a chip interconnection device, characterized in that it comprises: 制作桥结构;其中,所述桥结构包括绝缘本体、位于所述绝缘本体内的导电件、位于所述绝缘本体的表面的第一焊点和第二焊点,所述导电件的第一端与所述第一焊点连接,且第二端与所述第二焊点连接;Fabrication of a bridge structure; wherein the bridge structure includes an insulating body, a conductive member located in the insulating body, a first solder joint and a second solder joint located on the surface of the insulating body, and the first end of the conductive member Connected with the first solder joint, and the second end connected with the second solder joint; 将第一芯片与所述第一焊点连接,将第二芯片与所述第二焊点连接;Connecting the first chip with the first solder joint, and the second chip with the second solder joint; 将所述第一芯片和所述第二芯片均与所述基板连接,以形成所述芯片互联装置。Both the first chip and the second chip are connected with the substrate to form the chip interconnection device. 根据权利要求10所述的芯片互联装置的制备方法,其特征在于,所述制作桥结构,包括:The method of manufacturing a chip interconnection device according to claim 10, wherein the manufacturing of the bridge structure comprises: 通过3D打印工艺制作所述绝缘本体;其中,所述绝缘本体内形成有所述导电通道以及分别与所述导电通道两端联通的两个凹槽;The insulating body is manufactured by a 3D printing process; wherein the conductive channel and two grooves respectively communicating with both ends of the conductive channel are formed in the insulating body; 利用导电材料填充所述导电通道形成所述导电件,利用所述导电材料填充所述两个凹槽形成所述第一焊点和第二焊点。The conductive channel is filled with a conductive material to form the conductive element, and the two grooves are filled with the conductive material to form the first solder joint and the second solder joint. 根据权利要求11所述的芯片互联装置的制备方法,其特征在于,通过3D打印工艺制作所述绝缘本体,包括:The method for manufacturing the chip interconnection device according to claim 11, wherein the manufacturing of the insulating body by a 3D printing process comprises: 将所述第一芯片和所述第二芯片临时固定在预置的载片上;Temporarily fixing the first chip and the second chip on a preset slide; 在所述第一芯片和所述第二芯片的表面上通过3D打印制作绝缘本体;3D printing an insulating body on the surfaces of the first chip and the second chip; 在所述将所述第一芯片和所述第二芯片均与所述基板连接之前,还包括:将固定有所述第一芯片和所述第二芯片的所述载片进行翻转;Before connecting the first chip and the second chip to the substrate, the method further includes: turning the carrier sheet on which the first chip and the second chip are fixed; 在所述将所述第一芯片和所述第二芯片均与所述基板连接之后,还包括:After the connecting the first chip and the second chip to the substrate, the method further includes: 将所述载片去除。The slide is removed. 根据权利要求10所述的芯片互联装置的制备方法,其特征在于,所述将所述第一芯片和所述第二芯片均与所述基板连接,包括:The method for manufacturing a chip interconnection device according to claim 10, wherein the connecting both the first chip and the second chip to the substrate comprises: 在所述第一芯片上制作第一凸块,在所述第二芯片上制作第二凸块;Fabricating a first bump on the first chip, fabricating a second bump on the second chip; 在所述基板上制作第一垫块和第二垫块;Fabricating a first pad and a second pad on the substrate; 将所述第一垫块与所述第一凸块连接,将所述第二垫块与所述第二凸块连接;Connecting the first pad with the first bump, and connecting the second pad with the second bump; 所述将第一芯片与所述第一焊点连接,将所述第二芯片与所述第二焊点连接,包括:The connecting the first chip with the first solder joint and connecting the second chip with the second solder joint includes: 在所述第一芯片上制作第三凸块,在所述第二芯片上制作第四凸块;其中,所述第三凸块的高度小于所述第一凸块的高度,所述第四凸块的高度小于所述第二凸块的高度;所述第一凸块与所述第二凸块的高度均大于所述桥结构的高度;A third bump is fabricated on the first chip, and a fourth bump is fabricated on the second chip; wherein the height of the third bump is smaller than the height of the first bump, and the fourth bump The height of the bump is smaller than the height of the second bump; the height of the first bump and the second bump are both larger than the height of the bridge structure; 将所述第三凸块与所述第一焊点连接,将所述第四凸块与所述第二焊点连接。The third bump is connected with the first solder joint, and the fourth bump is connected with the second solder joint. 根据权利要求10所述的芯片互联装置的制备方法,其特征在于,所述将所述桥结构置于基板上,具体为:The manufacturing method of the chip interconnection device according to claim 10, wherein the placing the bridge structure on the substrate specifically comprises: 将所述桥结构贴合在所述基板上。The bridge structure is attached to the substrate. 根据权利要求11所述的芯片互联装置的制备方法,其特征在于,所述导电材料具有流动性。The method for manufacturing a chip interconnection device according to claim 11, wherein the conductive material has fluidity. 一种集成桥结构的基板,其特征在于,所述桥结构包括绝缘本体、位于所述绝缘本体内的导电件、位于所述绝缘本体的表面的第一焊点和第二焊点;A substrate integrated with a bridge structure, characterized in that the bridge structure includes an insulating body, a conductive member located in the insulating body, and a first solder joint and a second solder joint located on the surface of the insulating body; 所述导电件的第一端与所述第一焊点连接,且第二端与所述第二焊点连接;其中,所述第一焊点用于供第一芯片连接,所述第二焊点用于供第二芯片连接;The first end of the conductive element is connected to the first solder joint, and the second end is connected to the second solder joint; wherein, the first solder joint is used for connecting the first chip, and the second The solder joints are used for connecting the second chip; 所述桥结构与所述基板的表面贴合。The bridge structure is attached to the surface of the substrate. 根据权利要求16所述的集成桥结构的基板,其特征在于,所述绝缘本体通过3D打印工艺制作而成。The substrate with an integrated bridge structure according to claim 16, wherein the insulating body is manufactured by a 3D printing process. 根据权利要求16所述的集成桥结构的基板,其特征在于,所述绝缘本体采用绝缘高分子材料制作而成。The substrate with integrated bridge structure according to claim 16, wherein the insulating body is made of insulating polymer material. 根据权利要求16至18中任一项所述的集成桥结构的基板,其特征在于,所述绝缘本体内部具有导电通道,所述导电件通过在所述导电通道内填充导电材料形成。The substrate with an integrated bridge structure according to any one of claims 16 to 18, wherein the insulating body has a conductive channel inside, and the conductive member is formed by filling the conductive material in the conductive channel. 根据权利要求19所述的集成桥结构的基板,其特征在于,所述导电材料具有流动性。The substrate with integrated bridge structure according to claim 19, wherein the conductive material has fluidity. 一种集成桥结构的基板的制备方法,其特征在于,包括:A method for preparing a substrate with integrated bridge structure is characterized in that it comprises: 制作桥结构,其中,所述桥结构包括绝缘本体、位于所述绝缘本体内的导 电件、位于所述绝缘本体的表面的第一焊点和第二焊点,所述导电件的第一端与所述第一焊点连接,且第二端与所述第二焊点连接,所述第一焊点用于供第一芯片连接,所述第二焊点用于供第二芯片连接;Fabrication of a bridge structure, wherein the bridge structure includes an insulating body, a conductive member located in the insulating body, a first solder joint and a second solder joint located on the surface of the insulating body, and a first end of the conductive member Connected with the first solder joint, and the second end connected with the second solder joint, the first solder joint is used for connecting the first chip, and the second solder joint is used for connecting the second chip; 将所述桥结构与所述基板贴合,以形成所述集成桥结构的基板。The bridge structure is attached to the substrate to form a substrate of the integrated bridge structure.
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