WO2020103583A1 - Ray detector and manufacturing method therefor, electronic device - Google Patents

Abstract

Disclosed is a ray detector (100), comprising a substrate (101) with a plurality of pixel areas arranged thereon in array, each pixel area comprising a thin film transistor (102) including a source electrode (1022) and a drain electrode (1021); and a photoelectric sensor (103) located at the side of the thin film transistor (102) away from the substrate (101). The photoelectric sensor (103) comprises: a first electrode (1031) and a second electrode (1032) separated from each other; a dielectric layer (1033), located at the side of the first electrode (1031) and the second electrode (1032) away from the substrate (101) and covering the first electrode (1031) and the second electrode (1032); and a first semiconductor layer (1034) located at the side of the dielectric layer (1033) away from the substrate (101). The first electrode (1031) is electrically connected to the drain electrode (1021). The distance between the substrate (101) and the surface of the first electrode (1031) away from the substrate (101) is a first distance, the distance between the substrate (101) and the surface of the second electrode (1032) away from the substrate (101) is a second distance, and the first distance is basically equal to the second distance, thereby allowing the photoelectric sensor (103) to have better electrical properties, and thus improving the accuracy of illumination detection.

Description

Ray detector, its manufacturing method and electronic equipment

Cross-reference of related applications

This application claims the priority of China Patent Application No. 201811392902.9 filed on November 21, 2018 and China Patent Application No. 201910894639.1 filed on September 20, 2019, the entire disclosure of which is incorporated by reference.

Technical field

The present disclosure relates to the field of sensing technology, and in particular, to a radiation detector, a method of manufacturing the radiation detector, and an electronic device including the radiation detector.

Background technique

In the medical field, when taking X-rays of a part to be diagnosed of a human body, the X-ray emitter and the X-ray detector are placed oppositely, and the part to be diagnosed is placed between the X-ray emitter and the X-ray detector. The X-ray emitter emits X-rays to the site to be diagnosed. The X-ray detector receives X-rays transmitted from the site to be diagnosed and converts the X-rays into visible light. Subsequently, the photodiode in the X-ray detector converts the visible light into an electrical signal, and sends the electrical signal to the signal reading circuit. The image frame can be formed according to the electrical signal read by the signal reading circuit.

Currently, X-ray detectors usually use PIN-type photodiodes or metal-semiconductor-metal (MSM) -type photodiodes. Compared with PIN-type photodiodes, MSM-type photodiodes have a larger fill rate and better response speed, and have better compatibility with a-Si thin film transistors, so they are increasingly used for X-ray Detector.

Summary of the invention

According to some embodiments of the present disclosure, there is provided a radiation detector including a base substrate. A plurality of pixel areas are arranged in an array on the base substrate. Each pixel area includes a thin film transistor and a photosensor on the side of the thin film transistor away from the base substrate. The thin film transistor includes a source and a drain. The photosensor includes: a first electrode and a second electrode, which are spaced apart from each other; a dielectric layer, on the side of the first electrode and the second electrode away from the base substrate and covering the first An electrode and the second electrode; and a first semiconductor layer on the side of the dielectric layer away from the base substrate. The first electrode is electrically connected to the drain. The distance between the surface of the first electrode far away from the base substrate and the base substrate is a first distance, and the distance between the surface of the second electrode far away from the surface of the base substrate and the base substrate The distance is a second distance, and the first distance and the second distance are substantially equal.

In some embodiments, the radiation detector further includes: a first insulating layer between the dielectric layer and the base substrate; a second insulating layer between the first insulating layer and the dielectric Between electrical layers; and a shielding layer between the first insulating layer and the second insulating layer. The shielding layer includes a first portion, and the orthographic projection of the first portion on the base substrate and the orthographic projection of the second electrode on the base substrate at least partially overlap.

In some embodiments, the orthographic projection of the first portion of the blocking layer on the base substrate covers the orthographic projection of the second electrode on the base substrate.

In some embodiments, the radiation detector further includes a common electrode between the base substrate and the first insulating layer. The orthographic projections of the first electrode, the drain, and the common electrode on the base substrate at least partially overlap each other.

In some embodiments, the common electrode has a first thickness, the drain has a second thickness, and the first portion of the blocking layer has a third thickness. The third thickness is substantially equal to the sum of the first thickness and the second thickness.

In some embodiments, the thin film transistor further includes a gate and a second semiconductor layer stacked on each other. The gate is located between the base substrate and the first insulating layer. The second semiconductor layer is connected to the source and drain. A portion of the second semiconductor layer between the source and drain forms a channel region. The blocking layer further includes a second portion, and the orthographic projection of the second portion on the base substrate covers at least the orthographic projection of the channel region on the base substrate.

In some embodiments, the first electrode, the second portion of the blocking layer, and the orthographic projection of the gate on the base substrate at least partially overlap each other. The gate has a thickness substantially equal to the first thickness. The second portion of the blocking layer has a fourth thickness, which is substantially equal to the second thickness.

In some embodiments, the radiation detector further includes: a gate line, located between the base substrate and the first insulating layer, and connected to the gate. The first electrode, the second portion of the blocking layer, and the orthographic projection of the grid line on the base substrate at least partially overlap each other. The gate line has a thickness substantially equal to the first thickness.

In some embodiments, the common electrode and the shielding layer are electrically connected to the same common voltage signal terminal.

According to some embodiments of the present disclosure, an electronic device is provided. The electronic device includes the radiation detector described in any of the foregoing embodiments.

According to some embodiments of the present disclosure, there is provided a method of manufacturing a radiation detector, comprising: providing a base substrate on which a plurality of pixel regions are arranged in an array; forming a corresponding thin film transistor in each pixel region, wherein The thin film transistor includes a source electrode and a drain electrode; a first electrode and a second electrode are formed on a side of the thin film transistor in each pixel area away from the base substrate, wherein the first electrode and the first electrode Two electrodes are spaced apart from each other, and the first electrode is electrically connected to the drain; a side covering the first electrode and the electrode is formed on a side of the first electrode and the second electrode away from the base substrate A dielectric layer of the second electrode; and forming a first semiconductor layer on a side of the dielectric layer away from the base substrate. The first electrode, the second electrode, the dielectric layer, and the first semiconductor layer form a photosensor. The distance between the surface of the first electrode far away from the base substrate and the base substrate is a first distance, and the distance between the surface of the second electrode far away from the surface of the base substrate and the base substrate The distance is a second distance, and the first distance and the second distance are substantially equal.

In some embodiments, the method further includes, before forming the first electrode and the second electrode: forming a first insulating layer on a side of the thin film transistor away from the base substrate; Forming a shielding layer on the side far away from the base substrate; and forming a second insulating layer on the side away from the base substrate. The shielding layer includes a first portion, and the orthographic projection of the first portion on the base substrate and the orthographic projection of the second electrode on the base substrate at least partially overlap.

In some embodiments, the orthographic projection of the first portion of the blocking layer on the base substrate covers the orthographic projection of the second electrode on the base substrate.

In some embodiments, the method further includes: forming a common electrode between the base substrate and the first insulating layer. The orthographic projections of the first electrode, the drain, and the common electrode on the base substrate at least partially overlap each other.

In some embodiments, the common electrode has a first thickness, the drain has a second thickness, and the first portion of the blocking layer has a third thickness. The third thickness is substantially equal to the sum of the first thickness and the second thickness.

In some embodiments, forming a corresponding thin film transistor in each pixel area includes forming a gate and a second semiconductor layer stacked on each other, wherein the gate is located between the base substrate and the first insulating layer In between, the second semiconductor layer is connected to the source and the drain, and a portion of the second semiconductor layer between the source and the drain forms a channel region. Forming the shielding layer includes forming a second portion of the shielding layer, wherein the orthographic projection of the second portion on the base substrate covers at least the orthographic projection of the channel region on the base substrate.

In some embodiments, the first electrode, the second portion of the blocking layer, and the orthographic projection of the gate on the base substrate at least partially overlap each other. The gate has a thickness substantially equal to the first thickness. The second portion of the blocking layer has a fourth thickness, which is substantially equal to the second thickness.

In some embodiments, the method further includes forming a gate line between the base substrate and the first insulating layer. The gate line is connected to the gate. The first electrode, the second portion of the blocking layer, and the orthographic projection of the grid line on the base substrate at least partially overlap each other. The gate line has a thickness substantially equal to the first thickness.

BRIEF DESCRIPTION

Embodiments of the present disclosure will be further described in a non-limiting manner below and with reference to the accompanying drawings, in the drawings:

FIG. 1 is a partial schematic plan view of a radiation detector according to an embodiment of the present disclosure;

2 is a schematic diagram of the working principle of an MSM photoelectric sensor according to an embodiment of the present disclosure;

3 is a partial cross-sectional schematic view of the radiation detector taken along line A-A 'in FIG. 1;

4 is a schematic partial cross-sectional view of the radiation detector taken along line B-B 'in FIG. 1;

5 is a schematic block diagram of an electronic device according to an embodiment of the present disclosure; and

6 is a flowchart of a method of manufacturing a radiation detector according to an embodiment of the present disclosure.

In the drawings, the same reference numerals in the various drawings generally refer to the same or similar parts. Moreover, the drawings are not necessarily drawn to scale, but generally focus on explaining the principles of the present disclosure.

detailed description

It will be understood that although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts It should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another region, layer or section. Accordingly, the first element, component, region, layer or section discussed below may be referred to as the second element, component, region, layer or section without departing from the teachings of the present disclosure.

Spaces such as "below", "below", "below", "below", "above", "above", etc. Relative terms may be used herein to describe the relationship between one element or feature and another element (s) or feature as illustrated in the figure for ease of description. It will be understood that these spatial relative terms are intended to cover different orientations of the device in use or operation in addition to the orientations depicted in the figures. For example, if the device in the figure is turned over, elements described as "below other elements or features" or "below other elements or features" or "below other elements or features" would be oriented as "below other elements or features" Above features ". Thus, the exemplary terms "below" and "below" can encompass both orientations above and below. Terms such as "before" or "before" and "after" or "followed by" may similarly be used, for example, to indicate the order in which light passes through the element. The device can be oriented in other ways (rotated 90 degrees or in other orientations) and interpret the spatial relative descriptors used herein accordingly. In addition, it will also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the present disclosure. As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "including" and / or "comprising" when used in this specification specify the existence of the described and features, wholes, steps, operations, elements and / or components, but do not exclude one or more The presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

It will be understood that when an element or layer is referred to as being "on another element or layer", "connected to another element or layer", "coupled to another element or layer" or "adjacent to another element or layer" It may be directly on another element or layer, directly connected to, coupled to or directly adjacent to another element or layer, or an intermediate element or layer may be present. In contrast, when an element is referred to as being "directly on another element or layer", "directly connected to another element or layer", "directly coupled to another element or layer", "directly adjacent to another element or layer" , No intermediate elements or layers exist. However, in any case "on" or "directly on" should not be interpreted as requiring a layer to completely cover the layer below.

Embodiments of the present disclosure are described herein with reference to schematic illustrations (and intermediate structures) of idealized embodiments of the present disclosure. Because of this, changes to the illustrated shape should be expected, for example, as a result of manufacturing techniques and / or tolerances. Therefore, the embodiments of the present disclosure should not be interpreted as being limited to the specific shapes of the regions illustrated herein, but should include shape deviations due to manufacturing, for example. Therefore, the regions illustrated in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shapes of the regions of the device and are not intended to limit the scope of the present disclosure.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the relevant field and / or in the context of this specification, and will not be idealized or excessive Explain in a formal sense, unless it is clearly defined in this article.

To make the objectives, technical solutions, and advantages of the present disclosure clearer, the embodiments of the present disclosure will be described in further detail below with reference to the accompanying drawings.

Due to its specific structure, the conventional MSM type photodiode usually suffers from interference generated inside it, resulting in poor electrical performance of the MSM type photodiode, thereby affecting the accuracy of the radiation detector. In view of this, the embodiments of the present disclosure advantageously provide some options for improved accuracy of the radiation detector.

1 is a schematic partial top view of a radiation detector according to an embodiment of the present disclosure, FIG. 3 is a partial cross-sectional schematic view of the radiation detector taken along line AA 'in FIG. 1, and FIG. 4 is a schematic view along FIG. A schematic diagram of a partial cross section of the ray detector taken along line BB '. For clarity, some elements may have been omitted in these figures.

Referring to FIGS. 1, 3 and 4, the radiation detector 100 includes a base substrate 101. The base substrate 101 may be made of glass, quartz, plastic, or other suitable materials, for example, which is not limited in this disclosure. The plurality of pixel regions are arranged in an array on the base substrate 101, although only one of them is shown in the figure. Each pixel area includes a thin film transistor 102 and a photosensor 103 on the thin film transistor 102.

The thin film transistor 102 includes structures such as a drain 1021 and a source 1022. As is known, the thin film transistor 102 is generally fabricated so that the drain 1021 and the source 1022 can be used interchangeably. Therefore, it will be understood that the drain 1021 may be referred to as a "source" in some cases, and the source 1022 may be referred to as a "drain" in some cases.

The thin film transistor 102 further includes a gate 1024a and a second semiconductor layer 1023. The gate 1024a is connected to the gate line 1024b. The second semiconductor layer 1023 and the gate electrode 1024a are stacked on each other, and the second semiconductor layer 1023 is connected to the drain electrode 1021 and the source electrode 1022.

The photosensor 103 includes a first electrode 1031 and a second electrode 1032 spaced apart from each other, a dielectric layer 1033 overlying and covering the first electrode 1031 and the second electrode 1032, and a dielectric layer 1033 The first semiconductor layer 1034 over the electrical layer 1033. As shown in FIG. 1, when viewed from above, the first electrode 1031 is patterned into a comb-like structure. In this example, the first electrode 1031 has a shape similar to the letter "E". The second electrode 1032 is patterned to include a finger portion forming an interdigitated structure with the comb-shaped first electrode 1031 and a trace portion transmitting a high voltage to the finger portion. The first electrode 1031 and the second electrode 1032 are spaced apart from each other, and the interval between them can be determined according to actual needs. As shown in FIG. 4, the first electrode 1031 is electrically connected to the drain 1021 of the thin film transistor 102 through the connection electrode 113, and the second electrode 1032 is electrically insulated from the thin film transistor 102. The dielectric layer 1033 can withstand a high voltage with a certain amplitude (for example, the range may be 200 volts to 400 volts). At a certain thickness (for example, 100 nm to 200 nm), the dielectric layer 1033 undergoes electron tunneling under a higher electric field.

In this example, the photo sensor 103 is an MSM type photodiode, where the dielectric layer 1033 is made of, for example, polyimide (Polyimide, PI), and the first electrode 1031 and the second electrode 1032 are made of, for example, aluminum, molybdenum, copper, or Its alloy is made, and the first semiconductor layer 1034 is made of, for example, amorphous silicon (a-Si).

It will be understood that although not shown in the figure, the radiation detector 100 also includes or works with a scintillator. The scintillator absorbs the rays and converts the radiant energy into light that can be detected by the photo sensor 103. It should be noted that the scintillator may be selected to be sensitive to X-rays, γ-rays, or other rays according to actual needs. In this way, the radiation detector 100 can function as a detector such as an X-ray detector, a gamma-ray detector, or the like.

FIG. 2 is a schematic diagram of the working principle of the MSM photoelectric sensor 103. Referring to FIG. 2, the second electrode 1032 is loaded with a high voltage (for example, 200 volts). When no light is irradiated on the surface of the first semiconductor layer 1034, the first semiconductor layer 1034 has a high resistance, so that a high voltage is mainly distributed on the dielectric layer 1033 and the first semiconductor layer 1034. When light is irradiated on the surface of the first semiconductor layer 1034 (as indicated by the dotted arrow in FIG. 2), the first semiconductor layer 1034 has a reduced resistance, and most of the high voltage is thus distributed on the dielectric layer 1033. At this time, the second electrode 1032, the dielectric layer 1033, and the first semiconductor layer 1034 form a metal-insulator-semiconductor (MIS) structure. The MIS structure undergoes electron tunneling (that is, Flower-Nordheim (FN) tunneling) at a high voltage, and generates a tunneling current (as indicated by the solid arrows in FIG. 2). The tunneling current can be collected and read out for light detection.

Referring back to FIGS. 1, 3, and 4, in the embodiment, the distance between the surface of the first electrode 1031 away from the base substrate 101 and the base substrate 101 is the first distance, and the second electrode 1032 is away from the base substrate The distance between the surface of 101 and the base substrate 101 is a second distance, where the first distance and the second distance are substantially equal. Here, the phrase "the first distance is substantially equal to the second distance" means that the difference between the first distance and the second distance is less than a threshold. The threshold is selected so that the film layer formed over the first electrode 1031 and the second electrode 1032 can have a uniform thickness. That is, in the case where “the first distance is substantially equal to the second distance”, the dielectric layer 1033 formed on the first electrode 1031 and the second electrode 1032 will have good thickness uniformity and flatness. This allows the MSM photoelectric sensor 103 to have better electrical characteristics, thereby improving the accuracy of light detection.

The term “thickness” as used throughout this document refers to the thickness of the film layer in the direction perpendicular to the base substrate 101. In the embodiment, the portion of the dielectric layer 1033 located at the surface of the first electrode 1031 away from the base substrate 101 (referred to as the first sub-dielectric layer for convenience of description) has a thickness t1, and the dielectric layer 1033 is located at the second The portion of the electrode 1032 away from the surface of the base substrate 101 (referred to as a second subdielectric layer for convenience of description) has a thickness t2, where t1 and t2 are substantially equal. That is, the difference between the thickness t1 of the first sub-dielectric layer and the thickness t2 of the second sub-dielectric layer is less than a threshold. The threshold can be determined according to factors such as the electrical characteristics of the dielectric layer 1033 and the manufacturing process of the film layer. In some embodiments, the threshold may be selected such that the difference between the thickness t1 of the first sub-dielectric layer and the thickness t2 of the second sub-dielectric layer does not significantly affect the electrical characteristics of the photosensor 103. Exemplarily, the range of the threshold may be [-10%, 10%] of the thickness of the thinner layer of the first sub-dielectric layer and the second sub-dielectric layer.

In some embodiments, the radiation detector 100 further includes a first insulating layer 105 between the dielectric layer 1033 and the base substrate 101 and a second insulating layer between the first insulating layer 105 and the dielectric layer 1033 106. The first insulating layer 105 and the second insulating layer 106 provide electrical isolation between the second electrode 1032 of the photosensor 103 and the thin film transistor 102.

With continued reference to FIGS. 1, 3 and 4, the radiation detector 100 further includes a common electrode 107 and a blocking layer 104.

The common electrode 107 is provided between the base substrate 101 and the first insulating layer 105. In this example, the common electrode 107, the gate 1024a, and the gate line 1024b are located in the same layer, and they can be formed by one patterning process, and thus have substantially the same thickness H1 ("first thickness"). The orthographic projection of the common electrode 107 on the base substrate 101 and the orthographic projection of the drain 1021 of the thin film transistor 102 on the base substrate 101 at least partially overlap. As shown in FIG. 1, in this example, the common electrode 107 is patterned to include a U-shaped portion that substantially overlaps the upper half of the E-shaped first electrode 1031 and a trace that transmits a common voltage to the U-shaped portion section. Similarly, although not explicitly shown in the figure, the drain 1021 of the thin film transistor 102 is also patterned into a U-shaped structure substantially overlapping the U-shaped portion of the common electrode 107. The U-shaped portion of the common electrode 107 and the U-shaped drain 1021 of the thin film transistor 102 form a storage capacitor. When the radiation detector 100 is in operation, the common electrode 107 is applied with a ground voltage, for example, and the drain 1021 of the thin film transistor 102 receives the tunneling current generated by the photodiode 103 via the connection electrode 113, so that the storage capacitor is utilized for the tunnel Current charging. Then, the voltage across the storage capacitor is transmitted as a sensing signal to the data line 120 via the thin film transistor 103 for reading.

The shielding layer 104 is provided between the first insulating layer 105 and the second insulating layer 106. The blocking layer 104 includes a first portion 104a and a second portion 104b. The first part 104a blocks the second electrode 1032 of the photosensor 103. Specifically, the orthographic projection of the first portion 104 a on the base substrate 101 and the orthographic projection of the second electrode 1032 on the base substrate 101 at least partially overlap. In a specific example, the orthographic projection of the first portion 104 a of the blocking layer 104 on the base substrate 101 covers the orthographic projection of the second electrode 1032 on the base substrate 101. The second portion 104b of the shielding layer 104 shields the channel region of the thin film transistor 102 (and optionally, the gate line 1024b). Specifically, the orthographic projection of the second portion 104b on the base substrate 101 covers at least the orthographic projection of the channel region of the thin film transistor 102 on the base substrate 101. The shielding layer 104 may be made of a conductive material having light-shielding properties (for example, aluminum, molybdenum, copper, or an alloy thereof). The material of the drain 1021 and the source 1022 of the thin film transistor 102 may be the same as the material of the blocking layer 104.

In a specific embodiment, the orthographic projection of the first electrode 1031 on the base substrate 101 and the orthographic projection of the drain 1021 of the thin film transistor 102 on the base substrate 101 at least partially overlap, and the first electrode 1031 is on the substrate The orthographic projection on the substrate 101 and the orthographic projection of the common electrode 107 on the base substrate 101 at least partially overlap. That is, the common electrode 107 and the drain 1021 of the thin film transistor 102 are at least partially located directly under the first electrode 1031. The orthographic projection of the first portion 104 a of the blocking layer 104 on the base substrate 101 covers the orthographic projection of the second electrode 1032 of the photosensor 103 on the base substrate 101. That is, the first portion 104a of the blocking layer 104 is at least partially located directly under the second electrode 1032 of the photosensor 103.

)，从而导致光电传感器103的劣化的电学特性。 If the first distance between the first electrode 1031 away from the surface of the base substrate 101 and the base substrate 101 and the second electrode 1032 away from the surface of the base substrate 101 to the base substrate 101 have a large gap, then When the dielectric layer 1033 is formed on the first electrode 1031 and the second electrode 1032, the portion of the dielectric layer 1033 above the first electrode 1031 (ie, the first sub-dielectric layer) and the dielectric layer 1033 are above the second electrode 1032 Part (ie the second sub-dielectric layer) will have a certain thickness difference (e.g.

), Thereby causing the deteriorated electrical characteristics of the photo sensor 103.

In view of this, in some embodiments, the shielding layer 104 is formed such that the thickness H3 (“third thickness”) of the first portion 104 a is substantially equal to the thickness H1 (“first thickness”) of the common electrode 107 and the drain of the thin film transistor 102 The sum of the thickness H2 of the pole 1021 ("second thickness"). In this way, the first distance between the first electrode 1031 away from the surface of the base substrate 101 and the base substrate 101 and the second distance between the second electrode 1032 away from the surface of the base substrate 101 and the base substrate 101 can be approximately equal (in the first (The case where the thickness of one electrode 1031 is substantially the same as the thickness of the second electrode 1032).

The following specifically describes how to realize the uniformity of the thickness of the dielectric layer 1033 on the first electrode 1031 and the second electrode 1032 by designing the thickness of the blocking layer 104.

As shown in FIGS. 3 and 4, between the first electrode 1031 and the base substrate 101, there are a common electrode 107, a gate insulating layer 108, a drain 1021 of the thin film transistor 102, a passivation layer 112, and a first insulating layer 105, a first passivation layer 110, a second passivation layer 111, and a second insulating layer 106. Between the second electrode 1032 and the base substrate 101, there is a gate insulating layer 108, a passivation layer 112, a first insulating layer 105, a first passivation layer 110, a first portion 104a of the blocking layer 104, a second passivation Layer 111 and second insulating layer 106. It should be noted that although not shown intuitively in the figure, the gate insulating layer 108, the passivation layer 112, the first insulating layer 105, the first passivation layer 110, the second passivation layer 111, and the second insulation Each of the layers 106 has a substantially uniform thickness throughout the base substrate 101 because they are each a full-layer structure formed through a patterning process. Therefore, if the thicknesses of the first electrode 1031 and the second electrode 1032 are substantially the same, if the thickness H3 of the first portion 104a of the shielding layer 104 is substantially equal to the thickness H1 of the common electrode 107 and the thickness H2 of the drain 1021 of the thin film transistor 102 In sum, the first distance from the surface of the first electrode 1031 away from the base substrate 101 to the base substrate 101 can be substantially equal to the second distance from the surface of the second electrode 1032 away from the base substrate 101 to the base substrate 101. Thus, the dielectric layer 1033 over the first electrode 1031 and the second electrode 1032 can have better thickness uniformity.

Here, "the thickness H3 of the first portion 104a of the shielding layer 104 is substantially equal to the sum of the thickness H1 of the common electrode 107 and the thickness H2 of the drain 1021 of the thin film transistor 102" includes (i) "the first portion 104a of the shielding layer 104 The third thickness H3 is exactly equal to the sum of the first thickness H1 of the common electrode 107 and the second thickness H2 of the drain 1021 of the thin film transistor 102 "; and (ii)" the third thickness H3 of the first portion 104a of the blocking layer 104 is The sum of the first thickness H1 of the electrode 107 and the second thickness H2 of the drain 1021 of the thin film transistor 102 has a slight difference. In any case, the first distance from the surface of the first electrode 1031 to the base substrate 101 to the base substrate 101 is substantially equal to the second distance from the surface of the second electrode 1032 to the base substrate 101 to the base substrate 101. In this way, the step difference between the surface of the first electrode 1031 away from the base substrate 101 and the surface of the second electrode 1032 away from the base substrate 101 is small, thereby allowing the dielectric layer 1033 to be located at the first electrode when the dielectric layer 1033 is formed The thickness t1 of the portion above 1031 (ie, the first sub-dielectric layer) and the thickness t2 of the portion of the dielectric layer 1033 above the second electrode 1032 (ie, the second sub-dielectric layer) may be substantially the same.

In addition, the second portion 104 b of the blocking layer 104 may have a thickness H4 (“fourth thickness”), which is substantially equal to the thickness H2 of the drain 1021 of the thin film transistor 102. As shown in FIGS. 3 and 4, since the gate line 1024b, the gate 1024a, and the common electrode 107 have approximately the same thickness H1, and the thickness H4 of the second portion 104b of the shielding layer 104 is substantially equal to the thickness of the drain 1021 of the thin film transistor 102 H2, so the sum of the thickness of the gate line 1024b and the thickness H4 of the second portion 104b of the shielding layer 104 is substantially equal to the sum of the thickness H1 of the common electrode 107 and the thickness H2 of the drain 1021 of the thin film transistor 102. That is, the sum of the thickness of the gate line 1024b and the thickness H4 of the second portion 104b of the shielding layer 104 is substantially equal to the thickness H3 of the first portion 104a of the shielding layer 104. Therefore, the distance between the portion of the first electrode 1031 corresponding to the gate 1024a / gate line 1024b and the base substrate 101 is also substantially equal to the distance between the second electrode 1032 and the base substrate 101.

In one embodiment, the electrical signal loaded on the shielding layer 104 may be the same as the common electrode signal loaded on the common electrode 107 (eg, ground voltage). That is, the common electrode 107 and the shielding layer 104 are electrically connected to the same common voltage signal terminal. Of course, other embodiments are possible.

As described above, in order to achieve electron tunneling in the dielectric layer 1033, a high voltage (for example, 200 volts) is usually applied to the second electrode 1032 of the photosensor 103. Compared to this high voltage, the sense voltage across the storage capacitor (formed by the drain 1021 and the common electrode 107) generated by the tunneling current of the photosensor 103 is usually much smaller (for example, 1 volt). In this way, a voltage difference of about 200 volts will be generated between the second electrode 1032 and the drain 1021 (or source 1022) of the thin film transistor 102, which has strong interference with the sense voltage. Due to the shielding effect of the shielding layer 104 (specifically, the first portion 104a), such interference caused by the high voltage applied to the second electrode 1032 can be reduced, thereby improving the accuracy of sensing voltage.

In addition, the second semiconductor layer 1023 of the thin film transistor 102 may generate an undesired photocurrent under the irradiation of external light, resulting in a large off-state current of the thin film transistor 102. In some embodiments described above, since the orthographic projection of the second portion 104b of the blocking layer 104 on the base substrate 101 covers at least the orthographic projection of the channel region of the second semiconductor layer 1023 on the base substrate 101, it is possible External light is prevented from irradiating the second semiconductor layer 1023, thereby reducing the off-state current of the thin film transistor 102 and reducing the power consumption of the radiation detector 100.

It should be noted that although the thin film transistor 102 shown in FIGS. 1, 3 and 4 has a bottom gate structure, the structure of the thin film transistor 102 is not limited to this. In other embodiments, the thin film transistor 102 may have a top gate structure.

In some embodiments, as shown in FIGS. 3 and 4, a first passivation layer 110 is provided between the blocking layer 104 and the first insulating layer 105, and a second layer is provided between the blocking layer 104 and the second insulating layer 106 Passivation layer 111. This enhances the adhesion between the metal film layer and the insulating layer. The first passivation layer 110 and the second passivation layer 111 may use materials commonly used in the art, and the disclosure does not limit this.

In addition, as shown in FIGS. 3 and 4, the radiation detector 100 further includes a signal line layer 109 so as to apply an electrical signal to each pixel area. By way of example, the signal line layer 109 is disposed on the side of the first semiconductor layer 1034 away from the base substrate 101. The signal line layer 109 may include a trace (not shown) made of a transparent material such as indium tin oxide (Indium Tin Oxide, ITO).

FIG. 5 is a schematic block diagram of an electronic device 200 provided by an embodiment of the present disclosure. The electronic device 200 includes the radiation detector described in any of the foregoing embodiments. Examples of the electronic device 200 include, for example, medical diagnostic equipment, geological exploration equipment, and the like. The electronic device 200 has the same advantages as the previously described radiation detector embodiment, and for the sake of brevity, the description will not be repeated here.

6 is a flowchart of a method 600 for manufacturing a radiation detector according to an embodiment of the present disclosure. The method 600 can be applied to the radiation detector described in any of the above embodiments. The method 600 is described below with reference to FIGS. 3, 4 and 6.

In step S601, a base substrate 101 is provided.

The base substrate 101 may be, for example, a glass substrate, a quartz substrate, a plastic substrate, or a substrate of other suitable materials, which is not limited in this disclosure. In one example, the base substrate 101 may be a flexible base substrate. The plurality of pixel areas are arranged in an array on the base substrate 101.

In step S602, a corresponding thin film transistor 102 is formed in each pixel area.

The thin film transistor 102 may be a top-gate thin film transistor or a bottom-gate thin film transistor. The process steps for forming the thin film transistor 102 are determined according to the type to which they belong. For example, in the embodiment in which the thin film transistor 102 is a top gate type, step S602 may include: sequentially forming a drain 1021 and a source 1022, a second semiconductor layer 1023, a gate insulating layer 108, and a gate on the base substrate 101 1024a. In the embodiment in which the thin film transistor 102 is a bottom gate type (as shown in FIGS. 3 and 4), step S602 may include: forming a gate 1024a, a gate insulating layer 108, and a second semiconductor on the base substrate 101 in this order Layer 1023 and drain 1021 and source 1022. In one example, the gate electrode 1024a, the gate line 1024b, and the common electrode 107 may be simultaneously formed on the base substrate 101 through a patterning process. The drain 1021 and the source 1022 can be used interchangeably according to actual conditions.

Taking the method of forming the second semiconductor layer 1023 as an example, the steps required to form the film layer in the thin film transistor 102 will be described. Methods such as magnetron sputtering, thermal evaporation, or plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD) can be used to deposit a layer of semiconductor material with a certain thickness on the base substrate 101 to obtain a semiconductor material layer. Then, the semiconductor material layer is processed through a patterning process to obtain a second semiconductor layer 1023. The patterning process may include: photoresist coating, exposure, development, etching, and photoresist stripping. The semiconductor material may be amorphous silicon or polycrystalline silicon (P-Si) and other materials. The thickness of the second semiconductor layer 1023 can be determined according to actual needs.

Subsequently, a passivation layer 112 is formed. A passivation layer material with a certain thickness can be formed by deposition (such as chemical vapor deposition, physical vapor deposition) or coating, to obtain a passivation layer 112. The passivation layer 112 may be made of silicon dioxide, silicon nitride, or a mixture of materials such as silicon dioxide and silicon nitride. The passivation layer 112 may be optional.

Then, the first insulating layer 105 is formed. For the method of forming the first insulating layer 105, reference may be made to the method of forming the passivation layer 112 described above, which will not be repeated here. The first insulating layer 105 may be made of silicon dioxide, silicon nitride, or a mixture of materials such as silicon dioxide and silicon nitride. The thickness of the first insulating layer 105 can be determined according to actual needs.

Next, the first passivation layer 110 is formed. For the method of forming the first passivation layer 110, reference may be made to the method of forming the passivation layer 112 described above, and details are not described herein again. The first passivation layer 110 may be optional.

Subsequently, a first contact hole C1 penetrating the first passivation layer 110, the first insulating layer 105, and the passivation layer 112 is formed. The first contact hole C1 exposes a portion of the drain 1021 of the thin film transistor 102.

Next, the shielding layer 104 and the connection electrode 113 are formed. A layer of light-shielding and conductive material with a certain thickness can be deposited on the first passivation layer 110 and the first contact hole C1 by magnetron sputtering, thermal evaporation, or PECVD to obtain a shielding material layer. The shielding material layer may be, for example, aluminum, molybdenum, copper or alloys thereof. Then, the patterning process is used to pattern the shielding material layer to obtain the shielding layer 104 and the connection electrode 113. The formed blocking layer 104 includes a first portion 104a having a thickness H3 and a second portion 104b having a thickness H4. The first portion 104a and the second portion 104b having different thicknesses may be formed by halftone masking.

The orthographic projection of the second portion 104b of the shielding layer 104 on the base substrate covers at least the orthographic projection of the channel region of the second semiconductor layer 1023 of the thin film transistor 102 on the base substrate 101. In some embodiments, the orthographic projection of the second portion 104b of the blocking layer 104 on the base substrate also covers the orthographic projection of the grid line 1024b on the base substrate. In some embodiments, the thickness H3 of the first portion 104 a of the shielding layer 104 is substantially equal to the sum of the thickness H1 of the common electrode 107 and the thickness H2 of the drain 1021 of the thin film transistor 102. In this way, the thickness of the subsequently formed dielectric layer 1033 can be favorably maintained.

Then, the second passivation layer 111 and the second insulating layer 106 are sequentially formed. For the method of forming the second passivation layer 111 and the second insulating layer 106, reference may be made to the method of forming the passivation layer 112 described above, and details are not described herein again. A second contact hole C2 is formed in the second passivation layer 111 and the second insulating layer 106. The second contact hole C2 exposes a part of the connection electrode 113.

In step S603, a first electrode 1031 and a second electrode 1032 are formed on the thin film transistor 102 in each pixel area.

A layer of conductive material having a certain thickness can be deposited on the second insulating layer 106 and in the second contact hole C2 by magnetron sputtering, thermal evaporation, or PECVD to obtain an electrode material layer. Then, the electrode material layer is patterned through a patterning process to obtain a first electrode 1031 and a second electrode 1032. The first electrode 1031 and the second electrode 1032 are spaced apart from each other. In each pixel area, the first electrode 1031 is electrically connected to the drain 1021 of the thin film transistor 102 via the connection electrode 113 through the first contact hole C1 and the second contact hole C2, and the second electrode 1032 passes through the first insulating layer 105 and The second insulating layer 106 is electrically insulated from the thin film transistor 102. The orthographic projection of the second electrode 1032 on the base substrate 101 is covered by the orthographic projection of the first portion 104 a of the blocking layer 104 on the base substrate 101.

The orthographic projection of the first electrode 1031 on the base substrate 101 and the orthographic projection of the drain 1021 of the thin film transistor 102 on the base substrate 101 at least partially overlap, and the orthographic projection of the first electrode 1031 on the base substrate 101 The orthographic projection of the common electrode 107 on the base substrate 101 at least partially overlaps. That is, the common electrode 107 and the drain 1021 of the thin film transistor 102 are at least partially located below the first electrode 1031. The orthographic projection of the first portion 104 a of the shielding layer 104 on the base substrate 101 covers the orthographic projection of the second electrode 1032 on the base substrate 101. Since the thickness H3 of the first portion 104a of the shielding layer 104 is substantially equal to the sum of the thickness H1 of the common electrode 107 and the thickness H2 of the drain 1021 of the thin film transistor 102, the first electrode 1031 is away from the surface of the base substrate 101 to the base substrate 101 The first distance is approximately equal to the second distance from the surface of the base electrode 101 from the surface of the second electrode 1032 to the base substrate 101 (in the case where the thickness of the first electrode 1031 and the thickness of the second electrode 1032 are approximately equal).

In step S604, a dielectric layer 1033 covering the first electrode 1031 and the second electrode 1032 is formed on the first electrode 1031 and the second electrode 1032.

A layer of dielectric material with a certain thickness (e.g., poly Imide), a dielectric layer 1033 is obtained. Since the first distance between the surface of the first electrode 1031 away from the base substrate 101 and the base substrate 101 is approximately the same as the second distance between the surface of the second electrode 1032 away from the base substrate 101 and the base substrate 101, the The dielectric layer 1033 above the 1031 and the second electrode 1032 has better thickness uniformity. That is, the thickness t1 of the portion of the dielectric layer 1033 above the first electrode 1031 is substantially the same as the thickness t2 of the portion of the dielectric layer 1033 above the second electrode 1032.

In step S605, a first semiconductor layer 1034 is formed on the dielectric layer 1033.

For the method of forming the first semiconductor layer 1034, reference may be made to the above-described method of forming the second semiconductor layer 1023, which will not be repeated here. The first electrode 1031, the second electrode 1032, the dielectric layer 1033, and the first semiconductor layer 1034 form the photo sensor 103 of the radiation detector.

The method 600 of manufacturing a radiation detector has the same advantages as those of the above-described radiation detector embodiments, and for the sake of brevity, the description is not repeated herein.

It should be noted that the above-mentioned embodiments illustrate rather than limit the disclosure, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claims. The use of the verb "comprise" and its conjugations does not exclude the presence of elements or steps other than those stated in the claims. The article "a" or "an" preceding an element does not exclude the presence of multiple such elements. The mere fact that certain measures are stated in mutually different dependent claims does not indicate that a combination of these measures cannot be used to benefit.

Claims (18)

A ray detector, including: On the base substrate, a plurality of pixel areas are arranged in an array, wherein each pixel area includes: Thin film transistors, including source and drain; and A photosensor, on the side of the thin film transistor away from the base substrate, wherein the photosensor includes: The first electrode and the second electrode are spaced apart from each other; A dielectric layer on a side of the first electrode and the second electrode away from the base substrate, wherein the dielectric layer covers the first electrode and the second electrode; and A first semiconductor layer on the side of the dielectric layer away from the base substrate, Wherein the first electrode is electrically connected to the drain, and The distance between the surface of the first electrode far away from the base substrate and the base substrate is a first distance, and the distance between the surface of the second electrode far away from the surface of the base substrate and the base substrate The distance between is a second distance, and the first distance and the second distance are substantially equal. The radiation detector according to claim 1, further comprising: A first insulating layer between the dielectric layer and the base substrate; A second insulating layer between the first insulating layer and the dielectric layer; and A shielding layer between the first insulating layer and the second insulating layer, Wherein, the shielding layer includes a first portion, and the orthographic projection of the first portion on the base substrate and the orthographic projection of the second electrode on the base substrate at least partially overlap. The radiation detector according to claim 2, wherein the orthographic projection of the first portion of the blocking layer on the base substrate covers the orthographic projection of the second electrode on the base substrate. The radiation detector according to claim 2, further comprising: A common electrode between the base substrate and the first insulating layer, Wherein, the orthographic projections of the first electrode, the drain, and the common electrode on the base substrate at least partially overlap each other. The radiation detector according to claim 4, Wherein the common electrode has a first thickness, the drain electrode has a second thickness, and the first portion of the blocking layer has a third thickness, and Wherein, the third thickness is substantially equal to the sum of the first thickness and the second thickness. The radiation detector according to claim 5, Wherein, the thin film transistor further includes a gate and a second semiconductor layer stacked on each other, the gate is located between the base substrate and the first insulating layer, and the second semiconductor layer is connected to the source An electrode and a drain, the second semiconductor layer forms a channel region at a portion between the source and the drain, and Wherein, the shielding layer further includes a second portion, and the orthographic projection of the second portion on the base substrate covers at least the orthographic projection of the channel region on the base substrate. The radiation detector according to claim 6, Wherein, the orthographic projections of the first electrode, the second part of the blocking layer and the grid on the base substrate at least partially overlap each other, Wherein the gate has a thickness substantially equal to the first thickness, and Wherein, the second portion of the blocking layer has a fourth thickness, which is substantially equal to the second thickness. The radiation detector according to claim 7, further comprising: A gate line, located between the base substrate and the first insulating layer, and connected to the gate, Wherein, the orthographic projections of the first electrode, the second portion of the shielding layer and the grid line on the base substrate at least partially overlap each other, and Wherein, the gate line has a thickness substantially equal to the first thickness. The radiation detector according to claim 4, wherein the common electrode and the shielding layer are electrically connected to the same common voltage signal terminal. An electronic device comprising the radiation detector according to any one of claims 1-9. A method of manufacturing a radiation detector, including: Provide a substrate substrate on which multiple pixel areas are arranged in an array; Forming a corresponding thin film transistor in each pixel area, wherein the thin film transistor includes a source and a drain; A first electrode and a second electrode are formed on a side of the thin-film transistor in each pixel area away from the base substrate, wherein the first electrode and the second electrode are spaced apart from each other, and The electrode is electrically connected to the drain; Forming a dielectric layer covering the first electrode and the second electrode on the side of the first electrode and the second electrode away from the base substrate; and Forming a first semiconductor layer on a side of the dielectric layer away from the base substrate, Wherein, the first electrode, the second electrode, the dielectric layer, and the first semiconductor layer form a photosensor, and The distance between the surface of the first electrode far away from the base substrate and the base substrate is a first distance, and the distance between the surface of the second electrode far away from the surface of the base substrate and the base substrate The distance between is a second distance, and the first distance and the second distance are substantially equal. The method of claim 11, further comprising, before forming the first electrode and the second electrode: Forming a first insulating layer on a side of the thin film transistor away from the base substrate; Forming a shielding layer on the side of the first insulating layer away from the base substrate; and Forming a second insulating layer on a side of the shielding layer away from the base substrate, Wherein, the shielding layer includes a first portion, and the orthographic projection of the first portion on the base substrate and the orthographic projection of the second electrode on the base substrate at least partially overlap. The method of claim 12, wherein the orthographic projection of the first portion of the blocking layer on the base substrate covers the orthographic projection of the second electrode on the base substrate. The method of claim 12, further comprising: Forming a common electrode between the base substrate and the first insulating layer, Wherein, the orthographic projections of the first electrode, the drain, and the common electrode on the base substrate at least partially overlap each other. The method according to claim 14, Wherein the common electrode has a first thickness, the drain electrode has a second thickness, and the first portion of the blocking layer has a third thickness, and Wherein, the third thickness is substantially equal to the sum of the first thickness and the second thickness. The method according to claim 15, Wherein, forming a corresponding thin film transistor in each pixel region includes: forming a gate and a second semiconductor layer stacked on each other, wherein the gate is located between the base substrate and the first insulating layer, the A second semiconductor layer is connected to the source and drain, and a portion of the second semiconductor layer between the source and drain forms a channel region, and Wherein forming the shielding layer includes forming a second portion of the shielding layer, wherein the orthographic projection of the second portion on the base substrate covers at least the orthographic projection of the channel region on the base substrate. The method according to claim 16, Wherein, the orthographic projections of the first electrode, the second part of the blocking layer and the grid on the base substrate at least partially overlap each other, Wherein the gate has a thickness substantially equal to the first thickness, and Wherein, the second portion of the blocking layer has a fourth thickness, and the fourth thickness is substantially equal to the second thickness. The method of claim 17, further comprising: Forming a gate line between the base substrate and the first insulating layer, Wherein the gate line is connected to the gate, Wherein, the orthographic projections of the first electrode, the second portion of the shielding layer and the grid line on the base substrate at least partially overlap each other, and Wherein, the gate line has a thickness substantially equal to the first thickness.

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