[go: up one dir, main page]

WO2020199296A1 - Pixel driving circuit and display panel - Google Patents

Pixel driving circuit and display panel Download PDF

Info

Publication number
WO2020199296A1
WO2020199296A1 PCT/CN2019/085015 CN2019085015W WO2020199296A1 WO 2020199296 A1 WO2020199296 A1 WO 2020199296A1 CN 2019085015 W CN2019085015 W CN 2019085015W WO 2020199296 A1 WO2020199296 A1 WO 2020199296A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
signal
terminal
module
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2019/085015
Other languages
French (fr)
Chinese (zh)
Inventor
李新吉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Publication of WO2020199296A1 publication Critical patent/WO2020199296A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen

Definitions

  • This application relates to the field of display technology, specifically a pixel drive circuit and a compensation method of the pixel drive circuit.
  • the transistors in the pixel driving circuit are low-temperature polysilicon thin film transistors or oxide thin film transistors.
  • low-temperature polysilicon thin film transistors and oxide thin film transistors have higher mobility and more stable characteristics, and are more suitable for active-matrix organic light-emitting diodes (Active-matrix organic light-emitting diodes).
  • diode, AMOLED is displaying.
  • low-temperature polysilicon thin film transistors fabricated on large-area glass substrates often have non-uniformities in electrical parameters such as threshold voltage and mobility. This non-uniformity will be transformed into a difference in driving current and brightness of an organic light emitting diode (OLED) device, which is perceived by the human eye, that is, the phenomenon of color unevenness.
  • OLED organic light emitting diode
  • oxide thin film transistors have better process uniformity, they are similar to amorphous silicon thin film transistors. Under long-term pressure and high temperature, their threshold voltage will drift, resulting in different display images. Different threshold drifts will cause differences in display brightness. This difference is related to the previously displayed image, so it often appears as an afterimage phenomenon.
  • the main technical problem to be solved by this application is how to compensate the threshold voltage change of the driving transistor, improve the light emission uniformity of the light emitting device, and thereby improve the image quality.
  • the present application provides a pixel driving circuit, including: a storage capacitor, a first receiving module, a second receiving module, a reset module, a compensation module, and a light emitting module; the first receiving module, the second receiving module The module, the reset module and the compensation module are all connected to the storage capacitor, and the compensation module is connected to the light emitting module;
  • a first end of the storage capacitor is connected to a first node, and a second end of the storage capacitor is connected to a second node;
  • the first receiving module is configured to receive a first driving signal and transmit the data signal to the second node under the control of the first driving signal;
  • the second receiving module is configured to receive a first driving signal and transmit a reference signal to the second node under the control of the first driving signal;
  • the reset module is configured to receive the second drive signal and transmit a reset signal to the first node under the control of the second drive signal;
  • the compensation module is configured to receive a third drive signal and perform threshold voltage compensation under the control of the third drive signal
  • the light emitting module is used for receiving a first driving signal and emitting light under the control of the first driving signal.
  • the first receiving module includes: a first transistor
  • the control terminal of the first transistor is connected to the first drive signal, the first terminal of the first transistor is connected to the data signal, and the second terminal of the first transistor is connected to the second node.
  • the second receiving module includes: a second transistor
  • the control terminal of the second transistor is connected to the first driving signal, the first terminal of the second transistor is connected to the reference signal, and the second terminal of the second transistor is connected to the second node.
  • the reset module includes: a third transistor:
  • the control terminal of the third transistor is connected to the second drive signal, the first terminal of the third transistor is connected to the reset signal, and the second terminal of the third transistor is connected to the first node.
  • the compensation module includes: a fourth transistor and a fifth transistor;
  • the control terminal of the fourth transistor is connected to the first node, the first terminal of the fourth transistor is connected to a first power signal, and the second terminal of the fourth transistor and the first terminal of the fifth transistor are connected.
  • the terminals are all connected to the third node, the second terminal of the fifth transistor is connected to the first node, and the control terminal of the fifth transistor is connected to the third drive signal.
  • the light-emitting module includes: a sixth transistor and a light-emitting device
  • the control terminal of the sixth transistor is connected to the first drive signal, the first terminal of the sixth transistor is connected to the third node, and the second terminal of the sixth transistor is connected to the anode of the light emitting device. Connected, the cathode of the light-emitting device is connected with the second power signal.
  • the first transistor is used to control the transmission of the data signal; the second transistor is used to control the transmission of the reference signal; the third transistor is used to control the transmission of the reference signal.
  • the transmission of the reset signal; the fourth transistor is used to determine the driving current of the pixel drive circuit; the fifth transistor is used to control the on and off of the second terminal and the control terminal of the second transistor; the sixth transistor is used To transmit the driving current from the fourth transistor to the light emitting device.
  • the first transistor is an NMOS transistor
  • the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all It is a PMOS tube.
  • the driving timing of the pixel driving circuit includes:
  • Reset stage reset the first end and the second end of the storage capacitor
  • the threshold voltage of the fourth transistor is captured and stored in the storage capacitor
  • the pixel driving circuit In the light-emitting stage, the pixel driving circuit generates a driving current and supplies it to the light-emitting device for driving the light-emitting display of the light-emitting device.
  • the first drive signal in the reset phase, is a high-level signal, the second drive signal is a low-level signal, and the third drive signal is a high-level signal.
  • the third transistor is turned on, the first transistor is turned on, the data signal is transmitted to the second terminal of the storage capacitor, and the reset signal is transmitted to the first terminal of the storage capacitor.
  • the first drive signal is a high-level signal
  • the second drive signal is a high-level signal
  • the third drive signal is a low-level signal.
  • Level signal, the fourth transistor and the fifth transistor are turned on, and the first power signal charges the storage capacitor through the fourth transistor and the fifth transistor until the fourth transistor is connected to its control terminal When the voltage difference of the first terminal is equal to its threshold voltage, it is cut off.
  • the first drive signal is a low-level signal
  • the second drive signal is a high-level signal
  • the third drive signal is a high-level signal.
  • the present application provides a pixel driving circuit, including: a storage capacitor, a first receiving module, a second receiving module, a reset module, a compensation module, and a light emitting module; the first receiving module, the second receiving module The module, the reset module and the compensation module are all connected to the storage capacitor, and the compensation module is connected to the light emitting module;
  • the compensation module is used for receiving a third driving signal and performing threshold voltage compensation under the control of the third driving signal.
  • the first end of the storage capacitor is connected to a first node, and the second end of the storage capacitor is connected to a second node;
  • the first receiving module is configured to receive a first driving signal and transmit the data signal to the second node under the control of the first driving signal;
  • the second receiving module is configured to receive a first driving signal and transmit a reference signal to the second node under the control of the first driving signal;
  • the reset module is configured to receive the second drive signal and transmit a reset signal to the first node under the control of the second drive signal;
  • the light emitting module is used for receiving a first driving signal and emitting light under the control of the first driving signal.
  • the first receiving module includes: a first transistor
  • the control terminal of the first transistor is connected to the first drive signal, the first terminal of the first transistor is connected to the data signal, and the second terminal of the first transistor is connected to the second node.
  • the second receiving module includes: a second transistor
  • the control terminal of the second transistor is connected to the first driving signal, the first terminal of the second transistor is connected to the reference signal, and the second terminal of the second transistor is connected to the second node.
  • the reset module includes: a third transistor:
  • the control terminal of the third transistor is connected to the second drive signal, the first terminal of the third transistor is connected to the reset signal, and the second terminal of the third transistor is connected to the first node.
  • the compensation module includes: a fourth transistor and a fifth transistor;
  • the control terminal of the fourth transistor is connected to the first node, the first terminal of the fourth transistor is connected to a first power signal, and the second terminal of the fourth transistor and the first terminal of the fifth transistor are connected.
  • the terminals are all connected to the third node, the second terminal of the fifth transistor is connected to the first node, and the control terminal of the fifth transistor is connected to the third drive signal.
  • the light-emitting module includes: a sixth transistor and a light-emitting device
  • the control terminal of the sixth transistor is connected to the first drive signal, the first terminal of the sixth transistor is connected to the third node, and the second terminal of the sixth transistor is connected to the anode of the light emitting device. Connected, the cathode of the light-emitting device is connected with the second power signal.
  • the first transistor is used to control the transmission of the data signal; the second transistor is used to control the transmission of the reference signal; the third transistor is used to control the transmission of the reference signal.
  • the transmission of the reset signal; the fourth transistor is used to determine the driving current of the pixel drive circuit; the fifth transistor is used to control the on and off of the second terminal and the control terminal of the second transistor; the sixth transistor is used To transmit the driving current from the fourth transistor to the light emitting device.
  • the first transistor is an NMOS transistor
  • the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all It is a PMOS tube.
  • the driving timing of the pixel driving circuit includes:
  • Reset stage reset the first end and the second end of the storage capacitor
  • the threshold voltage of the fourth transistor is captured and stored in the storage capacitor
  • the pixel driving circuit In the light-emitting stage, the pixel driving circuit generates a driving current and supplies it to the light-emitting device for driving the light-emitting display of the light-emitting device.
  • the first drive signal in the reset phase, is a high-level signal, the second drive signal is a low-level signal, and the third drive signal is a high-level signal.
  • the third transistor is turned on, the first transistor is turned on, the data signal is transmitted to the second terminal of the storage capacitor, and the reset signal is transmitted to the first terminal of the storage capacitor.
  • the first drive signal is a high-level signal
  • the second drive signal is a high-level signal
  • the third drive signal is a low-level signal.
  • Level signal, the fourth transistor and the fifth transistor are turned on, and the first power signal charges the storage capacitor through the fourth transistor and the fifth transistor until the fourth transistor is connected to its control terminal When the voltage difference of the first terminal is equal to its threshold voltage, it is cut off.
  • the first drive signal is a low-level signal
  • the second drive signal is a high-level signal
  • the third drive signal is a high-level signal.
  • the present application provides a display panel including a pixel drive circuit
  • the pixel drive circuit includes a storage capacitor, a first receiving module, a second receiving module, a reset module, a compensation module, and a light emitting module; the first receiving module The module, the second receiving module, the reset module, and the compensation module are all connected to the storage capacitor, and the compensation module is connected to the light emitting module;
  • the compensation module is used for receiving a third driving signal and performing threshold voltage compensation under the control of the third driving signal.
  • the beneficial effect of the present application is that it can compensate for the change of the threshold voltage of the fourth transistor, improve the light emission uniformity of the light emitting device, and thereby improve the image quality.
  • FIG. 1 is a schematic structural diagram of a pixel driving circuit provided by this application.
  • FIG. 2 is a schematic diagram of the principle of the pixel driving circuit provided by this application.
  • 3 is a timing diagram of driving signals of the pixel driving circuit provided by this application.
  • FIG. 4 is a schematic diagram of the current path of the pixel driving circuit provided by this application in the reset phase under the driving timing shown in FIG. 3;
  • FIG. 5 is a schematic diagram of the current path of the pixel driving circuit provided by this application in the compensation stage under the driving timing shown in FIG. 3;
  • FIG. 6 is a schematic diagram of the current path of the pixel driving circuit provided by this application in the light-emitting phase under the driving timing shown in FIG. 3.
  • FIG. 1 is a schematic structural diagram of a pixel driving circuit provided by this application.
  • the present application provides a pixel driving circuit 1 including a storage capacitor C1, a first receiving module 11, a second receiving module 12, a reset module 13, a compensation module 14, and a light emitting module 15.
  • the first receiving module 11, the second receiving module 12, the reset module 13 and the compensation module 14 are all connected to the storage capacitor C1, and the compensation module 14 is connected to the light emitting module 15.
  • the first receiving module 11 is used for receiving the first driving signal EM and transmitting the data signal D to the second node under the control of the first driving signal EM.
  • the second receiving module 12 is configured to receive the first driving signal EM and transmit the reference signal Ref to the second node N2 under the control of the first driving signal EM.
  • the reset module 13 is used for receiving the second driving signal R and transmitting the reset signal int to the first node N1 under the control of the second driving signal R.
  • the compensation module 14 is used for receiving the third driving signal G and performing threshold voltage compensation under the control of the third driving signal G.
  • the light emitting module 15 is used for receiving the first driving signal EM and emitting light under the control of the first driving signal EM.
  • FIG. 2 is a schematic diagram of the principle of the pixel driving circuit provided by this application.
  • the pixel driving circuit 1 includes: a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a storage capacitor C1, and a light emitting device D2.
  • the fourth transistor T4 is a driving transistor
  • the fourth transistor T4 is used to determine the driving current of the pixel driving circuit
  • the light-emitting device D2 is used to emit light in response to the driving current.
  • the transistors used in the embodiments of the present application may be thin film transistors or field effect transistors or other devices with the same characteristics.
  • the transistors used in the embodiments of the present application may include two types: P-type transistors and/or N-type transistors.
  • the P-type transistor is turned on when the control terminal is at a low level and turned off when the control terminal is at a high level. To turn on when the control terminal is at a high level, and turn off when the control terminal is at a low level.
  • the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all PMOS transistors, and the first transistor T1 is an NMOS transistor.
  • the first receiving module 11 includes a first transistor T1.
  • the control terminal of the first transistor T1 is connected to the first driving signal EM, the first terminal of the first transistor T1 is connected to the data signal D, and the second terminal of the first transistor T1 is connected to the second node N2.
  • the second receiving module 12 includes a second transistor T2.
  • the control terminal of the second transistor T2 is connected to the first driving signal EM, the first terminal of the second transistor T2 is connected to the reference signal Ref, and the second terminal of the second transistor T2 is connected to the second node N2.
  • the reset module 13 includes a third transistor T3.
  • the control terminal of the third transistor T3 is connected to the second driving signal R, the second terminal of the third transistor T3 is connected to the first node N1, and the first terminal of the third transistor T3 is connected to the reset signal int.
  • the compensation module 14 includes a fourth transistor T4 and a fifth transistor T5.
  • the control terminal of the fourth transistor T4 is connected to the first node N1
  • the first terminal of the fourth transistor T4 is connected to the first power signal ELVDD
  • the second terminal of the fourth transistor T4 and the first terminal of the fifth transistor T5 are both connected to the Three-node N3 connection.
  • the second end of the fifth transistor T5 is connected to the first node N1, and the control end of the fifth transistor T5 is connected to the third driving signal G.
  • the light emitting module 15 includes a sixth transistor T6 and a light emitting device D2.
  • the control terminal of the sixth transistor T6 is connected to the first driving signal EM, and the first terminal of the sixth transistor T6 is connected to the third node N3.
  • the second end of the sixth transistor T6 is connected to the anode of the light emitting device D2.
  • the cathode of the light emitting device D2 is connected to the second power signal ELVSS.
  • the first transistor T1 is used to control the transmission of the data signal D.
  • the second transistor T2 is used to control the transmission of the reference signal Ref.
  • the third transistor T3 is used to control the transmission of the reset signal int.
  • the fourth transistor T4 is used to determine the driving current of the pixel driving circuit 1.
  • the fifth transistor T5 is used to control the on-off of the second terminal and the control terminal of the fourth transistor T4.
  • the sixth transistor T6 is used to transmit the driving current from the fourth transistor T4 to the light emitting device D2.
  • FIG. 3 is a timing diagram of driving signals of the pixel driving circuit provided by this application.
  • the driving timing of the pixel driving circuit 1 includes: a reset phase t1, a compensation phase t2, and a light-emitting phase t3.
  • the reset stage t1 the first terminal (that is, the first node N1) and the second terminal (that is, the second node N2) of the storage capacitor C1 are reset.
  • the compensation phase t2 the threshold voltage of the fourth transistor T4 is captured and stored in the storage capacitor C1.
  • the pixel driving circuit 1 generates a driving current and supplies it to the light-emitting device D2 for driving the light-emitting display of the light-emitting device D2.
  • FIG. 4 is a schematic diagram of the current path of the pixel driving circuit provided by this application in the reset phase under the driving timing shown in FIG. 3.
  • the first driving signal EM is a high-level signal
  • the second driving signal R is a low-level signal
  • the third driving signal G is a high-level signal. Therefore, in the first aspect, the third transistor turns on T3, the reset signal int is transmitted to the first node N1, that is, the reset voltage Vint of the reset signal int is transmitted to the first end of the storage capacitor C1, thereby completing the storage capacitor C1 The first end is reset.
  • the first transistor T1 is turned on, the data signal D is transmitted to the second node N2, that is, the data voltage Vd of the data signal D is transmitted to the second end of the storage capacitor C1, thereby completing the second end of the storage capacitor C1. Terminal reset.
  • the second transistor T2, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are turned off.
  • FIG. 3 is a schematic diagram of the current path of the pixel driving circuit provided by this application in the compensation stage under the driving timing shown in FIG.
  • the first driving signal EM is a high-level signal
  • the second driving signal R is a high-level signal
  • the third driving signal G is a low-level signal.
  • the second transistor T2, the third transistor T3, and the sixth transistor T6 are turned off.
  • the first driving signal EM continues to maintain a high level signal, the first transistor T1 is turned on, and the data voltage Vd of the data signal D is transmitted to the second node N2 through the first transistor T1, so that the voltage of the second node N2 is Vd, that is, the voltage at the second end of the storage capacitor C1 at this time is Vd.
  • the third driving signal is a low level signal
  • the fourth transistor T4 and the fifth transistor T5 are turned on
  • the first power signal ELVDD charges the storage capacitor C1 through the fourth transistor T4 and the fifth transistor T5, that is, the first power signal ELVDD
  • the first power supply voltage Vdd charges the storage capacitor C1 through the fourth transistor T4 and the fifth transistor T5 until the fourth transistor T4 turns off when the voltage difference between its control terminal and the first terminal is equal to its threshold voltage Vth
  • the potential of the T4 control terminal is Vdd-
  • FIG. 6 is a schematic diagram of the current path of the pixel driving circuit provided by this application in the light-emitting phase under the driving timing shown in FIG. 3.
  • the first driving signal EM is a low-level signal
  • the second driving signal R is a high-level signal
  • the third driving signal G is a high-level signal.
  • the first transistor T1, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are turned off.
  • the second transistor T2 is turned on, the reference signal Ref is transmitted to the second node N2 through the second transistor T2, that is, the reference voltage Vref of the reference signal Ref is transmitted to the second node N2 through the second transistor T2, and the potential of the second node N2 is Is Vref, that is, the potential of the second end of the storage capacitor C1 is Vref.
  • the potential of the first end of the storage capacitor C1 is Vdd-
  • the potential of the second end of the storage capacitor C1 jumps to Vref. Due to the capacitive coupling effect, the potential of the first end of the storage capacitor C1 also changes accordingly.
  • the potential of the first end of the storage capacitor C1 is Vdd-
  • the potential of the first terminal (source terminal) of the fourth transistor T4 is Vdd
  • the potential of the control terminal (gate terminal) is Vdd-
  • the gate-source voltage Vgs Vdd-(Vdd-
  • -Vd+Vref) Vd+
  • the pixel driving circuit 1 eliminates the influence of the threshold voltage Vth of the fourth transistor T4 on the brightness uniformity of the AMOLED display, can compensate for the threshold voltage changes of the fourth transistor T4, and improve the uniformity of light emission of the light-emitting device, thereby improving Picture quality, and brightness can be controlled by adjusting Vref.
  • the application also provides a display panel, which includes a pixel driving circuit 1.
  • a display panel which includes a pixel driving circuit 1.
  • pixel driving circuit 1 For the specific structure of the pixel driving circuit 1, please refer to the previous embodiment, which will not be repeated here.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

A pixel driving circuit (1) and a display panel. The pixel driving circuit (1) comprises: a first transistor (T1), a second transistor (T2), a third transistor (T3), a fourth transistor (T4), a fifth transistor (T5), a sixth transistor (T6), and a storage capacitor (C1); and when a third driving signal (G) is turned on, a drain of the fourth transistor (T4) applies, to a first end of the storage capacitor (C1), a first power supply signal (ELVDD) together with the threshold voltage of the fourth transistor (T4), so as to cancel the threshold voltage of the fourth transistor (T4).

Description

像素驱动电路以及显示面板Pixel driving circuit and display panel 技术领域Technical field

本申请涉及显示技术领域,具体一种像素驱动电路以及像素驱动电路的补偿方法。This application relates to the field of display technology, specifically a pixel drive circuit and a compensation method of the pixel drive circuit.

背景技术Background technique

现有技术中,像素驱动电路中的晶体管大多采用低温多晶硅薄膜晶体管或氧化物薄膜晶体管。与一般的非晶硅薄膜晶体管相比,低温多晶硅薄膜晶体管和氧化物薄膜晶体管具有更高的迁移率和更稳定的特性,更适合应用于有源矩阵有机发光二极管(Active-matrix organic light-emitting diode,AMOLED)显示中。In the prior art, most of the transistors in the pixel driving circuit are low-temperature polysilicon thin film transistors or oxide thin film transistors. Compared with general amorphous silicon thin film transistors, low-temperature polysilicon thin film transistors and oxide thin film transistors have higher mobility and more stable characteristics, and are more suitable for active-matrix organic light-emitting diodes (Active-matrix organic light-emitting diodes). diode, AMOLED) is displaying.

但是由于晶化工艺的局限性,在大面积玻璃基板上制作的低温多晶硅薄膜晶体管,常常在诸如阈值电压、迁移率等电学参数上具有非均匀性。这种非均匀性会转化为有机发光二极管(Organic Light Emitting Diode,OLED)器件的驱动电流差异和亮度差异,并被人眼所感知,即色不均现象。而氧化物薄膜晶体管虽然工艺的均匀性较好,但是与非晶硅薄膜晶体管类似,在长时间加压和高温下,其阈值电压会出现漂移,导致显示画面不同,由于面板各部分薄膜晶体管的阈值漂移量不同,会造成显示亮度差异。而这种差异与之前显示的图像有关,因此常呈现为残影现象。However, due to the limitations of the crystallization process, low-temperature polysilicon thin film transistors fabricated on large-area glass substrates often have non-uniformities in electrical parameters such as threshold voltage and mobility. This non-uniformity will be transformed into a difference in driving current and brightness of an organic light emitting diode (OLED) device, which is perceived by the human eye, that is, the phenomenon of color unevenness. Although oxide thin film transistors have better process uniformity, they are similar to amorphous silicon thin film transistors. Under long-term pressure and high temperature, their threshold voltage will drift, resulting in different display images. Different threshold drifts will cause differences in display brightness. This difference is related to the previously displayed image, so it often appears as an afterimage phenomenon.

技术问题technical problem

本申请主要解决的技术问题,如何能够补偿驱动晶体管的阈值电压变化,提高发光器件的发光均匀性,进而提升画质。The main technical problem to be solved by this application is how to compensate the threshold voltage change of the driving transistor, improve the light emission uniformity of the light emitting device, and thereby improve the image quality.

技术解决方案Technical solutions

第一方面,本申请提供了一种像素驱动电路,包括:存储电容、第一接收模块、第二接收模块、复位模块、补偿模块以及发光模块;所述第一接收模块、所述第二接收模块、所述复位模块以及所述补偿模块均与所述存储电容连接,所述补偿模块与所述发光模块连接;In the first aspect, the present application provides a pixel driving circuit, including: a storage capacitor, a first receiving module, a second receiving module, a reset module, a compensation module, and a light emitting module; the first receiving module, the second receiving module The module, the reset module and the compensation module are all connected to the storage capacitor, and the compensation module is connected to the light emitting module;

其中,among them,

所述存储电容的第一端与第一节点相连接,所述存储电容的第二端与第二节点相连接;A first end of the storage capacitor is connected to a first node, and a second end of the storage capacitor is connected to a second node;

所述第一接收模块用于接收第一驱动信号并在所述第一驱动信号的控制下将所述数据信号传输至所述第二节点;The first receiving module is configured to receive a first driving signal and transmit the data signal to the second node under the control of the first driving signal;

所述第二接收模块用于接收第一驱动信号并在所述第一驱动信号的控制下将参考信号传输至所述第二节点;The second receiving module is configured to receive a first driving signal and transmit a reference signal to the second node under the control of the first driving signal;

所述复位模块用于接收所述第二驱动信号并在所述第二驱动信号的控制下将复位信号传输至所述第一节点;The reset module is configured to receive the second drive signal and transmit a reset signal to the first node under the control of the second drive signal;

所述补偿模块用于接收第三驱动信号并在所述第三驱动信号的控制下进行阈值电压补偿;The compensation module is configured to receive a third drive signal and perform threshold voltage compensation under the control of the third drive signal;

所述发光模块用于接收第一驱动信号并在所述第一驱动信号的控制下发光。The light emitting module is used for receiving a first driving signal and emitting light under the control of the first driving signal.

在本申请所提供的像素驱动电路中,所述第一接收模块包括:第一晶体管;In the pixel driving circuit provided by the present application, the first receiving module includes: a first transistor;

所述第一晶体管的控制端与所述第一驱动信号连接,所述第一晶体管的第一端与所述数据信号连接,所述第一晶体管的第二端与所述第二节点连接。The control terminal of the first transistor is connected to the first drive signal, the first terminal of the first transistor is connected to the data signal, and the second terminal of the first transistor is connected to the second node.

在本申请所提供的像素驱动电路中,所述第二接收模块包括:第二晶体管;In the pixel driving circuit provided in the present application, the second receiving module includes: a second transistor;

所述第二晶体管的控制端与所述第一驱动信号连接,所述第二晶体管的第一端与所述参考信号连接,所述第二晶体管的第二端与所述第二节点连接。The control terminal of the second transistor is connected to the first driving signal, the first terminal of the second transistor is connected to the reference signal, and the second terminal of the second transistor is connected to the second node.

在本申请所提供的像素驱动电路中,所述复位模块包括:第三晶体管:In the pixel driving circuit provided by the present application, the reset module includes: a third transistor:

所述第三晶体管的控制端与所述第二驱动信号连接,所述第三晶体管的第一端与所述复位信号连接,所述第三晶体管的第二端与所述第一节点连接。The control terminal of the third transistor is connected to the second drive signal, the first terminal of the third transistor is connected to the reset signal, and the second terminal of the third transistor is connected to the first node.

在本申请所提供的像素驱动电路中,所述补偿模块包括:第四晶体管以及第五晶体管;In the pixel driving circuit provided by the present application, the compensation module includes: a fourth transistor and a fifth transistor;

所述第四晶体管的控制端与所述第一节点连接,所述第四晶体管的第一端与第一电源信号连接,所述第四晶体管的第二端以及所述第五晶体管的第一端均与第三节点连接,所述第五晶体管的第二端与所述第一节点连接,所述第五晶体管的控制端与所述第三驱动信号连接。The control terminal of the fourth transistor is connected to the first node, the first terminal of the fourth transistor is connected to a first power signal, and the second terminal of the fourth transistor and the first terminal of the fifth transistor are connected. The terminals are all connected to the third node, the second terminal of the fifth transistor is connected to the first node, and the control terminal of the fifth transistor is connected to the third drive signal.

在本申请所提供的像素驱动电路中,所述发光模块包括:第六晶体管以及发光器件;In the pixel driving circuit provided by the present application, the light-emitting module includes: a sixth transistor and a light-emitting device;

所述第六晶体管的控制端与所述第一驱动信号连接,所述第六晶体管的第一端与所述第三节点连接,所述第六晶体管的第二端与所述发光器件的阳极连接,所述发光器件的阴极与第二电源信号连接。The control terminal of the sixth transistor is connected to the first drive signal, the first terminal of the sixth transistor is connected to the third node, and the second terminal of the sixth transistor is connected to the anode of the light emitting device. Connected, the cathode of the light-emitting device is connected with the second power signal.

在本申请所提供的像素驱动电路中,所述第一晶体管用于控制所述数据信号的传输;所述第二晶体管用于控制所述参考信号的传输;所述第三晶体管用于控制所述复位信号的传输;所述第四晶体管用于确定像素驱动电路的驱动电流;所述第五晶体管用于控制所述第二晶体管的第二端与控制端的通断;所述第六晶体管用于将来自所述第四晶体管的驱动电流传输至所述发光器件。In the pixel driving circuit provided by the present application, the first transistor is used to control the transmission of the data signal; the second transistor is used to control the transmission of the reference signal; the third transistor is used to control the transmission of the reference signal. The transmission of the reset signal; the fourth transistor is used to determine the driving current of the pixel drive circuit; the fifth transistor is used to control the on and off of the second terminal and the control terminal of the second transistor; the sixth transistor is used To transmit the driving current from the fourth transistor to the light emitting device.

在本申请所提供的像素驱动电路中,所述第一晶体管为NMOS管,所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管以及所述第六晶体管均为PMOS管。In the pixel driving circuit provided by the present application, the first transistor is an NMOS transistor, and the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all It is a PMOS tube.

在本申请所提供的像素驱动电路中,所述像素驱动电路的驱动时序包括:In the pixel driving circuit provided by the present application, the driving timing of the pixel driving circuit includes:

复位阶段,对所述存储电容的第一端和第二端进行复位;Reset stage, reset the first end and the second end of the storage capacitor;

补偿阶段,抓取所述第四晶体管的阈值电压并存储在所述存储电容上;In the compensation phase, the threshold voltage of the fourth transistor is captured and stored in the storage capacitor;

发光阶段,像素驱动电路产生驱动电流并提供至所述发光器件,用于驱动所述发光器件的发光显示。In the light-emitting stage, the pixel driving circuit generates a driving current and supplies it to the light-emitting device for driving the light-emitting display of the light-emitting device.

在本申请所提供的像素驱动电路中,在所述复位阶段,所述第一驱动信号为高电平信号,所述第二驱动信号为低电平信号,所述第三驱动信号为高电平信号,所述第三晶体管导通,所述第一晶体管导通,所述数据信号传输至所述存储电容的的第二端,所述复位信号传输至 所述存储电容的第一端。In the pixel drive circuit provided by the present application, in the reset phase, the first drive signal is a high-level signal, the second drive signal is a low-level signal, and the third drive signal is a high-level signal. Signal, the third transistor is turned on, the first transistor is turned on, the data signal is transmitted to the second terminal of the storage capacitor, and the reset signal is transmitted to the first terminal of the storage capacitor.

在本申请所提供的像素驱动电路中,在所述补偿阶段,所述第一驱动信号为高电平信号,所述第二驱动信号为高电平信号,所述第三驱动信号为低电平信号,所述第四晶体管和第五晶体管导通,所述第一电源信号通过所述第四晶体管和第五晶体管对所述存储电容进行充电,直至所述第四晶体管在其控制端和第一端的压差等于其阈值电压时截止。In the pixel drive circuit provided by the present application, in the compensation stage, the first drive signal is a high-level signal, the second drive signal is a high-level signal, and the third drive signal is a low-level signal. Level signal, the fourth transistor and the fifth transistor are turned on, and the first power signal charges the storage capacitor through the fourth transistor and the fifth transistor until the fourth transistor is connected to its control terminal When the voltage difference of the first terminal is equal to its threshold voltage, it is cut off.

在本申请所提供的像素驱动电路中,在所述发光阶段,所述第一驱动信号为低电平信号,所述第二驱动信号为高电平信号,所述第三驱动信号为高电平信号,所述第二晶体管导通,所述参考信号通过所述第二晶体管传输至所述第二节点;所述第六晶体管导通,所述发光器件发光。In the pixel drive circuit provided by the present application, in the light-emitting phase, the first drive signal is a low-level signal, the second drive signal is a high-level signal, and the third drive signal is a high-level signal. When the signal is flat, the second transistor is turned on, and the reference signal is transmitted to the second node through the second transistor; the sixth transistor is turned on, and the light emitting device emits light.

第二方面,本申请提供了一种像素驱动电路,包括:存储电容、第一接收模块、第二接收模块、复位模块、补偿模块以及发光模块;所述第一接收模块、所述第二接收模块、所述复位模块以及所述补偿模块均与所述存储电容连接,所述补偿模块与所述发光模块连接;In the second aspect, the present application provides a pixel driving circuit, including: a storage capacitor, a first receiving module, a second receiving module, a reset module, a compensation module, and a light emitting module; the first receiving module, the second receiving module The module, the reset module and the compensation module are all connected to the storage capacitor, and the compensation module is connected to the light emitting module;

其中,所述补偿模块用于接收第三驱动信号并在所述第三驱动信号的控制下进行阈值电压补偿。Wherein, the compensation module is used for receiving a third driving signal and performing threshold voltage compensation under the control of the third driving signal.

在本申请所提供的像素驱动电路中,所述存储电容的第一端与第一节点相连接,所述存储电容的第二端与第二节点相连接;In the pixel driving circuit provided by the present application, the first end of the storage capacitor is connected to a first node, and the second end of the storage capacitor is connected to a second node;

所述第一接收模块用于接收第一驱动信号并在所述第一驱动信号的控制下将所述数据信号传输至所述第二节点;The first receiving module is configured to receive a first driving signal and transmit the data signal to the second node under the control of the first driving signal;

所述第二接收模块用于接收第一驱动信号并在所述第一驱动信号的控制下将参考信号传输至所述第二节点;The second receiving module is configured to receive a first driving signal and transmit a reference signal to the second node under the control of the first driving signal;

所述复位模块用于接收所述第二驱动信号并在所述第二驱动信号的控制下将复位信号传输至所述第一节点;The reset module is configured to receive the second drive signal and transmit a reset signal to the first node under the control of the second drive signal;

所述发光模块用于接收第一驱动信号并在所述第一驱动信号的控制下发光。The light emitting module is used for receiving a first driving signal and emitting light under the control of the first driving signal.

在本申请所提供的像素驱动电路中,所述第一接收模块包括:第 一晶体管;In the pixel driving circuit provided by the present application, the first receiving module includes: a first transistor;

所述第一晶体管的控制端与所述第一驱动信号连接,所述第一晶体管的第一端与所述数据信号连接,所述第一晶体管的第二端与所述第二节点连接。The control terminal of the first transistor is connected to the first drive signal, the first terminal of the first transistor is connected to the data signal, and the second terminal of the first transistor is connected to the second node.

在本申请所提供的像素驱动电路中,所述第二接收模块包括:第二晶体管;In the pixel driving circuit provided in the present application, the second receiving module includes: a second transistor;

所述第二晶体管的控制端与所述第一驱动信号连接,所述第二晶体管的第一端与所述参考信号连接,所述第二晶体管的第二端与所述第二节点连接。The control terminal of the second transistor is connected to the first driving signal, the first terminal of the second transistor is connected to the reference signal, and the second terminal of the second transistor is connected to the second node.

在本申请所提供的像素驱动电路中,所述复位模块包括:第三晶体管:In the pixel driving circuit provided by the present application, the reset module includes: a third transistor:

所述第三晶体管的控制端与所述第二驱动信号连接,所述第三晶体管的第一端与所述复位信号连接,所述第三晶体管的第二端与所述第一节点连接。The control terminal of the third transistor is connected to the second drive signal, the first terminal of the third transistor is connected to the reset signal, and the second terminal of the third transistor is connected to the first node.

在本申请所提供的像素驱动电路中,所述补偿模块包括:第四晶体管以及第五晶体管;In the pixel driving circuit provided by the present application, the compensation module includes: a fourth transistor and a fifth transistor;

所述第四晶体管的控制端与所述第一节点连接,所述第四晶体管的第一端与第一电源信号连接,所述第四晶体管的第二端以及所述第五晶体管的第一端均与第三节点连接,所述第五晶体管的第二端与所述第一节点连接,所述第五晶体管的控制端与所述第三驱动信号连接。The control terminal of the fourth transistor is connected to the first node, the first terminal of the fourth transistor is connected to a first power signal, and the second terminal of the fourth transistor and the first terminal of the fifth transistor are connected. The terminals are all connected to the third node, the second terminal of the fifth transistor is connected to the first node, and the control terminal of the fifth transistor is connected to the third drive signal.

在本申请所提供的像素驱动电路中,所述发光模块包括:第六晶体管以及发光器件;In the pixel driving circuit provided by the present application, the light-emitting module includes: a sixth transistor and a light-emitting device;

所述第六晶体管的控制端与所述第一驱动信号连接,所述第六晶体管的第一端与所述第三节点连接,所述第六晶体管的第二端与所述发光器件的阳极连接,所述发光器件的阴极与第二电源信号连接。The control terminal of the sixth transistor is connected to the first drive signal, the first terminal of the sixth transistor is connected to the third node, and the second terminal of the sixth transistor is connected to the anode of the light emitting device. Connected, the cathode of the light-emitting device is connected with the second power signal.

在本申请所提供的像素驱动电路中,所述第一晶体管用于控制所述数据信号的传输;所述第二晶体管用于控制所述参考信号的传输;所述第三晶体管用于控制所述复位信号的传输;所述第四晶体管用于确定像素驱动电路的驱动电流;所述第五晶体管用于控制所述第二晶 体管的第二端与控制端的通断;所述第六晶体管用于将来自所述第四晶体管的驱动电流传输至所述发光器件。In the pixel driving circuit provided by the present application, the first transistor is used to control the transmission of the data signal; the second transistor is used to control the transmission of the reference signal; the third transistor is used to control the transmission of the reference signal. The transmission of the reset signal; the fourth transistor is used to determine the driving current of the pixel drive circuit; the fifth transistor is used to control the on and off of the second terminal and the control terminal of the second transistor; the sixth transistor is used To transmit the driving current from the fourth transistor to the light emitting device.

在本申请所提供的像素驱动电路中,所述第一晶体管为NMOS管,所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管以及所述第六晶体管均为PMOS管。In the pixel driving circuit provided by the present application, the first transistor is an NMOS transistor, and the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all It is a PMOS tube.

在本申请所提供的像素驱动电路中,所述像素驱动电路的驱动时序包括:In the pixel driving circuit provided by the present application, the driving timing of the pixel driving circuit includes:

复位阶段,对所述存储电容的第一端和第二端进行复位;Reset stage, reset the first end and the second end of the storage capacitor;

补偿阶段,抓取所述第四晶体管的阈值电压并存储在所述存储电容上;In the compensation phase, the threshold voltage of the fourth transistor is captured and stored in the storage capacitor;

发光阶段,像素驱动电路产生驱动电流并提供至所述发光器件,用于驱动所述发光器件的发光显示。In the light-emitting stage, the pixel driving circuit generates a driving current and supplies it to the light-emitting device for driving the light-emitting display of the light-emitting device.

在本申请所提供的像素驱动电路中,在所述复位阶段,所述第一驱动信号为高电平信号,所述第二驱动信号为低电平信号,所述第三驱动信号为高电平信号,所述第三晶体管导通,所述第一晶体管导通,所述数据信号传输至所述存储电容的的第二端,所述复位信号传输至所述存储电容的第一端。In the pixel drive circuit provided by the present application, in the reset phase, the first drive signal is a high-level signal, the second drive signal is a low-level signal, and the third drive signal is a high-level signal. Signal, the third transistor is turned on, the first transistor is turned on, the data signal is transmitted to the second terminal of the storage capacitor, and the reset signal is transmitted to the first terminal of the storage capacitor.

在本申请所提供的像素驱动电路中,在所述补偿阶段,所述第一驱动信号为高电平信号,所述第二驱动信号为高电平信号,所述第三驱动信号为低电平信号,所述第四晶体管和第五晶体管导通,所述第一电源信号通过所述第四晶体管和第五晶体管对所述存储电容进行充电,直至所述第四晶体管在其控制端和第一端的压差等于其阈值电压时截止。In the pixel drive circuit provided by the present application, in the compensation stage, the first drive signal is a high-level signal, the second drive signal is a high-level signal, and the third drive signal is a low-level signal. Level signal, the fourth transistor and the fifth transistor are turned on, and the first power signal charges the storage capacitor through the fourth transistor and the fifth transistor until the fourth transistor is connected to its control terminal When the voltage difference of the first terminal is equal to its threshold voltage, it is cut off.

在本申请所提供的像素驱动电路中,在所述发光阶段,所述第一驱动信号为低电平信号,所述第二驱动信号为高电平信号,所述第三驱动信号为高电平信号,所述第二晶体管导通,所述参考信号通过所述第二晶体管传输至所述第二节点;所述第六晶体管导通,所述发光器件发光。In the pixel drive circuit provided by the present application, in the light-emitting phase, the first drive signal is a low-level signal, the second drive signal is a high-level signal, and the third drive signal is a high-level signal. When the signal is flat, the second transistor is turned on, and the reference signal is transmitted to the second node through the second transistor; the sixth transistor is turned on, and the light emitting device emits light.

第三方面,本申请提供一种显示面板,包括像素驱动电路,所述 像素驱动电路包括存储电容、第一接收模块、第二接收模块、复位模块、补偿模块以及发光模块;所述第一接收模块、所述第二接收模块、所述复位模块以及所述补偿模块均与所述存储电容连接,所述补偿模块与所述发光模块连接;In a third aspect, the present application provides a display panel including a pixel drive circuit, the pixel drive circuit includes a storage capacitor, a first receiving module, a second receiving module, a reset module, a compensation module, and a light emitting module; the first receiving module The module, the second receiving module, the reset module, and the compensation module are all connected to the storage capacitor, and the compensation module is connected to the light emitting module;

其中,所述补偿模块用于接收第三驱动信号并在所述第三驱动信号的控制下进行阈值电压补偿。Wherein, the compensation module is used for receiving a third driving signal and performing threshold voltage compensation under the control of the third driving signal.

有益效果Beneficial effect

本申请的有益效果是:能够补偿第四晶体管的阈值电压变化,提高发光器件的发光均匀性,进而提升画质。The beneficial effect of the present application is that it can compensate for the change of the threshold voltage of the fourth transistor, improve the light emission uniformity of the light emitting device, and thereby improve the image quality.

附图说明Description of the drawings

为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to explain the embodiments or the technical solutions in the prior art more clearly, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only for application. For some embodiments, those of ordinary skill in the art can obtain other drawings based on these drawings without creative work.

图1为本申请提供的像素驱动电路的结构示意图;FIG. 1 is a schematic structural diagram of a pixel driving circuit provided by this application;

图2为本申请提供的像素驱动电路的原理示意图;2 is a schematic diagram of the principle of the pixel driving circuit provided by this application;

图3为本申请提供的像素驱动电路的驱动信号的时序图;3 is a timing diagram of driving signals of the pixel driving circuit provided by this application;

图4为本申请提供的像素驱动电路在图3所示的驱动时序下处于复位阶段的电流通路示意图;4 is a schematic diagram of the current path of the pixel driving circuit provided by this application in the reset phase under the driving timing shown in FIG. 3;

图5为本申请提供的像素驱动电路在图3所示的驱动时序下处于补偿阶段的电流通路示意图;FIG. 5 is a schematic diagram of the current path of the pixel driving circuit provided by this application in the compensation stage under the driving timing shown in FIG. 3;

图6为本申请提供的像素驱动电路在图3所示的驱动时序下处于发光阶段的电流通路示意图。FIG. 6 is a schematic diagram of the current path of the pixel driving circuit provided by this application in the light-emitting phase under the driving timing shown in FIG. 3.

本发明的实施方式Embodiments of the invention

下面详细描述本申请的实施方式,所述实施方式的示例在附图中示出,其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施方式是示例性 的,仅用于解释本申请,而不能理解为对本申请的限制。The embodiments of the present application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals indicate the same or similar elements or elements with the same or similar functions. The following embodiments described with reference to the drawings are exemplary, and are only used to explain the present application, and cannot be understood as a limitation to the present application.

请参阅图1,图1为本申请提供的像素驱动电路的结构示意图。本申请提供一种像素驱动电路1,包括存储电容C1、第一接收模块11、第二接收模块12、复位模块13、补偿模块14以及发光模块15。Please refer to FIG. 1. FIG. 1 is a schematic structural diagram of a pixel driving circuit provided by this application. The present application provides a pixel driving circuit 1 including a storage capacitor C1, a first receiving module 11, a second receiving module 12, a reset module 13, a compensation module 14, and a light emitting module 15.

第一接收模块11、第二接收模块12、复位模块13以及补偿模块14均存储电容C1连接,补偿模块14与发光模块15连接。The first receiving module 11, the second receiving module 12, the reset module 13 and the compensation module 14 are all connected to the storage capacitor C1, and the compensation module 14 is connected to the light emitting module 15.

进一步的,存储电容10的第一端与第一节点N1相连接,存储电容C1的第二端与第二节点N2相连接。第一接收模块11用于接收第一驱动信号EM并在第一驱动信号EM的控制下将数据信号D传输至第二节点。第二接收模块12用于接收第一驱动信号EM并在第一驱动信号EM的控制下将参考信号Ref传输至第二节点N2。复位模块13用于接收第二驱动信号R并在第二驱动信号R的控制下将复位信号int传输至第一节点N1。补偿模块14用于接收第三驱动信号G并在第三驱动信号G的控制下进行阈值电压补偿。发光模块15用于接收第一驱动信号EM并在第一驱动信号EM的控制下发光。Further, the first end of the storage capacitor 10 is connected to the first node N1, and the second end of the storage capacitor C1 is connected to the second node N2. The first receiving module 11 is used for receiving the first driving signal EM and transmitting the data signal D to the second node under the control of the first driving signal EM. The second receiving module 12 is configured to receive the first driving signal EM and transmit the reference signal Ref to the second node N2 under the control of the first driving signal EM. The reset module 13 is used for receiving the second driving signal R and transmitting the reset signal int to the first node N1 under the control of the second driving signal R. The compensation module 14 is used for receiving the third driving signal G and performing threshold voltage compensation under the control of the third driving signal G. The light emitting module 15 is used for receiving the first driving signal EM and emitting light under the control of the first driving signal EM.

请参阅图2,图2为本申请提供的像素驱动电路的原理示意图。如图2所示,该像素驱动电路1,包括:第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5、第六晶体管T6、存储电容C1以及发光器件D2。其中,第四晶体管T4为驱动晶体管,第四晶体管T4是用于确定像素驱动电路的驱动电流,发光器件D2用于响应驱动电流而发光显示。Please refer to FIG. 2. FIG. 2 is a schematic diagram of the principle of the pixel driving circuit provided by this application. As shown in FIG. 2, the pixel driving circuit 1 includes: a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a storage capacitor C1, and a light emitting device D2. Among them, the fourth transistor T4 is a driving transistor, the fourth transistor T4 is used to determine the driving current of the pixel driving circuit, and the light-emitting device D2 is used to emit light in response to the driving current.

需要说明的是,本申请实施例中采用的晶体管可以为薄膜晶体管或场效应管或其他特性相同的器件。此外本申请实施例所采用的晶体管可以包括P型晶体管和/或N型晶体管两种,其中,P型晶体管在控制端为低电平时导通,在控制端为高电平时截止,N型晶体管为在控制端为高电平时导通,在控制端为低电平时截止。It should be noted that the transistors used in the embodiments of the present application may be thin film transistors or field effect transistors or other devices with the same characteristics. In addition, the transistors used in the embodiments of the present application may include two types: P-type transistors and/or N-type transistors. The P-type transistor is turned on when the control terminal is at a low level and turned off when the control terminal is at a high level. To turn on when the control terminal is at a high level, and turn off when the control terminal is at a low level.

在一些实施方式中,第二晶体管T2、第三晶体管T3、第四晶体管T4第五晶体管T5以及第六晶体管T6均为PMOS管,第一晶体管T1为NMOS管。In some embodiments, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all PMOS transistors, and the first transistor T1 is an NMOS transistor.

请继续参阅图2,第一接收模块11包括第一晶体管T1。该第一晶体管T1的控制端与第一驱动信号EM连接,第一晶体管T1的第一端与数据信号D连接,第一晶体管T1的第二端与第二节点N2连接。Please continue to refer to FIG. 2, the first receiving module 11 includes a first transistor T1. The control terminal of the first transistor T1 is connected to the first driving signal EM, the first terminal of the first transistor T1 is connected to the data signal D, and the second terminal of the first transistor T1 is connected to the second node N2.

第二接收模块12包括第二晶体管T2。第二晶体管T2的控制端与第一驱动信号EM连接,第二晶体管T2的第一端与参考信号Ref连接,第二晶体管T2的第二端与第二节点N2连接。The second receiving module 12 includes a second transistor T2. The control terminal of the second transistor T2 is connected to the first driving signal EM, the first terminal of the second transistor T2 is connected to the reference signal Ref, and the second terminal of the second transistor T2 is connected to the second node N2.

复位模块13包括第三晶体管T3。第三晶体管T3的控制端与第二驱动信号R连接,第三晶体管T3的第二端与第一节点N1连接,第三晶体管T3的第一端与复位信号int连接。The reset module 13 includes a third transistor T3. The control terminal of the third transistor T3 is connected to the second driving signal R, the second terminal of the third transistor T3 is connected to the first node N1, and the first terminal of the third transistor T3 is connected to the reset signal int.

补偿模块14包括第四晶体管T4以及第五晶体管T5。第四晶体管T4的控制端与第一节点N1连接,第四晶体管T4的第一端与第一电源信号ELVDD连接,第四晶体管T4的第二端以及第五晶体管T5的第一端均与第三节点N3连接。第五晶体管T5的第二端与第一节点N1连接,第五晶体管T5的控制端与第三驱动信号G连接。The compensation module 14 includes a fourth transistor T4 and a fifth transistor T5. The control terminal of the fourth transistor T4 is connected to the first node N1, the first terminal of the fourth transistor T4 is connected to the first power signal ELVDD, the second terminal of the fourth transistor T4 and the first terminal of the fifth transistor T5 are both connected to the Three-node N3 connection. The second end of the fifth transistor T5 is connected to the first node N1, and the control end of the fifth transistor T5 is connected to the third driving signal G.

发光模块15包括第六晶体管T6以及发光器件D2。第六晶体管T6的控制端与第一驱动信号EM连接,第六晶体管T6的第一端与第三节点N3连接。第六晶体管T6的第二端与发光器件D2的阳极连接。发光器件D2的阴极与第二电源信号ELVSS连接。The light emitting module 15 includes a sixth transistor T6 and a light emitting device D2. The control terminal of the sixth transistor T6 is connected to the first driving signal EM, and the first terminal of the sixth transistor T6 is connected to the third node N3. The second end of the sixth transistor T6 is connected to the anode of the light emitting device D2. The cathode of the light emitting device D2 is connected to the second power signal ELVSS.

需要说明的是,第一晶体管T1用于控制数据信号D的传输。第二晶体管T2用于控制参考信号Ref的传输。第三晶体管T3用于控制复位信号int的传输。第四晶体管T4用于确定像素驱动电路1的驱动电流。第五晶体管T5用于控制第四晶体管T4的第二端与控制端的通断。第六晶体管T6用于将来自第四晶体管T4的驱动电流传输至发光器件D2。It should be noted that the first transistor T1 is used to control the transmission of the data signal D. The second transistor T2 is used to control the transmission of the reference signal Ref. The third transistor T3 is used to control the transmission of the reset signal int. The fourth transistor T4 is used to determine the driving current of the pixel driving circuit 1. The fifth transistor T5 is used to control the on-off of the second terminal and the control terminal of the fourth transistor T4. The sixth transistor T6 is used to transmit the driving current from the fourth transistor T4 to the light emitting device D2.

请参阅图3,图3为本申请提供的像素驱动电路的驱动信号的时序图。需要说明的是,第一驱动信号EM、第二驱动信号R以及第三驱动信号G均由外部时序控制器提供。结合图2、图3所示,该像素驱动电路1的驱动时序包括:复位阶段t1、补偿阶段t2和发光阶段 t3。在复位阶段t1,对存储电容C1的第一端(也即第一节点N1)和第二端(也即第二节点N2)进行复位。在补偿阶段t2,抓取第四晶体管T4的阈值电压并存储在存储电容C1上。在发光阶段t3,像素驱动电路1产生驱动电流并提供至发光器件D2,用于驱动发光器件D2的发光显示。Please refer to FIG. 3. FIG. 3 is a timing diagram of driving signals of the pixel driving circuit provided by this application. It should be noted that the first driving signal EM, the second driving signal R, and the third driving signal G are all provided by an external timing controller. As shown in FIGS. 2 and 3, the driving timing of the pixel driving circuit 1 includes: a reset phase t1, a compensation phase t2, and a light-emitting phase t3. In the reset stage t1, the first terminal (that is, the first node N1) and the second terminal (that is, the second node N2) of the storage capacitor C1 are reset. In the compensation phase t2, the threshold voltage of the fourth transistor T4 is captured and stored in the storage capacitor C1. In the light-emitting phase t3, the pixel driving circuit 1 generates a driving current and supplies it to the light-emitting device D2 for driving the light-emitting display of the light-emitting device D2.

首先,请继续参阅图3,并结合图4,图4为本申请提供的像素驱动电路在图3所示的驱动时序下处于复位阶段的电流通路示意图。在复位阶段t1,第一驱动信号EM为高电平信号,第二驱动信号R为低电平信号,第三驱动信号G为高电平信号。因此,第一方面,第三晶体管导通T3,复位信号int传输至第一节点N1,也即复位信号int的复位电压Vint传输至存储电容C1的第一端,以此完成对存储电容C1的第一端复位。第二方面,第一晶体管T1导通,数据信号D传输至第二节点N2,也即数据信号D的数据电压Vd传输至存储电容C1的第二端,以此完成对存储电容C1的第二端复位。第三方面,第二晶体管T2、第四晶体管T4、第五晶体管T5以及第六晶体管T6关闭。First, please continue to refer to FIG. 3 in conjunction with FIG. 4. FIG. 4 is a schematic diagram of the current path of the pixel driving circuit provided by this application in the reset phase under the driving timing shown in FIG. 3. In the reset phase t1, the first driving signal EM is a high-level signal, the second driving signal R is a low-level signal, and the third driving signal G is a high-level signal. Therefore, in the first aspect, the third transistor turns on T3, the reset signal int is transmitted to the first node N1, that is, the reset voltage Vint of the reset signal int is transmitted to the first end of the storage capacitor C1, thereby completing the storage capacitor C1 The first end is reset. In the second aspect, the first transistor T1 is turned on, the data signal D is transmitted to the second node N2, that is, the data voltage Vd of the data signal D is transmitted to the second end of the storage capacitor C1, thereby completing the second end of the storage capacitor C1. Terminal reset. In the third aspect, the second transistor T2, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are turned off.

然后,请继续参阅图3,并结合图5,图5为本申请提供的像素驱动电路在图3所示的驱动时序下处于补偿阶段的电流通路示意图。在补偿阶段t2,第一驱动信号EM为高电平信号,第二驱动信号R为高电平信号,第三驱动信号G为低电平信号。第二晶体管T2、第三晶体管T3以及第六晶体管T6关闭。此时,第一驱动信号EM继续保持高电平信号,第一晶体管T1导通,数据信号D的数据电压Vd经第一晶体管T1传输至第二节点N2,以使得第二节点N2的电压为Vd,也即,此时存储电容C1第二端的电压为Vd。第三驱动信号为低电平信号,第四晶体管T4和第五晶体管T5导通,第一电源信号ELVDD通过第四晶体管T4和第五晶体管T5对存储电容C1进行充电,即第一电源信号ELVDD的第一电源电压Vdd通过第四晶体管T4和第五晶体管T5对存储电容C1进行充电,直至第四晶体管T4在其控制端和第一端的压差等于其阈值电压Vth时截止,第四晶 体管T4控制端的电位为Vdd-|Vth|,也即,此时存储电容C1第一端的电位为Vdd-|Vth|。Then, please continue to refer to FIG. 3 in conjunction with FIG. 5, which is a schematic diagram of the current path of the pixel driving circuit provided by this application in the compensation stage under the driving timing shown in FIG. In the compensation stage t2, the first driving signal EM is a high-level signal, the second driving signal R is a high-level signal, and the third driving signal G is a low-level signal. The second transistor T2, the third transistor T3, and the sixth transistor T6 are turned off. At this time, the first driving signal EM continues to maintain a high level signal, the first transistor T1 is turned on, and the data voltage Vd of the data signal D is transmitted to the second node N2 through the first transistor T1, so that the voltage of the second node N2 is Vd, that is, the voltage at the second end of the storage capacitor C1 at this time is Vd. The third driving signal is a low level signal, the fourth transistor T4 and the fifth transistor T5 are turned on, and the first power signal ELVDD charges the storage capacitor C1 through the fourth transistor T4 and the fifth transistor T5, that is, the first power signal ELVDD The first power supply voltage Vdd charges the storage capacitor C1 through the fourth transistor T4 and the fifth transistor T5 until the fourth transistor T4 turns off when the voltage difference between its control terminal and the first terminal is equal to its threshold voltage Vth, and the fourth transistor The potential of the T4 control terminal is Vdd-|Vth|, that is, the potential of the first terminal of the storage capacitor C1 at this time is Vdd-|Vth|.

最后,请继续参阅图3,并结合图6,图6为本申请提供的像素驱动电路在图3所示的驱动时序下处于发光阶段的电流通路示意图。在发光阶段,第一驱动信号EM为低电平信号,第二驱动信号R为高电平信号,第三驱动信号G为高电平信号。第一晶体管T1、第三晶体管T3、第四晶体管T4以及第五晶体管T5关闭。第二晶体管T2导通,参考信号Ref通过第二晶体管T2传输至第二节点N2,即参考信号Ref的参考电压Vref通过第二晶体管T2传输至第二节点N2,此时第二节点N2的电位为Vref,也即存储电容C1第二端的电位为Vref。Finally, please continue to refer to FIG. 3 in conjunction with FIG. 6. FIG. 6 is a schematic diagram of the current path of the pixel driving circuit provided by this application in the light-emitting phase under the driving timing shown in FIG. 3. In the light-emitting phase, the first driving signal EM is a low-level signal, the second driving signal R is a high-level signal, and the third driving signal G is a high-level signal. The first transistor T1, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are turned off. The second transistor T2 is turned on, the reference signal Ref is transmitted to the second node N2 through the second transistor T2, that is, the reference voltage Vref of the reference signal Ref is transmitted to the second node N2 through the second transistor T2, and the potential of the second node N2 is Is Vref, that is, the potential of the second end of the storage capacitor C1 is Vref.

具体的,在补偿阶段t2,存储电容C1第一端的电位为Vdd-|Vth|,存储电容C1第二端的电位为Vd。在发光阶段t3,存储电容C1第二端的电位跳变为Vref,由于电容耦合效应,存储电容C1第一端的电位也相应发生变化,此时,存储电容C1第一端的电位为Vdd-|Vth|-Vd+Vref。也即,第四晶体管T4的控制端的电位为Vdd-|Vth|-Vd+Vref。Specifically, in the compensation phase t2, the potential of the first end of the storage capacitor C1 is Vdd-|Vth|, and the potential of the second end of the storage capacitor C1 is Vd. In the light-emitting stage t3, the potential of the second end of the storage capacitor C1 jumps to Vref. Due to the capacitive coupling effect, the potential of the first end of the storage capacitor C1 also changes accordingly. At this time, the potential of the first end of the storage capacitor C1 is Vdd-| Vth|-Vd+Vref. That is, the potential of the control terminal of the fourth transistor T4 is Vdd-|Vth|-Vd+Vref.

此时,第四晶体管T4的第一端(源极端)的电位为Vdd,控制端(栅极端)的电位为Vdd-|Vth|-Vd+Vref,栅源电压Vgs=Vdd-(Vdd-|Vth|-Vd+Vref)=Vd+|Vth|-Vref。因此,流向发光器件D2的电流可以根据以下公式得到:At this time, the potential of the first terminal (source terminal) of the fourth transistor T4 is Vdd, the potential of the control terminal (gate terminal) is Vdd-|Vth|-Vd+Vref, and the gate-source voltage Vgs=Vdd-(Vdd-| Vth|-Vd+Vref)=Vd+|Vth|-Vref. Therefore, the current flowing to the light-emitting device D2 can be obtained according to the following formula:

Figure PCTCN2019085015-appb-000001
Figure PCTCN2019085015-appb-000001

其中,为驱动晶体管T4的载流子迁移率,为第四晶体管T4的宽长比。由上述公式可知,该像素驱动电路1消除了第四晶体管T4的阈值电压Vth对AMOLED显示器亮度均匀性的影响,能够补偿第四晶体管T4的阈值电压变化,提高发光器件的发光均匀性,进而提升画质,并可通过调节Vref控制亮度。Among them, is the carrier mobility of the driving transistor T4, and is the aspect ratio of the fourth transistor T4. It can be seen from the above formula that the pixel driving circuit 1 eliminates the influence of the threshold voltage Vth of the fourth transistor T4 on the brightness uniformity of the AMOLED display, can compensate for the threshold voltage changes of the fourth transistor T4, and improve the uniformity of light emission of the light-emitting device, thereby improving Picture quality, and brightness can be controlled by adjusting Vref.

本申请提供的像素驱动电路,当栅极控制信号开启时,第四晶体 管T4的栅极与漏极通过第五晶体管T5相连,使第四晶体管T4的漏极将第一电源信号连同第四晶体管T4的阈值电压一起加载至存储电容C1的第一端,并以此抵消第四晶体管T4的阈值电压,因此,能够补偿第四晶体管T4的阈值电压变化,提高发光器件D2的发光均匀性,进而提升画质。另外,本申请提供的像素驱动电路1的结构设计简单,可以提高该像素驱动电路的制作良品率。In the pixel driving circuit provided by the present application, when the gate control signal is turned on, the gate and drain of the fourth transistor T4 are connected through the fifth transistor T5, so that the drain of the fourth transistor T4 transmits the first power signal together with the fourth transistor The threshold voltage of T4 is applied to the first end of the storage capacitor C1 together to cancel the threshold voltage of the fourth transistor T4. Therefore, the threshold voltage change of the fourth transistor T4 can be compensated, and the light emission uniformity of the light emitting device D2 is improved, thereby Improve picture quality. In addition, the structural design of the pixel driving circuit 1 provided by the present application is simple, which can improve the manufacturing yield of the pixel driving circuit.

本申请还提供一种显示面板,该显示面板包括像素驱动电路1。像素驱动电路1的具体结构请参阅前面实施例,在此不再赘述。The application also provides a display panel, which includes a pixel driving circuit 1. For the specific structure of the pixel driving circuit 1, please refer to the previous embodiment, which will not be repeated here.

以上对本申请实施例提供的像素驱动电路以及显示面板进行了详细介绍,本文中应用了具体个例对本申请的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本申请。同时,对于本领域的技术人员,依据本申请的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本申请的限制。The pixel driving circuit and the display panel provided by the embodiments of the present application are described in detail above. Specific examples are used to describe the principles and implementations of the present application. The description of the above embodiments is only used to help understand the present application. At the same time, for those skilled in the art, according to the idea of the application, there will be changes in the specific implementation and the scope of application. In summary, the content of this specification should not be construed as a limitation of the application.

Claims (20)

一种像素驱动电路,其包括:存储电容、第一接收模块、第二接收模块、复位模块、补偿模块以及发光模块;所述第一接收模块、所述第二接收模块、所述复位模块以及所述补偿模块均与所述存储电容连接,所述补偿模块与所述发光模块连接;A pixel driving circuit includes: a storage capacitor, a first receiving module, a second receiving module, a resetting module, a compensation module, and a light emitting module; the first receiving module, the second receiving module, the resetting module, and The compensation modules are all connected to the storage capacitor, and the compensation module is connected to the light emitting module; 其中,所述存储电容的第一端与第一节点相连接,所述存储电容的第二端与第二节点相连接;Wherein, the first end of the storage capacitor is connected to a first node, and the second end of the storage capacitor is connected to a second node; 所述第一接收模块用于接收第一驱动信号并在所述第一驱动信号的控制下将所述数据信号传输至所述第二节点;The first receiving module is configured to receive a first driving signal and transmit the data signal to the second node under the control of the first driving signal; 所述第二接收模块用于接收第一驱动信号并在所述第一驱动信号的控制下将参考信号传输至所述第二节点;The second receiving module is configured to receive a first driving signal and transmit a reference signal to the second node under the control of the first driving signal; 所述复位模块用于接收所述第二驱动信号并在所述第二驱动信号的控制下将复位信号传输至所述第一节点;The reset module is configured to receive the second drive signal and transmit a reset signal to the first node under the control of the second drive signal; 所述补偿模块用于接收第三驱动信号并在所述第三驱动信号的控制下进行阈值电压补偿;The compensation module is configured to receive a third drive signal and perform threshold voltage compensation under the control of the third drive signal; 所述发光模块用于接收第一驱动信号并在所述第一驱动信号的控制下发光。The light emitting module is used for receiving a first driving signal and emitting light under the control of the first driving signal. 根据权利要求1所述的像素驱动电路,其中,所述第一接收模块包括:第一晶体管;The pixel driving circuit according to claim 1, wherein the first receiving module comprises: a first transistor; 所述第一晶体管的控制端与所述第一驱动信号连接,所述第一晶体管的第一端与所述数据信号连接,所述第一晶体管的第二端与所述第二节点连接。The control terminal of the first transistor is connected to the first drive signal, the first terminal of the first transistor is connected to the data signal, and the second terminal of the first transistor is connected to the second node. 根据权利要求2所述的像素驱动电路,其中,所述第二接收模块包括:第二晶体管;3. The pixel driving circuit according to claim 2, wherein the second receiving module comprises: a second transistor; 所述第二晶体管的控制端与所述第一驱动信号连接,所述第二晶体管的第一端与所述参考信号连接,所述第二晶体管的第二端与所述第二节点连接。The control terminal of the second transistor is connected to the first driving signal, the first terminal of the second transistor is connected to the reference signal, and the second terminal of the second transistor is connected to the second node. 根据权利要求3所述的像素驱动电路,其中,所述复位模块包括:第三晶体管:The pixel driving circuit according to claim 3, wherein the reset module comprises: a third transistor: 所述第三晶体管的控制端与所述第二驱动信号连接,所述第三晶体管的第一端与所述复位信号连接,所述第三晶体管的第二端与所述第一节点连接。The control terminal of the third transistor is connected to the second drive signal, the first terminal of the third transistor is connected to the reset signal, and the second terminal of the third transistor is connected to the first node. 根据权利要求4所述的像素驱动电路,其中,所述补偿模块包括:第四晶体管以及第五晶体管;4. The pixel driving circuit according to claim 4, wherein the compensation module comprises: a fourth transistor and a fifth transistor; 所述第四晶体管的控制端与所述第一节点连接,所述第四晶体管的第一端与第一电源信号连接,所述第四晶体管的第二端以及所述第五晶体管的第一端均与第三节点连接,所述第五晶体管的第二端与所述第一节点连接,所述第五晶体管的控制端与所述第三驱动信号连接。The control terminal of the fourth transistor is connected to the first node, the first terminal of the fourth transistor is connected to a first power signal, and the second terminal of the fourth transistor and the first terminal of the fifth transistor are connected. The terminals are all connected to the third node, the second terminal of the fifth transistor is connected to the first node, and the control terminal of the fifth transistor is connected to the third drive signal. 根据权利要求5所述的像素驱动电路,其中,所述发光模块包括:第六晶体管以及发光器件;5. The pixel driving circuit according to claim 5, wherein the light emitting module comprises: a sixth transistor and a light emitting device; 所述第六晶体管的控制端与所述第一驱动信号连接,所述第六晶体管的第一端与所述第三节点连接,所述第六晶体管的第二端与所述发光器件的阳极连接,所述发光器件的阴极与第二电源信号连接。The control terminal of the sixth transistor is connected to the first drive signal, the first terminal of the sixth transistor is connected to the third node, and the second terminal of the sixth transistor is connected to the anode of the light emitting device. Connected, the cathode of the light-emitting device is connected with the second power signal. 根据权利要求6所述的像素驱动电路,其中,所述第一晶体管用于控制所述数据信号的传输;所述第二晶体管用于控制所述参考信号的传输;所述第三晶体管用于控制所述复位信号的传输;所述第四晶体管用于确定像素驱动电路的驱动电流;所述第五晶体管用于控制所述第二晶体管的第二端与控制端的通断;所述第六晶体管用于将来自所述第四晶体管的驱动电流传输至所述发光器件。7. The pixel driving circuit according to claim 6, wherein the first transistor is used to control the transmission of the data signal; the second transistor is used to control the transmission of the reference signal; the third transistor is used to Control the transmission of the reset signal; the fourth transistor is used to determine the driving current of the pixel drive circuit; the fifth transistor is used to control the on and off of the second terminal and the control terminal of the second transistor; the sixth The transistor is used to transmit the driving current from the fourth transistor to the light emitting device. 根据权利要求5所述的像素驱动电路,其中,所述第一晶体管为NMOS管,所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管以及所述第六晶体管均为PMOS管。5. The pixel driving circuit according to claim 5, wherein the first transistor is an NMOS transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor The transistors are all PMOS tubes. 根据权利要求8所述的像素驱动电路,其中,所述像素驱动电路的驱动时序包括:8. The pixel driving circuit according to claim 8, wherein the driving timing of the pixel driving circuit comprises: 复位阶段,对所述存储电容的第一端和第二端进行复位;Reset stage, reset the first end and the second end of the storage capacitor; 补偿阶段,抓取所述第四晶体管的阈值电压并存储在所述存储电容上;In the compensation phase, the threshold voltage of the fourth transistor is captured and stored in the storage capacitor; 发光阶段,像素驱动电路产生驱动电流并提供至所述发光器件, 用于驱动所述发光器件的发光显示。In the light-emitting stage, the pixel driving circuit generates a driving current and supplies it to the light-emitting device for driving the light-emitting display of the light-emitting device. 根据权利要求9所述的像素驱动电路,其中,在所述复位阶段,所述第一驱动信号为高电平信号,所述第二驱动信号为低电平信号,所述第三驱动信号为高电平信号,所述第三晶体管导通,所述第一晶体管导通,所述数据信号传输至所述存储电容的的第二端,所述复位信号传输至所述存储电容的第一端。9. The pixel driving circuit according to claim 9, wherein in the reset phase, the first driving signal is a high-level signal, the second driving signal is a low-level signal, and the third driving signal is High level signal, the third transistor is turned on, the first transistor is turned on, the data signal is transmitted to the second terminal of the storage capacitor, and the reset signal is transmitted to the first terminal of the storage capacitor. end. 根据权利要求9所述的像素驱动电路,其中,在所述补偿阶段,所述第一驱动信号为高电平信号,所述第二驱动信号为高电平信号,所述第三驱动信号为低电平信号,所述第四晶体管和第五晶体管导通,所述第一电源信号通过所述第四晶体管和第五晶体管对所述存储电容进行充电,直至所述第四晶体管在其控制端和第一端的压差等于其阈值电压时截止。9. The pixel drive circuit according to claim 9, wherein, in the compensation stage, the first drive signal is a high-level signal, the second drive signal is a high-level signal, and the third drive signal is Low level signal, the fourth transistor and the fifth transistor are turned on, and the first power signal charges the storage capacitor through the fourth transistor and the fifth transistor until the fourth transistor is under its control. When the voltage difference between the terminal and the first terminal is equal to its threshold voltage, it will be cut off. 根据权利要求9所述的像素驱动电路,其中,在所述发光阶段,所述第一驱动信号为低电平信号,所述第二驱动信号为高电平信号,所述第三驱动信号为高电平信号,所述第二晶体管导通,所述参考信号通过所述第二晶体管传输至所述第二节点;所述第六晶体管导通,所述发光器件发光。9. The pixel drive circuit according to claim 9, wherein, in the light-emitting phase, the first drive signal is a low-level signal, the second drive signal is a high-level signal, and the third drive signal is With a high-level signal, the second transistor is turned on, and the reference signal is transmitted to the second node through the second transistor; the sixth transistor is turned on, and the light emitting device emits light. 一种像素驱动电路,其包括:存储电容、第一接收模块、第二接收模块、复位模块、补偿模块以及发光模块;所述第一接收模块、所述第二接收模块、所述复位模块以及所述补偿模块均与所述存储电容连接,所述补偿模块与所述发光模块连接;A pixel driving circuit includes: a storage capacitor, a first receiving module, a second receiving module, a resetting module, a compensation module, and a light emitting module; the first receiving module, the second receiving module, the resetting module, and The compensation modules are all connected to the storage capacitor, and the compensation module is connected to the light emitting module; 其中,所述补偿模块用于接收第三驱动信号并在所述第三驱动信号的控制下进行阈值电压补偿。Wherein, the compensation module is used for receiving a third driving signal and performing threshold voltage compensation under the control of the third driving signal. 根据权利要求13所述的像素驱动电路,其中,所述第一接收模块包括:第一晶体管;The pixel driving circuit according to claim 13, wherein the first receiving module comprises: a first transistor; 所述第一晶体管的控制端与所述第一驱动信号连接,所述第一晶体管的第一端与所述数据信号连接,所述第一晶体管的第二端与所述第二节点连接。The control terminal of the first transistor is connected to the first drive signal, the first terminal of the first transistor is connected to the data signal, and the second terminal of the first transistor is connected to the second node. 根据权利要求14所述的像素驱动电路,其中,所述第二接 收模块包括:第二晶体管;The pixel driving circuit according to claim 14, wherein the second receiving module comprises: a second transistor; 所述第二晶体管的控制端与所述第一驱动信号连接,所述第二晶体管的第一端与所述参考信号连接,所述第二晶体管的第二端与所述第二节点连接。The control terminal of the second transistor is connected to the first driving signal, the first terminal of the second transistor is connected to the reference signal, and the second terminal of the second transistor is connected to the second node. 根据权利要求15所述的像素驱动电路,其中,所述复位模块包括:第三晶体管:The pixel driving circuit according to claim 15, wherein the reset module comprises: a third transistor: 所述第三晶体管的控制端与所述第二驱动信号连接,所述第三晶体管的第一端与所述复位信号连接,所述第三晶体管的第二端与所述第一节点连接。The control terminal of the third transistor is connected to the second drive signal, the first terminal of the third transistor is connected to the reset signal, and the second terminal of the third transistor is connected to the first node. 根据权利要求16所述的像素驱动电路,其中,所述补偿模块包括:第四晶体管以及第五晶体管;The pixel driving circuit according to claim 16, wherein the compensation module comprises: a fourth transistor and a fifth transistor; 所述第四晶体管的控制端与所述第一节点连接,所述第四晶体管的第一端与第一电源信号连接,所述第四晶体管的第二端以及所述第五晶体管的第一端均与第三节点连接,所述第五晶体管的第二端与所述第一节点连接,所述第五晶体管的控制端与所述第三驱动信号连接。The control terminal of the fourth transistor is connected to the first node, the first terminal of the fourth transistor is connected to a first power signal, and the second terminal of the fourth transistor and the first terminal of the fifth transistor are connected. The terminals are all connected to the third node, the second terminal of the fifth transistor is connected to the first node, and the control terminal of the fifth transistor is connected to the third drive signal. 根据权利要求17所述的像素驱动电路,其中,所述发光模块包括:第六晶体管以及发光器件;The pixel driving circuit according to claim 17, wherein the light emitting module comprises: a sixth transistor and a light emitting device; 所述第六晶体管的控制端与所述第一驱动信号连接,所述第六晶体管的第一端与所述第三节点连接,所述第六晶体管的第二端与所述发光器件的阳极连接,所述发光器件的阴极与第二电源信号连接。The control terminal of the sixth transistor is connected to the first drive signal, the first terminal of the sixth transistor is connected to the third node, and the second terminal of the sixth transistor is connected to the anode of the light emitting device. Connected, the cathode of the light-emitting device is connected with the second power signal. 根据权利要求18所述的像素驱动电路,其中,所述第一晶体管用于控制所述数据信号的传输;所述第二晶体管用于控制所述参考信号的传输;所述第三晶体管用于控制所述复位信号的传输;所述第四晶体管用于确定像素驱动电路的驱动电流;所述第五晶体管用于控制所述第二晶体管的第二端与控制端的通断;所述第六晶体管用于将来自所述第四晶体管的驱动电流传输至所述发光器件。The pixel driving circuit according to claim 18, wherein the first transistor is used to control the transmission of the data signal; the second transistor is used to control the transmission of the reference signal; the third transistor is used to Control the transmission of the reset signal; the fourth transistor is used to determine the driving current of the pixel drive circuit; the fifth transistor is used to control the on and off of the second terminal and the control terminal of the second transistor; the sixth The transistor is used to transmit the driving current from the fourth transistor to the light emitting device. 一种显示面板,其包括像素驱动电路,所述像素驱动电路包括存储电容、第一接收模块、第二接收模块、复位模块、补偿模块以及发光模块;所述第一接收模块、所述第二接收模块、所述复位模块 以及所述补偿模块均与所述存储电容连接,所述补偿模块与所述发光模块连接;A display panel includes a pixel drive circuit. The pixel drive circuit includes a storage capacitor, a first receiving module, a second receiving module, a reset module, a compensation module, and a light emitting module; the first receiving module, the second The receiving module, the reset module and the compensation module are all connected to the storage capacitor, and the compensation module is connected to the light emitting module; 其中,所述补偿模块用于接收第三驱动信号并在所述第三驱动信号的控制下进行阈值电压补偿。Wherein, the compensation module is used for receiving a third driving signal and performing threshold voltage compensation under the control of the third driving signal.
PCT/CN2019/085015 2019-04-04 2019-04-29 Pixel driving circuit and display panel Ceased WO2020199296A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910270175.7A CN109961738A (en) 2019-04-04 2019-04-04 Pixel-driving circuit and display panel
CN201910270175.7 2019-04-04

Publications (1)

Publication Number Publication Date
WO2020199296A1 true WO2020199296A1 (en) 2020-10-08

Family

ID=67025660

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/085015 Ceased WO2020199296A1 (en) 2019-04-04 2019-04-29 Pixel driving circuit and display panel

Country Status (2)

Country Link
CN (1) CN109961738A (en)
WO (1) WO2020199296A1 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111081189B (en) * 2019-12-20 2021-04-13 合肥视涯技术有限公司 Pixel driving circuit and display device
WO2021184192A1 (en) * 2020-03-17 2021-09-23 京东方科技集团股份有限公司 Pixel circuit and driving method therefor, and display apparatus
CN212624745U (en) * 2020-07-24 2021-02-26 武汉华星光电半导体显示技术有限公司 Pixel drive circuit and display panel
WO2022016685A1 (en) 2020-07-24 2022-01-27 武汉华星光电半导体显示技术有限公司 Pixel driving circuit and driving method thereof, and display panel

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20130030879A (en) * 2011-09-20 2013-03-28 엘지디스플레이 주식회사 Organic light emitting diode display device
US20160125802A1 (en) * 2014-10-30 2016-05-05 Samsung Display Co., Ltd. Pixel and organic light-emitting display apparatus including the same
CN107808630A (en) * 2017-12-01 2018-03-16 京东方科技集团股份有限公司 A kind of pixel compensation circuit, its driving method, display panel and display device
CN108257552A (en) * 2016-12-28 2018-07-06 乐金显示有限公司 Pixel circuit, organic light-emitting display device and its driving method
CN109346012A (en) * 2018-12-05 2019-02-15 深圳市华星光电半导体显示技术有限公司 Pixel-driving circuit and display device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105185304B (en) * 2015-09-09 2017-09-22 京东方科技集团股份有限公司 A kind of image element circuit, organic EL display panel and display device
CN109003586B (en) * 2018-08-03 2020-03-17 武汉华星光电半导体显示技术有限公司 Pixel driving circuit and liquid crystal display panel
CN109523953A (en) * 2018-12-21 2019-03-26 深圳市华星光电半导体显示技术有限公司 Active matrix organic light-emitting diode pixel-driving circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20130030879A (en) * 2011-09-20 2013-03-28 엘지디스플레이 주식회사 Organic light emitting diode display device
US20160125802A1 (en) * 2014-10-30 2016-05-05 Samsung Display Co., Ltd. Pixel and organic light-emitting display apparatus including the same
CN108257552A (en) * 2016-12-28 2018-07-06 乐金显示有限公司 Pixel circuit, organic light-emitting display device and its driving method
CN107808630A (en) * 2017-12-01 2018-03-16 京东方科技集团股份有限公司 A kind of pixel compensation circuit, its driving method, display panel and display device
CN109346012A (en) * 2018-12-05 2019-02-15 深圳市华星光电半导体显示技术有限公司 Pixel-driving circuit and display device

Also Published As

Publication number Publication date
CN109961738A (en) 2019-07-02

Similar Documents

Publication Publication Date Title
US10769998B2 (en) Pixel circuit and driving method thereof, array substrate, and display panel
CN108470539B (en) Pixel circuit and driving method thereof, display panel and display device
CN110036435B (en) Pixel circuit, active matrix organic light emitting diode display panel, display device and method for compensating threshold voltage of driving transistor
CN107452331B (en) Pixel circuit, driving method thereof and display device
WO2023005621A1 (en) Pixel circuit and driving method therefor and display panel
US9412300B2 (en) Pixel compensating circuit and method of organic light emitting display
CN103218970B (en) Active matrix organic light emitting diode (AMOLED) pixel unit, driving method and display device
JP7084314B2 (en) Drive method used for pixel circuit
CN104700780B (en) A kind of driving method of image element circuit
US9355595B2 (en) Pixel unit driving circuit having an erasing transistor and matching transistor, and method thereof
CN104036725B (en) Image element circuit and its driving method, organic electroluminescence display panel and display device
WO2018188390A1 (en) Pixel circuit and driving method therefor, and display device
WO2016070477A1 (en) Organic light emitting display (oled) pixel drive circuit
CN106128360A (en) Image element circuit, display floater, display device and driving method
WO2018045667A1 (en) Amoled pixel driving circuit and driving method
WO2015188520A1 (en) Pixel driver circuit, driving method, array substrate, and display device
WO2020001027A1 (en) Pixel drive circuit and method, and display device
CN104318894A (en) Pixel circuit and driving method thereof, and display apparatus
US20190066580A1 (en) Pixel circuit, driving method thereof, and display device
WO2015188532A1 (en) Pixel-driving circuit, driving method, array substrate, and display device
CN108389551B (en) A pixel circuit, a driving method thereof, and a display device
WO2020124759A1 (en) Pixel driving circuit of active matrix organic light-emitting diode
WO2015188533A1 (en) Pixel-driving circuit, driving method, array substrate, and display device
WO2018149008A1 (en) Amoled pixel driving circuit and amoled pixel driving method
WO2019041823A1 (en) Pixel circuit and driving method thereof, display substrate, and display device

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19923018

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19923018

Country of ref document: EP

Kind code of ref document: A1