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WO2020090423A1 - Procédé de fabrication de cellule solaire, cellule solaire et module de cellules solaires - Google Patents

Procédé de fabrication de cellule solaire, cellule solaire et module de cellules solaires Download PDF

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Publication number
WO2020090423A1
WO2020090423A1 PCT/JP2019/040249 JP2019040249W WO2020090423A1 WO 2020090423 A1 WO2020090423 A1 WO 2020090423A1 JP 2019040249 W JP2019040249 W JP 2019040249W WO 2020090423 A1 WO2020090423 A1 WO 2020090423A1
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WIPO (PCT)
Prior art keywords
electrode layer
metal electrode
type semiconductor
solar cell
layer
Prior art date
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Ceased
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PCT/JP2019/040249
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English (en)
Japanese (ja)
Inventor
正典 兼松
足立　大輔
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Kaneka Corp
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Kaneka Corp
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Publication date
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Priority to JP2020553739A priority Critical patent/JP7356445B2/ja
Priority to CN201980057021.8A priority patent/CN112640133B/zh
Publication of WO2020090423A1 publication Critical patent/WO2020090423A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/16—Photovoltaic cells having only PN heterojunction potential barriers
    • H10F10/164—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells
    • H10F10/165—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells
    • H10F10/166—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells the Group IV-IV heterojunctions being heterojunctions of crystalline and amorphous materials, e.g. silicon heterojunction [SHJ] photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/20—Electrodes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to a method of manufacturing a back electrode type (back contact type) solar cell, a back electrode type solar cell, and a solar cell module including the solar cell.
  • Patent Document 1 discloses a back electrode type solar cell.
  • the solar cell described in Patent Document 1 has a semiconductor substrate, a first conductivity type semiconductor layer and a first electrode layer sequentially laminated on the back surface side of the semiconductor substrate, and another portion on the back surface side of the semiconductor substrate in order.
  • the second conductive type semiconductor layer and the second electrode layer are provided.
  • the first electrode layer and the second electrode layer are separated from each other to prevent a short circuit.
  • each of the first electrode layer and the second electrode layer includes a transparent electrode layer and a metal electrode layer.
  • the metal electrode layer can be formed relatively easily by a screen printing method using a silver paste, for example.
  • the transparent electrode layer needs to be formed separately by, for example, a photolithography method using a mask, and the forming process is relatively complicated.
  • An object of the present invention is to provide a method for manufacturing a solar cell, a solar cell, and a solar cell module capable of simplifying the formation of a transparent electrode layer.
  • a method for manufacturing a solar cell according to the present invention includes a semiconductor substrate having two main surfaces, a first conductive type semiconductor layer and a second conductive type semiconductor layer arranged on one main surface side of the semiconductor substrate, and a first conductive type.
  • a back electrode type solar cell including a first transparent electrode layer and a first metal electrode layer corresponding to the second semiconductor layer and a second transparent electrode layer and a second metal electrode layer corresponding to the second conductivity type semiconductor layer
  • a method for forming a first conductivity type semiconductor layer on a part of one main surface side of a semiconductor substrate, and forming a second conductivity type semiconductor layer on another part of one main surface side of a semiconductor substrate A forming step, a transparent conductive film forming step of forming a transparent conductive film over the first conductive type semiconductor layer and the second conductive type semiconductor layer, and a transparent conductive film forming step of the first conductive type semiconductor layer via the transparent conductive film.
  • a first metal electrode layer is formed on top of the second conductive type semiconductive
  • a printing material containing a particulate metal material, a resin material and a solvent is printed and cured to form a first metal electrode layer and a second metal electrode layer.
  • the resin of the first metal electrode layer and the periphery thereof is formed.
  • the transparent conductive film is patterned using the film, the second metal electrode layer, and the resin film around the second metal electrode layer as a mask.
  • a solar cell according to the present invention includes a semiconductor substrate having two main surfaces, a first conductivity type semiconductor layer and a second conductivity type semiconductor layer arranged on one main surface side of the semiconductor substrate, and a first conductivity type semiconductor layer.
  • a back electrode type solar cell comprising a first transparent electrode layer and a first metal electrode layer corresponding to, and a second transparent electrode layer and a second metal electrode layer corresponding to a second conductivity type semiconductor layer, The first transparent electrode layer and the first metal electrode layer have a strip shape, the width of the first transparent electrode layer is narrower than that of the first metal electrode layer, and the second transparent electrode layer and the second metal electrode layer have a strip shape.
  • the band width of the second transparent electrode layer is narrower than the band width of the second metal electrode layer, and the first metal electrode layer and the second metal electrode layer are formed on the periphery of the first metal electrode layer and the periphery of the second metal electrode layer.
  • a resin film is formed in which the resin material in the printing material of the electrode layer is unevenly distributed.
  • the solar cell module according to the present invention includes the above-mentioned solar cell.
  • the formation of the transparent electrode layer of the solar cell can be simplified.
  • FIG. 3 is a sectional view taken along line III-III in the solar cell of FIG. 2. It is a figure which shows the semiconductor layer forming process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the transparent conductive film formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the metal electrode layer forming process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the transparent electrode layer forming process in the manufacturing method of the solar cell which concerns on this embodiment.
  • 5A is a result of observing a portion A between the metal electrode layers in FIG. 5A using a SEM at a magnification of 450 times.
  • 5B is a result of observing a portion B between the metal electrode layers in FIG. 5B using an SEM at a magnification of 5000 times.
  • FIG. 1 is a side view showing an example of a solar cell module according to this embodiment.
  • the solar cell module 100 includes a plurality of solar cells 1 arranged two-dimensionally.
  • the solar cells 1 are connected in series and / or in parallel by the wiring member 2.
  • the wiring member 2 is connected to the bus bar portion (described later) in the electrode layer of the solar cell 1.
  • the wiring member 2 is, for example, a known interconnector such as a tab.
  • the solar cell 1 and the wiring member 2 are sandwiched by the light receiving surface protection member 3 and the back surface protection member 4.
  • a liquid or solid encapsulating material 5 is filled between the light-receiving surface protection member 3 and the back surface protection member 4, whereby the solar cell 1 and the wiring member 2 are sealed.
  • the light-receiving surface protection member 3 is, for example, a glass substrate
  • the back surface protection member 4 is a glass substrate or a metal plate.
  • the sealing material 5 is, for example, a transparent resin.
  • the solar battery cell (hereinafter, referred to as a solar battery) 1 will be described in detail.
  • FIG. 2 is a view of the solar cell according to the present embodiment as viewed from the back surface side.
  • the solar cell 1 shown in FIG. 2 is a back electrode type solar cell.
  • the solar cell 1 includes a semiconductor substrate 11 having two main surfaces, and has a first conductivity type region 7 and a second conductivity type region 8 on the main surface of the semiconductor substrate 11.
  • the first conductivity type region 7 has a so-called comb shape, and has a plurality of finger portions 7f corresponding to comb teeth and a bus bar portion 7b corresponding to a comb tooth supporting portion.
  • the bus bar portion 7b extends in the first direction (X direction) along one side of the semiconductor substrate 11, and the finger portion 7f extends from the bus bar portion 7b in the second direction (Y direction) intersecting the first direction. ).
  • the second conductivity type region 8 has a so-called comb shape, and has a plurality of finger portions 8f corresponding to comb teeth and a bus bar portion 8b corresponding to a supporting portion of the comb teeth.
  • the bus bar portion 8b extends in the first direction (X direction) along the other side portion facing one side portion of the semiconductor substrate 11, and the finger portion 8f extends from the bus bar portion 8b in the second direction (Y direction).
  • the finger portions 7f and the finger portions 8f have a strip shape extending in the second direction (Y direction) and are alternately provided in the first direction (X direction).
  • the first conductivity type region 7 and the second conductivity type region 8 may be formed in a stripe shape.
  • FIG. 3 is a sectional view taken along line III-III of the solar cell of FIG.
  • the solar cell 1 includes a passivation layer 13 laminated on the light receiving surface side which is the main surface of the semiconductor substrate 11 on the light receiving side. Further, the solar cell 1 is sequentially laminated on a part (mainly, the first conductivity type region 7) on the back surface side which is a main surface (one main surface) opposite to the light receiving surface of the main surface of the semiconductor substrate 11.
  • the passivation layer 23, the first conductivity type semiconductor layer 25, and the first electrode layer 27 are provided.
  • the solar cell 1 includes a passivation layer 33, a second conductivity type semiconductor layer 35, and a second electrode which are sequentially stacked on another part (mainly, the second conductivity type region 8) on the back surface side of the semiconductor substrate 11.
  • the layer 37 is provided.
  • the semiconductor substrate 11 is formed of a crystalline silicon material such as single crystal silicon or polycrystalline silicon.
  • the semiconductor substrate 11 is, for example, an n-type semiconductor substrate in which a crystalline silicon material is doped with an n-type dopant.
  • the semiconductor substrate 11 may be, for example, a p-type semiconductor substrate obtained by doping a crystalline silicon material with a p-type dopant.
  • Examples of the n-type dopant include phosphorus (P).
  • Examples of p-type dopants include boron (B).
  • the semiconductor substrate 11 functions as a photoelectric conversion substrate that absorbs incident light from the light receiving surface side and generates photocarriers (electrons and holes).
  • the semiconductor substrate 11 may have a pyramid-shaped fine uneven structure called a texture structure on the back surface side. As a result, the efficiency of collecting the light that has passed through the semiconductor substrate 11 without being absorbed is improved. Further, the semiconductor substrate 11 may have a pyramid-shaped fine uneven structure called a texture structure on the light-receiving surface side. Thereby, the reflection of incident light on the light receiving surface is reduced, and the light confinement effect in the semiconductor substrate 11 is improved.
  • the passivation layer 13 is formed on the light receiving surface side of the semiconductor substrate 11.
  • the passivation layer 23 is formed in the first conductivity type region 7 on the back surface side of the semiconductor substrate 11.
  • the passivation layer 33 is formed in the second conductivity type region 8 on the back surface side of the semiconductor substrate 11.
  • the passivation layers 13, 23, 33 are made of, for example, an intrinsic (i-type) amorphous silicon material.
  • the passivation layers 13, 23 and 33 suppress recombination of carriers generated in the semiconductor substrate 11 and improve carrier recovery efficiency.
  • An antireflection layer made of a material such as SiO, SiN, or SiON may be provided on the passivation layer 13 on the light receiving surface side of the semiconductor substrate 11.
  • the first conductivity type semiconductor layer 25 is formed on the passivation layer 23, that is, in the first conductivity type region 7 on the back surface side of the semiconductor substrate 11.
  • the first conductivity type semiconductor layer 25 is formed of, for example, an amorphous silicon material.
  • the first conductivity type semiconductor layer 25 is, for example, a p-type semiconductor layer in which an amorphous silicon material is doped with a p-type dopant (for example, the above-mentioned boron (B)).
  • the second conductivity type semiconductor layer 35 is formed on the passivation layer 33, that is, in the second conductivity type region 8 on the back surface side of the semiconductor substrate 11.
  • the second conductivity type semiconductor layer 35 is formed of, for example, an amorphous silicon material.
  • the second conductivity type semiconductor layer 35 is, for example, an n-type semiconductor layer in which an amorphous silicon material is doped with an n-type dopant (for example, phosphorus (P) described above).
  • the first conductive type semiconductor layer 25 may be an n type semiconductor layer and the second conductive type semiconductor layer 35 may be a p type semiconductor layer.
  • the first conductivity type semiconductor layer 25 and the passivation layer 23, and the second conductivity type semiconductor layer 35 and the passivation layer 33 are in the form of a strip extending in the second direction (Y direction), and the first direction (X direction). ) Are lined up alternately. Part of the second conductivity type semiconductor layer 35 and the passivation layer 33 may overlap a part of the adjacent first conductivity type semiconductor layer 25 and the passivation layer 23 (not shown).
  • the first electrode layer 27 is formed corresponding to the first conductivity type semiconductor layer 25, specifically, on the first conductivity type semiconductor layer 25 in the first conductivity type region 7 on the back surface side of the semiconductor substrate 11.
  • the second electrode layer 37 is formed corresponding to the second conductivity type semiconductor layer 35, specifically, on the second conductivity type semiconductor layer 35 in the second conductivity type region 8 on the back surface side of the semiconductor substrate 11.
  • the first electrode layer 27 includes a first transparent electrode layer 28 and a first metal electrode layer 29, which are sequentially stacked on the first conductivity type semiconductor layer 25.
  • the second electrode layer 37 includes a second transparent electrode layer 38 and a second metal electrode layer 39 which are sequentially stacked on the second conductivity type semiconductor layer 35.
  • the first transparent electrode layer 28 and the second transparent electrode layer 38 are formed of a transparent conductive material.
  • the transparent conductive material include ITO (Indium Tin Oxide: composite oxide of indium oxide and tin oxide).
  • the first metal electrode layer 29 and the second metal electrode layer 39 are formed of a particulate metal material such as silver, copper, or aluminum, an insulating resin material, and a conductive paste material containing a solvent.
  • the first electrode layer 27 and the second electrode layer 37 that is, the first transparent electrode layer 28, the second transparent electrode layer 38, the first metal electrode layer 29, and the second metal electrode layer 39 are arranged in the second direction (Y direction).
  • the strips extend and are arranged alternately in the first direction (X direction).
  • the first transparent electrode layer 28 and the second transparent electrode layer 38 are separated from each other, and the first metal electrode layer 29 and the second metal electrode layer 39 are also separated from each other.
  • the band width of the first transparent electrode layer 28 in the first direction (X direction) is narrower than the band width of the first metal electrode layer 29 in the first direction (X direction), and is smaller than the band width of the second transparent electrode layer 38 in the first direction.
  • the band width in the (X direction) is narrower than the band width in the first direction (X direction) of the second metal electrode layer 39.
  • a film 40 is formed (details will be described later).
  • a part of the first conductivity type semiconductor layer 25 and a part of the second conductivity type semiconductor layer 35 between the first metal electrode layer 29 and the second metal electrode layer 39 are covered with the resin film 40.
  • the valley portion of the uneven structure (texture structure) of the first conductivity type semiconductor layer 25 and the uneven structure of the second conductivity type semiconductor layer 35 is covered with the resin film 40.
  • the top of the concavo-convex structure of the first conductivity type semiconductor layer 25 and the top of the concavo-convex structure of the second conductivity type semiconductor layer 35 are the resin film 40. It is not covered with and is exposed.
  • the conductive film 48 is arranged in an island shape (not continuously). More specifically, a transparent conductive layer is provided between the trough portion of the concavo-convex structure of the first conductivity type semiconductor layer 25 and the resin film 40 and between the trough portion of the concavo-convex structure of the second conductivity type semiconductor layer 35 and the resin film 40. Membranes 48 are arranged in islands.
  • the contact area between the first metal electrode layer 29 and the first conductivity type semiconductor layer 25 is less than half the contact area between the first transparent electrode layer 28 and the first conductivity type semiconductor layer 25, and the second metal electrode layer 39.
  • the contact area between the second conductive type semiconductor layer 35 and the second conductive type semiconductor layer 35 is half or less than the contact area between the second transparent electrode layer 38 and the second conductive type semiconductor layer 35.
  • FIG. 4A is a diagram showing a semiconductor layer forming step in the method for manufacturing a solar cell according to the present embodiment
  • FIG. 4B is a diagram showing a transparent conductive layer forming step in the method for manufacturing a solar cell according to the present embodiment.
  • FIG. 4C is a diagram showing a metal electrode layer forming step in the method for manufacturing a solar cell according to the present embodiment
  • FIG. 4D is a diagram showing a transparent electrode layer forming step in the method for manufacturing a solar cell according to the present embodiment. is there. 4A to 4D, the back surface side of the semiconductor substrate 11 is shown, and the front surface side of the semiconductor substrate 11 is omitted.
  • the conductive type semiconductor layer 25 is formed (semiconductor layer forming step). For example, a CVD or PVD method is used to form a passivation film and a first-conductivity-type semiconductor film on the entire back surface of the semiconductor substrate 11, and then a mask or metal mask generated by using photolithography is used.
  • the passivation layer 23 and the first conductivity type semiconductor layer 25 may be patterned by using an etching method.
  • the etching solution for the p-type semiconductor film may be, for example, an acidic solution such as hydrofluoric acid containing ozone or a mixed solution of nitric acid and hydrofluoric acid, and the etching solution for the n-type semiconductor film may be, for example, hydroxide.
  • An alkaline solution such as an aqueous potassium solution may be mentioned.
  • a mask is used to form the passivation layer 23 and the p-type semiconductor layer 25. And patterning may be performed simultaneously.
  • the passivation layer 33 and the second conductivity type semiconductor layer 35 are formed on another part of the back surface side of the semiconductor substrate 11, specifically in the second conductivity type region 8 (semiconductor layer forming step).
  • a CVD or PVD method is used to form a passivation film and a second conductivity type semiconductor film on the entire back surface side of the semiconductor substrate 11, and then a mask or metal is formed using a photolithography technique.
  • the passivation layer 33 and the second conductivity type semiconductor layer 35 may be patterned by using an etching method using a mask.
  • the passivation layer and the second conductivity type semiconductor layer are stacked on the back surface side of the semiconductor substrate 11 using the CVD method or the PVD method, a mask is used to form the passivation layer 33 and the second conductivity type semiconductor layer 35. Film formation and patterning may be performed simultaneously.
  • the passivation layer 13 may be formed on the entire light-receiving surface side of the semiconductor substrate 11 (not shown).
  • a transparent conductive film 28Z is formed on the first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 so as to extend over them (transparent conductive film forming step).
  • a method of forming the transparent conductive film 28Z for example, a CVD method or a PVD method is used.
  • the first metal electrode layer 29 is formed on the first conductive type semiconductor layer 25 via the transparent conductive film 28Z, and the second conductive type semiconductor layer 35 is interposed via the transparent conductive film 28Z.
  • the second metal electrode layer 39 is formed thereon (metal electrode layer forming step).
  • the first metal electrode layer 29 and the second metal electrode layer 39 are formed by printing a printing material (for example, ink). Examples of the method of forming the first metal electrode layer 29 and the second metal electrode layer 39 include a screen printing method, an inkjet method, a gravure coating method, a dispenser method, and the like. Among these, the screen printing method is preferable.
  • the printing material includes a particulate (for example, spherical) metal material in an insulating resin material.
  • the printing material may contain a solvent or the like in order to adjust the viscosity or coatability.
  • the insulating resin material include matrix resin. More specifically, the insulating resin is preferably a polymer compound, particularly preferably a thermosetting resin or an ultraviolet curable resin, and a typical example is an epoxy, urethane, polyester or silicone resin.
  • the metal material include silver, copper, aluminum and the like. Among these, silver paste containing silver particles is preferable.
  • the ratio of the metal material contained in the printing material is 85% or more and 95% or less as a weight ratio with respect to the entire printing material.
  • the insulating resin in the first metal electrode layer 29 and the second metal electrode layer 39 is cured by heat treatment or ultraviolet irradiation treatment. At this time, the insulating resin material oozes out to the peripheral edges of the first metal electrode layer 29 and the second metal electrode layer 39, and the insulating resin material permeates the peripheral edges of the first metal electrode layer 29 and the second metal electrode layer 39.
  • the resin film 40 in which the material is unevenly distributed is formed.
  • the valley portion of the uneven structure (texture structure) of the transparent conductive film 28Z between the first metal electrode layer 29 and the second metal electrode layer 39 is covered with the resin film 40.
  • the top of the concavo-convex structure of the transparent conductive film 28Z between the first metal electrode layer 29 and the second metal electrode layer 39 is not covered with the resin film 40 and is exposed.
  • the first metal electrode layer 29 and the second metal electrode layer 39 thus formed of the conductive paste may have a urethane bond.
  • urethane resin has a smaller shrinkage at the time of cross-linking, and the resin is less likely to crack.
  • the etching solution can be prevented from soaking into the metal electrode layer, and the metal electrode layer can be peeled off due to the transparent conductive film under the metal electrode layer being etched, and long-term reliability can be improved. It can prevent the deterioration.
  • the etching method include a wet etching method, and examples of the etching solution include an acidic solution such as hydrochloric acid (HCl).
  • the etching of the transparent conductive film 28Z proceeds from the top to the valley of the concavo-convex structure (texture structure).
  • the transparent conductive film between them is not continuous, and the transparent conductive film 48 is formed in the valley portion of the uneven structure. It may remain on the island.
  • the resin film 40 in the valleys of the concavo-convex structure remains on the first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35.
  • the conventional solar cell manufacturing method includes a transparent electrode layer forming step after the transparent conductive film forming step and before the metal electrode layer forming step.
  • the transparent electrode layer forming step the first transparent electrode layer and the second transparent electrode layer which are separated from each other are formed by patterning the transparent conductive film using, for example, a photolithography method.
  • ⁇ Apply resist on the transparent conductive film, -By exposing the resist to light, an opening is formed in the resist, -By forming a first transparent electrode layer and a second transparent electrode layer which are separated from each other by etching the transparent conductive film exposed in the opening using the resist as a mask, -Remove the resist.
  • a metal electrode layer forming step and a transparent electrode layer forming step are included in this order.
  • the transparent conductive film 28Z using the first metal electrode layer 29 and the second metal electrode layer 39 formed in the electrode layer forming step as a mask, the first transparent electrode layer 28 and the second transparent electrode layer 28 separated from each other are formed.
  • the transparent electrode layer 38 is formed.
  • the transparent conductive film 28Z when the transparent conductive film 28Z is patterned using the first metal electrode layer 29 and the second metal electrode layer 39 as a mask, the first metal electrode layer 29 and the second metal electrode are etched when the transparent conductive film 28Z is etched.
  • the transparent conductive film 28Z below the layer 39 may also be etched, and the first transparent electrode layer 28 and the first metal electrode layer 29, and the second transparent electrode layer 38 and the second metal electrode layer 39 may peel off. is there.
  • a printing material containing a particulate metal material, a resin material and a solvent is printed and cured, whereby the first metal A resin film 40 in which a resin material is unevenly distributed is formed on the periphery of the electrode layer 29 and the periphery of the second metal electrode layer 39, and in the transparent electrode layer forming step, the first metal electrode layer 29 and the resin film 40 on the periphery thereof, Then, the transparent conductive film 28Z is patterned using the second metal electrode layer 39 and the resin film 40 on the periphery thereof as a mask.
  • etching of the transparent conductive film 28Z under the first metal electrode layer 29 and the second metal electrode layer 39 is suppressed, the first transparent electrode layer 28 and the first metal electrode layer 29 are separated, and the second transparent electrode 28 is removed.
  • the peeling of the electrode layer 38 and the second metal electrode layer 39 is suppressed.
  • the band width of the first transparent electrode layer 28 is narrower than the band width of the first metal electrode layer 29, and the band width of the second transparent electrode layer 38 is the second metal.
  • the resin material in the printing material of the first metal electrode layer 29 and the second metal electrode layer 39 is narrower than the band width of the electrode layer 39 and is formed on the periphery of the first metal electrode layer 29 and the periphery of the second metal electrode layer 39. An unevenly distributed resin film is formed.
  • the band width of the transparent electrode layer is generally wider than the band width of the metal electrode layer.
  • the solar cell 1 manufactured by the manufacturing method of the present embodiment a part of the first conductivity type semiconductor layer 25 and the second conductivity type semiconductor between the first metal electrode layer 29 and the second metal electrode layer 39.
  • a part of the layer 35 is covered with the resin film 40.
  • the valley portion of is covered with the resin film 40.
  • the same material as that of the first transparent electrode layer 28 and the second transparent electrode layer 38 is provided between the first conductive type semiconductor layer 25 and the resin film 40 and between the second conductive type semiconductor layer 35 and the resin film 40.
  • Transparent conductive films 48 are arranged in an island shape (not continuous). More specifically, a transparent conductive layer is provided between the trough portion of the concavo-convex structure of the first conductivity type semiconductor layer 25 and the resin film 40 and between the trough portion of the concavo-convex structure of the second conductivity type semiconductor layer 35 and the resin film 40. Membranes 48 are arranged in islands. This reduces the exposed area of the first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 35. Therefore, deterioration of the solar cell and the solar cell module is suppressed, and the reliability (for example, long-term durability) of the solar cell and the solar cell module is improved.
  • the present invention is not limited to the above-described embodiments, and various changes and modifications are possible.
  • the heterojunction type solar cell 1 is illustrated as shown in FIG. 3, but the present invention is not limited to the heterojunction type solar cell and various homojunction type solar cells and the like. It can be applied to solar cells.
  • a solar cell having the crystalline silicon substrate is illustrated, but the present invention is not limited to this.
  • a solar cell may have a gallium arsenide (GaAs) substrate.
  • GaAs gallium arsenide
  • the solar cell 1 shown in FIGS. 2 and 3 was manufactured according to the steps shown in FIGS. 4A to 4D.
  • anisotropic etching was performed on the back surface side of the single crystal silicon substrate to obtain a semiconductor substrate 11 having a pyramid type texture structure formed on the back surface side.
  • a CVD method is used to form a passivation film and a first-conductivity-type semiconductor film on the entire back surface of the semiconductor substrate 11, and then etching is performed using a photoresist (mask) generated using a photolithography technique.
  • a photoresist mask generated using a photolithography technique.
  • the passivation layer 23 and the first conductivity type semiconductor layer 25 were formed on a part of the back surface side of the semiconductor substrate 11 (semiconductor layer forming step).
  • a CVD method is used to form a passivation film and a second conductivity type semiconductor film on the entire back surface of the semiconductor substrate 11, and then etching is performed using a photoresist (mask) generated using a photolithography technique.
  • Method is used to form the passivation layer 33 and the second conductivity type semiconductor layer 35 on the other part on the back surface side of the semiconductor substrate 11 (semiconductor layer forming step).
  • the transparent conductive film 28Z was formed over the first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 by using the CVD method (transparent conductive film forming step).
  • a screen printing method using a silver paste is used to form a first metal electrode layer 29 on the first conductive type semiconductor layer 25 via the transparent conductive film 28Z and a second metal electrode layer 29 via the transparent conductive film 28Z.
  • the second metal electrode layer 39 was formed on the conductivity type semiconductor layer 35 (metal electrode layer forming step).
  • the first metal electrode layer 29 and the second metal electrode layer 39 were heat-treated in an oven at 180 ° C. for 1 hour.
  • the insulating resin material in the printing material oozes out to the periphery of the first metal electrode layer 29 and the periphery of the second metal electrode layer 39, and the periphery of the first metal electrode layer 29 and the periphery of the second metal electrode layer 39.
  • the resin film 40 was formed on the surface.
  • the transparent conductive film 28Z is patterned by an etching method using the first metal electrode layer 29 and the resin film 40 on the periphery thereof and the second metal electrode layer 39 and the resin film 40 on the periphery thereof as a mask.
  • the first transparent electrode layer 28 and the second transparent electrode layer 38 separated from each other were formed (transparent electrode layer forming step).
  • Hydrochloric acid (HCl) was used as the etching solution.
  • the back surface side of the solar cell after the transparent conductive film forming step and the metal electrode layer forming step and before the transparent electrode layer forming step was subjected to SEM (field emission type). It was observed using a scanning electron microscope S4800, manufactured by Hitachi High-Technologies Corporation. The results are shown in FIGS. 5A to 5C.
  • FIG. 5A is a result of observing the metal electrode layer and the metal electrode layer on the back surface side of the solar cell of the example with an SEM at a magnification of 100 times
  • FIG. 5B is a portion A between the metal electrode layers in FIG. 5A. Is the result of observation using SEM at a magnification of 450 times
  • FIG. 5C is a result of observing a portion B between the metal electrode layers in FIG. 5B with an SEM at a magnification of 5000 times.
  • the resin film 40 black portion in which the insulating resin material is unevenly distributed is formed on the peripheral edge of the first metal electrode layer 29 and the peripheral edge of the second metal electrode layer 39. It was confirmed. Also, it is confirmed that the valley portion of the uneven structure (texture structure) of the transparent conductive film 28Z between the first metal electrode layer 29 and the second metal electrode layer 39 is covered with the resin film 40 (black portion). Was done. On the other hand, it was confirmed that the top of the concavo-convex structure of the transparent conductive film 28Z between the first metal electrode layer 29 and the second metal electrode layer 39 was not covered with the resin film 40 and was exposed. As a result, it is expected that in the subsequent etching in the transparent electrode layer forming step, the etching of the transparent conductive film 28Z proceeds from the top to the bottom of the uneven structure.
  • the back surface side of the produced solar cell of the example was observed using an SEM, and the first transparent electrode layer 28, the first metal electrode layer 29, and the second transparent electrode layer 38 were observed. It was confirmed that the second metal electrode layer 39 was not peeled off. It was also confirmed that the resin film 40 remained without being peeled off in the valley portion of the uneven structure between the first metal electrode layer 29 and the second metal electrode layer 39. Furthermore, a short circuit between electrodes was checked to confirm that there was no short circuit between the electrode layers.
  • the resin film 40 Since the resin film 40 is not peeled off and there is no short circuit between the electrode layers, the valley portion of the uneven structure of the first conductivity type semiconductor layer 25 and the uneven structure of the resin film 40 and the uneven structure of the second conductivity type semiconductor layer 35. It is expected that the transparent conductive film 48 remains in the form of an island between the valley portion and the resin film 40, and the resin film 40 is held.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Abstract

L'invention concerne un procédé de fabrication de cellule solaire qui permet la formation simple d'une couche d'électrode transparente. Ce procédé de fabrication de cellule solaire comprend, dans l'ordre suivant, une étape de formation de couches semi-conductrices de type conducteur 25, 35 sur le côté de surface arrière d'un substrat 11, une étape de formation d'un film conducteur transparent sur les couches semi-conductrices de type conducteur 25, 35, une étape de formation de couches d'électrode métalliques 29, 39 sur les couches semi-conductrices de type conducteur 25, 35, respectivement, par l'intermédiaire du film conducteur transparent, et une étape consistant à former des couches d'électrode transparentes qui sont séparées les unes des autres après la formation en motif du film conducteur transparent. Dans l'étape de formation de couche d'électrode métallique, un matériau d'impression contenant un matériau métallique, un matériau de résine et un solvant est imprimé, puis durci, et les couches d'électrode métallique 29, 39 sont formées, et des films de résine 40 contenant chacun un matériau de résine distribué de manière irrégulière sont formés aux périphéries des couches d'électrode métalliques 29, 39. Dans l'étape de formation de couche d'électrode transparente, le film conducteur transparent est formé en motif avec la couche d'électrode métallique 29 et le film de résine 40 sur la périphérie et la couche d'électrode métallique 39 et le film de résine 40 à la périphérie servant de masques.
PCT/JP2019/040249 2018-10-31 2019-10-11 Procédé de fabrication de cellule solaire, cellule solaire et module de cellules solaires Ceased WO2020090423A1 (fr)

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CN201980057021.8A CN112640133B (zh) 2018-10-31 2019-10-11 太阳能电池的制造方法、太阳能电池以及太阳能电池模块

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WO2021060261A1 (fr) * 2019-09-26 2021-04-01 株式会社カネカ Procédé de fabrication de cellule solaire et cellule solaire
WO2021201030A1 (fr) * 2020-03-30 2021-10-07 株式会社カネカ Cellule solaire et son procédé de fabrication
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JP2023121604A (ja) * 2022-02-21 2023-08-31 株式会社カネカ 太陽電池の製造方法および太陽電池
JP2023180192A (ja) * 2022-06-08 2023-12-20 ジョジアン ジンコ ソーラー カンパニー リミテッド 太陽電池及び光起電力モジュール
WO2024157591A1 (fr) * 2023-01-26 2024-08-02 株式会社カネカ Cellule de batterie solaire divisée, et procédé de fabrication de celle-ci
WO2024181058A1 (fr) * 2023-02-27 2024-09-06 株式会社カネカ Procédé de fabrication de cellule solaire et cellule solaire

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WO2021060261A1 (fr) * 2019-09-26 2021-04-01 株式会社カネカ Procédé de fabrication de cellule solaire et cellule solaire
JP7288968B2 (ja) 2019-09-26 2023-06-08 株式会社カネカ 太陽電池の製造方法および太陽電池
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JP2023180192A (ja) * 2022-06-08 2023-12-20 ジョジアン ジンコ ソーラー カンパニー リミテッド 太陽電池及び光起電力モジュール
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WO2024157591A1 (fr) * 2023-01-26 2024-08-02 株式会社カネカ Cellule de batterie solaire divisée, et procédé de fabrication de celle-ci
WO2024181058A1 (fr) * 2023-02-27 2024-09-06 株式会社カネカ Procédé de fabrication de cellule solaire et cellule solaire

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CN112640133A (zh) 2021-04-09
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