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WO2020049975A1 - Structure de circuit et procédé de production de structure de circuit - Google Patents

Structure de circuit et procédé de production de structure de circuit Download PDF

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Publication number
WO2020049975A1
WO2020049975A1 PCT/JP2019/032096 JP2019032096W WO2020049975A1 WO 2020049975 A1 WO2020049975 A1 WO 2020049975A1 JP 2019032096 W JP2019032096 W JP 2019032096W WO 2020049975 A1 WO2020049975 A1 WO 2020049975A1
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WO
WIPO (PCT)
Prior art keywords
terminal
connection
conductive
circuit structure
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2019/032096
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English (en)
Japanese (ja)
Inventor
原口　章
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Wiring Systems Ltd
AutoNetworks Technologies Ltd
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Wiring Systems Ltd
AutoNetworks Technologies Ltd
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Wiring Systems Ltd, AutoNetworks Technologies Ltd, Sumitomo Electric Industries Ltd filed Critical Sumitomo Wiring Systems Ltd
Publication of WO2020049975A1 publication Critical patent/WO2020049975A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern

Definitions

  • the present invention relates to a circuit structure on which a semiconductor element is mounted and a method for manufacturing such a circuit structure.
  • an automobile has an electric junction box for distributing electric power from a power supply to loads such as a headlamp and a wiper.
  • the electric connection box includes a bus bar connected to a power supply to form a power circuit, and a circuit board having a control circuit for controlling the power circuit.
  • the power circuit includes a switching element for supplying / cutting power.
  • Patent Literature 1 proposes an electronic component mounting board in which a plurality of bus bars punched in a wiring pattern shape are integrally formed using, for example, an insulating material while exposing portions where electronic components are to be mounted. .
  • a circuit structure is a circuit structure in which a plurality of semiconductor elements each including a plurality of first terminals and at least one second terminal provided in parallel with the first terminal are mounted.
  • a connection portion which is arranged in the juxtaposition direction of the semiconductor elements and is connected to the first terminal for each of the semiconductor elements, an insulation portion provided between the connection portions, and provided in the insulation portion;
  • a conductive portion connected to the second terminal.
  • a method of manufacturing a circuit structure is directed to a circuit structure in which a plurality of semiconductor elements each including a plurality of first terminals and at least one second terminal arranged in parallel with the first terminals are mounted.
  • the first conductive piece, a rectangular connection plate portion having one side connected to the first conductive piece, and the other side opposite to the one side of the connection plate portion are juxtaposed to the first conductive piece;
  • an insulating portion is formed between the connection portions, a groove is formed in the insulating portion, and a conductive material is provided in the groove.
  • the second terminal is connected to the conductive material.
  • FIG. 3 is an explanatory diagram illustrating a method for manufacturing a circuit structure according to the embodiment.
  • FIG. 3 is an explanatory diagram illustrating a method for manufacturing a circuit structure according to the embodiment.
  • FIG. 3 is an explanatory diagram illustrating a method for manufacturing a circuit structure according to the embodiment.
  • FIG. 3 is an explanatory diagram illustrating a method for manufacturing a circuit structure according to the embodiment.
  • FIG. 3 is an explanatory diagram illustrating a method for manufacturing a circuit structure according to the embodiment.
  • FIG. 3 is an explanatory diagram illustrating a method for manufacturing a circuit structure according to the embodiment.
  • FIG. 3 is an explanatory diagram illustrating a method for manufacturing a circuit structure according to the embodiment.
  • FIG. 3 is an explanatory diagram illustrating a method for manufacturing a circuit structure according to the embodiment.
  • the source terminal and the gate terminal are arranged in a straight line, and the bus bars are respectively arranged at predetermined intervals in accordance with the terminal pitch. Further, the bus bar related to the drain terminal is also arranged at a predetermined distance from the bus bar related to the source terminal and the gate terminal.
  • a circuit structure in which a plurality of semiconductor elements each including a plurality of first terminals and at least one second terminal provided in parallel with the first terminals are mounted.
  • a connection portion connected to the first terminal for each of the semiconductor devices, an insulation portion provided between the connection portions, and an insulation portion provided between the connection portions.
  • a conductive portion connected to the second terminal.
  • the first terminal is connected to the connection portion
  • the second terminal is connected to the conductive portion provided in the insulating portion provided between the connection portions. Therefore, even when a plurality of semiconductor elements having a small pitch between the first terminal and the second terminal are arranged side by side, wiring can be performed with high accuracy, and the wiring between the first terminal and the second terminal can be provided. The occurrence of a short circuit or the like can be prevented.
  • the conductive portion includes a groove formed in the insulating portion, and a conductive material provided in the groove.
  • the conductive portion includes the groove formed in the insulating portion, and the conductive material provided in the groove. Therefore, it is possible to prevent a short circuit or the like from occurring between the wiring of the first terminal and the wiring of the second terminal, and also to prevent a short circuit or the like between the second terminals of each semiconductor element.
  • the circuit structure according to an aspect of the present disclosure is a first conductive piece connected to the connection portion and a rectangle, and one side is connected to the first conductive piece, and the other side is opposed to the one side.
  • a side includes a connection plate portion connected to the connection portion, and the first conductive piece, the connection plate portion, and the connection portion are integrally formed.
  • the first conductive piece, the connection plate portion, and the connection portion are integrally formed. Therefore, there is no connection point between the first conductive piece, the connection plate portion, and the connection portion, and the electrical resistance therebetween can be reduced.
  • connection portion is provided on one surface of the connection plate portion, and the insulating portion is provided to cover the one surface of the connection plate portion.
  • the conductive surface on which the conductive portion is formed in the insulating portion is flush with a connection surface connected to the first terminal in the connection portion.
  • the conductive surface on which the conductive portion is formed in the insulating portion is flush with the connection surface connected to the first terminal in the connection portion. Therefore, in one semiconductor element, the wiring of the first terminal and the second terminal arranged in parallel can be easily performed.
  • the circuit structure according to an embodiment of the present disclosure is provided so as to be flush with the conductive surface of the insulating portion and the connection surface of the connection portion, and in a direction intersecting a direction in which the connection portions are arranged.
  • the semiconductor device includes a second conductive piece disposed at an interval from the connection portion, and a third terminal of each semiconductor element is connected to the second conductive piece.
  • the second conductive piece is disposed with the spacing between the connection portion and the third terminal, and the first terminal and the second terminal are insulated. Further, since the second conductive piece is flush with the conductive surface of the insulating portion and the connecting surface of the connecting portion, the first terminal, the second terminal, and the third terminal included in one semiconductor element are provided. Can be wired on the same plane.
  • the plurality of semiconductor elements are provided on a portion of the other side of the connection plate portion excluding both ends, and the insulating portion is provided on the connection plate portion. Near the both ends of the other side, there is an interval maintaining section for maintaining an interval between the first conductive piece and the second conductive piece.
  • the gap maintaining section for maintaining the gap between the first conductive piece and the second conductive piece is provided at both ends of the other side of the connection plate portion, where the semiconductor element is not provided. It is provided in the vicinity. Therefore, it is possible to prevent in advance the problem caused by the expansion of the gap maintaining portion due to the heat generated by the semiconductor element.
  • the conductive material is provided in the groove at a position lower than the conductive surface.
  • the conductive material is provided lower than the conductive surface in the groove, for example, in a state where a water drop falls on the conductive surface and straddles a plurality of conductive portions. Even in such a case, it is possible to prevent water droplets from contacting the conductive material and prevent electromigration.
  • a plurality of semiconductor elements each including a plurality of first terminals and at least one second terminal arranged in parallel with the first terminals are mounted.
  • a first conductive piece, a rectangular connection plate portion having one side connected to the first conductive piece, and a side arranged on the other side of the connection plate portion facing the one side An insulating member is formed between the connecting portions, a groove is formed in the insulating portion, and a conductive material is formed in the groove with respect to an integrated member formed integrally with the connecting portion connected to the first terminal. And connecting the second terminal and the conductive material.
  • the first conductive piece, the connection plate portion, and a plurality of the connection portions are integrally formed with the integrated member, and the insulating portion is formed between the connection portions. Forming the groove in the insulating portion, and the conductive material provided in the groove is connected to the second terminal. Therefore, the insulation between the wiring of the first terminal and the second terminal is reliably performed, and even when a plurality of semiconductor elements having a small pitch between the first terminal and the second terminal are arranged side by side, Wiring can be performed with high accuracy.
  • the method for manufacturing a circuit structure according to an aspect of the present disclosure includes forming a frame that houses the integrated member and a second conductive piece to which a third terminal of each semiconductor element is connected.
  • the formation of the insulating portion, the formation of the groove, and the formation of the frame are performed simultaneously.
  • the formation of the insulating portion, the formation of the groove, and the formation of the frame are performed simultaneously. Therefore, the manufacturing process can be simplified.
  • the first terminal is connected to the connection portion
  • the third terminal is connected to the second conductive piece
  • a conductive material is provided in the groove.
  • the conductive material is provided in the groove portion, The connection between the second terminal and the conductive material is performed. Since the connection of the first terminal and the connection of the third terminal are performed, the positioning with respect to the second terminal is reliable, and since the conductive material is provided and the connection with the second terminal is performed, the manufacturing process is simplified. Can be
  • the formation of the insulating portion, the formation of the groove, and the formation of the frame are performed by insert molding.
  • the formation of the insulating portion, the formation of the groove, and the formation of the frame are performed by insert molding, they can be formed simultaneously, and the manufacturing process can be simplified.
  • the conductive material uses copper nanoparticle ink.
  • copper nanoparticle ink is used as the conductive material.
  • the low-temperature baking treatment cures the copper nanoparticle ink, and at this time, the connection with the second terminal is completed. Therefore, the manufacturing process can be simplified.
  • circuit structure according to the present embodiment is applied to an electric junction box that distributes power from a power supply to loads such as headlamps and wipers.
  • FIG. 1 is a perspective view showing the appearance of the electric junction box 100 according to the present embodiment
  • FIG. 2 is an exploded view of the electric junction box 100 according to the present embodiment.
  • the electric connection box 100 according to the present embodiment has a substantially box shape, and includes a control circuit board 9, a circuit structure 10 containing the control circuit board 9, and a circuit structure 10 containing the control circuit board 9. And a heat sink 90 that is provided on the opposite side of the circuit structure 10 with respect to the cover 80 and radiates heat generated by the circuit structure 10.
  • the heat sink 90 is attached to the circuit structure 10 by inserting the screws 70 into the through holes 60 formed at the four corners of the circuit structure 10 and screwing into the screw holes 91 formed at the four corners of the heat sink 90.
  • a plurality of semiconductor elements 71 to 77 are arranged in the circuit structure 10 (see FIG. 3).
  • the semiconductor elements 71 to 77 are also simply referred to as a semiconductor element 7.
  • the semiconductor elements 71 to 77 have the same configuration, for convenience of explanation, the semiconductor element 71 will be described as an example, and the description of the semiconductor elements 72 to 77 will be omitted.
  • FIG. 3 is an exploded view of the circuit structure 10 according to the present embodiment
  • FIG. 4 is an enlarged view of a square broken line portion in FIG.
  • Each semiconductor element 7 is, for example, an FET (more specifically, a surface mount type power MOSFET), and has three source terminals 711 (first terminal), one gate terminal 721 (second terminal), and one drain terminal. 731 (see FIGS. 5 and 6).
  • the three source terminals 711 and the gate terminal 721 are arranged in a straight line, and the drain terminal 731 (third terminal) is provided below the semiconductor element 7.
  • the semiconductor elements 71 to 77 straddle the first conductive body 3 (integral member) including the first bus bar 3a (first conductive piece) and the second conductive body 2 including the second bus bar 2a (second conductive piece).
  • first conductive body 3 and the second conductive body 2 are arranged at a predetermined interval 50, and each semiconductor element 7 Is connected to the first energizer 3, and the other end facing the one end is connected to the second energizer 2.
  • the semiconductor elements 71 to 77 are fixed to the second electric conductor 2.
  • the first current-carrying element 3 and the second current-carrying element 2 have, for example, a substantially rectangular plate shape, and are arranged such that their upper surfaces are flush with each other. In such a state, the first conductive body 3 and the second conductive body 2 are accommodated in the frame 11.
  • the first bus bar 3a of the first conductive body 3 and the second bus bar 2a of the second conductive body 2 are arranged so that their respective longitudinal directions coincide with the longitudinal direction of the frame body 11.
  • the frame 11 surrounds the first side surface and holds the first and second conductive members 3 and 2.
  • the frame 11 is a hollow rectangle and has a predetermined thickness in the vertical direction.
  • a connector terminal 5 connected to the control circuit board 9 is provided so as to penetrate the right side wall of the frame 11 in the thickness direction.
  • One end protrudes inside the frame 11 and the other end protrudes outside the frame 11. Have been.
  • a cylindrical housing 51 that protects the other end of the connector terminal 5 is attached to the outside of the right side wall of the frame 11.
  • the first current-carrying member 3 includes a first bus bar 3a, a connection plate portion 38, an insulating portion 6, and connection land portions 31 to 37 (connection portions).
  • the first conductive body 3 is provided with a terminal plate 39 that rises vertically from the side surface on the front side (long side) of the first bus bar 3a (see FIG. 8).
  • the terminal plate 39 is connected to a power supply (battery) or a load (a headlamp, a wiper, or the like).
  • the terminal plate 39 penetrates the front side wall of the frame 11 and protrudes outside the frame 11.
  • the second energizing body 2 is provided with a terminal plate 21 that rises vertically from the rear (long side) side surface of the second bus bar 2a (see FIG. 8).
  • the terminal plate 21 is connected to a power supply (battery) or a load (a headlamp, a wiper, or the like).
  • the terminal plate 21 penetrates a rear side wall of the frame 11 and protrudes outside the frame 11.
  • FIG. 5 is a longitudinal sectional view taken along line VV in FIG. 4
  • FIG. 6 is a longitudinal sectional view taken along line VI-VI in FIG.
  • the rear side surface of the first conductive body 3 and the front side surface of the second conductive body 2 face each other with a space 50 therebetween. As a result, the first current-carrying element 3 and the second current-carrying element 2 are insulated.
  • the first current-carrying member 3 is provided with an insulating portion 6 in the rear half of the upper surface in the front-rear direction.
  • the insulating part 6 is made of a thermoplastic resin having high heat resistance, such as PPS (polyphenylene sulfide).
  • the first conductive body 3 is provided with a first bus bar 3a in a front half portion in the front-rear direction.
  • the first bus bar 3a is made of, for example, pure copper or a copper alloy, and its upper surface is nickel-plated.
  • the insulating portion 6 has a substantially rectangular plate shape, and connection lands 31 to 37 connected to the source terminals of the semiconductor elements 71 to 77 are provided on the rear side edge of the insulating portion 6.
  • the connection lands 31 to 37 are respectively connected to three source terminals for each semiconductor element 7.
  • the connection land 31 is connected to three source terminals 711 of the semiconductor element 71 (see FIG. 4).
  • connection plate 38 that connects the connection lands 31 to 37 to the first bus bar 3a is provided below the insulating portion 6.
  • the insulating part 6 is provided on the upper surface (one surface) of the connection plate part 38.
  • the connection plate 38 is made of, for example, pure copper or a copper alloy.
  • the connection plate 38 is rectangular, and one side of the front side is connected to the first bus bar 3a, and the other side of the rear side opposite to the one side is connected to the connection lands 31 to 37. More specifically, the connection lands 31 to 37 are provided on the upper surface of the connection plate 38 and on the other side on the rear side (see FIG. 8). As described above, by using the plate-shaped connection plate portion 38, the electrical resistance in the connection between the connection land portions 31 to 37 and the first bus bar 3a can be reduced.
  • connection lands 31 to 37 are arranged along the direction in which the semiconductor elements 71 to 77 are arranged, that is, at equal intervals in the left-right direction.
  • the insulating portion 6 is also provided between the connection land portions 31 to 37. That is, the insulating portions 6 are provided between the connection lands 31 to 37 and between the connection lands 31 to 37 and the first bus bar 3a.
  • the connection lands 31 to 37 are made of, for example, pure copper or a copper alloy.
  • connection lands 31 to 37 have rectangular upper surfaces (connection surfaces), and the source terminals of the semiconductor elements 71 to 77 are connected to the upper surfaces.
  • the source terminals of the semiconductor elements 71 to 77 are connected to the upper surfaces.
  • three source terminals 711 of the semiconductor element 71 are connected to the upper surface 311 of the connection land portion 31.
  • the upper surface 68 (conductive surface) of the insulating portion 6 provided with the above-described conductive portion 8 and the upper surfaces of the connection lands 31 to 37 are flush (see FIG. 5).
  • connection lands 31 to 37, the connection plate 38 and the first bus bar 3a are integrally formed.
  • a plate material of pure copper or a copper alloy is subjected to nickel plating, it is integrally formed by cutting, cutting, pressing, or the like.
  • the circuit structure 10 according to the present embodiment there is no so-called connection point in the first current-carrying member 3, and the electric resistance can be reduced.
  • the circuit structure 10 according to the present embodiment is not limited to this, and the connection land portions 31 to 37, the connection plate portion 38, and the first bus bar 3a may be separately provided to form the first conductive body 3.
  • the conductive portion 8 is provided in a linear shape.
  • a plurality of pin-shaped connection terminals 4 to be connected to the control circuit board 9 are provided on the left end of the upper surface 68 of the insulating portion 6.
  • the conductive portion 8 connects the gate terminal of each semiconductor element 7 to each connection terminal 4. That is, the semiconductor elements 71 to 77 are connected to the respective connection terminals 4 via the conductive portions 8 respectively.
  • Each conductive portion 8 includes grooves 61 to 67 formed on the upper surface 68 of the insulating portion 6 and conductive materials 81 to 87 provided inside the grooves 61 to 67.
  • the grooves 61 to 67 are formed so as not to interfere with each other.
  • FIG. 7 is an enlarged view of the insulating portion 6 in FIG.
  • Each of the groove portions 61 to 67 is recessed from a position matching the gate terminal of each of the semiconductor elements 71 to 77 fixed to the second conductor 2 to the corresponding connection terminal 4.
  • the groove 61 is recessed from immediately below the gate terminal 721 of the semiconductor element 71 to any of the connection terminals 4 (see FIGS. 4 and 6).
  • a conductive material 81 is provided inside the groove 61, and the gate terminal 721 of the semiconductor element 71 and the corresponding connection terminal 4 are connected to the conductive material 81.
  • the conductive materials 81 to 87 for example, copper nanoparticle ink is used.
  • each connection terminal 4 is connected to the gate terminal of each of the semiconductor elements 71 to 77 via the conductive portion 8 (conductive materials 81 to 87).
  • the connection terminal 4 is connected to the control circuit board 9, and transmits a control signal for controlling the semiconductor elements 71 to 77 transmitted by the control circuit board 9 to the gate terminals of the semiconductor elements 71 to 77 via the conductive portion 8. send.
  • the semiconductor elements 71 to 77 are controlled, and the energization from the first conductive body 3 to the second conductive body 2 or from the second conductive body 2 to the first conductive body 3 is controlled.
  • conductive materials 81 to 87 are provided inside the groove portions 61 to 67, respectively.
  • the upper surfaces of the conductive members 81 to 87 do not protrude from the grooves 61 to 67 and are positioned lower than the upper surface 68 of the insulating portion 6.
  • the conductive materials 81 to 87 are prevented from coming into contact with each other, so that electromigration can be prevented in advance.
  • connection lands 31 to 37 are arranged side by side on the rear side edge of the insulating portion 6, and are located on the edge portion except for both ends in the left-right direction. Is provided. In other words, the connection lands 31 to 37 are arranged side by side on the rear edge of the connection plate 38.
  • the insulating portion 6 has a gap maintaining section 69 for maintaining the gap 50 between the first bus bar 3a and the second bus bar 2a at both ends in the left-right direction at the rear side edge.
  • the gap maintaining portion 69 has a gap 50 at both ends in the left-right direction of the peripheral portion of the insulating portion 6 in the direction of the second bus bar 2a, in other words, in the direction in which the second conductive body 2 and the first conductive body 3 are separated from each other. Only protruding.
  • the present invention is not limited to this, and a configuration may be adopted in which a part of the interval maintaining unit 69 is interposed in the interval 50.
  • the gap maintaining portions 69 are provided at both left and right ends of the peripheral portion of the insulating portion 6 apart from the positions of the semiconductor elements 71 to 77. . Therefore, it is possible to prevent a problem caused by the thermal expansion of the gap maintaining portion 69 when the semiconductor elements 71 to 77 generate heat.
  • Semiconductor elements 71 to 77 are fixed to the second conductor 2 (second bus bar 2a).
  • the second bus bar 2a has a rectangular plate shape, and semiconductor elements 71 to 77 are arranged side by side on the front side on the upper surface. Since the semiconductor elements 71 to 77 have drain terminals below, the semiconductor elements 71 to 77 are fixed to the second bus bar 2a by, for example, soldering the drain terminals to the second bus bar 2a. For example, in the semiconductor element 71, the drain terminal 731 is soldered to the front edge of the second bus bar 2a. Thus, the semiconductor element 71 is connected to the second bus bar 2a and is fixed to the second bus bar 2a.
  • the control circuit board 9 has a circuit pattern formed thereon, and a control element such as a microcomputer or a control IC is mounted thereon.
  • the control circuit board 9 is connected to the connection terminals 4 and the connector terminals 5.
  • the control circuit board 9 transmits a control signal for controlling the opening and closing of the semiconductor elements 71 to 77 via the connection terminal 4 and the conductive members 81 to 87 in response to the instruction signal input via the connector terminal 5. Send to 77.
  • the circuit structure 10 according to the present embodiment has a plurality of terminals, and even when a plurality of semiconductor elements 7 having a narrow pitch between terminals are arranged in parallel, the semiconductor element 7 The wiring for each terminal can be performed with high accuracy.
  • wiring is performed by the connection lands 31 to 37 for the source terminal of the semiconductor element 7, and the conductive portion of the insulating section 6 is connected to the gate terminal.
  • the wiring can be performed with high accuracy, and the occurrence of a short circuit between the wiring of the source terminal and the wiring of the gate terminal can be prevented.
  • the conductive portion 8 is provided in the insulating portion 6 and includes grooves 61 to 67 formed in the insulating portion 6 and conductive materials 81 to 87 provided inside thereof. Therefore, it is possible to prevent a short circuit from occurring between the conductive portions 8.
  • FIGS. 8 to 11 are explanatory diagrams illustrating a method for manufacturing the circuit structure 10 according to the present embodiment.
  • An electric conductor 2 is prepared.
  • the first and second electric conductors 3 and 2 are formed by, for example, subjecting a plate material of pure copper or a copper alloy to a nickel plating process with a thickness of 2 to 3 mm, and then performing cutting, cutting, pressing, and the like. (See FIG. 8).
  • the first and second current-carrying members 3 and the second current-carrying member 2 thus prepared, the connection terminals 4 and the connector terminals 5 are arranged in an insert molding die, and are integrally molded by an injection molding machine.
  • a thermoplastic resin having high heat resistance such as PPS (polyphenylene sulfide) is used.
  • the frame 11 and the housing 51 are formed, and the upper surfaces of the second conductive members 2 (second bus bars 2a) and the connection land portions 31 to 37 of the first conductive members 3 are exposed.
  • the insulating portion 6 is formed so as to be flush with the upper surface of the second bus bar 2a and the upper surfaces of the connection lands 31 to 37 (see FIG. 9).
  • grooves 61 to 67 for the conductive portion 8 are simultaneously formed on the upper surface 68 of the insulating portion 6. As described above, the grooves 61 to 67 are provided so as to connect the connection terminals 4 from below the gate terminals of the semiconductor elements 71 to 77.
  • the semiconductor elements 71 to 77 are mounted. Specifically, after the solder paste 40 is applied to the peripheral portion of the second conductor 2 connected to the drain terminals of the semiconductor elements 71 to 77 and the upper surfaces of the connection lands 31 to 37 connected to the source terminals, the semiconductor element 71 To 77 are appropriately placed (see FIG. 10), and in this state, soldering is performed in a reflow furnace.
  • the grooves 61 to 67 are filled with a conductive material.
  • a conductive material a copper nanoparticle ink having a characteristic of exhibiting conductivity close to bulk when fired at a low temperature is used.
  • conductive materials 81 to 87 are formed in the grooves 61 to 67, respectively, and the gate terminals and the connection terminals 4 of the semiconductor elements 71 to 77 are respectively joined to the copper wiring (conductive materials 81 to 87). Is done.
  • the gate terminals of the semiconductor elements 71 to 77 and the connection terminal 4 are electrically connected (see FIG. 11).
  • connection terminals 4 and the connector terminals 5 are soldered to through-hole portions (see FIG. 3) formed at predetermined positions on the control circuit board 9.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Connection Or Junction Boxes (AREA)

Abstract

La présente invention concerne une structure de circuit comportant, montés sur cette dernière, une pluralité d'éléments semi-conducteurs (7) pourvus d'une pluralité de premières bornes (711) et d'au moins une seconde borne disposée en parallèle avec les premières bornes (711). La structure de circuit comprend : des sections de plage de connexion (31) disposées en parallèle dans la direction d'agencement parallèle des éléments semi-conducteurs (7) et connectées aux premières bornes (711) de chaque élément semi-conducteur (7) ; une section isolante (6) disposée entre les sections de plage de connexion (31) ; et une section conductrice disposée sur la section isolante (6) et connectée à la seconde borne.
PCT/JP2019/032096 2018-09-03 2019-08-16 Structure de circuit et procédé de production de structure de circuit Ceased WO2020049975A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018-164664 2018-09-03
JP2018164664A JP2020038883A (ja) 2018-09-03 2018-09-03 回路構造体及び回路構造体の製造方法

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WO2020049975A1 true WO2020049975A1 (fr) 2020-03-12

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023004409A1 (fr) 2021-07-23 2023-01-26 Beam Therapeutics Inc. Arns guides pour systèmes d'édition crispr/cas
WO2023039468A1 (fr) 2021-09-08 2023-03-16 Beam Therapeutics Inc. Administration d'arn guide viral

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001177951A (ja) * 1999-12-15 2001-06-29 Yazaki Corp 導電回路構造
JP2009117805A (ja) * 2007-09-28 2009-05-28 Catem Develec Gmbh & Co Kg 熱除去機能を有するバスバー
JP2010022117A (ja) * 2008-07-09 2010-01-28 Autonetworks Technologies Ltd 回路構成体
WO2014167143A1 (fr) * 2013-04-12 2014-10-16 Nagares, S.A. Dispositif électronique à dissipation thermique intégrée, dispositif de commande électronique et relais statique le comprenant, et procédé de fabrication de ce dispositif
JP2017519357A (ja) * 2014-05-13 2017-07-13 アウト カーベル マネージメントゲゼルシャフト ミット ベシュレンクテル ハフツング 車両用回路構造体及び回路構造体の使用

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001177951A (ja) * 1999-12-15 2001-06-29 Yazaki Corp 導電回路構造
JP2009117805A (ja) * 2007-09-28 2009-05-28 Catem Develec Gmbh & Co Kg 熱除去機能を有するバスバー
JP2010022117A (ja) * 2008-07-09 2010-01-28 Autonetworks Technologies Ltd 回路構成体
WO2014167143A1 (fr) * 2013-04-12 2014-10-16 Nagares, S.A. Dispositif électronique à dissipation thermique intégrée, dispositif de commande électronique et relais statique le comprenant, et procédé de fabrication de ce dispositif
JP2017519357A (ja) * 2014-05-13 2017-07-13 アウト カーベル マネージメントゲゼルシャフト ミット ベシュレンクテル ハフツング 車両用回路構造体及び回路構造体の使用

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023004409A1 (fr) 2021-07-23 2023-01-26 Beam Therapeutics Inc. Arns guides pour systèmes d'édition crispr/cas
WO2023039468A1 (fr) 2021-09-08 2023-03-16 Beam Therapeutics Inc. Administration d'arn guide viral

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