WO2019240815A1 - Array antenna digital pre-distortion with gaussian yield process model - Google Patents

Abstract

Systems, methods, apparatuses, and computer program products for enhancing power amplifiers used in active antenna arrays are provided. One method may include deriving an estimate of a forward model for a single amplifier using off-line measurement of amplifier model's coefficients, determining inverse model coefficients using an indirect learning method, generating a set of Gaussian process coefficients using a Gaussian yield process model, generating an ensemble of non-linear forward models using the derived estimate of the forward model and the Gaussian process coefficients, constructing a set of inverse models using the generated ensemble of non-linear forward models, applying inverse model weights of the set of inverse models to a pre-distortion block to produce a plurality of pre-distorted vectors, and applying the plurality of pre-distorted vectors to an array of antennas to produce a set of linearized output vectors.

Description

TITLE:

ARRAY ANTENNA DIGITAL PRE-DISTORTION WITH GAUSSIAN YIELD PROCESS MODEL

HELD:

[0001] Some example embodiments may generally relate to mobile or wireless telecommunication systems, such as Long Term F.volution (LTE) or fifth generation (5G) radio access technology or new radio (NR) access technology. For example, certain embodiments may relate to active antenna arrays used by 5G base stations or node Bs (gNBs).

BACKGROUND:

|0002| Examples of mobile or wireless telecommunication systems may include the Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access Network (UTRAN), Long Term Evolution (LTE) Evolved UTRAN (E-UTRAN), LTE-Advanced (LTE-A), MulteFire, LTE-A Pro, and'or fifth generation (5G) radio access technology or new radio (NR) access technology. Fifth generation (5G) or new radio (NR) wireless systems refer to the next generation (NG) of radio systems and network architecture. It is estimated that NR will provide bitrates on the order of 10-20 Gbit s or higher, and will support at least enhanced mobile broadband (cMBB) and ultra-reliable low-latency-communication (URLLC). NR is expected to deliver extreme broadband and ultra-robust, low latency connectivity and massive networking to support the Internet of Things (IoT). With IoT and machine-to-machine (M2M) communication becoming more widespread, there will be a growing need for networks that meet the needs of lower power, low data rate, and long battery life. It is noted that, in 5G or NR, the nodes that can provide radio access functionality to a user equipment (i.c., similar to Node B in E-UTRAN or cNB in LTE) may be referred to as a next generation or 5G Node B (gNB). SUMMARY:

[00031 One embodiment is directed to a method that may include deriving an estimate of a forward model for a single amplifier using off-line measurement of amplifier model’s coefficients, determining inverse model coefficients using an indirect learning method, generating a set of Gaussian process coefficients using a Gaussian yield process model, generating an ensemble of non-linear forward models using the derived estimate of the forward model and the Gaussian process coefficients, constructing a set of inverse models using the generated ensemble of non-linear forward models, applying inverse model weights of the set of inverse models to a pre- distortion block to produce a plurality of pre-distorted vectors, and applying the plurality of pre-distorted vectors to an array of antennas to produce a set of linearized output vectors.

[0004] In certain embodiments, the method may further include testing and evaluating each of the linearized output vectors using error vector magnitude.

|0005[ In some embodiments, the method may also include selecting an optimum model for the entire array of antennas based on the evaluating step.

[0006[ In certain embodiments, the evaluating step may further include injecting each of the linearized output vectors to a spectrum analyzer and evaluating error vector magnitude performance using, for example, a vector spectrum analyzer.

[0007[ In some embodiments, the amplifier may include a radio frequency integrated circuit (RFIC) power amplifier (RL).

[000811h certain embodiments, the amplifier model’s coefficients may be obtained using the following formula:

where is the amplifier model’s coefficients.

(0009| In some embodiments, the method may further include storing one or more of the models or the model coefficients in non-volatile memory.

(0010| Another embodiment is directed to an apparatus including at least one processor and at least one memory comprising computer program code. The at least one memory and computer program code configured, with the at least one processor, to cause the apparatus at least to derive an estimate of a forward model for a single amplifier using off-line measurement of amplifier model’s coefficients, determine inverse model coefficients using an indirect learning method, generate a set of Gaussian process coefficients using a Gaussian yield process model, generate an ensemble of non-linear forward models using the derived estimate of the forward model and the Gaussian process coefficients, construct a set of inverse models using the generated ensemble of non-linear forward models, apply inverse model weights of the set of inverse models to a pre-distortion block to produce a plurality of predistorted vectors, and apply the plurality of pre-distorted vectors to an array of antennas to produce a set of linearized output vectors.

(001 II In certain embodiments, one of the at least one memory may include non-volatile memory, and one or more of the models or model coefficients may be stored in the non-volatile memory.

100121 In some embodiments, the at least one memory and computer program code may be further configured, with the at least one processor, to cause the apparatus at least to test and evaluate each of the linearized output vectors using error vector magnitude.

[0013] In certain embodiments, the at least one memory and computer program code may be further configured, with the at least one processor, to cause the apparatus at least to select an optimum model for the entire array of antennas based on the evaluating step. |0014| In some embodiments, the models stored in the non-volatile memory may be adapted and updated as a data set during real time operation, and the data set may be stored in the non-volatile memory.

|0015| In certain embodiments, the at least one memory and computer program code are further configured, with the at least one processor, to cause the apparatus at least to perform over the air adaptation by observing an overall signal of the array of antennas using a horn antenna.

|0016| In some embodiments, the at least one memory and computer program code may be further configured, with the at least one processor, to cause the apparatus at least to inject each of the linearized output vectors to a spectrum analyzer and evaluate error vector magnitude performance using a vector spectrum analyzer.

(0017] In certain embodiments, the amplifier may include a radio frequency integrated circuit (RFIC) power amplifier (PA).

|00181 In some embodiments, the amplifier model^'s coefficients may be obtained using the following formula:

where the amplifier model’s coefficients.

|0019| Another embodiment is directed to an apparatus that may include circuitry configured to derive an estimate of a forward model for a single amplifier using off-line measurement of amplifier model's coefficients, circuitry configured to determine inverse model coefficients using an indirect learning method, circuitry configured to generate a set of Gaussian process coefficients using a Gaussian yield process model, circuitry configured to generate an ensemble of non-linear forward models using the derived estimate of the forward model and the Gaussian process coefficients, circuitry configured to construct a set of inverse models using the generated ensemble of non-linear forward models, circuitry configured to apply inverse model weights of the set of inverse models to a pre-distortion block to produce a plurality of pre-distorted vectors, and circuitry configured to apply the plurality of pre-distorted vectors to an array of antennas to produce a set of linearized output vectors.

10020] Another embodiment is directed to an apparatus that may include means for deriving an estimate of a forward model for a single amplifier using off-line measurement of amplifier model’s coefficients, means for determining inverse model coefficients using an indirect learning method, means for generating a set of Gaussian process coefficients using a Gaussian yield process model, means for generating an ensemble of non-linear forward models using the derived estimate of the forward model and the Gaussian process coefficients, means for constructing a set of inverse models using the generated ensemble of non-linear forward models, means for applying inverse model weights of the set of inverse models to a predistortion block to produce a plurality of pre-distorted vectors, and means for applying the plurality of pre-distorted vectors to an array of antennas to produce a set of linearized output vectors.

10021] Another embodiment is directed to a non-transitory computer readable medium comprising program instructions stored thereon for performing at least the following: deriving an estimate of a forward model for a single amplifier using off-line measurement of amplifier model’s coefficients, determining inverse model coefficients using an indirect learning method, generating a set of Gaussian process coefficients using a Gaussian yield process model, generating an ensemble of non-linear forward models using the derived estimate of the forward model and the Gaussian process coefficients, constructing a set of inverse models using the generated ensemble of non-linear forward models, applying inverse model weights of the set of inverse models to a pre-distortion block to produce a plurality of pre-distorted vectors, and applying the plurality of pre-distorted vectors to an array of antennas to produce a set of linearized output vectors. BRIEF DESCRIPTION OF THE DRAWINGS:

[0022| For proper understanding of example embodiments, reference should be made to the accompanying drawings, wherein:

|0023| Fig. 1 illustrates an example of an ILA architecture used for single amplifier linearization;

[00241 Fig. 2 illustrates an example block diagram of a modified ILA architecture, according to an embodiment;

[0025[ Fig. 3 illustrates a system to mimic an NxN array Gaussian yield process using a single RFIC characterization, according to an embodiment;

[0026] Fig. 4 illustrates an example implementation of a test system using OFDM signal for single clement characterization;

[0027[ Fig. 5a depicts example curves for single element EVM vs. Pout (dBm) with and without linearized models, according to an embodiment;

[0028] Fig. 5b illustrates an example of power dissipation as a function of Pout (dBm) per one quarter of RFIC, according to an embodiment;

[0029| Fig. 6 illustrates an example of NxN Gaussian process distributed coefficients, according to an embodiment;

|0030| Fig. 7 illustrates NxN array gain compression curves based on Gaussian process model for an array size— 16, according to an example embodiment;

[00311 Fig. 8 illustrates an example NxN array RFIC models LMLM compression curves, according to one example embodiment;

[0032[ Fig. 9 illustrates an example of a family of pre-distorted curves from estimated inverse models for NxN array, according to an embodiment;

[0033[ Fig. 10 illustrates an example flow diagram of a method for enhancing or improving the correctness of amplifiers, according to an embodiment;

[0034] Fig. 1 1 illustrates an example block diagram of an apparatus, according to one embodiment; |0035| Fig. 12a illustrates a plot of evm'memory performance variation over the entire array for each model; and

(0036| Fig. 12b illustrates the improved average performance, according to certain embodiments.

DETAILED DESCRIPTION:

|0037| It will be readily understood that the components of certain example embodiments, as generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of some example embodiments of systems, methods, apparatuses, and computer program products for enhancing power amplifiers used in active antenna arrays, is not intended to limit the scope of certain embodiments but is representative of selected example embodiments.

(0038] The features, structures, or characteristics of example embodiments described throughout this specification may be combined in any suitable manner in one or more example embodiments. For example, the usage of the phrases“certain embodiments,”“some embodiments,” or other similar language, throughout this specification refers to the fact that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment. Thus, appearances of the phrases“in certain embodiments,”“in some embodiments,”“in other embodiments,” or other similar language, throughout this specification do not necessarily all refer to the same group of embodiments, and the described features, structures, or characteristics may be combined in any suitable manner in one or more example embodiments.

|0039| Additionally, if desired, the different functions or steps discussed below may be performed in a different order and-or concurrently with each other. Furthermore, if desired, one or more of the described functions or steps may be optional or may be combined. As such, the following description should be considered as merely illustrative of the principles and teachings of certain example embodiments, and not in limitation thereof. (00401 50 base stations (or gNBs) use active antenna arrays for beam forming, which may use a large number of radio frequency integrated circuit (RF IC) amplifiers in a dense area. An array antenna produces a specific equivalent isotropic radiated power (EIRP) that needs to achieve satisfactory radio frequency (RF) linearity performance in order to meet specifications and standards. To comply with linearity requirements using a typically high peak-to-average ratio (PAR) 5G signal, the RFTC amplifiers need to operate backed-off from their peak power capability, which means more devices and higher power dissipation. This results in more heat generation requiring a larger heat sink and mechanics for cooling, and ultimately a higher cost due to both RFIC and mechanical size.

[0041] Thus, some important factors in designing a base station’s array antenna include: EIRP, cost, power dissipation, heat generation and size. In other words, to achieve a certain EIRP for an antenna array, the costs should be taken into account, as well as the power dissipation and heat generation, which both influence the ultimate size of the mechanics. Certain embodiments described herein provide an approach to mitigate at least these issues.

|0042| For example, example embodiments arc able to reduce cost by reducing the number of RFIC required to produce the target EIRP. In addition, some embodiments are able to reduce power dissipation by reducing the number of active RFIC amplifiers used in the array. Also, reducing power will reduce heat so that a smaller heat sink'mcchanic can be used, thereby resulting in smaller radio size.

[0043| In view of the above, certain embodiments provide an enhancement to a digital pro-distortion (DPD) technique known as an indirect learning architecture (ILA) to improve the corrcctability of power amplifiers (PAs) used in active antenna arrays. Fig. 1 illustrates an example of a general form of an ILA architecture that can be used for single amplifier linearization.

(0044] As illustrated in the example of Fig. 1, an original input signal x[n] is input into pre-distorter 101 to produce a pre-distorter output signal u[n] that is input into PA 102 to produce PA output signal y[n]. Measurement noise h may be added to the PA output signal y[n] to produce yr[[n]. Pre- distorter training may then be performed at post-distorter 103 based on the modified signal

(00451 One embodiment provides a new variation of an TLA that can be utilized for linearization of an array of RFIC such as may be used in an active antenna array of a millimeter wave (mmWave) 5G system. Fig. 2 illustrates an example block diagram of an architecture (ILA) according to an embodiment. As illustrated in the example of Fig. 2, a plurality of RFIC amplifiers 202 are used in an active antenna array. This configuration requires a different DPD linearization technique from those that have been developed to linearize single amplifiers, such as shown in the example of Fig. 1. One problem in DPD in mm Wave 5G systems with an antenna array, such as in Fig. 2, is the method of observation (or feed-back path). Conventionally, the observation path is needed to sample each amplifier's output, which is used for model estimation. Since the 5G operating frequency is very high (i.e., in the range of 39GHz), the patch antenna elements with their associated power amplifiers leads to a high-density layout. However, the addition of couplers to observe each the output signals and then routing of all of those observations to receivers may be very problematic.

[0046] Alternatively, it might be possible to observe the output of the entire array using on-air (or induced) coupling. The challenges here arc that the overall array response may not be a suitable representation of individual RFIC amplifiers and near field observation has an inherent discrepancy to far field results.

(00471 To resolve at least these observation issues in an active antenna array system, certain embodiments provide techniques to use off-line modelling of a single PA, as illustrated in the example architecture depicted in Fig. 3. In an embodiment, Fig. 3 illustrates a system to mimic an NxN array Gaussian yield process using a single RFIC characterization, according to an embodiment. Generally, the example embodiment of Fig. 3 may include the derivation of the forward model for a single RL at block 305, the generation of a set of NxN Gaussian process coefficients at block 310, the use of the forward model with the NxN Gaussian coefficients to generate an ensemble of Gaussian non-linear forward models at block 315, and then using the ensemble of Gaussian forward models to generate an NxN array of pre-distortion signals at block 320. In embodiment, testing and evaluation of each of the generated models, for example using error vector magnitude (F.VM) with memory (memory evm) or adjacent channel power ratio (AGP), may be performed, and then the optimum model for use with the entire array may be selected.

[0048] More specifically, as illustrated in the example of Fig. 3, using offline measurement with single RFIC amplifier 102, vector yfn] may be obtained. Then, exploiting a derivation of Voltcrra scries non-linear modelling technique which considers polynomial order K, memory length Q&M, an estimate of forward model yfn] of RFIC amplifier 102 may be derived. In an embodiment, the amplifier model’s coefficients,

which may be referred to herein as w, may be obtained at 305 according to the following formula:

|0049| where It represents polynomial order, M and Q represent memory effect depth, a ku.q.m represents amplifier coefficients for various values of k, q, and m, x(n-q, m) represents delayed version input signal, and |x(n-q, m)|^2k represents delayed signal power respectively. Y(n) represents output signal of amplifier.

[00501 The inverse model coefficients

can be obtained using matrix inversion, but, according to certain embodiments described herein, an indirect learning method may be used for inverse model estimation.

[0051[ Next, in one embodiment, a set of NxN (array size) Gaussian distributed coefficients may be generated at 310 and in conjunction with the estimated forward model. Gaussian vectors [G_nj may be applied to RFIC model to generate, at 315, NxN estimated forward model's weights (åw) representing a normal process according to the following formula:

Process (n)

where, is the Gaussian Variable and y_e is the RFIC

forward model.

|0052| Using this set of NxN forward models, a set of NxN inverse models are constructed, this also generates, at 320, a set of NxN inverse model's weights

which is then applied to the pre-distortion block 101 to produce the NxN pre-distorted vectors ufn]. Once pre-distorted signals u[n] are applied to RFIC array, NxN linearized output vectors yi[n], y2[n], .... y„[nl are provided which have normal process attributes that mimic the production build environment for a NxN array antenna.

|0053| Fig. 4 illustrates an example implementation of a test system using OFDM signal for single clement characterization. As discussed above, one example embodiment may include measurement of single RFIC and related analysis, followed by array Gaussian model simulations. In the example test setup of Fig. 4, using OFDM 64QAM signal an output power sweep may be performed for two cases: (a) DPD OFF (no linearization), and (b) DPD ON with linearization. In an embodiment, the forward model may be obtained and predistorted signal created using the methods described herein, such as shown in Figs. 2 or 3. Then, the linearized signal may be injected to spectrum analyzer (SA) 410, and error vector magnitude (EVM) performance of RFIC output may be evaluated using vector signal analyzer (VSA) block 420.

|0054| Figs. 5a and 5b illustrate an example of RFIC output provided by certain embodiments described herein. Fig. 5a depicts example curves for single element EVM vs. Pout (dBm) with and without linearized models. Fig. 5b illustrates an example of power dissipation as a function of Pout (dBm) per one quarter of RFIC.

[00551 According to certain embodiments, after having the results from the single RFIC linearization discussed above, similar power extension may be obtained tor the entire array of antennas. In one embodiment, Gaussian yield process modelling, which predicts the behavior of entire array elements in a normal distribution sense, may be used to achieve the power extension for the entire antenna array.

|0056[ Fig. 6 illustrates an example of NxN Gaussian process distributed coefficients, according to an embodiment. Fig. 7 illustrates NxN array gain compression curves based on Gaussian process model for an array size- 16, according to an example embodiment. Fig. 8 illustrates an example NxN array RFIC models LMLM compression curves, according to one example. |0057| Fig. 9 illustrates an example of a family of pre-distorted curves from estimated inverse models for NxN array. In certain embodiments, NxN pre-distorted vectors may be applied to RFIC ensemble models, which generates NxN linearized outputs. According to an embodiment, to evaluate the entire array model performance, metrics such as mcmory-cvm and ACP may be considered. Each model may be applied to the other amplifiers within the array. |0058| According to an example embodiment, the model selection criteria that is used may be based on array model space weights minimizing mean /standard deviation on the final evm memory or interchangeably ACP results after linearization, for example according to die following: Criteria is the minimize function. In one

embodiment, the corresponding pre-distortion vector may be generated using this least squares (LS) criterion, and evaluated on the entire array model space.

(0059] Fig. 10 illustrates an example flow diagram of a method for enhancing or improving the correctness of amplifiers, such as PAs used in active antenna arrays of mm Wave 5G communication systems, according to one example embodiment. In certain example embodiments, the flow diagram of Fig. 10 may be performed by a network node, such as a base station, node B, eNB, gNB, or any other access node, or one or more servers in a cloud configuration.

|0060| In one embodiment, the method of Fig. 10 may include, at 800, deriving an estimate of a forward model for a single amplifier, such as a PA or RFIC PA, using off-line measurement of amplifier model's coefficients (w). The method may then include, at 810, determining inverse model coefficients using an indirect learning method and, at 820, generating a set of NxN Gaussian process coefficients using a Gaussian yield process model, wherein NxN represents the antenna array size. The method may further include, at 830, generating an ensemble of NxN non-linear forward models using the derived estimate of the forward model and the NxN Gaussian process coefficients. The method may also include, at 840, constructing a set of NxN inverse models using the generated ensemble of NxN non-linear forward models and, at 850, applying inverse model weights of the set of NxN inverse models to a pre-distortion block to produce a plurality of NxN prc-distortcd vectors. In some embodiments, the amplifier model's coefficients may be obtained using the following formula:

the amplifier model’s coefficients.

[00611 The method may then include, at 860, applying the plurality of NxN pre-distorted vectors to an array of antennas to produce a set of NxN linearized output vectors. In an embodiment, the array of antennas may be an antenna array for a base station or gNB of a 5G communication system. |0062| In certain embodiments, the method may also include, at 870, testing and/or evaluating each of the linearized output vectors using error vector magnitude. According to an embodiment, the method may also include, at 880, selecting an optimum model for the entire array of antennas based on the evaluating step 870. In some embodiments, the evaluating step 870 may further include injecting each of the linearized output vectors to a spectrum analyzer, and evaluating error vector magnitude performance using a vector spectrum analyzer. According to certain embodiments, the method may then include using and/or applying the selected optimum model to enhance the correctness of amplifiers used in the antenna array.

[0063] In some embodiments, the method may include, at 890, storing one or more of the models (c.g., forward model, amplifier model, inverse model(s), non-linear forward model(s), selected optimum model) in memory, such as non-volatile memory. According to an embodiment, the method may also include, at 900, adapting and updating all the models stored in nonvolatile memory as a data set(s) during real time operation. The adapting and updating may be done, for example, by observing the individual PA outputs (e.g., conducted by observation) and adapting the error vector magnitude. In one embodiment, the model data set(s) may also be stored in the non-volatile memory. According to some embodiments, the method may include performing over the air adaptation, for example, by observing the overall signal of the antenna array using a horn antenna (c.g., far field, near field, and'or conducted observation) and injecting the overall signal into a spectrum analyzer. In an embodiment, the error vector magnitude may be adapted in real time and the new adapted models stored in the non-volatile memory.

[0064] Fig. 1 1 illustrates an example of an apparatus 10 according to an example embodiment. In an example embodiment, apparatus 10 may be a node, host, or server in a communications network or serving such a network. For example, apparatus 10 may be a base station, a Node B, an evolved Node B (eNB), SG Node B or access point, next generation Node B (NG-NB or gNB), WLAN access point, mobility management entity (MME), and'or subscription server associated with a radio access network, such as a LTE network, 5G or NR or other radio systems which might benefit from an equivalent procedure.

[0065] It should be understood that, in some example embodiments, apparatus 10 may be comprised of an edge cloud server as a distributed computing system where the server and the radio node may be stand-alone apparatuses communicating with each other via a radio path or via a wired connection, or they may be located in a same entity communicating via a wired connection. For instance, in certain example embodiments where apparatus 10 represents a gNB, it may be configured in a central unit (CD) and distributed unit (DU) architecture that divides the gNB functionality. In such an architecture, the CU may be a logical node that includes gNB functions such as transfer of user data, mobility control, radio access network sharing, positioning, andor session management, etc. The CU may control the operation of DU(s) over a front-haul interface. The DU may be a logical node that includes a subset of the gNB functions, depending on the functional split option. It should be noted that one of ordinary skill in the art would understand that apparatus 10 may include components or features not shown in Fig. 1 1. (0066| As illustrated in the example of Fig. 1 1, apparatus 10 may include a processor 12 for processing information and executing instructions or operations. Processor 12 may be any type of general or specific purpose processor. In fact, processor 12 may include one or more of general-purpose computers, special purpose computers, microprocessors, digital signal processors (DSPs), field-programmable gate arrays (FPGAs), application- specific integrated circuits (ASICs), and processors based on a multi-core processor architecture, as examples. While a single processor 12 is shown in Fig. 1 1, multiple processors may be utilized according to other example embodiments. For example, it should be understood that, in certain example embodiments, apparatus 10 may include two or more processors that may form a multiprocessor system (c.g., in this case processor 12 may represent a multiprocessor) that may support multiprocessing. In certain example embodiments, the multiprocessor system may be tightly coupled or loosely coupled (e.g., to form a computer cluster).

|0067| Processor 12 may perform functions associated with the operation of apparatus 10, which may include, for example, precoding of antenna gain/phase parameters, encoding and decoding of individual bits forming a communication message, formatting of information, and overall control of the apparatus 10, including processes related to management of communication resources.

|0068| Apparatus 10 may further include or be coupled to at least one memory 14 (internal or external), which may be coupled to processor 12, for storing information and instructions that may be executed by processor 12. Memory 14 may be one or more memories and of any type suitable to the local application environment, and may be implemented using any suitable volatile or nonvolatile data storage technology such as a semiconductor- based memory device, a magnetic memory device and system, an optical memory device and system, fixed memory, and/or removable memory. For example, memory 14 can be comprised of any combination of random access memory (RAM), read only memory (ROM), non-volatile memory, static storage such as a magnetic or optical disk, hard disk drive (HDD), or any other type of non-transitory machine or computer readable media. The instructions stored in memory 14 may include program instructions or computer program code that, when executed by processor 12, enable the apparatus 10 to perform tasks as described herein.

|0069| In an example embodiment, apparatus 10 may further include or be coupled to (internal or external) a drive or port that is configured to accept and read an external computer readable storage medium, such as an optical disc, USB drive, flash drive, or any other storage medium. For example, the external computer readable storage medium may store a computer program or software for execution by processor 12 and or apparatus 10.

|00701 In some example embodiments, apparatus 10 may also include or be coupled to one or more antennas 15 for transmitting and receiving signals and or data to and from apparatus 10. Apparatus 10 may further include or be coupled to a transceiver 18 configured to transmit and receive information. The transceiver 18 may include, for example, a plurality of radio interfaces that may be coupled to the antcnna(s) 15. The radio interfaces may correspond to a plurality of radio access technologies including one or more of GSM, NB-IoT, LTE, 5G, WLAN, BT-LE, radio frequency identifier (RFID), ultrawideband (UWB), MultcFirc, and the like. The radio interface may include components, such as filters, converters (for example, digital-to-analog converters and the like), mappers, a Fast Fourier Transform (FFT) module, and the like, to generate symbols for a transmission via one or more downlinks and to receive symbols (for example, via an uplink). Transceiver 18 may comprise one or more RF chains for down and'or upconverting RF signals, for example comprising diplexers, front end RF amplifiers, mixers, filters, voltage controlled oscillators and the like, the activation of part or all of which may be activated in accordance with example embodiments. |00711 As such, transceiver 18 may be configured to modulate information on to a carrier waveform for transmission by the antcnna(s) 15 and demodulate information received via the antenna(s) 15 for further processing by other elements of apparatus 10. In other example embodiments, transceiver 18 may be capable of transmitting and receiving signals or data directly. Additionally or alternatively, in some example embodiments, apparatus 10 may include an input and'or output device (I/O device).

[0072] In an example embodiment, memory 14 may store software modules that provide functionality when executed by processor 12. The modules may include, for example, an operating system that provides operating system functionality for apparatus 10. The memory may also store one or more functional modules, such as an application or program, to provide additional functionality for apparatus 10. The components of apparatus 10 may be implemented in hardware, or as any suitable combination of hardware and software.

(00731 According to some example embodiments, processor 12 and memory 14 may be included in or may form a part of processing circuitry or control circuitry. In addition, in some example embodiments, transceiver 18 may be included in or may form a part of transceiving circuitry.

[0074] As used herein, the term“circuitry" may refer to hardware-only circuitry implementations (c.g., analog and/or digital circuitry), combinations of hardware circuits and software, combinations of analog and'or digital hardware circuits with softwarc/firmwarc, any portions of hardware processors) with software (including digital signal processors) that work together to case an apparatus (e.g., apparatus 10) to perform various functions, and'or hardware circuit(s) and'or processors), or portions thereof, that use software for operation but where the software may not be present when it is not needed for operation. As a further example, as used herein, the term“circuitry" may also cover an implementation of merely a hardware circuit or processor (or multiple processors), or portion of a hardware circuit or processor, and its accompanying software and/or firmware. The term circuitry may also cover, for example, a baseband integrated circuit in a server, cellular network node or device, or other computing or network device.

[0075] As introduced above, in example embodiments, apparatus 10 may be a network node or RAN node, such as a base station, access point, Node B, eNB, gNB, WLAN access point, or the like. According to example embodiments, apparatus 10 may be controlled by memory 14 and processor 12 to perform the functions associated with any of the example embodiments described herein, such as the flow diagram illustrated in Fig. 10. Additionally, in certain embodiments, apparatus 10 may include or implement the systems illustrated in Figs. 2-4. In example embodiments, for instance, apparatus 10 may be configured to perform a process for improving the correctness of amplifiers, such as PAs, used in active antenna arrays of mmWave SG systems.

10076| For instance, in some example embodiments, apparatus 10 may be controlled by memory 14 and processor 12 to derive an estimate of a forward model for a single amplifier, such as a PA or RFIC PA, using off-line measurement of amplifier model's coefficients (w). In an embodiment, apparatus 10 may also be controlled by memory 14 and processor 12 to determine inverse model coefficients using an indirect learning method and to generate a set of NxN Gaussian process coefficients using a Gaussian yield process model, where NxN represents the antenna array size. According to one embodiment, apparatus 10 may also be controlled by memory 14 and processor 12 to generate an ensemble of NxN non-linear forward models using the derived estimate of the forward model and the NxN Gaussian process coefficients. According to one embodiment, apparatus 10 may also be controlled by memory 14 and processor 12 to construct a set of NxN inverse models using the generated ensemble of NxN non-lincar forward models and to apply inverse model weights of the set of NxN inverse models to a pre-distortion block to produce a plurality of NxN pre-distorted vectors. In some embodiments, apparatus 10 may also be controlled by memory 14 and processor 12 to obtain the amplifier model’s coefficients using the following formula:

is amplifier model’s coefficients.

|0077| In an embodiment, apparatus 10 may also be controlled by memory 14 and processor 12 to apply the plurality of NxN pre-distorted vectors to the array of antennas of apparatus 10 to produce a set of NxN linearized output vectors. In certain embodiments, apparatus 10 may also be controlled by memory 14 and processor 12 to test and_'or evaluate each of the linearized output vectors using, for example, error vector magnitude. According to an embodiment, apparatus 10 may also be controlled by memory 14 and processor 12 to select an optimum model for the entire array of antennas based on the evaluation. In some embodiments, apparatus 10 may also be controlled by memory 14 and processor 12 to evaluate each of the linearized output vectors by injecting each of the linearized output vectors to a spectrum analyzer, and evaluating error vector magnitude performance using a vector spectrum analyzer. According to certain embodiments, apparatus 10 may also be controlled by memory 14 and processor 12 to use and or apply the selected model to enhance the correctness of amplifiers used in the antenna array.

100781 In some embodiments, apparatus 10 may also be controlled by memory 14 and processor 12 to store one or more of the models (e.g., forward model, amplifier model, inverse model(s), non-lincar forward model(s), selected optimum model) in memory, such as non-volatile memory. According to an embodiment, apparatus 10 may also be controlled by memory 14 and processor 12 to adapt and update all the models stored in non-volatile memory as a data sct(s) during real time operation. The adapting and updating may be done, for example, by observing the individual RL outputs (c.g., conducted by observation) and adapting the error vector magnitude. In one embodiment, the model data set(s) may also be stored in the non-volatile memory. According to some embodiments, apparatus 10 may be controlled by memory 14 and processor 12 to perform over the air adaptation, for example, by observing the overall signal of the antenna array using a horn antenna (e.g., far field, near field, and/or conducted observation) and injecting the overall signal into a spectrum analyzer. In an embodiment, the error vector magnitude may be adapted in real time and the new adapted models stored in the non-volatile memory.

[0079] Therefore, certain example embodiments provide several technical improvements, enhancements, and -or advantages. According to certain embodiments, as discussed in detail in the foregoing, the entire array response may be found using modelling RFIC PA. Further, in example embodiments, the best model for the entire array can be determined, resulting in minimum average' spread for evnvmemory performance over the entire array.

[0080] Figs. 12a and 12b plot evnvmemory performance variation over the entire array for each model. Based on the Gaussian method for 4x4 array estimation, 17 models arc created and each, in turn, is used for linearization of the entire array. The variation of the evm results is shown in Fig. 12a as models I to 17. However, it is shown in Fig. 10a that by applying example embodiments described herein, a new optimized model depicted as curve 18 can be determined and applied to the entire array. Fig. 12b illustrates the improved average performance and significantly less spread in comparison to models generated based on the more customary Gaussian method.

[00811 By utilizing example embodiments described herein, it is possible to run RFIC amplifiers at smaller back-off power. This reduces power dissipation'hcat generation whilst maintaining EIRP using fewer RFIC amplifiers. As a result, costs arc reduced (RFIC operating at 5G frequencies, such as 39GHZ, are very expensive), while improving performance and reliability.

10082] As one example of a calculation of power and costs saving provided by example embodiments, for instance as illustrated in Fig. 5, at Pout-6dBm there is about l to 2dB power extension because of DPD linearization. This translates to reducing the number of RFICs and the power dissipation as follows: ( 1 ) If IdR power extension considered, or (2) If 2dB power extension considered.

10083] Therefore, by using DPD linearization provided by certain example embodiments, it is possible to save power and reduce the number of RFICs to between 79% - 89%. Consider that a typical single polarity array will use a total of 256 active elements which will typically entail 64 actual RFIC’s. Reducing the number of devices by 10% ~ 20% is a significant cost savings.

|0084] In terms of power savings, the typical power dissipation per single polarity array antenna is around I00W (Tx antenna) also 100 W for (Rx). Therefore, significant power savings of 2 x 100W x (1 - 0.89) = 22W or 2 x 100W x ( 1 0.79) - 42W power saving per dual polarity radio is expected.

]0085] Thus, example embodiments can improve performance, save power, and'or reduce costs of networks and network nodes including, for example, access points, base stations/eNBs'gNBs, and mobile devices or UEs. Accordingly, the use of certain example embodiments results in improved functioning of communications networks and their nodes, as well as reducing costs.

[0086] In some example embodiments, the functionality of any of the methods, processes, signaling diagrams, algorithms or flow charts described herein may be implemented by software and or computer program code or portions of code stored in memory or other computer readable or tangible media, and executed by a processor.

10087] In some example embodiments, an apparatus may be included or be associated with at least one software application, module, unit or entity configured as arithmetic operation(s), or as a program or portions of it (including an added or updated software routine), executed by at least one operation processor. Programs, also called program products or computer programs, including software routines, applets and macros, may be stored in any apparatus-readable data storage medium and include program instructions to perform particular tasks.

[00881 A computer program product may comprise one or more computer- executable components which, when the program is run, are configured to carry out some example embodiments. The one or more computer-executable components may be at least one software code or portions of it. Modifications and configurations required for implementing functionality of an example embodiment may be performed as routinc(s), which may be implemented as added or updated software routinc(s). Software routinc(s) may be downloaded into the apparatus.

|0089| As an example, software or a computer program code or portions of it may be in a source code form, object code form, or in some intermediate form, and it may be stored in some sort of carrier, distribution medium, or computer readable medium, which may be any entity or device capable of carrying the program. Such carriers may include a record medium, computer memory, read-only memory, photoclcctrical and/or electrical carrier signal, telecommunications signal, and software distribution package, for example. Depending on the processing power needed, the computer program may be executed in a single electronic digital computer or it may be distributed amongst a number of computers. The computer readable medium or computer readable storage medium may be a non-transitory medium. |0090| In other example embodiments, the functionality may be performed by hardware or circuitry included in an apparatus (c.g., apparatus 10), for example through the use of an application specific integrated circuit (ASIC), a programmable gate array (PGA), a field programmable gate array (FPGA), or any other combination of hardware and software. In yet another example embodiment, the functionality may be implemented as a signal, a non-tangible means that can be carried by an electromagnetic signal downloaded from the Internet or other network.

[00911 According to an example embodiment, an apparatus, such as a node, device, or a corresponding component, may be configured as circuitry, a computer or a microprocessor, such as single-chip computer element, or as a chipset, including at least a memory for providing storage capacity used for arithmetic operation and an operation processor for executing the arithmetic operation.

[0092] One having ordinary skill in the art will readily understand that the example embodiments as discussed above may be practiced with steps in a different order, and or with hardware elements in configurations which are different than those which are disclosed. Therefore, although some embodiments have been described based upon these example preferred embodiments, it would be apparent to those of skill in the art that certain modifications, variations, and alternative constructions would be apparent, while remaining within the spirit and scope of example embodiments. In order to determine the metes and bounds of the example embodiments, therefore, reference should be made to the appended claims.

Claims

WE CLAIM:

1. L method, comprising:

deriving an estimate of a forward model for a single amplifier using off-line measurement of amplifier model’s coefficients;

determining inverse model coefficients using an indirect learning method;

generating a set of Gaussian process coefficients using a Gaussian yield process model;

generating an ensemble of non-linear forward models using the derived estimate of the forward model and the Gaussian process coefficients; constructing a set of inverse models using the generated ensemble of non-linear forward models;

applying inverse model weights of the set of inverse models to a predistortion block to produce a plurality of pre-distorted vectors; and

applying the plurality of pre-distorted vectors to an array of antennas to produce a set of linearized output vectors.

2. The method according to claim l , further comprising:

testing and evaluating each of the linearized output vectors using error vector magnitude.

3. The method according to claim 2, further comprising:

selecting an optimum model for the entire array of antennas based on the evaluating step.

4. The method according to claims 2 or 3, wherein the evaluating step further comprises:

injecting each of the linearized output vectors to a spectrum analyzer: and evaluating error vector magnitude performance using a vector spectrum analyzer.

5. The method according to any one of claims 1-3, wherein the amplifier comprises a radio frequency integrated circuit (RFIC) power amplifier (RL).

6. The method according to any one of claims 1-3, wherein the amplifier model’s coefficients arc obtained using the following formula:

wherein is the amplifier model’s coefficients.

7. The method according to any one of claims 1-6, further comprising storing one or more of the models in non-volatile memory.

8. Lh apparatus, comprising:

at least one processor; and

at least one memory comprising computer program code,

the at least one memory and computer program code configured, with the at least one processor, to cause the apparatus at least to

derive an estimate of a forward model for a single amplifier using offline measurement of amplifier model’s coefficients;

determine inverse model coefficients using an indirect learning method;

generate a set of Gaussian process coefficients using a Gaussian yield process model;

generate an ensemble of non-linear forward models using the derived estimate of the forward model and the Gaussian process coefficients;

construct a set of inverse models using the generated ensemble of non-linear forward models; apply inverse model weights of the set of inverse models to a predistortion block to produce a plurality of pre-distorted vectors; and

apply the plurality of pro-distorted vectors to an array of antennas to produce a set of linearized output vectors.

9. The apparatus according to claim 8, wherein one of the at least one memory comprises non-volatile memory, and wherein one or more of the models is stored in the non-volatile memory.

10. The apparatus according to claims 8 or 9, wherein the at least one memory and computer program code are further configured, with the at least one processor, to cause the apparatus at least to:

test and evaluate each of the linearized output vectors using error vector magnitude.

1 1. The apparatus according to claim 10, wherein the at least one memory and computer program code arc further configured, with the at least one processor, to cause the apparatus at least to:

select an optimum model for the entire array of antennas based on the evaluating step.

12. The apparatus according to claim 9, wherein the models stored in the non-volatile memory arc adapted and updated as a data set during real time operation, and wherein the data set is stored in the non-volatile memory.

13. The apparatus according to claims 9 or 12, wherein the at least one memory and computer program code are further configured, with the at least one processor, to cause the apparatus at least to:

perform over the air adaptation by observing an overall signal of the array of antennas using a horn antenna.

14. The apparatus according to claims 10 or 1 1, wherein the at least one memory and computer program code are further configured, with the at least one processor, to cause the apparatus at least to:

inject each of the linearized output vectors to a spectrum analyzer; and

evaluate error vector magnitude performance using a vector spectrum analyzer.

15. The apparatus according to any one of claims 9-14, wherein the amplifier comprises a radio frequency integrated circuit (RF1C) power amplifier (RL).

16. The apparatus according to any one of claims 9-15, wherein the amplifier model's coefficients arc obtained using the following formula:

wherein is the amplifier model's coefficients.

17. An apparatus, comprising:

circuitry configured to derive an estimate of a forward model for a single amplifier using off-line measurement of amplifier model's coefficients;

circuitry configured to determine inverse model coefficients using an indirect learning method;

circuitry configured to generate a set of Gaussian process coefficients using a Gaussian yield process model;

circuitry configured to generate an ensemble of non-linear forward models using the derived estimate of the forward model and the Gaussian process coefficients; circuitry configured to construct a set of inverse models using the generated ensemble of non-linear forward models;

circuitry configured to apply inverse model weights of the set of inverse models to a pre-distortion block to produce a plurality of predistorted vectors; and

circuitry configured to apply the plurality of pre-distorted vectors to an array of antennas to produce a set of linearized output vectors.

18. An apparatus, comprising:

means for deriving an estimate of a forward model for a single amplifier using off-line measurement of amplifier model's coefficients; means for determining inverse model coefficients using an indirect learning method;

means for generating a set of Gaussian process coefficients using a Gaussian yield process model;

means for generating an ensemble of non-linear forward models using the derived estimate of the forward model and the Gaussian process coefficients;

means for constructing a set of inverse models using the generated ensemble of non-linear forward models;

means for applying inverse model weights of the set of inverse models to a pre-distortion block to produce a plurality of pre-distorted vectors; and

means for applying the plurality of pre-distorted vectors to an array of antennas to produce a set of linearized output vectors.

19. A non-transitory computer readable medium comprising program instructions stored thereon for performing at least the following:

deriving an estimate of a forward model for a single amplifier using off-line measurement of amplifier model’s coefficients; determining inverse model coefficients using an indirect learning method;

generating a set of Gaussian process coefficients using a Gaussian yield process model;

generating an ensemble of non-linear forward models using the derived estimate of the forward model and the Gaussian process coefficients; constructing a set of inverse models using the generated ensemble of non-linear forward models;

applying inverse model weights of the set of inverse models to a predistortion block to produce a plurality of pro-distorted vectors; and

applying the plurality of pro-distorted vectors to an array of antennas to produce a set of linearized output vectors.