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WO2019123613A1 - Phase difference detection circuit and radar device - Google Patents

Phase difference detection circuit and radar device Download PDF

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Publication number
WO2019123613A1
WO2019123613A1 PCT/JP2017/045974 JP2017045974W WO2019123613A1 WO 2019123613 A1 WO2019123613 A1 WO 2019123613A1 JP 2017045974 W JP2017045974 W JP 2017045974W WO 2019123613 A1 WO2019123613 A1 WO 2019123613A1
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WO
WIPO (PCT)
Prior art keywords
signal
phase difference
transmission
circuit
reception
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Ceased
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PCT/JP2017/045974
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French (fr)
Japanese (ja)
Inventor
潤 下川床
浩之 水谷
田島 賢一
大塚 浩志
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Priority to JP2019559969A priority Critical patent/JP6678838B2/en
Priority to PCT/JP2017/045974 priority patent/WO2019123613A1/en
Publication of WO2019123613A1 publication Critical patent/WO2019123613A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S13/00Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
    • G01S13/02Systems using reflection of radio waves, e.g. primary radar systems; Analogous systems
    • G01S13/06Systems determining position data of a target
    • G01S13/08Systems for measuring distance only
    • G01S13/32Systems for measuring distance only using transmission of continuous waves, whether amplitude-, frequency-, or phase-modulated, or unmodulated
    • G01S13/36Systems for measuring distance only using transmission of continuous waves, whether amplitude-, frequency-, or phase-modulated, or unmodulated with phase comparison between the received signal and the contemporaneously transmitted signal
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/02Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/02Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
    • G01S7/40Means for monitoring or calibrating

Definitions

  • the present invention relates to a technique for detecting a phase difference between transmission signals output from a plurality of antenna elements, and in particular, detects a phase difference between transmission signals output from a plurality of antenna elements constituting an array antenna of a radar device.
  • a technique for detecting a phase difference between transmission signals output from a plurality of antenna elements and in particular, detects a phase difference between transmission signals output from a plurality of antenna elements constituting an array antenna of a radar device.
  • a frequency modulation method is widely adopted in a radar apparatus which detects target information such as a distance to a target (target) and a relative velocity of the target.
  • a frequency modulation method for example, a frequency-modulated continuous-wave (FMCW) method is widely known.
  • the FMCW scheme often uses a transmit signal called a chirp, which has a transmit frequency that varies linearly with time.
  • a radar device operating in the FMCW system can measure a beat frequency which is a frequency difference between a transmission signal and a reception signal, and detect the distance to the target and the relative velocity of the target based on the beat frequency. It is.
  • Patent Document 1 Japanese Unexamined Patent Publication No. 2006-10404 discloses an FMCW radar device that detects a phase difference between N antennas (N is an integer of 2 or more). This radar apparatus selects a signal generator (voltage control oscillator) that generates a transmission signal, and any one of the N antennas, and outputs the transmission signal from the selected antenna 1 A pair N switch, a mixer for mixing a part of the output of the signal generator and the received signal, and a signal processing unit for measuring the voltage level of the output of the mixer. According to Patent Document 1, the 1-to-N switch sequentially selects N antennas while the frequency modulation of the transmission signal is stopped.
  • N is an integer of 2 or more
  • Each of the selected antennas transmits a transmission signal without frequency modulation, and the mixer outputs a DC voltage level corresponding to the phase difference between the transmission signal and the reception signal. Then, the signal processing unit calculates phase values for the N antennas from the DC voltage levels measured for each of the N antennas, and detects a phase difference between the antennas based on these phase values.
  • JP-A-2006-10404 (For example, claim 1 and FIG. 1)
  • phase difference detection technique described in Patent Document 1 described above is a technique based on the use of a common signal generator (voltage control oscillator) for N antennas. Therefore, in the case of a radar apparatus having a plurality of signal generators individually for a plurality of antennas, there is a problem that it is difficult to apply the phase difference detection technique described in Patent Document 1.
  • a phase difference detection circuit is a phase difference detection circuit used in a state of being connected to a first antenna element and a second antenna element, and after operating in a first ranging mode. It is controlled to operate in the transmission mode, and in the first ranging mode, a frequency modulated first ranging signal is generated, and the first ranging signal is transmitted from the first antenna element. After that, a reflected wave is received from a target in the external space to generate a first reception signal, and in the transmission mode, a high frequency signal which is not frequency-modulated is generated, and the high frequency signal is transmitted from the first antenna element.
  • the first transmission / reception circuit is controlled to operate in the reception mode after operating in the second distance measurement mode, and in the second distance measurement mode, the frequency-modulated second distance measurement signal is generated;
  • the second measurement After transmitting a signal from the second antenna element, a reflected wave is received from the target to generate a second received signal, and in the reception mode, a reflected wave corresponding to the high frequency signal is received from the target Transmission / reception circuit that generates a third reception signal, and the round-trip propagation time of the first distance measurement signal between the first transmission / reception circuit and the target based on the first reception signal
  • a second measurement signal indicating a first measurement value indicating a second measurement signal, and a second measurement signal indicating a round-trip propagation time of the second distance measurement signal between the second transmission / reception circuit and the target based on the second reception signal;
  • a phase difference calculation unit calculating a phase difference between the first distance measurement signal and the second distance measurement signal, wherein the second transmission / reception circuit Third received signal and second ranging signal
  • the present invention it is possible to detect the phase difference between ranging signals transmitted from a plurality of antenna elements with high accuracy.
  • FIG. 1 is a view showing a schematic configuration of a radar device 1 according to a first embodiment of the present invention.
  • FIG. 2 is a block diagram showing an example of a signal generator in Embodiment 1.
  • FIG. 7 schematically shows an operating state of the array antenna of the first embodiment. It is a graph which shows roughly the relationship between transmitting frequency Ft and receiving frequency Fr. 5 is a flowchart schematically illustrating an example of a procedure of an operation control process according to the first embodiment.
  • 6A and 6B are graphs showing examples of signal waveforms of beat signals used for phase difference detection. It is a figure which shows schematic structure of the radar apparatus of Embodiment 2 which concerns on this invention.
  • FIG. 13 is a flowchart schematically showing an example of the procedure of control processing according to Embodiment 2.
  • FIG. 7 is a graph schematically showing an example of a power waveform of a beat signal according to Embodiment 2.
  • FIG. 1 is a view showing a schematic configuration of a radar device 1 according to a first embodiment of the present invention.
  • the radar device 1, one-dimensional or planar N pieces arranged in a (planar shape or a curved surface) of the antenna elements 61 1 ⁇ 61 N (N is an integer of 2 or more)
  • Array antenna 60 N slave modules 30 1 to 30 N respectively connected to the N antenna elements 61 1 to 61 N , and a master for individually controlling the operations of these slave modules 30 1 to 30 N And a module 20.
  • Each of the slave modules 30 1 to 30 N is a radar circuit that can function as a radar module.
  • the radar apparatus 1 of the present embodiment incorporates a phase difference detection circuit having a function of detecting a phase difference between transmission signals output from a pair of antenna elements 61 i and 61 j (i ⁇ j).
  • Phase difference detecting circuit of this embodiment for example, can be configured by the slave module 30 1 ⁇ 30 N and the master module 20.
  • the master module 20 generates a reference signal RS having a preset reference frequency and supplies the reference signal RS to the slave modules 30 1 to 30 N, and a reference signal generator 22 for the slave modules 30 1 to 30 N. having an operation control circuit 23 for individually controlling the operation, and a data storage unit 28 for storing the measurement data obtained by the slave modules 30 1 ⁇ 30 N.
  • the reference signal generator 22 may be configured, for example, using an oscillator such as a crystal oscillator.
  • the reference signal generator 22 is a signal source for supplying a reference signal RS to the slave modules 30 1 to 30 N through the signal transmission paths C 1 to C N.
  • the signal transmission paths C 1 to C N can be configured by transmission cables such as coaxial cables, for example.
  • the wiring length of the signal transmission lines C 1 ⁇ C N is not necessarily equal length, not necessarily the electrical length of the signal transmission line C 1 ⁇ C N is also equal in length.
  • the operation control circuit 23 has a function of determining the operation sequence of the slave modules 30 1 ⁇ 30 N, and a function of specifying each operating mode of the slave modules 30 1 ⁇ 30 N.
  • the hardware configuration of the operation control circuit 23 may be realized by, for example, a processor having a semiconductor integrated circuit such as a digital signal processor (DSP), an application specific integrated circuit (ASIC), or a field-programmable gate array (FPGA).
  • DSP digital signal processor
  • ASIC application specific integrated circuit
  • FPGA field-programmable gate array
  • the hardware configuration of the operation control circuit 23 is realized by a processor including an arithmetic device such as a central processing unit (CPU) or a graphics processing unit (GPU) that executes the program code of software or firmware read from the memory. It may be done.
  • the hardware configuration of the operation control circuit 23 can also be realized by a processor having a combination of the semiconductor integrated circuit and the arithmetic device. Furthermore, the hardware configuration of the operation control circuit 23 may be realized by a plurality of processors operating in cooperation with one another.
  • the signal line group for transmitting (not shown) is provided to control and data signals.
  • the operation control circuit 23 is capable of supplying an operation command to each of the slave modules 30 1 ⁇ 30 N via the signal line group.
  • the operation control circuit 23, the slave measurement data from any of the modules 30 1 ⁇ 30 N can be obtained through the signal line group, also the signals already stored measurement data to the data storage unit 28 It is also possible to supply the slave modules 30 1 to 30 N through the line group.
  • the data storage unit 28 has a first storage area 28 1 to an N-th storage area 28 N for storing measurement values of measurement data.
  • the operation control circuit 23 can store the measurement values obtained from the slave modules 30 1 to 30 N in the first storage area 28 1 to the Nth storage area 28 N , respectively.
  • the data storage unit 28 may be configured of one or more storage devices.
  • the n-th slave module 30 n includes a transmission / reception circuit 40 n and a signal processing circuit 50 n .
  • the transmission / reception circuit 40 n and the signal processing circuit 50 n operate in the operation mode specified by the operation control circuit 23.
  • the transmitting and receiving circuit 40 n includes a signal generator 42 n , a switch circuit 43 n , a circulator 44 n , a mixer 45 n and an A / D converter (ADC) 46 n. There is.
  • the signal generator 42 n receives the reference signal RS supplied from the reference signal generator 22 via the signal transmission line C n and, according to the modulation control signal MC n supplied from the signal processing circuit 50 n , a frequency modulation signal
  • a transmission signal of either a ranging signal or an RF signal (hereinafter referred to as a "frequency non-modulated signal") which is a CW (continuous wave) signal which is not frequency-modulated can be generated.
  • the signal generator 42 n determines a ranging signal of a chirp signal having a transmission frequency which repeats to change linearly at a fixed modulation bandwidth according to a frequency-modulated continuous-wave (FMCW) system.
  • FMCW frequency-modulated continuous-wave
  • the signal generator 42 n supplies the generated transmission signal (ranging signal or frequency unmodulated signal) to both one end of the switch circuit 43 n and the input end of the mixer 45 n . Further, the signal generator 42 n has a phase adjustment function of shifting the output phase of the signal generator 42 n by a designated phase shift amount according to the phase control signal PC n supplied from the signal processing circuit 50 n. doing.
  • Such a signal generator 42 n may be configured by, for example, an integrated circuit (IC) including a PLL (Phase-Locked Loop) circuit. Specifically, it is possible to use a discrete IC which incorporates a fractional PLL circuit.
  • IC integrated circuit
  • PLL Phase-Locked Loop
  • FIG. 2 is a block diagram showing an example of a signal generator 42 n incorporating a fractional frequency division type PLL circuit.
  • the signal generator 42 n shown in FIG. 2 has a fractional frequency division type PLL circuit 420 and a ⁇ (delta-sigma) modulator 428 functioning as a frequency division ratio control circuit.
  • the PLL circuit 420 includes a phase comparator 421, a charge pump circuit 422, a loop filter 423, a voltage-controlled oscillator (VCO) 424, a directional coupler 425, a variable phase shifter 426 and a variable divider 427. It is comprised including.
  • the phase comparator 421 compares the phase of the input reference signal RS and the phase of the feedback signal output from the variable divider 427 with each other to obtain the difference between the phase of the reference signal RS and the phase of the feedback signal. Output as the amount of phase difference.
  • the charge pump circuit 422 outputs a voltage or current proportional to the phase difference amount.
  • the loop filter 423 is a circuit for smoothing the voltage signal or current signal output from the charge pump circuit 422 to stabilize the PLL operation.
  • the VCO 424 outputs an RF signal having a transmission frequency according to the output of the loop filter 423 to the outside through the directional coupler 425.
  • the directional coupler 425 branches a part of the output from the output of the VCO 424.
  • the variable phase shifter 426 functions as a phase adjustment circuit that variably adjusts the output phase of the signal generator 42 n .
  • the variable phase shifter 426 can shift the phase of the input signal from the directional coupler 425 according to the phase control signal PC n .
  • the phase control unit 56 n shown in FIG. 1 can control the output phase of the signal generator 42 n by supplying the phase control signal PC n to the signal generator 42 n .
  • the variable divider 427 divides the output signal of the variable phase shifter 426 by the division number designated by the output of the ⁇ modulator 428 to generate a divided signal, and the divided signal is used as a feedback signal.
  • the phase comparator 421 is supplied as ⁇ modulator 428, subjected to ⁇ modulation to generate a division control signal to the input modulated control signal MC n, and outputs the division control signal to the variable frequency divider 427.
  • ⁇ modulation it becomes possible to form a division ratio pattern which can reduce the quantization phase noise generated by the variable frequency divider 427.
  • the frequency band of the transmission signal to be generated by the signal generator 42 n may be appropriately determined according to the application of the radar device 1.
  • the signal generator 42 n may be configured to generate a transmission signal in the millimeter wave band or the quasi-millimeter wave band.
  • the array antenna 60 a planar antenna in which a conductor pattern is formed on a ceramic substrate can be used.
  • the switch circuit 43 n performs a switching operation according to the switching control signal supplied from the signal processing circuit 50 n . That is, switch circuit 43 n forms an on signal path between signal generator 42 n and circulator 44 n according to the switching control signal, or a signal path between signal generator 42 n and circulator 44 n Do one of the off actions to disconnect the As the switch circuit 43 n , a switching element such as a power FET (Field-Effect T transistor) can be used.
  • a power FET Field-Effect T transistor
  • the circulator 44 n to the transmission signal input to the forward direction from the output terminal of the switch circuit 43 n, while the switch circuit 43 n is coupled to the antenna element 61 n, mixer 45 n inputs of a switching circuit 43 n Do not bond with the end. Therefore, most of the transmission signal is propagated to the antenna element 61 n and radiated to the external space.
  • the circulator 44 n is the antenna element 61 n to coupled to the input of the mixer 45 n, the antenna element 61 n switch circuits 43 n Do not combine with Therefore, most of the received signal is propagated to the mixer 45 n .
  • a circulator 44 n for example, a drop-in type circulator (Drop-in Circulator) can be used.
  • the mixer 45 n mixes the transmission signal input from the signal generator 42 n with the reception signal input from the circulator 44 n to generate an analog beat signal indicating the frequency difference between the transmission signal and the reception signal. It is a circuit to generate.
  • the mixer 45 n outputs the generated analog beat signal to the ADC 46 n .
  • discrete components may be used.
  • the ADC 46 n converts the analog beat signal into a digital beat signal by sampling the input analog beat signal at a predetermined frequency, and the digital beat signal (hereinafter simply referred to as a “beat signal”) is converted to a signal processing circuit 50 n.
  • a transmission control unit 53 n that controls the switching operation of the circuit 43 n a phase control unit 56 n that shifts the output phase of the signal generator 42 n according to the operation command, and a pair of antenna elements 61 i and 61 n (i ⁇ n) and the phase difference calculating section 54 n for calculating a phase difference between the transmit signal outputted from, and a distance measuring unit 55 n to measure the measurement data for the target Tgt in the external space.
  • the measuring unit of the present embodiment can be configured by distance measuring units 55 1 to 55 N.
  • the target Tgt may be a known reflective object prepared before shipment of the radar device 1 or may be selected at an appropriate timing (for example, periodically) after shipment of the radar device 1 in an operating environment. It may be any reflective object present.
  • a flat metal wall installed in front of the radar device 1 can be used as a target Tgt.
  • a stationary vehicle separated by an arbitrary distance may be used as the target Tgt.
  • the operation control circuit 23 individually controls the operations of the modulation control units 52 1 to 52 N , the transmission control units 53 1 to 53 N and the phase control units 56 1 to 56 N in the slave modules 30 1 to 30 N.
  • the array antenna 60 can function as a phased array antenna.
  • the transmission control units 53 1 to 53 N turn on all the switch circuits 43 1 to 43 N.
  • the modulation control units 52 1 to 52 N and the phase control units 56 1 to 56 N are radiated from the array antenna 60 by causing the signal generators 42 1 to 42 N to output the phase-adjusted transmission signals.
  • the propagation direction of the beam can be controlled.
  • FIG. 3 schematically shows an operating state of array antenna 60 functioning as a phased array antenna.
  • the array antenna 60 can form a beam propagating in a direction perpendicular to the equal phase plane of the transmission signal (transmission wave).
  • the wiring length of the signal transmission lines C 1 ⁇ C N is not necessarily equal length, not necessarily the electrical length of the signal transmission line C 1 ⁇ C N is also equal in length.
  • the electrical length of the i-th signal transmission path C i and the electrical length of the j-th signal transmission path C j are not equal, two of the two input to the slave modules 30 i and 30 j , respectively.
  • a phase shift occurs due to the difference in electrical length.
  • the phase shift is multiplied by the PLL circuit in the signal generators 42 i and 42 j , and may cause a phase difference between the transmission signals output from the antenna elements 61 i and 61 j to deteriorate the beam shape. .
  • the radar device 1 of this embodiment generates a signal based on the phase difference detection function of detecting the phase difference between the transmission signals output from the pair of antenna elements 61 i and 61 j and the detected phase difference. And a phase error correction function of correcting the error of the output phase of the units 42 i and 42 j .
  • phase difference detection As an operation mode for phase difference detection, "ranging mode”, “transmission mode” and “reception mode” are incorporated.
  • the transmission control unit 53 n When an operation command for specifying a distance measurement mode is input to the signal processing circuit 50 n , the transmission control unit 53 n outputs a switching control signal for turning on the switch circuit 43 n . At the same time, the modulation control unit 52 n supplies to the signal generator 42 n a modulation control signal MC n that generates a frequency modulated ranging signal. Further, the phase difference calculation unit 54 n is controlled not to operate. At this time, the antenna element 61 n radiates the transmission wave of the distance measurement signal input from the signal generator 42 n via the switch circuit 43 n and the circulator 44 n toward the target Tgt.
  • the transmitting and receiving circuit 40 n receives a reflected wave corresponding to the distance measuring signal from the target Tgt.
  • the reflected wave is transmitted to the mixer 45 n through the circulator 44 n .
  • the mixer 45 n mixes the received signal indicating the reflected wave with the local signal (a part of the distance measuring signal) output from the signal generator 42 n to generate an analog beat signal.
  • the ADC 46 n converts the analog beat signal into a digital beat signal, and supplies the beat signal to the signal processing circuit 50 n .
  • the distance measuring unit 55 n performs frequency analysis such as fast Fourier transform (FFT) on the beat signal to detect the frequency of the beat signal, that is, the beat frequency f b . Further, based on the beat frequency f b , the distance measuring unit 55 n can calculate the round-trip propagation time ⁇ of the distance measurement signal between the slave module 30 n and the target Tgt as a measurement value.
  • FFT fast Fourier transform
  • FIG. 4 is a graph schematically showing the relationship between the transmission frequency Ft of the transmission signal (FMCW signal) and the frequency Fr of the reception signal.
  • the transmission frequency Ft which repeats rising linearly with the modulation period T in the modulation bandwidth BW is shown.
  • the received signal is observed after being delayed by a delay time ⁇ which is a round-trip propagation time.
  • the delay time ⁇ can be calculated according to the following equation (1).
  • the distance measuring unit 55 n transfers measurement data indicating the measurement value to the master module 20.
  • the operation control circuit 23 stores the measurement data transferred from the distance measuring unit 55 n in the n-th storage area 28 n of the data storage unit 28.
  • the transmission control unit 53 n when an operation command specifying a transmission mode is input to the signal processing circuit 50 n , the transmission control unit 53 n outputs a switching control signal to turn on the switch circuit 43 n .
  • the modulation control unit 52 n supplies a modulation control signal MC n for generating a frequency non-modulated signal to the signal generator 42 n .
  • the phase difference calculating unit 54 n and the distance measuring unit 55 n are controlled not to operate.
  • the antenna element 61 n radiates the transmission wave of the frequency non-modulated signal input from the signal generator 42 n through the switch circuit 43 n and the circulator 44 n toward the target Tgt.
  • the modulation control unit 52 n sends the modulation control signal MC n for generating a non-modulated local signal to the signal generator 42 n .
  • Supply the transmission control unit 53 n disconnects the signal path between the signal generator 42 n and the antenna element 61 n by outputting a switching control signal to turn off the switch circuit 43 n . Further, the distance measuring unit 55 n is controlled not to operate.
  • the mixer 45 n receives the received signal transmitted through the antenna element 61 n and the circulator 44 n as input, and mixes this received signal with the local signal output from the signal generator 42 n. Generate an analog beat signal.
  • the ADC 46 n converts the analog beat signal into a beat signal in digital form, and supplies the beat signal to the phase difference calculating unit 54 n .
  • the phase difference calculation unit 54 n determines the position between the distance measurement signals output from the pair of antenna elements 61 i and 61 n based on the measurement data obtained from the data storage unit 28 and the beat signal output from the ADC 46 n. The phase difference can be calculated.
  • the phase control unit 56 n controls the phase adjustment circuit (variable phase shifter) in the signal generator 42 n to correct the error of the output phase of the signal generator 42 n based on the calculated phase difference. Can.
  • the hardware configuration of the signal processing circuit 50 n described above may be realized by, for example, a processor having a semiconductor integrated circuit such as a DSP, an ASIC, or an FPGA.
  • the hardware configuration of the signal processing circuit 50 n may be realized by a processor including an arithmetic device such as a CPU or a GPU that executes program code of software or firmware read from a memory. It is also possible to realize the hardware configuration of the signal processing circuit 50 n by a processor having a combination of the semiconductor integrated circuit and the arithmetic device.
  • the hardware configuration of the signal processing circuit 50 n may be realized by a plurality of processors.
  • FIG. 5 is a flowchart schematically showing an example of the procedure of the operation control process according to the first embodiment.
  • the operation control process shown in FIG. 5 is executed by the operation control circuit 23.
  • the operation control circuit 23 selects one set of slave modules 30 i and 30 j from the combinations of slave modules 30 1 to 30 N (step ST 10).
  • one of the slave modules 30 i is referred to as a first slave module 30 i
  • the other slave module 30 j is referred to as a second slave module 30 j.
  • the operation control circuit 23 by supplying an operation command that specifies the distance measurement mode in the first slave module 30 i, the first slave module 30 i ranging mode (first distance measurement mode) To operate (step ST11).
  • the first slave module 30 i, the distance measuring unit 55 i is a delay time corresponding to the distance between the target Tgt (RTT) and tau 1 is calculated as the measurement value, the measurement data indicating the measured value Are transferred to the master module 20.
  • the operation control circuit 23 stores the measurement data transferred from the distance measuring unit 55i in the i- th storage area i (step ST12).
  • the operation control circuit 23 supplies an operation command for designating the distance measurement mode to the second slave module 30 j , whereby the distance measurement mode (second distance measurement mode) of the second slave module 30 j is obtained.
  • the distance measuring unit 55 j calculates a delay time (round-trip propagation time) ⁇ 2 corresponding to the distance from the target Tgt as a measurement value, and measurement data indicating the measurement value Are transferred to the master module 20.
  • the operation control circuit 23 stores the measurement data transferred from the distance measuring unit 55 j to the j memory area 28 j (step ST14).
  • the operation control circuit 23 by supplying an operation command that specifies the transmission mode is supplied to the first slave module 30 i, and an operation command that specifies the receive mode to the second slave module 30 j, the 1 of the slave module 30 i is operating in transmission mode and to operate the second slave module 30 j in the receive mode (step ST15).
  • the first slave module 30 i which operate in transmission mode, operates as a transmission circuit corresponding to the second slave module 30 j.
  • First slave module 30 i transmits the transmission signal S TX1 frequency unmodulated having transmitting frequencies f cw1 be transmitted to the target Tgt.
  • the transmission signal S TX1 propagates to the second slave module 30 j after being reflected at the target Tgt.
  • Transmission signal S TX1 is represented, for example, by the following equation (2). Where A 0 is the signal amplitude, t is time, and ⁇ 1 is the phase state value.
  • the second slave module 30 j operating in the reception mode operates as a reception circuit corresponding to the first slave module 30 i .
  • the mixer 45 j receives the reception signal S RX2 transmitted via the antenna element 61 j and the circulator 44 j , and the reception signal S RX2 and the frequency output from the signal generator 42 j
  • the unmodulated local signal S LO (frequency: f cw2 ) is mixed to generate an analog beat signal.
  • the ADC 46 j converts the analog beat signal into a beat signal S bcw 2 in digital form, and supplies the beat signal S bcw 2 to the phase difference calculation unit 54 j .
  • Local signal S LO is expressed, for example, by the following equation (3).
  • B 0 is a signal amplitude
  • ⁇ 2 is a phase state value.
  • reception signal S RX2 is represented by, for example, the following equation (4).
  • a 1 is a signal amplitude.
  • Beat signal S bcw2 is represented by following Formula (5), for example.
  • phase difference calculation unit 54 j obtains step ST11, ST13 measurements tau 1 calculated in the tau 2 from the data storage unit 28, the measurement value tau 1, based on the tau 2 and the beat signal S Bcw2,
  • the beat signal S Bcw2 shows AC voltage waveform as illustrated in Figure 6A.
  • phase difference calculation unit 54 j detects the maximum value and the minimum value of the voltage waveform of beat signal S bcw 2 , and the difference between the maximum value and the minimum value (peak-to-peak voltage) determines the signal amplitude A of beat signal S bcw 2. 1 B 0 can be calculated.
  • the phase difference calculation unit 54 j can detect the DC component D bcw2 of the beat signal S bcw2 .
  • the direct current component D bcw2 shows a direct current voltage waveform as illustrated in FIG. 6B.
  • phase difference ⁇ with respect to direct-current component D bcw2 is represented by, for example, the following equation (7).
  • A 1 ⁇ B 0 .
  • the phase difference calculating unit 54 j can calculate the phase difference ⁇ based on the equation (7).
  • step ST15 the operation control circuit 23 controls the phase controller 56 j, and the output phase of the first slave module 30 i signal generator 42 i in the second slave module 30 j
  • the error between the signal generator 42 j and the output phase of the signal generator 42 j is corrected (step ST16).
  • the phase control unit 56 j controls the phase adjustment circuit (variable phase shifter) in the signal generator 42 j based on the calculated phase difference ⁇ to obtain the signal generator 42 i .
  • An error in the output phase of the signal generator 42 j with respect to the output phase can be corrected.
  • step ST17 determines whether all pairs among the slave modules 30 1 ⁇ 30 N is selected. If all sets have not been selected (NO in step ST17), the operation control circuit 23 selects a new set (step ST10), and executes steps ST11 to ST16 for the new set. On the other hand, if all sets have been selected (YES in step ST17), the operation control circuit 23 ends the operation control process.
  • a set of slave modules is represented by (30 i , 30 j )
  • the first and second slave modules 30 i and 30 j operate in the ranging mode to obtain the first and second measured values ⁇ 1 and ⁇ Measure 2 respectively. Then, at the same time when the first slave module 30 i is operating in transmission mode, the second slave module 30 j generates a beat signal S Bcw2 operating in receive mode. Then, the phase difference calculation unit 54 j in the second slave module 30 j determines between the distance measurement signals output from the antenna elements 61 i and 61 j based on the measurement values ⁇ 1 and ⁇ 2 and the beat signal S bcw 2. Phase difference .DELTA..phi.
  • the radar apparatus 1 includes the plurality of signal generators 42 1 to 42 N for the plurality of antenna elements 61 1 to 61 N , these antenna elements 61 1 to 61 N It is possible to calculate the phase difference between the distance measurement signals output from the high accuracy. Even if the slave modules 30 1 to 30 N are arranged in a distributed manner, it is possible to calculate the phase difference between ranging signals with high accuracy. Therefore, the phase difference detection circuit according to the present embodiment can synchronize the output phases of the signal generators 42 1 to 42 N in the slave modules 30 1 to 30 N with high accuracy.
  • phase difference detection and phase error correction may be performed before shipment of the radar device 1, or may be performed periodically according to a preset schedule or at a designated timing. Good.
  • Embodiment 2 according to the present invention will be described.
  • two slave modules 30 i and 30 j detect the phase difference between the ranging signals output from the antenna elements 61 i and 61 j .
  • three slave modules cooperate to detect a phase difference.
  • FIG. 7 is a view showing a schematic configuration of a radar device 2 according to a second embodiment of the present invention.
  • the radar device 2 includes an array antenna 60 including N antenna elements 61 1 to 61 N (N is an integer of 3 or more), and the N antenna elements 61 1 to 61 N. is configured by including a N number of slave modules 31 1 ⁇ 31 N connected respectively, a master module 21 for individually controlling the operation of the slave modules 31 1 ⁇ 31 N to.
  • Each of the slave modules 31 1 to 31 N is a radar circuit that can function as a radar module.
  • the radar apparatus 2 detects a phase difference between transmission signals output from a pair of antenna elements 61 i and 61 j (i and j are integers in the range of 1 to N ⁇ 1).
  • Phase difference detection circuit having the function of The phase difference detection circuit of the present embodiment can be configured by, for example, slave modules 31 1 to 31 N and master module 21.
  • the master module 21 individually operates the reference signal generator 22 for supplying the reference signal RS to the slave modules 31 1 to 31 N through the signal transmission paths C 1 to C N , and the slave modules 31 1 to 31 N. It has the control circuit 24 to control, and the data storage part 28 which stores the measurement data obtained by the slave modules 31 1 to 31 N.
  • the control circuit 24 is configured to include an operation control unit 25, a phase difference calculation unit 26, and a phase control unit 27.
  • the hardware configuration of the control circuit 24 may be realized by, for example, a processor having a semiconductor integrated circuit such as a DSP, an ASIC, or an FPGA.
  • the hardware configuration of the control circuit 24 may be realized by a processor including an arithmetic device such as a CPU or a GPU that executes program code of software or firmware read from a memory. It is also possible to realize the hardware configuration of the control circuit 24 with a processor having a combination of the semiconductor integrated circuit and the arithmetic device.
  • the hardware configuration of the control circuit 24 may be realized by a plurality of processors operating in cooperation with one another.
  • the signal line group for transmitting (not shown) is provided to control and data signals.
  • the control circuit 24 can supply an operation command to each of the slave modules 31 1 to 31 N through the signal line group.
  • the operation control unit 25 can obtain measurement data from any of the slave modules 31 1 to 31 N via the signal line group, and can store the measurement data in the data storage unit 28. Further, the operation control unit 25 has a function of determining the operation order of the slave modules 31 1 to 31 N-1 and a function of designating an operation mode of each of the slave modules 31 1 to 31 N.
  • the phase difference calculating unit 26 sets one of the antenna elements 61 i and 61 j (i, j is based on the phase shift amount supplied from the Nth slave module 31 N and the measurement data obtained from the data storage unit 28). , And an integer in the range of 1 to N ⁇ 1) to calculate the phase difference between the transmission signals output. The method of detecting the amount of phase shift will be described later.
  • the phase control unit 27 controls the signal generators 42 i and 42 j in the slave modules 31 i and 31 j based on the phase difference calculated by the phase difference calculation unit 26 to control these signal generators 42 i and 42 j. It is possible to correct the error of the output phase of
  • the slave modules 31 1 to 31 N have the same circuit configuration.
  • the Nth slave module 31 N has a circuit configuration different from that of the slave modules 31 1 to 31 N ⁇ 1 .
  • the m-th (m is an integer in the range of 1 to N-1 other than N) slave modules 31 m other than the N-th slave module 31 N include a transmission / reception circuit 41 m and a signal processing circuit 51 m . These receiving circuit 41 m and the signal processing circuit 51 m operates in the operation mode designated by the operation control unit 25 ( "distance measurement mode", "normal transmission mode” or "phase sweep transmission mode”).
  • the transmitting and receiving circuit 41 m is configured to include a signal generator 42 m , a circulator 44 m , a mixer 45 m and an ADC 46 m .
  • the configurations of the signal generator 42 m , circulator 44 m , mixer 45 m and ADC 46 m are the same as the configurations of the signal generator 42 n , circulator 44 n , mixer 45 n and ADC 46 n in the first embodiment (FIG. 1). is there.
  • the signal processing circuit 51 m includes a modulation control unit 52 m and a distance measuring unit 55 m .
  • Configuration of modulation control unit 52 m and the distance measuring unit 55 m is the same as that of the modulation control unit 52 n and the distance measuring unit 55 n (Fig. 1) in the first embodiment.
  • the measurement unit of the present embodiment can be configured by distance measurement units 55 1 to 55 N ⁇ 1 .
  • N-th slave module 31 N includes a transceiver circuit 41 N and the signal processing circuit 51 N. These receiving circuit 41 N and the signal processing circuit 51 N operates in the operation mode designated by the operation control unit 25 ( "distance measurement mode” or "receive mode”).
  • the transmission / reception circuit 41 N of FIG. 7 has the same configuration as the transmission / reception circuit 40 N (FIG. 1) of the first embodiment.
  • the hardware configuration of the signal processing circuit 51 n may be realized by a processor having a semiconductor integrated circuit such as a DSP, an ASIC or an FPGA.
  • the hardware configuration of the signal processing circuit 51 n may be realized by a processor including an arithmetic device such as a CPU or a GPU that executes a program code of software or firmware read from a memory. It is also possible to realize the hardware configuration of the signal processing circuit 51 n by a processor having a combination of the semiconductor integrated circuit and the arithmetic device.
  • the hardware configuration of the signal processing circuit 51 n may be realized by a plurality of processors.
  • Operation control unit 25 and phase control unit 27 individually control the operations of modulation control units 52 1 to 52 N-1 and signal generators 42 1 to 42 N-1 in slave modules 31 1 to 31 N ⁇ 1 .
  • the array antenna 60 can function as a phased array antenna.
  • the wiring length of the signal transmission lines C 1 ⁇ C N-1 is not necessarily the same length, the electrical length of the signal transmission lines C 1 ⁇ C N-1 in isometry It does not have to be. For example, when the electrical length of the i-th signal transmission path C i and the electrical length of the j-th signal transmission path C j are not equal, two of the two input to the slave modules 31 i and 31 j , respectively.
  • phase shift occurs due to the difference in electrical length.
  • the phase shift is multiplied by the PLL circuit in the signal generators 42 i and 42 j , and may cause a phase difference between the transmission signals output from the antenna elements 61 i and 61 j to deteriorate the beam shape. .
  • the radar device 2 of this embodiment generates a signal based on a phase difference detection function of detecting a phase difference between transmission signals output from a pair of antenna elements 61 i and 61 j , and the detected phase difference. And a phase error correction function of correcting the error of the output phase of the units 42 i and 42 j .
  • a “ranging mode”, a “normal transmission mode”, a “phase sweep transmission mode” and a “reception mode” are incorporated.
  • the modulation control unit 52 n A modulation control signal MC n for generating a frequency modulated ranging signal is supplied to a signal generator 42 n .
  • the antenna element 61 N radiates the transmission wave of the ranging signal input from the signal generator 42 N via the circulator 44 N toward the target Tgt.
  • the transmission / reception circuit 41 n receives a reflected wave corresponding to the distance measurement signal from the target Tgt.
  • the reflected wave is transmitted to the mixer 45 n through the circulator 44 n .
  • the mixer 45 n mixes the received signal indicating the reflected wave with the local signal output from the signal generator 42 n to generate an analog beat signal.
  • the ADC 46 n converts the analog beat signal into a beat signal in digital format, and supplies the beat signal to the distance measuring unit 55 n of the signal processing circuit 51 n .
  • the distance measuring unit 55 n performs frequency analysis such as fast Fourier transform (FFT) on the beat signal to detect the frequency of the beat signal, that is, the beat frequency f b . Further, based on the beat frequency f b , the distance measuring unit 55 n can calculate the round-trip propagation time ⁇ of the distance measurement signal between the slave module 31 n and the target Tgt as a measurement value. Then, the distance measuring unit 55 n transfers measurement data indicating the measurement value to the master module 21.
  • the operation control unit 25 stores the measurement data transferred from the distance measuring unit 55 n in the n-th storage area 28 n of the data storage unit 28.
  • an operation command specifying the phase sweep transmission mode which is the first transmission mode is the signal processing circuit 51 m (m is in the range of 1 to N ⁇ 1.
  • Modulation control section 52 m sweeps the phase of the frequency unmodulated signal within a predetermined range (for example, within the range of 0 ° to 360 °) while generating the frequency unmodulated signal.
  • the modulation control signal MC m to be generated is supplied to the signal generator 42 m .
  • the distance measuring unit 55 m is controlled not to operate. At this time, the antenna element 61 m radiates the transmission wave of the frequency unmodulated signal input from the signal generator 42 m via the circulator 44 n toward the target Tgt.
  • an operation instruction for designating the normal transmission mode which is the second transmission mode is the signal processing circuit 51 m (m is in the range of 1 to N ⁇ 1.
  • the modulation controller 52 m supplies a modulated control signal MC m to produce a frequency unmodulated signal to the signal generator 42 m.
  • the distance measuring unit 55 m is controlled not to operate.
  • the antenna element 61 m radiates the transmission wave of the frequency unmodulated signal input from the signal generator 42 m via the circulator 44 n toward the target Tgt.
  • the modulation control unit 52 N When an operation command specifying the reception mode is input to the signal processing circuit 51 N for the Nth slave module 31 N , the modulation control unit 52 N generates a modulation control signal MC N that generates a non-modulated local signal. and supplies the signal generator 42 N. At the same time, the transmission control unit 53 N by outputting a switching control signal to turn off the operation switch circuit 43 N, to disconnect the signal path between the signal generator 42 N and the antenna element 61 N. The distance measuring unit 55 N is controlled not to operate.
  • phase sweep signal the reflected wave having a phase corresponding to the swept frequency unmodulated signal
  • the reflected waves of two waves that arrive from the two slave modules 31 i , 31 j via the target Tgt are superimposed on each other by the antenna element 61 N.
  • the mixer 45 N of the transmitting and receiving circuit 41 N inputs the received signal transmitted via the antenna elements 61 N and the circulator 44 N, by mixing the local signal output from the reception signal and the signal generator 42 N and Generate an analog beat signal. Then, the ADC 46 N converts the analog beat signal into a beat signal in digital format, and outputs the beat signal to the phase shift amount detection unit 58 N.
  • Phase shift amount detector 58 N can detect a phase shift amount phi cnt0 phase sweep signal to maximize the signal amplitude of the input beat signal.
  • the slave module 31 i which operate in phase sweep transmit mode, the signal generator 42 i, since changing the phase of the transmission signal at a predetermined sweep rate, the target Tgt from two slave modules 31 i, 31 j through to interfere interference condition reflected wave together two waves arriving to the slave module 31 N varies according to the time variation in the amount of phase shift in the signal generator 42 i. Thereby, the signal amplitude of the beat signal also changes with time.
  • phase shift amount detector 58 N may be a power of the input beat signal measures the time t 0 to maximize, to obtain the phase shift amount phi cnt0 corresponding to the measurement time t 0.
  • Phase shift amount detector 58 N transfers the data indicative of the detected phase shift amount phi cnt0 the master module 20.
  • the phase difference calculation unit 26 measures the output from the antenna elements 61 i and 61 j based on the phase shift amount ⁇ cnt0 transferred from the phase shift amount detection unit 58 N and the measurement data obtained from the data storage unit 28.
  • the phase difference between distance signals can be calculated.
  • the phase control unit 27 controls at least one of the signal generators 42 i and 42 j in the slave modules 31 i and 31 j based on the calculated phase difference to output the outputs of these signal generators 42 i and 42 j . Errors between the phases can be corrected.
  • FIG. 8 is a flowchart schematically showing an example of the procedure of control processing according to the second embodiment.
  • the control process shown in FIG. 8 is performed by the control circuit 24.
  • the operation control unit 25 selects one set of slave modules 31 i and 31 j from the combinations of slave modules 31 1 to 31 N-1 (step ST20).
  • one of the slave modules 31 i is referred to as a first slave module 31 i
  • the other slave module 31 j is called the second slave module 31 j, referred to as slave modules 31 N and the third slave module 31 N To be.
  • the operation control unit 25 supplies an operation command specifying the distance measurement mode to the first slave module 31i , thereby setting the first slave module 31i in the distance measurement mode (first distance measurement mode).
  • the first slave module 31 i the distance measuring unit 55 i is a delay time corresponding to the distance between the target Tgt (RTT) and tau 1 is calculated as the measurement value, the measurement data indicating the measured value Are transferred to the master module 21.
  • the operation control unit 25 stores the measurement data transferred from the distance measuring unit 55i in the i- th storage area i (step ST22).
  • the operation control unit 25 supplies an operation command for specifying a distance measurement mode to the second slave module 31 j , whereby the distance measurement mode (second distance measurement mode) of the second slave module 31 j is performed.
  • the distance measuring unit 55 j calculates a delay time (round-trip propagation time) ⁇ 2 corresponding to the distance to the target Tgt as a measurement value, and measurement data indicating the measurement value Are transferred to the master module 21.
  • the operation control unit 25 stores the measurement data transferred from the distance measuring unit 55 j in the j-th storage area 28 j (step ST 24).
  • the operation control unit 25 supplies an operation instruction specifying the phase sweep transmission mode to the first slave module 31i , supplies an operation instruction specifying the normal transmission mode to the second slave module 31j , and , by supplying an operation command that specifies the receive mode to the third slave module 31 N, the first slave module 31 i is operated in the phase sweep transmit mode, the second slave module 31 j in the normal transmission mode
  • the third slave module 31 N is operated in the reception mode (step ST 25).
  • the first slave module 31 i which operate in phase sweep transmit mode, operates as a transmission circuit corresponding to the third slave module 31 N.
  • First slave module 31 i has a phase sweep signal S TX1 frequency unmodulated having a predetermined transmission frequency f cw transmitted toward the target Tgt.
  • the phase sweep signal S TX1 propagates to the third slave module 31 N after being reflected by the target Tgt.
  • Phase sweep signal S TX1 is represented, for example, by the following equation (8).
  • a 0 is a signal amplitude
  • t time
  • ⁇ 1 is an initial value of the phase state value
  • ⁇ cnt is a phase shift amount to be changed at a predetermined sweep speed.
  • Second slave module 31 j which operates in the normal transmission mode, operates as a transmission circuit corresponding to the third slave module 31 N.
  • the second slave module 31 j transmits the frequency non-modulated transmission signal S TX2 having the predetermined transmission frequency f cw toward the target Tgt.
  • the transmission signal S TX2 propagates to the third slave module 31 N after being reflected by the target Tgt.
  • Transmission signal S TX2 is expressed, for example, by the following equation (9).
  • B 0 is a signal amplitude
  • ⁇ 2 is a phase state value.
  • the third slave module 31 N operating in the receive mode operates as a receiving circuit corresponding to the first and second slave module 31 i, 31 j.
  • the mixer 45 N receives the reception signal S RX3 transmitted through the antenna element 61 N and the circulator 44 N , and the reception signal S RX3 and the frequency output from the signal generator 42 N
  • the unmodulated local signal S LO (frequency: f LO ) is mixed to generate an analog beat signal.
  • the ADC 46 N converts the analog beat signal into a beat signal S bcw 3 in digital form, and supplies the beat signal S bcw 3 to the phase shift amount detection unit 58 N.
  • Local signal S LO is expressed, for example, by the following equation (10).
  • C 0 is the signal amplitude.
  • received signal S RX3 is expressed, for example, by the following equation (11).
  • a 1 and B 1 are signal amplitudes.
  • Beat signal S bcw3 is represented, for example, by the following equation (12).
  • the two reflected waves arriving from the first and second slave modules 31 i and 31 j via the target Tgt to the third slave module 31 N interfere with each other, and the interference state is a signal It changes according to the time change of the phase shift amount ⁇ cnt in the generator 42 i .
  • Phase shift amount detector 58 N monitors the power waveform of the beat signal S Bcw3 input may be detected amount of phase shift phi cnt0 corresponding to the maximum value of the power waveform.
  • FIG. 9 is a graph schematically showing an example (cosine curve) of the power waveform of the beat signal S bcw3 .
  • the condition for maximizing the signal amplitude of the beat signal S bcw3 is the phase condition of the first term on the right side of equation (12) and the phase condition of the second term on the right side of equation (12) Are in agreement with each other. Therefore, the condition for maximizing the signal amplitude of the beat signal S bcw3 is expressed by the following equation (13).
  • equation (13) is modified, the following equation (14) is derived.
  • the phase difference calculating unit 26 can calculate the phase difference ⁇ based on the equation (14).
  • the phase control unit 27 controls at least one of the signal generators 42 i and 42 j in the first and second slave modules 31 i and 31 j based on the calculated phase difference ⁇ . Then, the error between the output phases of the signal generators 42 i and 42 j is corrected (step ST27). Specifically, the phase control unit 27 corrects the error by controlling the phase adjustment circuit (variable phase shifter) in the signal generators 42 i and 42 j based on the calculated phase difference ⁇ . Can.
  • the operation control unit 25 determines whether or not all pairs are selected from the slave modules 31 1 to 31 N-1 (step ST 28). If all sets have not been selected (NO in step ST28), operation control unit 25 selects a new set (step ST20), and executes steps ST21 to ST27 for this new set. On the other hand, if all sets have been selected (YES in step ST28), the operation control unit 25 ends the control process.
  • a set of slave modules is represented by (30 i , 30 j )
  • the phase controller 27 controls the second slave module 31 signal generator 42 j in j, for the output phase of the signal generator 42 i, the error of the output phase of the signal generator 42 j correction (Step ST27).
  • the first and second slave modules 31 i , 31 j operate in the distance measurement mode to obtain the first and second measured values ⁇ 1 , ⁇ Measure 2 respectively. Then, the first slave module 31 i is at the same time operate at a phase sweep transmit mode, the second slave module 31 j operates in the normal transmission mode. Third slave module 31 N is operating in the receive mode, to detect a phase shift amount phi cnt0 to maximize signal amplitude of the beat signal S bcw3. Then, the phase difference calculation unit 26 calculates the phase difference ⁇ between the ranging signals output from the antenna elements 61 i and 61 j based on the measured values ⁇ 1 and ⁇ 2 and the phase shift amount ⁇ cnt0.
  • the radar apparatus 2 includes the plurality of signal generators 42 1 to 42 N-1 for the plurality of antenna elements 61 1 to 61 N-1 , these antenna elements 61
  • the phase difference between the ranging signals output from 1 to 61 N-1 can be calculated with high accuracy. Even if the slave modules 31 1 to 31 N-1 are distributed, high-precision calculation of the phase difference is possible. Therefore, the phase difference detection circuit of the present embodiment can synchronize the output phases of the signal generators 42 1 to 42 N-1 in the slave modules 31 1 to 31 N-1 with high accuracy.
  • phase difference detection circuit of the first and second embodiments is applied to radar technology, it is not limited to this.
  • the phase difference detection circuit of Embodiments 1 and 2 may be applied to a wireless communication system.
  • the phase difference detection circuit according to the present invention can be applied to, for example, a radar system or a wireless communication system mounted on a mobile object such as a vehicle (for example, a car or a railway vehicle).
  • a radar system or a wireless communication system mounted on a mobile object such as a vehicle (for example, a car or a railway vehicle).
  • Tgt target, 1 and 2 radar devices 20 master modules, 21 master modules, 22 reference signal generators, 23 operation control circuits, 24 control circuits, 25 operation control units, 26 phase difference calculation units, 27 phase control units, 28 data Memory unit, 30 1 to 30 N , 31 1 to 31 N slave module, 40 1 to 40 N , 41 1 to 41 N transceiver circuit, 42 1 to 42 N signal generator, 420 PLL circuit, 421 phase comparator, 422 Charge pump circuit 423 loop filter 424 voltage controlled oscillator (VCO) 425 directional coupler 426 variable phase shifter 427 variable frequency divider 428 ⁇ ⁇ ⁇ modulator 43 1 to 43 N switch circuit 44 1 to 44 N circulator, 45 1 ⁇ 45 N mixers, 46 1 ⁇ 46 N A / D converter (ADC), 50 1 50 N, 51 1 ⁇ 51 N signal processing circuits, 52 1 ⁇ 52 N modulation control unit, 53 1 ⁇ 53 N transmission control unit, 54 1 ⁇ 54 N phase difference calculating section, 55 1 ⁇ 55 N distance measuring unit

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Abstract

This phase difference detection circuit has a first transmission/reception circuit (40i), a second transmission/reception circuit (40j), measuring units (55i, 55j), and a phase difference calculation unit (54j). The first transmission/reception circuit (40i) and the second transmission/reception circuit (40j) respectively calculate, by operating in ranging mode, a first measurement value and a second measurement value, which indicate round-trip propagation time to a target (Tgt). Then, the first transmission/reception circuit (40i) operates in transmission mode, and transmits a frequency unmodulated signal. The second transmission/reception circuit (40j) operates in reception mode, receives, from the first transmission/reception circuit (40i), reflected waves arrived via the target Tgt, and generates a beat signal on the basis of a reception signal of the reflected waves. The second transmission/reception circuit (40j) calculates, on the basis of the first measurement value, the second measurement value, and the beat signal, a phase difference between transmission signals transmitted from a first antenna element (61i) and a second antenna element (61j).

Description

位相差検出回路およびレーダ装置Phase difference detection circuit and radar device

 本発明は、複数のアンテナ素子から出力される送信信号間の位相差を検出する技術に関し、特に、レーダ装置のアレイアンテナを構成する複数のアンテナ素子から出力される送信信号間の位相差を検出する技術に関するものである。 The present invention relates to a technique for detecting a phase difference between transmission signals output from a plurality of antenna elements, and in particular, detects a phase difference between transmission signals output from a plurality of antenna elements constituting an array antenna of a radar device. Related to technology.

 ターゲット(物標)との距離およびターゲットの相対速度といったターゲット情報を探知するレーダ装置においては、周波数変調方式が広く採用されている。周波数変調方式としては、たとえば、周波数変調連続波(Frequency-Modulated Continuous-Wave,FMCW)方式が広く知られている。FMCW方式では、時間とともに直線的に変化する送信周波数を有するチャープ(chirp)と呼ばれる送信信号を使用することが多い。FMCW方式で動作するレーダ装置は、送信信号と受信信号との間の周波数差であるビート周波数を測定し、そのビート周波数を基にターゲットとの距離および当該ターゲットの相対速度を検出することが可能である。 A frequency modulation method is widely adopted in a radar apparatus which detects target information such as a distance to a target (target) and a relative velocity of the target. As a frequency modulation method, for example, a frequency-modulated continuous-wave (FMCW) method is widely known. The FMCW scheme often uses a transmit signal called a chirp, which has a transmit frequency that varies linearly with time. A radar device operating in the FMCW system can measure a beat frequency which is a frequency difference between a transmission signal and a reception signal, and detect the distance to the target and the relative velocity of the target based on the beat frequency. It is.

 たとえば、特許文献1(特開2006-10404号公報)には、N本のアンテナ(Nは2以上の整数)間の位相差を検出するFMCW方式のレーダ装置が開示されている。このレーダ装置は、送信信号を生成する信号生成器(電圧制御発振器)と、当該N本のアンテナの中からいずれか1本のアンテナを選択して当該選択されたアンテナから送信信号を出力させる1対Nスイッチと、信号生成器の出力の一部と受信信号とを混合するミキサと、このミキサの出力の電圧レベルを測定する信号処理部とを備える。特許文献1によれば、送信信号の周波数変調が停止された状態で、1対NスイッチがN本のアンテナを順次選択する。当該選択された各アンテナは周波数無変調の送信信号を送信し、ミキサは、当該送信信号と受信信号との位相差に相当する直流電圧レベルを出力する。そして、信号処理部は、N本のアンテナそれぞれについて測定された直流電圧レベルからN本のアンテナについての位相値を算出し、これら位相値に基づき、アンテナ間の位相差を検出している。 For example, Patent Document 1 (Japanese Unexamined Patent Publication No. 2006-10404) discloses an FMCW radar device that detects a phase difference between N antennas (N is an integer of 2 or more). This radar apparatus selects a signal generator (voltage control oscillator) that generates a transmission signal, and any one of the N antennas, and outputs the transmission signal from the selected antenna 1 A pair N switch, a mixer for mixing a part of the output of the signal generator and the received signal, and a signal processing unit for measuring the voltage level of the output of the mixer. According to Patent Document 1, the 1-to-N switch sequentially selects N antennas while the frequency modulation of the transmission signal is stopped. Each of the selected antennas transmits a transmission signal without frequency modulation, and the mixer outputs a DC voltage level corresponding to the phase difference between the transmission signal and the reception signal. Then, the signal processing unit calculates phase values for the N antennas from the DC voltage levels measured for each of the N antennas, and detects a phase difference between the antennas based on these phase values.

特開2006-10404号公報(たとえば、請求項1および図1)JP-A-2006-10404 (For example, claim 1 and FIG. 1)

 上記した特許文献1記載の位相差検出技術は、N本のアンテナについて共通の信号生成器(電圧制御発振器)を使用することを前提とする技術である。このため、複数のアンテナについて個別に複数の信号生成器を有するレーダ装置の場合、特許文献1記載の位相差検出技術を適用することが難しいという課題がある。 The phase difference detection technique described in Patent Document 1 described above is a technique based on the use of a common signal generator (voltage control oscillator) for N antennas. Therefore, in the case of a radar apparatus having a plurality of signal generators individually for a plurality of antennas, there is a problem that it is difficult to apply the phase difference detection technique described in Patent Document 1.

 上記に鑑みて本発明の目的は、複数のアンテナ素子について個別に複数の信号生成器が設けられている場合でも、当該複数のアンテナ素子から出力される送信信号間の位相差を高精度に検出することができる位相差検出回路およびレーダ装置を提供することである。 In view of the above, it is an object of the present invention to accurately detect the phase difference between transmission signals output from a plurality of antenna elements even when a plurality of signal generators are provided individually for a plurality of antenna elements. It is an object of the present invention to provide a phase difference detection circuit and a radar device that can be performed.

 本発明の一態様による位相差検出回路は、第1のアンテナ素子および第2のアンテナ素子と接続された状態で使用される位相差検出回路であって、第1の測距モードで動作した後に送信モードで動作するように制御され、前記第1の測距モードでは、周波数変調された第1の測距信号を生成し、前記第1の測距信号を前記第1のアンテナ素子から送信させた後に外部空間内のターゲットから反射波を受信して第1の受信信号を生成し、前記送信モードでは、周波数変調されない高周波信号を生成し、前記高周波信号を前記第1のアンテナ素子から送信させる第1の送受信回路と、第2の測距モードで動作した後に受信モードで動作するように制御され、前記第2の測距モードでは、周波数変調された第2の測距信号を生成し、前記第2の測距信号を前記第2のアンテナ素子から送信させた後に前記ターゲットから反射波を受信して第2の受信信号を生成し、前記受信モードでは、前記高周波信号に対応する反射波を前記ターゲットから受信して第3の受信信号を生成する第2の送受信回路と、前記第1の受信信号に基づき、前記第1の送受信回路と前記ターゲットとの間における前記第1の測距信号の往復伝播時間を示す第1の計測値を算出し、かつ、前記第2の受信信号に基づき、前記第2の送受信回路と前記ターゲットとの間における前記第2の測距信号の往復伝播時間を示す第2の計測値を算出する計測部と、前記第1の測距信号と前記第2の測距信号との間の位相差を算出する位相差算出部とを備え、前記第2の送受信回路は、前記第3の受信信号と前記第2の測距信号との間の周波数差を示すビート信号を生成し、前記位相差算出部は、前記第1の計測値、前記第2の計測値および前記ビート信号に基づいて前記位相差を算出することを特徴とする。 A phase difference detection circuit according to an aspect of the present invention is a phase difference detection circuit used in a state of being connected to a first antenna element and a second antenna element, and after operating in a first ranging mode. It is controlled to operate in the transmission mode, and in the first ranging mode, a frequency modulated first ranging signal is generated, and the first ranging signal is transmitted from the first antenna element. After that, a reflected wave is received from a target in the external space to generate a first reception signal, and in the transmission mode, a high frequency signal which is not frequency-modulated is generated, and the high frequency signal is transmitted from the first antenna element. The first transmission / reception circuit is controlled to operate in the reception mode after operating in the second distance measurement mode, and in the second distance measurement mode, the frequency-modulated second distance measurement signal is generated; The second measurement After transmitting a signal from the second antenna element, a reflected wave is received from the target to generate a second received signal, and in the reception mode, a reflected wave corresponding to the high frequency signal is received from the target Transmission / reception circuit that generates a third reception signal, and the round-trip propagation time of the first distance measurement signal between the first transmission / reception circuit and the target based on the first reception signal A second measurement signal indicating a first measurement value indicating a second measurement signal, and a second measurement signal indicating a round-trip propagation time of the second distance measurement signal between the second transmission / reception circuit and the target based on the second reception signal; And a phase difference calculation unit calculating a phase difference between the first distance measurement signal and the second distance measurement signal, wherein the second transmission / reception circuit Third received signal and second ranging signal Generating a beat signal indicating a frequency difference between them, and calculating the phase difference based on the first measurement value, the second measurement value, and the beat signal. Do.

 本発明によれば、複数のアンテナ素子から送信される測距信号間の位相差を高精度に検出することができる。 According to the present invention, it is possible to detect the phase difference between ranging signals transmitted from a plurality of antenna elements with high accuracy.

本発明に係る実施の形態1であるレーダ装置1の概略構成を示す図である。FIG. 1 is a view showing a schematic configuration of a radar device 1 according to a first embodiment of the present invention. 実施の形態1における信号生成器の一例を示すブロック図である。FIG. 2 is a block diagram showing an example of a signal generator in Embodiment 1. 実施の形態1のアレイアンテナの動作状態を概略的に示す図である。FIG. 7 schematically shows an operating state of the array antenna of the first embodiment. 送信周波数Ftと受信周波数Frとの間の関係を概略的に示すグラフである。It is a graph which shows roughly the relationship between transmitting frequency Ft and receiving frequency Fr. 実施の形態1に係る動作制御処理の手順の一例を概略的に示すフローチャートである。5 is a flowchart schematically illustrating an example of a procedure of an operation control process according to the first embodiment. 図6Aおよび図6Bは、位相差検出に使用されるビート信号の信号波形の例を示すグラフである。6A and 6B are graphs showing examples of signal waveforms of beat signals used for phase difference detection. 本発明に係る実施の形態2のレーダ装置の概略構成を示す図である。It is a figure which shows schematic structure of the radar apparatus of Embodiment 2 which concerns on this invention. 実施の形態2に係る制御処理の手順の一例を概略的に示すフローチャートである。FIG. 13 is a flowchart schematically showing an example of the procedure of control processing according to Embodiment 2. FIG. 実施の形態2に係るビート信号の電力波形の一例を概略的に示すグラフである。7 is a graph schematically showing an example of a power waveform of a beat signal according to Embodiment 2. FIG.

 以下、図面を参照しつつ、本発明に係る種々の実施の形態について詳細に説明する。なお、図面全体において同一符号を付された構成要素は、同一構成および同一機能を有するものとする。 Hereinafter, various embodiments according to the present invention will be described in detail with reference to the drawings. Note that components given the same reference numerals throughout the drawings have the same configuration and the same function.

実施の形態1.
 図1は、本発明に係る実施の形態1であるレーダ装置1の概略構成を示す図である。図1に示されるように、このレーダ装置1は、1次元状または面状(平面状もしくは曲面状)に配列されたN個のアンテナ素子61~61(Nは2以上の整数)を含むアレイアンテナ60と、これらN個のアンテナ素子61~61にそれぞれ接続されたN個のスレーブモジュール30~30と、これらスレーブモジュール30~30の動作を個別に制御するマスタモジュール20とを備えて構成されている。スレーブモジュール30~30の各々は、レーダモジュールとして機能することができるレーダ回路である。
Embodiment 1
FIG. 1 is a view showing a schematic configuration of a radar device 1 according to a first embodiment of the present invention. As shown in FIG. 1, the radar device 1, one-dimensional or planar N pieces arranged in a (planar shape or a curved surface) of the antenna elements 61 1 ~ 61 N (N is an integer of 2 or more) Array antenna 60, N slave modules 30 1 to 30 N respectively connected to the N antenna elements 61 1 to 61 N , and a master for individually controlling the operations of these slave modules 30 1 to 30 N And a module 20. Each of the slave modules 30 1 to 30 N is a radar circuit that can function as a radar module.

 本実施の形態のレーダ装置1には、一組のアンテナ素子61,61(i≠j)から出力される送信信号間の位相差を検出する機能を有する位相差検出回路が組み込まれている。本実施の形態の位相差検出回路は、たとえば、スレーブモジュール30~30とマスタモジュール20とによって構成可能である。 The radar apparatus 1 of the present embodiment incorporates a phase difference detection circuit having a function of detecting a phase difference between transmission signals output from a pair of antenna elements 61 i and 61 j (i ≠ j). There is. Phase difference detecting circuit of this embodiment, for example, can be configured by the slave module 30 1 ~ 30 N and the master module 20.

 マスタモジュール20は、予め設定された基準周波数を有する基準信号RSを発生させてこの基準信号RSをスレーブモジュール30~30に供給する基準信号発生器22と、スレーブモジュール30~30の動作を個別に制御する動作制御回路23と、スレーブモジュール30~30で得られた計測データを格納するデータ記憶部28とを有する。基準信号発生器22は、たとえば、水晶発振器などの発振器を用いて構成されればよい。 The master module 20 generates a reference signal RS having a preset reference frequency and supplies the reference signal RS to the slave modules 30 1 to 30 N, and a reference signal generator 22 for the slave modules 30 1 to 30 N. having an operation control circuit 23 for individually controlling the operation, and a data storage unit 28 for storing the measurement data obtained by the slave modules 30 1 ~ 30 N. The reference signal generator 22 may be configured, for example, using an oscillator such as a crystal oscillator.

 基準信号発生器22とスレーブモジュール30~30との間には、N本の信号伝送路C~Cが設けられている。信号伝送路C~Cの一方の端部は、基準信号発生器22の信号出力端と接続されており、信号伝送路C~Cの他方の端部は、スレーブモジュール30~30の信号入力端とそれぞれ接続されている。基準信号発生器22は、信号伝送路C~Cを介してスレーブモジュール30~30に基準信号RSを供給する信号源である。信号伝送路C~Cは、たとえば、同軸ケーブルなどの伝送ケーブルで構成可能である。 N signal transmission paths C 1 to C N are provided between the reference signal generator 22 and the slave modules 30 1 to 30 N. One end of the signal transmission path C 1 to C N is connected to the signal output end of the reference signal generator 22, and the other end of the signal transmission path C 1 to C N is a slave module 30 1 to Each is connected to a 30 N signal input terminal. The reference signal generator 22 is a signal source for supplying a reference signal RS to the slave modules 30 1 to 30 N through the signal transmission paths C 1 to C N. The signal transmission paths C 1 to C N can be configured by transmission cables such as coaxial cables, for example.

 なお、信号伝送路C~Cの配線長は等長であるとは限らず、信号伝送路C~Cの電気長も等長であるとは限らない。 The wiring length of the signal transmission lines C 1 ~ C N is not necessarily equal length, not necessarily the electrical length of the signal transmission line C 1 ~ C N is also equal in length.

 動作制御回路23は、スレーブモジュール30~30の動作順序を決定する機能と、スレーブモジュール30~30の各々の動作モードを指定する機能とを有する。動作制御回路23のハードウェア構成は、たとえば、DSP(Digital Signal Processor),ASIC(Application  Specific  Integrated  Circuit)またはFPGA(Field-Programmable Gate Array)などの半導体集積回路を有するプロセッサで実現されればよい。あるいは、動作制御回路23のハードウェア構成は、メモリから読み出されたソフトウェアまたはファームウェアのプログラムコードを実行する、CPU(Central Processing Unit)またはGPU(Graphics Processing Unit)などの演算装置を含むプロセッサで実現されてもよい。前記半導体集積回路と前記演算装置との組み合わせを有するプロセッサで動作制御回路23のハードウェア構成を実現することも可能である。更には、互いに連携して動作する複数個のプロセッサで動作制御回路23のハードウェア構成が実現されてもよい。 The operation control circuit 23 has a function of determining the operation sequence of the slave modules 30 1 ~ 30 N, and a function of specifying each operating mode of the slave modules 30 1 ~ 30 N. The hardware configuration of the operation control circuit 23 may be realized by, for example, a processor having a semiconductor integrated circuit such as a digital signal processor (DSP), an application specific integrated circuit (ASIC), or a field-programmable gate array (FPGA). Alternatively, the hardware configuration of the operation control circuit 23 is realized by a processor including an arithmetic device such as a central processing unit (CPU) or a graphics processing unit (GPU) that executes the program code of software or firmware read from the memory. It may be done. The hardware configuration of the operation control circuit 23 can also be realized by a processor having a combination of the semiconductor integrated circuit and the arithmetic device. Furthermore, the hardware configuration of the operation control circuit 23 may be realized by a plurality of processors operating in cooperation with one another.

 マスタモジュール20とスレーブモジュール30~30との間には、制御信号およびデータ信号を伝送する信号線群(図示せず)が設けられている。動作制御回路23は、動作命令を当該信号線群を介してスレーブモジュール30~30の各々に供給することができる。また、動作制御回路23は、スレーブモジュール30~30のいずれかから計測データを当該信号線群を介して取得することができ、また、データ記憶部28に記憶済みの計測データを当該信号線群を介してスレーブモジュール30~30に供給することもできる。 Between the master module 20 and the slave modules 30 1 ~ 30 N, the signal line group for transmitting (not shown) is provided to control and data signals. The operation control circuit 23 is capable of supplying an operation command to each of the slave modules 30 1 ~ 30 N via the signal line group. The operation control circuit 23, the slave measurement data from any of the modules 30 1 ~ 30 N can be obtained through the signal line group, also the signals already stored measurement data to the data storage unit 28 It is also possible to supply the slave modules 30 1 to 30 N through the line group.

 データ記憶部28は、計測データの計測値を格納する第1記憶領域28~第N記憶領域28を有している。動作制御回路23は、スレーブモジュール30~30から得た計測値をそれぞれ第1記憶領域28~第N記憶領域28に記憶させることができる。データ記憶部28は、1個または複数個の記憶装置で構成されていればよい。 The data storage unit 28 has a first storage area 28 1 to an N-th storage area 28 N for storing measurement values of measurement data. The operation control circuit 23 can store the measurement values obtained from the slave modules 30 1 to 30 N in the first storage area 28 1 to the Nth storage area 28 N , respectively. The data storage unit 28 may be configured of one or more storage devices.

 次に、スレーブモジュール30~30の構成について説明する。本実施の形態のスレーブモジュール30~30は、同一の回路構成を有する。n番目のスレーブモジュール30は、送受信回路40および信号処理回路50を含む。これら送受信回路40および信号処理回路50は、動作制御回路23により指定された動作モードで動作する。図1に示されるように、送受信回路40は、信号生成器42、スイッチ回路43、サーキュレータ44、ミキサ45およびA/D変換器(ADC)46を有して構成されている。 Next, the configuration of the slave modules 30 1 ~ 30 N. The slave modules 30 1 to 30 N of the present embodiment have the same circuit configuration. The n-th slave module 30 n includes a transmission / reception circuit 40 n and a signal processing circuit 50 n . The transmission / reception circuit 40 n and the signal processing circuit 50 n operate in the operation mode specified by the operation control circuit 23. As shown in FIG. 1, the transmitting and receiving circuit 40 n includes a signal generator 42 n , a switch circuit 43 n , a circulator 44 n , a mixer 45 n and an A / D converter (ADC) 46 n. There is.

 信号生成器42は、基準信号発生器22から信号伝送路Cを介して供給された基準信号RSを入力とし、信号処理回路50から供給された変調制御信号MCに従って、周波数変調信号である測距信号(ranging signal)または周波数変調されないCW(連続波)信号であるRF信号(以下「周波数無変調信号」という。)のいずれか一方の送信信号を生成することができる。たとえば、信号生成器42は、周波数変調連続波(Frequency-Modulated Continuous-Wave,FMCW)方式に従って、一定の変調帯域幅で直線的に変化することを繰り返す送信周波数を有するチャープ信号を測距信号として生成することができる。信号生成器42は、生成された送信信号(測距信号または周波数無変調信号)を、スイッチ回路43の一端とミキサ45の入力端との双方に供給する。また、信号生成器42は、信号処理回路50から供給された位相制御信号PCに従い、当該信号生成器42の出力位相を、指定された移相量だけシフトさせる位相調整機能を有している。 The signal generator 42 n receives the reference signal RS supplied from the reference signal generator 22 via the signal transmission line C n and, according to the modulation control signal MC n supplied from the signal processing circuit 50 n , a frequency modulation signal A transmission signal of either a ranging signal or an RF signal (hereinafter referred to as a "frequency non-modulated signal") which is a CW (continuous wave) signal which is not frequency-modulated can be generated. For example, the signal generator 42 n determines a ranging signal of a chirp signal having a transmission frequency which repeats to change linearly at a fixed modulation bandwidth according to a frequency-modulated continuous-wave (FMCW) system. Can be generated as The signal generator 42 n supplies the generated transmission signal (ranging signal or frequency unmodulated signal) to both one end of the switch circuit 43 n and the input end of the mixer 45 n . Further, the signal generator 42 n has a phase adjustment function of shifting the output phase of the signal generator 42 n by a designated phase shift amount according to the phase control signal PC n supplied from the signal processing circuit 50 n. doing.

 このような信号生成器42は、たとえば、PLL(Phase-Locked Loop)回路を含む集積回路(IC)で構成されればよい。具体的には、小数分周(fractional)型のPLL回路を内蔵するディスクリートICを使用することができる。 Such a signal generator 42 n may be configured by, for example, an integrated circuit (IC) including a PLL (Phase-Locked Loop) circuit. Specifically, it is possible to use a discrete IC which incorporates a fractional PLL circuit.

 図2は、小数分周型のPLL回路を内蔵する信号生成器42の一例を示すブロック図である。図2に示される信号生成器42は、小数分周型のPLL回路420と、分周比制御回路として機能するΔΣ(デルタ-シグマ)変調器428とを有する。PLL回路420は、位相比較器421、チャージポンプ回路422、ループフィルタ423、電圧制御発振器(Voltage-Controlled Oscillator,VCO)424、方向性結合器425、可変移相器426および可変分周器427を含んで構成されている。 FIG. 2 is a block diagram showing an example of a signal generator 42 n incorporating a fractional frequency division type PLL circuit. The signal generator 42 n shown in FIG. 2 has a fractional frequency division type PLL circuit 420 and a ΔΣ (delta-sigma) modulator 428 functioning as a frequency division ratio control circuit. The PLL circuit 420 includes a phase comparator 421, a charge pump circuit 422, a loop filter 423, a voltage-controlled oscillator (VCO) 424, a directional coupler 425, a variable phase shifter 426 and a variable divider 427. It is comprised including.

 位相比較器421は、入力された基準信号RSの位相と可変分周器427から出力された帰還信号の位相とを互いに比較して、基準信号RSの位相と帰還信号の位相との差分を位相差量として出力する。チャージポンプ回路422は、当該位相差量に比例した電圧または電流を出力する。ループフィルタ423は、チャージポンプ回路422から出力された電圧信号または電流信号を平滑化してPLL動作を安定化させる回路である。VCO424は、ループフィルタ423の出力に応じた送信周波数を有するRF信号を方向性結合器425を介して外部に出力する。ここで、方向性結合器425は、VCO424の出力から当該出力の一部を分岐させる。 The phase comparator 421 compares the phase of the input reference signal RS and the phase of the feedback signal output from the variable divider 427 with each other to obtain the difference between the phase of the reference signal RS and the phase of the feedback signal. Output as the amount of phase difference. The charge pump circuit 422 outputs a voltage or current proportional to the phase difference amount. The loop filter 423 is a circuit for smoothing the voltage signal or current signal output from the charge pump circuit 422 to stabilize the PLL operation. The VCO 424 outputs an RF signal having a transmission frequency according to the output of the loop filter 423 to the outside through the directional coupler 425. Here, the directional coupler 425 branches a part of the output from the output of the VCO 424.

 可変移相器426は、信号生成器42の出力位相を可変に調整する位相調整回路として機能する。可変移相器426は、位相制御信号PCに従い、方向性結合器425からの入力信号の位相をシフトさせることができる。図1に示される位相制御部56は、位相制御信号PCを信号生成器42に供給することにより信号生成器42の出力位相を制御することができる。 The variable phase shifter 426 functions as a phase adjustment circuit that variably adjusts the output phase of the signal generator 42 n . The variable phase shifter 426 can shift the phase of the input signal from the directional coupler 425 according to the phase control signal PC n . The phase control unit 56 n shown in FIG. 1 can control the output phase of the signal generator 42 n by supplying the phase control signal PC n to the signal generator 42 n .

 可変分周器427は、可変移相器426の出力信号を、ΔΣ変調器428の出力で指定された分周数で分周することにより分周信号を生成し、当該分周信号を帰還信号として位相比較器421に供給する。ΔΣ変調器428は、入力された変調制御信号MCにΔΣ変調を施して分周制御信号を生成し、当該分周制御信号を可変分周器427に出力する。ここで、ΔΣ変調を採用することで、可変分周器427で生ずる量子化位相ノイズを低減させることができる分周比パターンの形成が可能となる。 The variable divider 427 divides the output signal of the variable phase shifter 426 by the division number designated by the output of the ΔΣ modulator 428 to generate a divided signal, and the divided signal is used as a feedback signal. The phase comparator 421 is supplied as ΔΣ modulator 428, subjected to ΔΣ modulation to generate a division control signal to the input modulated control signal MC n, and outputs the division control signal to the variable frequency divider 427. Here, by adopting the ΔΣ modulation, it becomes possible to form a division ratio pattern which can reduce the quantization phase noise generated by the variable frequency divider 427.

 信号生成器42で生成されるべき送信信号の周波数帯域は、レーダ装置1の用途に応じて適宜決定されればよい。たとえば、レーダ装置1が自動車搭載用のFMCWレーダとして設計される場合には、ミリ波帯域または準ミリ波帯域の送信信号を生成するように信号生成器42が構成されればよい。この場合、アレイアンテナ60としては、セラミックス基板上に導体パターンが形成された平面アンテナを使用することができる。 The frequency band of the transmission signal to be generated by the signal generator 42 n may be appropriately determined according to the application of the radar device 1. For example, when the radar device 1 is designed as an FMCW radar for mounting on a car, the signal generator 42 n may be configured to generate a transmission signal in the millimeter wave band or the quasi-millimeter wave band. In this case, as the array antenna 60, a planar antenna in which a conductor pattern is formed on a ceramic substrate can be used.

 図1を参照すると、スイッチ回路43は、信号処理回路50から供給された切替制御信号に応じたスイッチング動作を行う。すなわち、スイッチ回路43は、切替制御信号に従い、信号生成器42とサーキュレータ44との間の信号経路を形成するオン動作、または信号生成器42とサーキュレータ44との間の信号経路を切断するオフ動作のいずれか一方を行う。スイッチ回路43としては、パワーFET(Field-Effect Ttransistor)などのスイッチング素子を使用することができる。 Referring to FIG. 1, the switch circuit 43 n performs a switching operation according to the switching control signal supplied from the signal processing circuit 50 n . That is, switch circuit 43 n forms an on signal path between signal generator 42 n and circulator 44 n according to the switching control signal, or a signal path between signal generator 42 n and circulator 44 n Do one of the off actions to disconnect the As the switch circuit 43 n , a switching element such as a power FET (Field-Effect T transistor) can be used.

 サーキュレータ44は、スイッチ回路43の出力端から順方向に入力された送信信号に対しては、スイッチ回路43をアンテナ素子61と結合するが、スイッチ回路43をミキサ45の入力端と結合しない。よって、当該送信信号のほとんどがアンテナ素子61に伝搬され、外部空間に放射される。一方、アンテナ素子61から逆方向に入力された受信信号に対しては、サーキュレータ44は、アンテナ素子61をミキサ45の入力端と結合するが、アンテナ素子61をスイッチ回路43と結合しない。よって、当該受信信号のほとんどがミキサ45に伝搬される。このようなサーキュレータ44としては、たとえば、ドロップインタイプのサーキュレータ(Drop-in Circulator)を使用することができる。 The circulator 44 n, to the transmission signal input to the forward direction from the output terminal of the switch circuit 43 n, while the switch circuit 43 n is coupled to the antenna element 61 n, mixer 45 n inputs of a switching circuit 43 n Do not bond with the end. Therefore, most of the transmission signal is propagated to the antenna element 61 n and radiated to the external space. On the other hand, with respect to the received signal input to the reverse direction from the antenna element 61 n, the circulator 44 n is the antenna element 61 n to coupled to the input of the mixer 45 n, the antenna element 61 n switch circuits 43 n Do not combine with Therefore, most of the received signal is propagated to the mixer 45 n . As such a circulator 44 n , for example, a drop-in type circulator (Drop-in Circulator) can be used.

 ミキサ45は、信号生成器42から入力された送信信号とサーキュレータ44から入力された受信信号とを混合して当該送信信号と当該受信信号との間の周波数差を示すアナログビート信号を生成する回路である。ミキサ45は、生成されたアナログビート信号をADC46に出力する。このようなミキサ45には、たとえば、ディスクリート部品を使用すればよい。ADC46は、入力されたアナログビート信号を所定周波数でサンプリングすることでアナログビート信号をディジタルビート信号に変換し、当該ディジタルビート信号(以下、単に「ビート信号」という。)を信号処理回路50に出力する。 The mixer 45 n mixes the transmission signal input from the signal generator 42 n with the reception signal input from the circulator 44 n to generate an analog beat signal indicating the frequency difference between the transmission signal and the reception signal. It is a circuit to generate. The mixer 45 n outputs the generated analog beat signal to the ADC 46 n . For such a mixer 45 n , for example, discrete components may be used. The ADC 46 n converts the analog beat signal into a digital beat signal by sampling the input analog beat signal at a predetermined frequency, and the digital beat signal (hereinafter simply referred to as a “beat signal”) is converted to a signal processing circuit 50 n. Output to

 図1に示される信号処理回路50は、動作制御回路23から入力された動作命令に応じて信号生成器42の変調動作を制御する変調制御部52と、当該動作命令に応じてスイッチ回路43のスイッチング動作を制御する送信制御部53と、当該動作命令に応じて信号生成器42の出力位相をシフトさせる位相制御部56と、一組のアンテナ素子61,61(i≠n)から出力された送信信号間の位相差を算出する位相差算出部54と、外部空間内のターゲットTgtに関する計測データを計測する測距部55とを備えている。本実施の形態の計測部は、測距部55~55によって構成可能である。 The signal processing circuit 50 n shown in FIG. 1, a modulation control unit 52 n for controlling the signal generator 42 n modulation operation according to the operation command inputted from the operation control circuit 23, in accordance with the operation instruction switch A transmission control unit 53 n that controls the switching operation of the circuit 43 n , a phase control unit 56 n that shifts the output phase of the signal generator 42 n according to the operation command, and a pair of antenna elements 61 i and 61 n (i ≠ n) and the phase difference calculating section 54 n for calculating a phase difference between the transmit signal outputted from, and a distance measuring unit 55 n to measure the measurement data for the target Tgt in the external space. The measuring unit of the present embodiment can be configured by distance measuring units 55 1 to 55 N.

 なお、ターゲットTgtは、レーダ装置1の出荷前に用意された既知の反射物体でもよいし、あるいは、レーダ装置1の出荷後に適当なタイミングで(たとえば、周期的に)選択される、運用環境に存在する任意の反射物体でもよい。たとえば、レーダ装置1の正面に設置されている金属の平面壁がターゲットTgtとして使用可能である。また、レーダ装置1が車載レーダ装置として運用される場合には、任意の距離だけ離れた静止車両がターゲットTgtとして使用されてもよい。 The target Tgt may be a known reflective object prepared before shipment of the radar device 1 or may be selected at an appropriate timing (for example, periodically) after shipment of the radar device 1 in an operating environment. It may be any reflective object present. For example, a flat metal wall installed in front of the radar device 1 can be used as a target Tgt. When the radar device 1 is operated as a vehicle-mounted radar device, a stationary vehicle separated by an arbitrary distance may be used as the target Tgt.

 動作制御回路23は、スレーブモジュール30~30における、変調制御部52~52、送信制御部53~53および位相制御部56~56の動作を個別に制御することで、アレイアンテナ60をフェーズドアレイアンテナとして機能させることができる。この場合、送信制御部53~53は、スイッチ回路43~43をすべてオン動作にする。同時に、変調制御部52~52および位相制御部56~56は、信号生成器42~42からそれぞれ位相調整された送信信号を出力させることで、アレイアンテナ60から放射されるビームの伝搬方向を制御することができる。 The operation control circuit 23 individually controls the operations of the modulation control units 52 1 to 52 N , the transmission control units 53 1 to 53 N and the phase control units 56 1 to 56 N in the slave modules 30 1 to 30 N. The array antenna 60 can function as a phased array antenna. In this case, the transmission control units 53 1 to 53 N turn on all the switch circuits 43 1 to 43 N. At the same time, the modulation control units 52 1 to 52 N and the phase control units 56 1 to 56 N are radiated from the array antenna 60 by causing the signal generators 42 1 to 42 N to output the phase-adjusted transmission signals. The propagation direction of the beam can be controlled.

 図3は、フェーズドアレイアンテナとして機能するアレイアンテナ60の動作状態を概略的に示す図である。図3に示されるように、アレイアンテナ60は、送信信号(送信波)の等位相面に垂直な方向に伝搬するビームを形成することができる。ここで、前述のとおり、信号伝送路C~Cの配線長は等長であるとは限らず、信号伝送路C~Cの電気長も等長であるとは限らない。たとえば、i番目の信号伝送路Cの電気長とj番目の信号伝送路Cの電気長とが等長ではない場合には、スレーブモジュール30,30にそれぞれ入力される2本の基準信号RCの間に、当該電気長の差に起因した位相ずれが発生する。この位相ずれは、信号生成器42,42内のPLL回路によって逓倍され、アンテナ素子61,61から出力される送信信号間の位相差を生じさせてビーム形状を劣化させるおそれがある。 FIG. 3 schematically shows an operating state of array antenna 60 functioning as a phased array antenna. As shown in FIG. 3, the array antenna 60 can form a beam propagating in a direction perpendicular to the equal phase plane of the transmission signal (transmission wave). Here, as described above, the wiring length of the signal transmission lines C 1 ~ C N is not necessarily equal length, not necessarily the electrical length of the signal transmission line C 1 ~ C N is also equal in length. For example, when the electrical length of the i-th signal transmission path C i and the electrical length of the j-th signal transmission path C j are not equal, two of the two input to the slave modules 30 i and 30 j , respectively. Between the reference signal RC, a phase shift occurs due to the difference in electrical length. The phase shift is multiplied by the PLL circuit in the signal generators 42 i and 42 j , and may cause a phase difference between the transmission signals output from the antenna elements 61 i and 61 j to deteriorate the beam shape. .

 本実施の形態のレーダ装置1は、一組のアンテナ素子61,61から出力された送信信号間の位相差を検出する位相差検出機能と、当該検出された位相差を基に信号生成器42,42の出力位相の誤差を補正する位相誤差補正機能とを有している。位相差検出のための動作モードとしては、「測距モード」、「送信モード」および「受信モード」が組み込まれている。 The radar device 1 of this embodiment generates a signal based on the phase difference detection function of detecting the phase difference between the transmission signals output from the pair of antenna elements 61 i and 61 j and the detected phase difference. And a phase error correction function of correcting the error of the output phase of the units 42 i and 42 j . As an operation mode for phase difference detection, "ranging mode", "transmission mode" and "reception mode" are incorporated.

 測距モードを指定する動作命令が信号処理回路50に入力されたとき、送信制御部53は、スイッチ回路43をオン動作にする切替制御信号を出力する。同時に、変調制御部52は、周波数変調された測距信号を生成させる変調制御信号MCを信号生成器42に供給する。また位相差算出部54は動作しないように制御される。このとき、アンテナ素子61は、信号生成器42からスイッチ回路43およびサーキュレータ44を介して入力された測距信号の送信波を、ターゲットTgtに向けて放射する。 When an operation command for specifying a distance measurement mode is input to the signal processing circuit 50 n , the transmission control unit 53 n outputs a switching control signal for turning on the switch circuit 43 n . At the same time, the modulation control unit 52 n supplies to the signal generator 42 n a modulation control signal MC n that generates a frequency modulated ranging signal. Further, the phase difference calculation unit 54 n is controlled not to operate. At this time, the antenna element 61 n radiates the transmission wave of the distance measurement signal input from the signal generator 42 n via the switch circuit 43 n and the circulator 44 n toward the target Tgt.

 その後、送受信回路40は、ターゲットTgtから当該測距信号に対応する反射波を受信する。この反射波は、サーキュレータ44を介してミキサ45に伝達される。ミキサ45は、当該反射波を示す受信信号と信号生成器42から出力されたローカル信号(測距信号の一部)とを混合してアナログビート信号を生成する。ADC46は、そのアナログビート信号をディジタル形式のビート信号に変換し、当該ビート信号を信号処理回路50に供給する。測距部55は、ビート信号に対して高速フーリエ変換(FFT)などの周波数解析を実行して当該ビート信号の周波数すなわちビート周波数fを検出する。更に、測距部55は、当該ビート周波数fに基づき、スレーブモジュール30とターゲットTgtとの間の測距信号の往復伝播時間τを計測値として算出することができる。 Thereafter, the transmitting and receiving circuit 40 n receives a reflected wave corresponding to the distance measuring signal from the target Tgt. The reflected wave is transmitted to the mixer 45 n through the circulator 44 n . The mixer 45 n mixes the received signal indicating the reflected wave with the local signal (a part of the distance measuring signal) output from the signal generator 42 n to generate an analog beat signal. The ADC 46 n converts the analog beat signal into a digital beat signal, and supplies the beat signal to the signal processing circuit 50 n . The distance measuring unit 55 n performs frequency analysis such as fast Fourier transform (FFT) on the beat signal to detect the frequency of the beat signal, that is, the beat frequency f b . Further, based on the beat frequency f b , the distance measuring unit 55 n can calculate the round-trip propagation time τ of the distance measurement signal between the slave module 30 n and the target Tgt as a measurement value.

 図4は、送信信号(FMCW信号)の送信周波数Ftと受信信号の周波数Frとの間の関係を概略的に示すグラフである。図4の例では、変調帯域幅BWにおいて変調周期Tで直線状に上昇することを繰り返す送信周波数Ftが示されている。受信信号は、往復伝播時間である遅延時間τだけ遅れた後に観測される。図4の例の場合、遅延時間τは、次式(1)に従って算出可能である。

Figure JPOXMLDOC01-appb-I000001
FIG. 4 is a graph schematically showing the relationship between the transmission frequency Ft of the transmission signal (FMCW signal) and the frequency Fr of the reception signal. In the example of FIG. 4, the transmission frequency Ft which repeats rising linearly with the modulation period T in the modulation bandwidth BW is shown. The received signal is observed after being delayed by a delay time τ which is a round-trip propagation time. In the case of the example of FIG. 4, the delay time τ can be calculated according to the following equation (1).
Figure JPOXMLDOC01-appb-I000001

 測距部55は、当該計測値を示す計測データをマスタモジュール20に転送する。動作制御回路23は、測距部55から転送された計測データを、データ記憶部28の第n記憶領域28に記憶させる。 The distance measuring unit 55 n transfers measurement data indicating the measurement value to the master module 20. The operation control circuit 23 stores the measurement data transferred from the distance measuring unit 55 n in the n-th storage area 28 n of the data storage unit 28.

 一方、送信モードを指定する動作命令が信号処理回路50に入力されたときは、送信制御部53は、スイッチ回路43をオン動作にする切替制御信号を出力する。同時に、変調制御部52は、周波数無変調信号を生成させる変調制御信号MCを信号生成器42に供給する。また位相差算出部54および測距部55は動作しないように制御される。このとき、アンテナ素子61は、信号生成器42からスイッチ回路43およびサーキュレータ44を介して入力された周波数無変調信号の送信波を、ターゲットTgtに向けて放射する。 On the other hand, when an operation command specifying a transmission mode is input to the signal processing circuit 50 n , the transmission control unit 53 n outputs a switching control signal to turn on the switch circuit 43 n . At the same time, the modulation control unit 52 n supplies a modulation control signal MC n for generating a frequency non-modulated signal to the signal generator 42 n . The phase difference calculating unit 54 n and the distance measuring unit 55 n are controlled not to operate. At this time, the antenna element 61 n radiates the transmission wave of the frequency non-modulated signal input from the signal generator 42 n through the switch circuit 43 n and the circulator 44 n toward the target Tgt.

 他方、受信モードを指定する動作命令が信号処理回路50に入力されたときは、変調制御部52は、周波数無変調のローカル信号を生成させる変調制御信号MCを信号生成器42に供給する。同時に、送信制御部53は、スイッチ回路43をオフ動作にする切替制御信号を出力することにより、信号生成器42とアンテナ素子61との間の信号経路を切断させる。また測距部55は動作しないように制御される。 On the other hand, when an operation command specifying the reception mode is input to the signal processing circuit 50 n , the modulation control unit 52 n sends the modulation control signal MC n for generating a non-modulated local signal to the signal generator 42 n . Supply. At the same time, the transmission control unit 53 n disconnects the signal path between the signal generator 42 n and the antenna element 61 n by outputting a switching control signal to turn off the switch circuit 43 n . Further, the distance measuring unit 55 n is controlled not to operate.

 このとき、受信モードで動作するスレーブモジュール30と対をなす他のスレーブモジュール30が送信モードで動作しているので、他のスレーブモジュール30から送信された周波数無変調信号に対応する反射波がターゲットTgtからスレーブモジュール30に伝播する。送受信回路40では、ミキサ45は、アンテナ素子61およびサーキュレータ44を介して伝達された受信信号を入力とし、この受信信号と信号生成器42から出力されたローカル信号とを混合してアナログビート信号を生成する。ADC46は、そのアナログビート信号をディジタル形式のビート信号に変換し、当該ビート信号を位相差算出部54に供給する。 At this time, since the other slave modules 30 i constituting the slave modules 30 n and pair operating in the receive mode is operating in transmit mode, corresponding to the frequency unmodulated signal transmitted from the other slave modules 30 i reflected A wave propagates from the target Tgt to the slave module 30 n . In the transmitting / receiving circuit 40 n , the mixer 45 n receives the received signal transmitted through the antenna element 61 n and the circulator 44 n as input, and mixes this received signal with the local signal output from the signal generator 42 n. Generate an analog beat signal. The ADC 46 n converts the analog beat signal into a beat signal in digital form, and supplies the beat signal to the phase difference calculating unit 54 n .

 位相差算出部54は、データ記憶部28から得た計測データとADC46から出力されたビート信号とに基づき、一組のアンテナ素子61,61から出力された測距信号間の位相差を算出することができる。位相制御部56は、当該算出された位相差に基づき、信号生成器42内の位相調整回路(可変移相器)を制御して信号生成器42の出力位相の誤差を補正させることができる。 The phase difference calculation unit 54 n determines the position between the distance measurement signals output from the pair of antenna elements 61 i and 61 n based on the measurement data obtained from the data storage unit 28 and the beat signal output from the ADC 46 n. The phase difference can be calculated. The phase control unit 56 n controls the phase adjustment circuit (variable phase shifter) in the signal generator 42 n to correct the error of the output phase of the signal generator 42 n based on the calculated phase difference. Can.

 上記した信号処理回路50のハードウェア構成は、たとえば、DSP,ASICまたはFPGAなどの半導体集積回路を有するプロセッサで実現されればよい。あるいは、信号処理回路50のハードウェア構成は、メモリから読み出されたソフトウェアまたはファームウェアのプログラムコードを実行する、CPUまたはGPUなどの演算装置を含むプロセッサで実現されてもよい。前記半導体集積回路と前記演算装置との組み合わせを有するプロセッサで信号処理回路50のハードウェア構成を実現することも可能である。更には、複数個のプロセッサで信号処理回路50のハードウェア構成が実現されてもよい。 The hardware configuration of the signal processing circuit 50 n described above may be realized by, for example, a processor having a semiconductor integrated circuit such as a DSP, an ASIC, or an FPGA. Alternatively, the hardware configuration of the signal processing circuit 50 n may be realized by a processor including an arithmetic device such as a CPU or a GPU that executes program code of software or firmware read from a memory. It is also possible to realize the hardware configuration of the signal processing circuit 50 n by a processor having a combination of the semiconductor integrated circuit and the arithmetic device. Furthermore, the hardware configuration of the signal processing circuit 50 n may be realized by a plurality of processors.

 以下、図5を参照しつつ、上記レーダ装置1における位相差検出および位相誤差補正の詳細について説明する。図5は、実施の形態1に係る動作制御処理の手順の一例を概略的に示すフローチャートである。図5に示される動作制御処理は、動作制御回路23によって実行される。 The details of phase difference detection and phase error correction in the radar device 1 will be described below with reference to FIG. FIG. 5 is a flowchart schematically showing an example of the procedure of the operation control process according to the first embodiment. The operation control process shown in FIG. 5 is executed by the operation control circuit 23.

 まず、動作制御回路23は、スレーブモジュール30~30の組み合わせの中から一組のスレーブモジュール30,30を選択する(ステップST10)。以下、一方のスレーブモジュール30を第1のスレーブモジュール30と呼び、他方のスレーブモジュール30を第2のスレーブモジュール30と呼ぶこととする。 First, the operation control circuit 23 selects one set of slave modules 30 i and 30 j from the combinations of slave modules 30 1 to 30 N (step ST 10). Hereinafter, one of the slave modules 30 i is referred to as a first slave module 30 i, and that the other slave module 30 j is referred to as a second slave module 30 j.

 次に、動作制御回路23は、測距モードを指定する動作命令を第1のスレーブモジュール30に供給することによって、第1のスレーブモジュール30を測距モード(第1の測距モード)で動作させる(ステップST11)。このとき、第1のスレーブモジュール30では、測距部55は、ターゲットTgtとの距離に対応する遅延時間(往復伝播時間)τを計測値として算出し、その計測値を示す計測データをマスタモジュール20に転送する。動作制御回路23は、測距部55から転送された計測データを第i記憶領域28に格納する(ステップST12)。 Next, the operation control circuit 23, by supplying an operation command that specifies the distance measurement mode in the first slave module 30 i, the first slave module 30 i ranging mode (first distance measurement mode) To operate (step ST11). At this time, the first slave module 30 i, the distance measuring unit 55 i is a delay time corresponding to the distance between the target Tgt (RTT) and tau 1 is calculated as the measurement value, the measurement data indicating the measured value Are transferred to the master module 20. The operation control circuit 23 stores the measurement data transferred from the distance measuring unit 55i in the i- th storage area i (step ST12).

 次に、動作制御回路23は、測距モードを指定する動作命令を第2のスレーブモジュール30に供給することによって、第2のスレーブモジュール30を測距モード(第2の測距モード)で動作させる(ステップST13)。このとき、第2のスレーブモジュール30では、測距部55は、ターゲットTgtとの距離に対応する遅延時間(往復伝播時間)τを計測値として算出し、その計測値を示す計測データをマスタモジュール20に転送する。動作制御回路23は、測距部55から転送された計測データを第j記憶領域28に格納する(ステップST14)。 Next, the operation control circuit 23 supplies an operation command for designating the distance measurement mode to the second slave module 30 j , whereby the distance measurement mode (second distance measurement mode) of the second slave module 30 j is obtained. To operate (step ST13). At this time, in the second slave module 30 j , the distance measuring unit 55 j calculates a delay time (round-trip propagation time) τ 2 corresponding to the distance from the target Tgt as a measurement value, and measurement data indicating the measurement value Are transferred to the master module 20. The operation control circuit 23 stores the measurement data transferred from the distance measuring unit 55 j to the j memory area 28 j (step ST14).

 その後、動作制御回路23は、送信モードを指定する動作命令を第1のスレーブモジュール30に供給し、かつ受信モードを指定する動作命令を第2のスレーブモジュール30に供給することによって、第1のスレーブモジュール30を送信モードで動作させ、かつ第2のスレーブモジュール30を受信モードで動作させる(ステップST15)。 Thereafter, the operation control circuit 23, by supplying an operation command that specifies the transmission mode is supplied to the first slave module 30 i, and an operation command that specifies the receive mode to the second slave module 30 j, the 1 of the slave module 30 i is operating in transmission mode and to operate the second slave module 30 j in the receive mode (step ST15).

 このとき、送信モードで動作する第1のスレーブモジュール30は、第2のスレーブモジュール30と対応する送信回路として動作する。第1のスレーブモジュール30は、送信周波数fcw1を有する周波数無変調の送信信号STX1をターゲットTgtに向けて送信する。送信信号STX1は、ターゲットTgtで反射された後に第2のスレーブモジュール30に伝播する。送信信号STX1は、たとえば、次式(2)で表される。

Figure JPOXMLDOC01-appb-I000002
 ここで、Aは信号振幅、tは時間、φは位相状態値である。 At this time, the first slave module 30 i which operate in transmission mode, operates as a transmission circuit corresponding to the second slave module 30 j. First slave module 30 i transmits the transmission signal S TX1 frequency unmodulated having transmitting frequencies f cw1 be transmitted to the target Tgt. The transmission signal S TX1 propagates to the second slave module 30 j after being reflected at the target Tgt. Transmission signal S TX1 is represented, for example, by the following equation (2).
Figure JPOXMLDOC01-appb-I000002
Where A 0 is the signal amplitude, t is time, and φ 1 is the phase state value.

 一方、受信モードで動作する第2のスレーブモジュール30は、第1のスレーブモジュール30と対応する受信回路として動作する。送受信回路40では、ミキサ45は、アンテナ素子61およびサーキュレータ44を介して伝達された受信信号SRX2を入力とし、この受信信号SRX2と、信号生成器42から出力された周波数無変調のローカル信号SLO(周波数:fcw2)とを混合してアナログビート信号を生成する。ADC46は、そのアナログビート信号をディジタル形式のビート信号Sbcw2に変換し、ビート信号Sbcw2を位相差算出部54に供給する。ローカル信号SLOは、たとえば、次式(3)で表される。

Figure JPOXMLDOC01-appb-I000003
 ここで、Bは信号振幅、φは位相状態値である。 On the other hand, the second slave module 30 j operating in the reception mode operates as a reception circuit corresponding to the first slave module 30 i . In the transmission / reception circuit 40 j , the mixer 45 j receives the reception signal S RX2 transmitted via the antenna element 61 j and the circulator 44 j , and the reception signal S RX2 and the frequency output from the signal generator 42 j The unmodulated local signal S LO (frequency: f cw2 ) is mixed to generate an analog beat signal. The ADC 46 j converts the analog beat signal into a beat signal S bcw 2 in digital form, and supplies the beat signal S bcw 2 to the phase difference calculation unit 54 j . Local signal S LO is expressed, for example, by the following equation (3).
Figure JPOXMLDOC01-appb-I000003
Here, B 0 is a signal amplitude, and φ 2 is a phase state value.

 また、受信信号SRX2は、たとえば、次式(4)で表される。

Figure JPOXMLDOC01-appb-I000004
 ここで、Aは信号振幅である。 Further, the reception signal S RX2 is represented by, for example, the following equation (4).
Figure JPOXMLDOC01-appb-I000004
Here, A 1 is a signal amplitude.

 ビート信号Sbcw2は、たとえば、次式(5)で表される。

Figure JPOXMLDOC01-appb-I000005
Beat signal S bcw2 is represented by following Formula (5), for example.
Figure JPOXMLDOC01-appb-I000005

 更に、位相差算出部54は、ステップST11,ST13で算出された計測値τ,τをデータ記憶部28から取得し、計測値τ,τとビート信号Sbcw2とに基づき、アンテナ素子61,61から出力された測距信号間の位相差Δφ(=φ-φ)を算出する。 Further, the phase difference calculation unit 54 j obtains step ST11, ST13 measurements tau 1 calculated in the tau 2 from the data storage unit 28, the measurement value tau 1, based on the tau 2 and the beat signal S Bcw2, The phase difference Δφ (= φ 2 −φ 1 ) between the distance measurement signals output from the antenna elements 61 i and 61 j is calculated.

 ここで、上式(5)は、次式(6)に変形可能である。

Figure JPOXMLDOC01-appb-I000006
Here, the above equation (5) can be transformed into the following equation (6).
Figure JPOXMLDOC01-appb-I000006

 送信周波数fcw1とローカル信号SLOの周波数fcw2とが一致しない場合には、ビート信号Sbcw2は、図6Aに例示されるような交流電圧波形を示す。たとえば、位相差算出部54は、ビート信号Sbcw2の電圧波形の最大値および最小値を検出し、これら最大値と最小値との差(ピーク間電圧)からビート信号Sbcw2の信号振幅Aを算出することができる。また、位相差算出部54は、ビート信号Sbcw2の直流成分Dbcw2を検出することができる。直流成分Dbcw2は、図6Bに例示されるような直流電圧波形を示す。 When the frequency f cw2 transmission frequency f cw1 and the local signal S LO do not match, the beat signal S Bcw2 shows AC voltage waveform as illustrated in Figure 6A. For example, phase difference calculation unit 54 j detects the maximum value and the minimum value of the voltage waveform of beat signal S bcw 2 , and the difference between the maximum value and the minimum value (peak-to-peak voltage) determines the signal amplitude A of beat signal S bcw 2. 1 B 0 can be calculated. Also, the phase difference calculation unit 54 j can detect the DC component D bcw2 of the beat signal S bcw2 . The direct current component D bcw2 shows a direct current voltage waveform as illustrated in FIG. 6B.

 直流成分Dbcw2を表す式は、上式(5)においてfcw1=fcw2とすることで導出できる。よって、直流成分Dbcw2に対する位相差Δφは、たとえば、次式(7)で表される。

Figure JPOXMLDOC01-appb-I000007
 ここで、α=A×Bである。 The equation representing the DC component D bcw2 can be derived by setting f cw1 = f cw2 in the above equation (5). Therefore, phase difference Δφ with respect to direct-current component D bcw2 is represented by, for example, the following equation (7).
Figure JPOXMLDOC01-appb-I000007
Here, α = A 1 × B 0 .

 位相差算出部54は、式(7)に基づいて位相差Δφを算出することができる。 The phase difference calculating unit 54 j can calculate the phase difference Δφ based on the equation (7).

 上記ステップST15の実行後、動作制御回路23は、位相制御部56を制御して、第1のスレーブモジュール30内の信号生成器42の出力位相と、第2のスレーブモジュール30内の信号生成器42の出力位相との間の誤差を補正させる(ステップST16)。具体的には、位相制御部56は、当該算出された位相差Δφに基づき、信号生成器42内の位相調整回路(可変移相器)を制御することで、信号生成器42の出力位相に対する、信号生成器42の出力位相の誤差を補正することができる。 After execution of step ST15, the operation control circuit 23 controls the phase controller 56 j, and the output phase of the first slave module 30 i signal generator 42 i in the second slave module 30 j The error between the signal generator 42 j and the output phase of the signal generator 42 j is corrected (step ST16). Specifically, the phase control unit 56 j controls the phase adjustment circuit (variable phase shifter) in the signal generator 42 j based on the calculated phase difference Δφ to obtain the signal generator 42 i . An error in the output phase of the signal generator 42 j with respect to the output phase can be corrected.

 その後、動作制御回路23は、スレーブモジュール30~30の中からすべての組が選択されたか否かを判定する(ステップST17)。すべての組が選択されていない場合は(ステップST17のNO)、動作制御回路23は新たな組を選択し(ステップST10)、この新たな組についてステップST11~ST16を実行する。一方、すべての組が選択されている場合は(ステップST17のYES)、動作制御回路23は、動作制御処理を終了する。 Thereafter, the operation control circuit 23 determines whether all pairs among the slave modules 30 1 ~ 30 N is selected (step ST17). If all sets have not been selected (NO in step ST17), the operation control circuit 23 selects a new set (step ST10), and executes steps ST11 to ST16 for the new set. On the other hand, if all sets have been selected (YES in step ST17), the operation control circuit 23 ends the operation control process.

 ステップST10でスレーブモジュールの組を選択する方法としては、たとえば、第1のスレーブモジュール30(i=1)を基準とし、第1のスレーブモジュール30と対をなす第2のスレーブモジュール30,…,30を順番に選択する方法を採用すればよい。スレーブモジュールの組が(30,30)で表されるとき、(30,30),(30,30),…,(30,30)の順に組を選択することが可能である。 As a method of selecting a set of slave modules in step ST10, for example, a second slave module 30 2 which makes a pair with the first slave module 301 with reference to the first slave module 30 1 (i = 1). , ..., 30 N may be selected in order. When a set of slave modules is represented by (30 i , 30 j ), select the set in the order of (30 1 , 30 2 ), (30 1 , 30 3 ), ..., (30 1 , 30 N ) Is possible.

 以上に説明したように、実施の形態1によれば、第1および第2のスレーブモジュール30,30は測距モードで動作することにより、第1および第2の計測値τ,τをそれぞれ計測する。その後、第1のスレーブモジュール30が送信モードで動作すると同時に、第2のスレーブモジュール30が受信モードで動作してビート信号Sbcw2を生成する。そして、第2のスレーブモジュール30内の位相差算出部54は、計測値τ,τとビート信号Sbcw2とに基づき、アンテナ素子61,61から出力された測距信号間の位相差Δφを算出する。したがって、本実施の形態のレーダ装置1は、複数のアンテナ素子61~61について複数の信号生成器42~42を有しているにもかかわらず、これらアンテナ素子61~61から出力された測距信号間の位相差を高精度に算出することができる。たとえ、スレーブモジュール30~30が分散して配置されている場合でも、測距信号間の位相差の高精度な算出が可能である。よって、本実施の形態の位相差検出回路は、スレーブモジュール30~30における信号生成器42~42の出力位相を高い精度で互いに同期させることができる。 As described above, according to the first embodiment, the first and second slave modules 30 i and 30 j operate in the ranging mode to obtain the first and second measured values τ 1 and τ Measure 2 respectively. Then, at the same time when the first slave module 30 i is operating in transmission mode, the second slave module 30 j generates a beat signal S Bcw2 operating in receive mode. Then, the phase difference calculation unit 54 j in the second slave module 30 j determines between the distance measurement signals output from the antenna elements 61 i and 61 j based on the measurement values τ 1 and τ 2 and the beat signal S bcw 2. Phase difference .DELTA..phi. Therefore, although the radar apparatus 1 according to the present embodiment includes the plurality of signal generators 42 1 to 42 N for the plurality of antenna elements 61 1 to 61 N , these antenna elements 61 1 to 61 N It is possible to calculate the phase difference between the distance measurement signals output from the high accuracy. Even if the slave modules 30 1 to 30 N are arranged in a distributed manner, it is possible to calculate the phase difference between ranging signals with high accuracy. Therefore, the phase difference detection circuit according to the present embodiment can synchronize the output phases of the signal generators 42 1 to 42 N in the slave modules 30 1 to 30 N with high accuracy.

 なお、上記した位相差検出および位相誤差補正は、レーダ装置1の出荷前に実行されてもよいし、あるいは、予め設定されたスケジュールで定期的に、もしくは、指定されたタイミングで実行されてもよい。 The above-described phase difference detection and phase error correction may be performed before shipment of the radar device 1, or may be performed periodically according to a preset schedule or at a designated timing. Good.

実施の形態2.
 次に、本発明に係る実施の形態2について説明する。上記のとおり、実施の形態1によれば、2台のスレーブモジュール30,30がアンテナ素子61,61から出力された測距信号間の位相差を検出する。これに対し、実施の形態2は、3台のスレーブモジュールが連携して位相差を検出する。
Second Embodiment
Next, Embodiment 2 according to the present invention will be described. As described above, according to the first embodiment, two slave modules 30 i and 30 j detect the phase difference between the ranging signals output from the antenna elements 61 i and 61 j . On the other hand, in the second embodiment, three slave modules cooperate to detect a phase difference.

 図7は、本発明に係る実施の形態2であるレーダ装置2の概略構成を示す図である。図7に示されるように、このレーダ装置2は、N個のアンテナ素子61~61(Nは3以上の整数)を含むアレイアンテナ60と、これらN個のアンテナ素子61~61にそれぞれ接続されたN個のスレーブモジュール31~31と、これらスレーブモジュール31~31の動作を個別に制御するマスタモジュール21とを備えて構成されている。スレーブモジュール31~31の各々は、レーダモジュールとして機能することができるレーダ回路である。 FIG. 7 is a view showing a schematic configuration of a radar device 2 according to a second embodiment of the present invention. As shown in FIG. 7, the radar device 2 includes an array antenna 60 including N antenna elements 61 1 to 61 N (N is an integer of 3 or more), and the N antenna elements 61 1 to 61 N. is configured by including a N number of slave modules 31 1 ~ 31 N connected respectively, a master module 21 for individually controlling the operation of the slave modules 31 1 ~ 31 N to. Each of the slave modules 31 1 to 31 N is a radar circuit that can function as a radar module.

 本実施の形態のレーダ装置2には、一組のアンテナ素子61,61(i,jは、1~N-1の範囲内の整数)から出力された送信信号間の位相差を検出する機能を有する位相差検出回路が組み込まれている。本実施の形態の位相差検出回路は、たとえば、スレーブモジュール31~31とマスタモジュール21とによって構成可能である。 The radar apparatus 2 according to the present embodiment detects a phase difference between transmission signals output from a pair of antenna elements 61 i and 61 j (i and j are integers in the range of 1 to N−1). Phase difference detection circuit having the function of The phase difference detection circuit of the present embodiment can be configured by, for example, slave modules 31 1 to 31 N and master module 21.

 マスタモジュール21は、基準信号RSを信号伝送路C~Cを介してスレーブモジュール31~31にそれぞれ供給する基準信号発生器22と、スレーブモジュール31~31の動作を個別に制御する制御回路24と、スレーブモジュール31~31で得られた計測データを格納するデータ記憶部28とを有する。 The master module 21 individually operates the reference signal generator 22 for supplying the reference signal RS to the slave modules 31 1 to 31 N through the signal transmission paths C 1 to C N , and the slave modules 31 1 to 31 N. It has the control circuit 24 to control, and the data storage part 28 which stores the measurement data obtained by the slave modules 31 1 to 31 N.

 制御回路24は、動作制御部25,位相差算出部26および位相制御部27を備えて構成されている。制御回路24のハードウェア構成は、たとえば、DSP,ASICまたはFPGAなどの半導体集積回路を有するプロセッサで実現されればよい。あるいは、制御回路24のハードウェア構成は、メモリから読み出されたソフトウェアまたはファームウェアのプログラムコードを実行する、CPUまたはGPUなどの演算装置を含むプロセッサで実現されてもよい。前記半導体集積回路と前記演算装置との組み合わせを有するプロセッサで制御回路24のハードウェア構成を実現することも可能である。更には、互いに連携して動作する複数個のプロセッサで制御回路24のハードウェア構成が実現されてもよい。 The control circuit 24 is configured to include an operation control unit 25, a phase difference calculation unit 26, and a phase control unit 27. The hardware configuration of the control circuit 24 may be realized by, for example, a processor having a semiconductor integrated circuit such as a DSP, an ASIC, or an FPGA. Alternatively, the hardware configuration of the control circuit 24 may be realized by a processor including an arithmetic device such as a CPU or a GPU that executes program code of software or firmware read from a memory. It is also possible to realize the hardware configuration of the control circuit 24 with a processor having a combination of the semiconductor integrated circuit and the arithmetic device. Furthermore, the hardware configuration of the control circuit 24 may be realized by a plurality of processors operating in cooperation with one another.

 マスタモジュール21とスレーブモジュール31~31との間には、制御信号およびデータ信号を伝送する信号線群(図示せず)が設けられている。制御回路24は、動作命令を当該信号線群を介してスレーブモジュール31~31の各々に供給することができる。 Between the master module 21 and slave module 31 1 ~ 31 N, the signal line group for transmitting (not shown) is provided to control and data signals. The control circuit 24 can supply an operation command to each of the slave modules 31 1 to 31 N through the signal line group.

 動作制御部25は、スレーブモジュール31~31のいずれかから計測データを当該信号線群を介して取得し、当該計測データをデータ記憶部28に記憶させることができる。また、動作制御部25は、スレーブモジュール31~31N-1の動作順序を決定する機能と、スレーブモジュール31~31の各々の動作モードを指定する機能とを有する。 The operation control unit 25 can obtain measurement data from any of the slave modules 31 1 to 31 N via the signal line group, and can store the measurement data in the data storage unit 28. Further, the operation control unit 25 has a function of determining the operation order of the slave modules 31 1 to 31 N-1 and a function of designating an operation mode of each of the slave modules 31 1 to 31 N.

 位相差算出部26は、N番目のスレーブモジュール31から供給された移相量とデータ記憶部28から得た計測データとに基づき、一組のアンテナ素子61,61(i,jは、1~N-1の範囲内の整数)から出力された送信信号間の位相差を算出する。移相量の検出方法については、後述する。位相制御部27は、位相差算出部26で算出された位相差に基づき、スレーブモジュール31,31内の信号生成器42,42を制御してこれら信号生成器42,42の出力位相の誤差を補正させることができる。 The phase difference calculating unit 26 sets one of the antenna elements 61 i and 61 j (i, j is based on the phase shift amount supplied from the Nth slave module 31 N and the measurement data obtained from the data storage unit 28). , And an integer in the range of 1 to N−1) to calculate the phase difference between the transmission signals output. The method of detecting the amount of phase shift will be described later. The phase control unit 27 controls the signal generators 42 i and 42 j in the slave modules 31 i and 31 j based on the phase difference calculated by the phase difference calculation unit 26 to control these signal generators 42 i and 42 j. It is possible to correct the error of the output phase of

 次に、スレーブモジュール31~31の構成について説明する。本実施の形態では、スレーブモジュール31~31N-1は、同一の回路構成を有する。一方、N番目のスレーブモジュール31は、スレーブモジュール31~31N-1とは異なる回路構成を有している。 Next, the configuration of the slave modules 31 1 to 31 N will be described. In the present embodiment, the slave modules 31 1 to 31 N-1 have the same circuit configuration. On the other hand, the Nth slave module 31 N has a circuit configuration different from that of the slave modules 31 1 to 31 N−1 .

 N番目のスレーブモジュール31以外のm番目(mは、N以外の1~N-1の範囲内の整数)のスレーブモジュール31は、送受信回路41および信号処理回路51を含む。これら送受信回路41および信号処理回路51は、動作制御部25により指定された動作モード(「測距モード」,「通常送信モード」または「位相掃引送信モード」)で動作する。 The m-th (m is an integer in the range of 1 to N-1 other than N) slave modules 31 m other than the N-th slave module 31 N include a transmission / reception circuit 41 m and a signal processing circuit 51 m . These receiving circuit 41 m and the signal processing circuit 51 m operates in the operation mode designated by the operation control unit 25 ( "distance measurement mode", "normal transmission mode" or "phase sweep transmission mode").

 図7に示されるように、送受信回路41は、信号生成器42、サーキュレータ44、ミキサ45およびADC46を有して構成されている。信号生成器42,サーキュレータ44、ミキサ45およびADC46の構成は、実施の形態1における信号生成器42,サーキュレータ44、ミキサ45およびADC46の構成(図1)と同じである。また、信号処理回路51は、変調制御部52および測距部55を含む。これら変調制御部52および測距部55の構成は、実施の形態1における変調制御部52および測距部55の構成(図1)と同じである。なお、本実施の形態の計測部は、測距部55~55N-1によって構成可能である。 As shown in FIG. 7, the transmitting and receiving circuit 41 m is configured to include a signal generator 42 m , a circulator 44 m , a mixer 45 m and an ADC 46 m . The configurations of the signal generator 42 m , circulator 44 m , mixer 45 m and ADC 46 m are the same as the configurations of the signal generator 42 n , circulator 44 n , mixer 45 n and ADC 46 n in the first embodiment (FIG. 1). is there. Further, the signal processing circuit 51 m includes a modulation control unit 52 m and a distance measuring unit 55 m . Configuration of modulation control unit 52 m and the distance measuring unit 55 m is the same as that of the modulation control unit 52 n and the distance measuring unit 55 n (Fig. 1) in the first embodiment. The measurement unit of the present embodiment can be configured by distance measurement units 55 1 to 55 N−1 .

 一方、N番目のスレーブモジュール31は、送受信回路41および信号処理回路51を含む。これら送受信回路41および信号処理回路51は、動作制御部25により指定された動作モード(「測距モード」または「受信モード」)で動作する。図7の送受信回路41は、実施の形態1の送受信回路40(図1)と同一の構成を有する。また、図7の信号処理回路51の構成は、図1の位相差算出部54に代えて移相量検出部58を有する点を除いて、実施の形態1の信号処理回路50の構成と同じである。 On the other hand, N-th slave module 31 N includes a transceiver circuit 41 N and the signal processing circuit 51 N. These receiving circuit 41 N and the signal processing circuit 51 N operates in the operation mode designated by the operation control unit 25 ( "distance measurement mode" or "receive mode"). The transmission / reception circuit 41 N of FIG. 7 has the same configuration as the transmission / reception circuit 40 N (FIG. 1) of the first embodiment. The configuration of the signal processing circuit 51 N in FIG. 7, except that it has a phase shift amount detector 58 N in place of the phase difference calculation section 54 N of Figure 1, the signal processing circuit of the first embodiment 50 N It is the same as

 信号処理回路51(nは1~Nの範囲内の整数)のハードウェア構成は、たとえば、DSP,ASICまたはFPGAなどの半導体集積回路を有するプロセッサで実現されればよい。あるいは、信号処理回路51のハードウェア構成は、メモリから読み出されたソフトウェアまたはファームウェアのプログラムコードを実行する、CPUまたはGPUなどの演算装置を含むプロセッサで実現されてもよい。前記半導体集積回路と前記演算装置との組み合わせを有するプロセッサで信号処理回路51のハードウェア構成を実現することも可能である。更には、複数個のプロセッサで信号処理回路51のハードウェア構成が実現されてもよい。 The hardware configuration of the signal processing circuit 51 n (where n is an integer in the range of 1 to N) may be realized by a processor having a semiconductor integrated circuit such as a DSP, an ASIC or an FPGA. Alternatively, the hardware configuration of the signal processing circuit 51 n may be realized by a processor including an arithmetic device such as a CPU or a GPU that executes a program code of software or firmware read from a memory. It is also possible to realize the hardware configuration of the signal processing circuit 51 n by a processor having a combination of the semiconductor integrated circuit and the arithmetic device. Furthermore, the hardware configuration of the signal processing circuit 51 n may be realized by a plurality of processors.

 動作制御部25および位相制御部27は、スレーブモジュール31~31N-1における変調制御部52~52N-1および信号生成器42~42N-1の動作を個別に制御することで、アレイアンテナ60をフェーズドアレイアンテナとして機能させることができる。実施の形態1の場合と同様に、信号伝送路C~CN-1の配線長は等長であるとは限らず、信号伝送路C~CN-1の電気長も等長であるとは限らない。たとえば、i番目の信号伝送路Cの電気長とj番目の信号伝送路Cの電気長とが等長ではない場合には、スレーブモジュール31,31にそれぞれ入力される2本の基準信号RCの間に、当該電気長の差に起因した位相ずれが発生する。この位相ずれは、信号生成器42,42内のPLL回路によって逓倍され、アンテナ素子61,61から出力される送信信号間の位相差を生じさせてビーム形状を劣化させるおそれがある。 Operation control unit 25 and phase control unit 27 individually control the operations of modulation control units 52 1 to 52 N-1 and signal generators 42 1 to 42 N-1 in slave modules 31 1 to 31 N−1 . Thus, the array antenna 60 can function as a phased array antenna. As with the first embodiment, the wiring length of the signal transmission lines C 1 ~ C N-1 is not necessarily the same length, the electrical length of the signal transmission lines C 1 ~ C N-1 in isometry It does not have to be. For example, when the electrical length of the i-th signal transmission path C i and the electrical length of the j-th signal transmission path C j are not equal, two of the two input to the slave modules 31 i and 31 j , respectively. Between the reference signal RC, a phase shift occurs due to the difference in electrical length. The phase shift is multiplied by the PLL circuit in the signal generators 42 i and 42 j , and may cause a phase difference between the transmission signals output from the antenna elements 61 i and 61 j to deteriorate the beam shape. .

 本実施の形態のレーダ装置2は、一組のアンテナ素子61,61から出力された送信信号間の位相差を検出する位相差検出機能と、当該検出された位相差を基に信号生成器42,42の出力位相の誤差を補正する位相誤差補正機能とを有している。位相差検出のための動作モードとしては、「測距モード」、「通常送信モード」,「位相掃引送信モード」および「受信モード」が組み込まれている。 The radar device 2 of this embodiment generates a signal based on a phase difference detection function of detecting a phase difference between transmission signals output from a pair of antenna elements 61 i and 61 j , and the detected phase difference. And a phase error correction function of correcting the error of the output phase of the units 42 i and 42 j . As an operation mode for phase difference detection, a “ranging mode”, a “normal transmission mode”, a “phase sweep transmission mode” and a “reception mode” are incorporated.

 スレーブモジュール31~31のいずれかについて、測距モードを指定する動作命令が信号処理回路51(nは1~Nの範囲内の整数)に入力されたとき、変調制御部52は、周波数変調された測距信号を生成させる変調制御信号MCを信号生成器42に供給する。ここで、N番目のスレーブモジュール31では、送信制御部53が、スイッチ回路43をオン動作にする切替制御信号を出力する。アンテナ素子61は、信号生成器42からサーキュレータ44を介して入力された測距信号の送信波を、ターゲットTgtに向けて放射する。 When an operation command for specifying a distance measurement mode is input to the signal processing circuit 51 n (n is an integer in the range of 1 to N) for any of the slave modules 31 1 to 31 N , the modulation control unit 52 n A modulation control signal MC n for generating a frequency modulated ranging signal is supplied to a signal generator 42 n . Here, the N-th slave module 31 N, the transmission controller 53 N, and outputs a switching control signal to turn on the operation switch circuit 43 N. The antenna element 61 N radiates the transmission wave of the ranging signal input from the signal generator 42 N via the circulator 44 N toward the target Tgt.

 その後、送受信回路41は、ターゲットTgtから当該測距信号に対応する反射波を受信する。この反射波は、サーキュレータ44を介してミキサ45に伝達される。ミキサ45は、当該反射波を示す受信信号と信号生成器42から出力されたローカル信号とを混合してアナログビート信号を生成する。ADC46は、そのアナログビート信号をディジタル形式のビート信号に変換し、当該ビート信号を信号処理回路51の測距部55に供給する。 Thereafter, the transmission / reception circuit 41 n receives a reflected wave corresponding to the distance measurement signal from the target Tgt. The reflected wave is transmitted to the mixer 45 n through the circulator 44 n . The mixer 45 n mixes the received signal indicating the reflected wave with the local signal output from the signal generator 42 n to generate an analog beat signal. The ADC 46 n converts the analog beat signal into a beat signal in digital format, and supplies the beat signal to the distance measuring unit 55 n of the signal processing circuit 51 n .

 測距部55は、ビート信号に対して高速フーリエ変換(FFT)などの周波数解析を実行して当該ビート信号の周波数すなわちビート周波数fを検出する。更に、測距部55は、当該ビート周波数fに基づき、スレーブモジュール31とターゲットTgtとの間の測距信号の往復伝播時間τを計測値として算出することができる。そして、測距部55は、当該計測値を示す計測データをマスタモジュール21に転送する。動作制御部25は、測距部55から転送された計測データを、データ記憶部28の第n記憶領域28に記憶させる。 The distance measuring unit 55 n performs frequency analysis such as fast Fourier transform (FFT) on the beat signal to detect the frequency of the beat signal, that is, the beat frequency f b . Further, based on the beat frequency f b , the distance measuring unit 55 n can calculate the round-trip propagation time τ of the distance measurement signal between the slave module 31 n and the target Tgt as a measurement value. Then, the distance measuring unit 55 n transfers measurement data indicating the measurement value to the master module 21. The operation control unit 25 stores the measurement data transferred from the distance measuring unit 55 n in the n-th storage area 28 n of the data storage unit 28.

 一方、スレーブモジュール31~31N-1のいずれかについて、第1の送信モードである位相掃引送信モードを指定する動作命令が信号処理回路51(mは、1~N-1の範囲内の整数)に入力されたときは、変調制御部52は、周波数無変調信号を生成させると同時にその周波数無変調信号の位相を一定範囲内(たとえば0°~360°の範囲内)で掃引させる(すなわち時間とともに変化させる)変調制御信号MCを、信号生成器42に供給する。また測距部55は動作しないように制御される。このとき、アンテナ素子61は、信号生成器42からサーキュレータ44を介して入力された周波数無変調信号の送信波を、ターゲットTgtに向けて放射する。 On the other hand, for any of the slave modules 31 1 to 31 N−1 , an operation command specifying the phase sweep transmission mode which is the first transmission mode is the signal processing circuit 51 m (m is in the range of 1 to N−1. Modulation control section 52 m sweeps the phase of the frequency unmodulated signal within a predetermined range (for example, within the range of 0 ° to 360 °) while generating the frequency unmodulated signal. The modulation control signal MC m to be generated (ie, changed with time) is supplied to the signal generator 42 m . The distance measuring unit 55 m is controlled not to operate. At this time, the antenna element 61 m radiates the transmission wave of the frequency unmodulated signal input from the signal generator 42 m via the circulator 44 n toward the target Tgt.

 他方、スレーブモジュール31~31N-1のいずれかについて、第2の送信モードである通常送信モードを指定する動作命令が信号処理回路51(mは、1~N-1の範囲内の整数)に入力されたときは、変調制御部52は、周波数無変調信号を生成させる変調制御信号MCを信号生成器42に供給する。また測距部55は動作しないように制御される。このとき、アンテナ素子61は、信号生成器42からサーキュレータ44を介して入力された周波数無変調信号の送信波を、ターゲットTgtに向けて放射する。 On the other hand, for any of the slave modules 31 1 to 31 N−1 , an operation instruction for designating the normal transmission mode which is the second transmission mode is the signal processing circuit 51 m (m is in the range of 1 to N−1. when entered in an integer), the modulation controller 52 m supplies a modulated control signal MC m to produce a frequency unmodulated signal to the signal generator 42 m. The distance measuring unit 55 m is controlled not to operate. At this time, the antenna element 61 m radiates the transmission wave of the frequency unmodulated signal input from the signal generator 42 m via the circulator 44 n toward the target Tgt.

 N番目のスレーブモジュール31について、受信モードを指定する動作命令が信号処理回路51に入力されたときは、変調制御部52は、周波数無変調のローカル信号を生成させる変調制御信号MCを信号生成器42に供給する。同時に、送信制御部53は、スイッチ回路43をオフ動作にする切替制御信号を出力することにより、信号生成器42とアンテナ素子61との間の信号経路を切断させる。また測距部55は動作しないように制御される。 When an operation command specifying the reception mode is input to the signal processing circuit 51 N for the Nth slave module 31 N , the modulation control unit 52 N generates a modulation control signal MC N that generates a non-modulated local signal. and supplies the signal generator 42 N. At the same time, the transmission control unit 53 N by outputting a switching control signal to turn off the operation switch circuit 43 N, to disconnect the signal path between the signal generator 42 N and the antenna element 61 N. The distance measuring unit 55 N is controlled not to operate.

 このとき、受信モードで動作するスレーブモジュール31と対応する2台のスレーブモジュール31,31がそれぞれ位相掃引送信モードおよび通常送信モードで動作している。このため、一方のスレーブモジュール31からは、位相が掃引された周波数無変調信号(以下「位相掃引信号」という。)に対応する反射波がターゲットTgtからスレーブモジュール31に伝播し、同時に、他方のスレーブモジュール31からは、位相が掃引されない周波数無変調信号に対応する反射波がターゲットTgtからスレーブモジュール31に伝播する。よって、2台のスレーブモジュール31,31からターゲットTgtを経由して到来した2波の反射波が、アンテナ素子61で互いに重畳される。送受信回路41のミキサ45は、アンテナ素子61およびサーキュレータ44を介して伝達された受信信号を入力とし、この受信信号と信号生成器42から出力されたローカル信号とを混合してアナログビート信号を生成する。そして、ADC46は、そのアナログビート信号をディジタル形式のビート信号に変換し、当該ビート信号を移相量検出部58に出力する。 At this time, the slave module 31 N and the corresponding two slave modules 31 i, 31 j operating in the receive mode is respectively operating in phase sweep transmit mode and the normal transmission mode. Therefore, from one of the slave modules 31 i, the reflected wave having a phase corresponding to the swept frequency unmodulated signal (hereinafter referred to as "phase sweep signal".) Propagates from the target Tgt the slave module 31 N, at the same time, from the other slave module 31 j, the reflected wave corresponding to the frequency unmodulated signal whose phase is not swept propagates from the target Tgt the slave module 31 N. Therefore, the reflected waves of two waves that arrive from the two slave modules 31 i , 31 j via the target Tgt are superimposed on each other by the antenna element 61 N. The mixer 45 N of the transmitting and receiving circuit 41 N inputs the received signal transmitted via the antenna elements 61 N and the circulator 44 N, by mixing the local signal output from the reception signal and the signal generator 42 N and Generate an analog beat signal. Then, the ADC 46 N converts the analog beat signal into a beat signal in digital format, and outputs the beat signal to the phase shift amount detection unit 58 N.

 移相量検出部58は、入力されたビート信号の信号振幅を最大化させる位相掃引信号の移相量φcnt0を検出することができる。位相掃引送信モードで動作するスレーブモジュール31では、信号生成器42は、予め決められた掃引速度で送信信号の位相を変化させるので、2台のスレーブモジュール31,31からターゲットTgtを経由してスレーブモジュール31に到来した2波の反射波が互いに干渉する干渉状態は、信号生成器42における移相量の時間変化に応じて変化する。これにより、ビート信号の信号振幅も時間とともに変化する。たとえば、移相量検出部58は、入力されたビート信号の電力が最大化する時刻tを計測し、計測時刻tに対応する移相量φcnt0を得ることできる。移相量検出部58は、検出された移相量φcnt0を示すデータをマスタモジュール20に転送する。 Phase shift amount detector 58 N can detect a phase shift amount phi cnt0 phase sweep signal to maximize the signal amplitude of the input beat signal. The slave module 31 i which operate in phase sweep transmit mode, the signal generator 42 i, since changing the phase of the transmission signal at a predetermined sweep rate, the target Tgt from two slave modules 31 i, 31 j through to interfere interference condition reflected wave together two waves arriving to the slave module 31 N varies according to the time variation in the amount of phase shift in the signal generator 42 i. Thereby, the signal amplitude of the beat signal also changes with time. For example, the phase shift amount detector 58 N may be a power of the input beat signal measures the time t 0 to maximize, to obtain the phase shift amount phi cnt0 corresponding to the measurement time t 0. Phase shift amount detector 58 N transfers the data indicative of the detected phase shift amount phi cnt0 the master module 20.

 位相差算出部26は、移相量検出部58から転送された移相量φcnt0と、データ記憶部28から得た計測データとに基づき、アンテナ素子61,61から出力された測距信号間の位相差を算出することができる。位相制御部27は、当該算出された位相差に基づき、スレーブモジュール31,31内の信号生成器42,42の少なくとも一方を制御してこれら信号生成器42,42の出力位相間の誤差を補正させることができる。 The phase difference calculation unit 26 measures the output from the antenna elements 61 i and 61 j based on the phase shift amount φ cnt0 transferred from the phase shift amount detection unit 58 N and the measurement data obtained from the data storage unit 28. The phase difference between distance signals can be calculated. The phase control unit 27 controls at least one of the signal generators 42 i and 42 j in the slave modules 31 i and 31 j based on the calculated phase difference to output the outputs of these signal generators 42 i and 42 j . Errors between the phases can be corrected.

 以下、図8を参照しつつ、上記レーダ装置2における位相差検出および位相誤差補正の詳細について説明する。図8は、実施の形態2に係る制御処理の手順の一例を概略的に示すフローチャートである。図8に示される制御処理は、制御回路24によって実行される。 Hereinafter, the details of phase difference detection and phase error correction in the radar device 2 will be described with reference to FIG. FIG. 8 is a flowchart schematically showing an example of the procedure of control processing according to the second embodiment. The control process shown in FIG. 8 is performed by the control circuit 24.

 まず、動作制御部25は、スレーブモジュール31~31N-1の組み合わせの中から一組のスレーブモジュール31,31を選択する(ステップST20)。以下、一方のスレーブモジュール31を第1のスレーブモジュール31と呼び、他方のスレーブモジュール31を第2のスレーブモジュール31と呼び、スレーブモジュール31を第3のスレーブモジュール31と呼ぶこととする。 First, the operation control unit 25 selects one set of slave modules 31 i and 31 j from the combinations of slave modules 31 1 to 31 N-1 (step ST20). Hereinafter, one of the slave modules 31 i is referred to as a first slave module 31 i, the other slave module 31 j is called the second slave module 31 j, referred to as slave modules 31 N and the third slave module 31 N To be.

 次に、動作制御部25は、測距モードを指定する動作命令を第1のスレーブモジュール31に供給することによって、第1のスレーブモジュール31を測距モード(第1の測距モード)で動作させる(ステップST21)。このとき、第1のスレーブモジュール31では、測距部55は、ターゲットTgtとの距離に対応する遅延時間(往復伝播時間)τを計測値として算出し、その計測値を示す計測データをマスタモジュール21に転送する。動作制御部25は、測距部55から転送された計測データを第i記憶領域28に格納する(ステップST22)。 Next, the operation control unit 25 supplies an operation command specifying the distance measurement mode to the first slave module 31i , thereby setting the first slave module 31i in the distance measurement mode (first distance measurement mode). To operate (step ST21). At this time, the first slave module 31 i, the distance measuring unit 55 i is a delay time corresponding to the distance between the target Tgt (RTT) and tau 1 is calculated as the measurement value, the measurement data indicating the measured value Are transferred to the master module 21. The operation control unit 25 stores the measurement data transferred from the distance measuring unit 55i in the i- th storage area i (step ST22).

 次に、動作制御部25は、測距モードを指定する動作命令を第2のスレーブモジュール31に供給することによって、第2のスレーブモジュール31を測距モード(第2の測距モード)で動作させる(ステップST23)。このとき、第2のスレーブモジュール31では、測距部55は、ターゲットTgtとの距離に対応する遅延時間(往復伝播時間)τを計測値として算出し、その計測値を示す計測データをマスタモジュール21に転送する。動作制御部25は、測距部55から転送された計測データを第j記憶領域28に格納する(ステップST24)。 Next, the operation control unit 25 supplies an operation command for specifying a distance measurement mode to the second slave module 31 j , whereby the distance measurement mode (second distance measurement mode) of the second slave module 31 j is performed. To operate (step ST23). At this time, in the second slave module 31 j , the distance measuring unit 55 j calculates a delay time (round-trip propagation time) τ 2 corresponding to the distance to the target Tgt as a measurement value, and measurement data indicating the measurement value Are transferred to the master module 21. The operation control unit 25 stores the measurement data transferred from the distance measuring unit 55 j in the j-th storage area 28 j (step ST 24).

 その後、動作制御部25は、位相掃引送信モードを指定する動作命令を第1のスレーブモジュール31に供給し、通常送信モードを指定する動作命令を第2のスレーブモジュール31に供給し、かつ、受信モードを指定する動作命令を第3のスレーブモジュール31に供給することによって、第1のスレーブモジュール31を位相掃引送信モードで動作させ、第2のスレーブモジュール31を通常送信モードで動作させ、かつ、第3のスレーブモジュール31を受信モードで動作させる(ステップST25)。 Thereafter, the operation control unit 25 supplies an operation instruction specifying the phase sweep transmission mode to the first slave module 31i , supplies an operation instruction specifying the normal transmission mode to the second slave module 31j , and , by supplying an operation command that specifies the receive mode to the third slave module 31 N, the first slave module 31 i is operated in the phase sweep transmit mode, the second slave module 31 j in the normal transmission mode The third slave module 31 N is operated in the reception mode (step ST 25).

 このとき、位相掃引送信モードで動作する第1のスレーブモジュール31は、第3のスレーブモジュール31と対応する送信回路として動作する。第1のスレーブモジュール31は、所定の送信周波数fcwを有する周波数無変調の位相掃引信号STX1をターゲットTgtに向けて送信する。位相掃引信号STX1は、ターゲットTgtで反射された後に第3のスレーブモジュール31に伝播する。位相掃引信号STX1は、たとえば、次式(8)で表される。

Figure JPOXMLDOC01-appb-I000008
 ここで、Aは信号振幅、tは時間、φは位相状態値の初期値、φcntは所定の掃引速度で変化させられる移相量である。 At this time, the first slave module 31 i which operate in phase sweep transmit mode, operates as a transmission circuit corresponding to the third slave module 31 N. First slave module 31 i has a phase sweep signal S TX1 frequency unmodulated having a predetermined transmission frequency f cw transmitted toward the target Tgt. The phase sweep signal S TX1 propagates to the third slave module 31 N after being reflected by the target Tgt. Phase sweep signal S TX1 is represented, for example, by the following equation (8).
Figure JPOXMLDOC01-appb-I000008
Here, A 0 is a signal amplitude, t is time, φ 1 is an initial value of the phase state value, and φ cnt is a phase shift amount to be changed at a predetermined sweep speed.

 通常送信モードで動作する第2のスレーブモジュール31は、第3のスレーブモジュール31と対応する送信回路として動作する。第2のスレーブモジュール31は、所定の送信周波数fcwを有する周波数無変調の送信信号STX2をターゲットTgtに向けて送信する。送信信号STX2は、ターゲットTgtで反射された後に第3のスレーブモジュール31に伝播する。送信信号STX2は、たとえば、次式(9)で表される。

Figure JPOXMLDOC01-appb-I000009
 ここで、Bは信号振幅、φは位相状態値である。 Second slave module 31 j which operates in the normal transmission mode, operates as a transmission circuit corresponding to the third slave module 31 N. The second slave module 31 j transmits the frequency non-modulated transmission signal S TX2 having the predetermined transmission frequency f cw toward the target Tgt. The transmission signal S TX2 propagates to the third slave module 31 N after being reflected by the target Tgt. Transmission signal S TX2 is expressed, for example, by the following equation (9).
Figure JPOXMLDOC01-appb-I000009
Here, B 0 is a signal amplitude, and φ 2 is a phase state value.

 一方、受信モードで動作する第3のスレーブモジュール31は、第1および第2のスレーブモジュール31,31と対応する受信回路として動作する。送受信回路41では、ミキサ45は、アンテナ素子61およびサーキュレータ44を介して伝達された受信信号SRX3を入力とし、この受信信号SRX3と、信号生成器42から出力された周波数無変調のローカル信号SLO(周波数:fLO)とを混合してアナログビート信号を生成する。ADC46は、そのアナログビート信号をディジタル形式のビート信号Sbcw3に変換し、ビート信号Sbcw3を移相量検出部58に供給する。ローカル信号SLOは、たとえば、次式(10)で表される。

Figure JPOXMLDOC01-appb-I000010
 ここで、Cは信号振幅である。 On the other hand, the third slave module 31 N operating in the receive mode, operates as a receiving circuit corresponding to the first and second slave module 31 i, 31 j. In the transmission / reception circuit 41 N , the mixer 45 N receives the reception signal S RX3 transmitted through the antenna element 61 N and the circulator 44 N , and the reception signal S RX3 and the frequency output from the signal generator 42 N The unmodulated local signal S LO (frequency: f LO ) is mixed to generate an analog beat signal. The ADC 46 N converts the analog beat signal into a beat signal S bcw 3 in digital form, and supplies the beat signal S bcw 3 to the phase shift amount detection unit 58 N. Local signal S LO is expressed, for example, by the following equation (10).
Figure JPOXMLDOC01-appb-I000010
Here, C 0 is the signal amplitude.

 また、受信信号SRX3は、たとえば、次式(11)で表される。

Figure JPOXMLDOC01-appb-I000011
 ここで、A,Bは信号振幅である。 Further, received signal S RX3 is expressed, for example, by the following equation (11).
Figure JPOXMLDOC01-appb-I000011
Here, A 1 and B 1 are signal amplitudes.

 ビート信号Sbcw3は、たとえば、次式(12)で表される。

Figure JPOXMLDOC01-appb-I000012
Beat signal S bcw3 is represented, for example, by the following equation (12).
Figure JPOXMLDOC01-appb-I000012

 更に、移相量検出部58は、入力されたビート信号Sbcw3の信号振幅を最大化させる位相掃引信号STX1の移相量φcnt=φcnt0を検出する。前述のとおり、第1および第2のスレーブモジュール31,31からターゲットTgtを経由して第3のスレーブモジュール31に到来した2波の反射波は互いに干渉し、その干渉状態は、信号生成器42における移相量φcntの時間変化に応じて変化する。移相量検出部58は、入力されたビート信号Sbcw3の電力波形を監視し、この電力波形の最大値に対応する移相量φcnt0を検出すればよい。図9は、ビート信号Sbcw3の電力波形の一例(コサインカーブ)を概略的に示すグラフである。 Furthermore, the phase shift amount detector 58 N detects the phase shift amount φ cnt = φ cnt0 phase sweep signal S TX1 to maximize signal amplitude of the beat signal S Bcw3 input. As described above, the two reflected waves arriving from the first and second slave modules 31 i and 31 j via the target Tgt to the third slave module 31 N interfere with each other, and the interference state is a signal It changes according to the time change of the phase shift amount φ cnt in the generator 42 i . Phase shift amount detector 58 N monitors the power waveform of the beat signal S Bcw3 input may be detected amount of phase shift phi cnt0 corresponding to the maximum value of the power waveform. FIG. 9 is a graph schematically showing an example (cosine curve) of the power waveform of the beat signal S bcw3 .

 上式(12)を参照すると、ビート信号Sbcw3の信号振幅が最大化する条件は、式(12)の右辺第1項の位相状態と、式(12)の右辺第2項の位相状態とが互いに一致することである。よって、ビート信号Sbcw3の信号振幅が最大化する条件は、次式(13)で表される。

Figure JPOXMLDOC01-appb-I000013
Referring to the above equation (12), the condition for maximizing the signal amplitude of the beat signal S bcw3 is the phase condition of the first term on the right side of equation (12) and the phase condition of the second term on the right side of equation (12) Are in agreement with each other. Therefore, the condition for maximizing the signal amplitude of the beat signal S bcw3 is expressed by the following equation (13).
Figure JPOXMLDOC01-appb-I000013

 式(13)を変形すれば、次式(14)が導出される。

Figure JPOXMLDOC01-appb-I000014
If equation (13) is modified, the following equation (14) is derived.
Figure JPOXMLDOC01-appb-I000014

 上記ステップST25の実行後、位相差算出部26は、ステップST21,ST23で算出された計測値τ,τをデータ記憶部28から取得し、計測値τ,τと移相量φcnt0とに基づき、アンテナ素子61,61から出力された測距信号間の位相差Δφ(=φ-φ)を算出する(ステップST26)。位相差算出部26は、式(14)に基づいて位相差Δφを算出することが可能である。 After execution of step ST25, the phase difference calculating section 26, the step ST21, ST23 measurements tau 1 calculated in acquires tau 2 from the data storage unit 28, the measurement value tau 1, tau 2 and phase shift amount φ Based on cnt0 , the phase difference Δφ (= φ 1 −φ 2 ) between the distance measurement signals output from the antenna elements 61 i and 61 j is calculated (step ST 26). The phase difference calculating unit 26 can calculate the phase difference Δφ based on the equation (14).

 ステップST26の実行後、位相制御部27は、算出された位相差Δφに基づき、第1および第2のスレーブモジュール31,31内の信号生成器42,42の少なくとも一方を制御して、信号生成器42,42の出力位相間の誤差を補正させる(ステップST27)。具体的には、位相制御部27は、当該算出された位相差Δφに基づき、信号生成器42,42内の位相調整回路(可変移相器)を制御することで誤差を補正することができる。 After execution of step ST26, the phase control unit 27 controls at least one of the signal generators 42 i and 42 j in the first and second slave modules 31 i and 31 j based on the calculated phase difference Δφ. Then, the error between the output phases of the signal generators 42 i and 42 j is corrected (step ST27). Specifically, the phase control unit 27 corrects the error by controlling the phase adjustment circuit (variable phase shifter) in the signal generators 42 i and 42 j based on the calculated phase difference Δφ. Can.

 その後、動作制御部25は、スレーブモジュール31~31N-1の中からすべての組が選択されたか否かを判定する(ステップST28)。すべての組が選択されていない場合は(ステップST28のNO)、動作制御部25は新たな組を選択し(ステップST20)、この新たな組についてステップST21~ST27を実行する。一方、すべての組が選択されている場合は(ステップST28のYES)、動作制御部25は、制御処理を終了する。 After that, the operation control unit 25 determines whether or not all pairs are selected from the slave modules 31 1 to 31 N-1 (step ST 28). If all sets have not been selected (NO in step ST28), operation control unit 25 selects a new set (step ST20), and executes steps ST21 to ST27 for this new set. On the other hand, if all sets have been selected (YES in step ST28), the operation control unit 25 ends the control process.

 ステップST20でスレーブモジュールの組を選択する方法としては、たとえば、第1のスレーブモジュール30(i=1)を基準とし、第1のスレーブモジュール30と対をなす第2のスレーブモジュール30,…,30N-1を順番に選択する方法を採用すればよい。スレーブモジュールの組が(30,30)で表されるとき、(30,30),(30,30),…,(30,30N-1)の順に組を選択することが可能である。この場合、位相制御部27は、第2のスレーブモジュール31内の信号生成器42を制御して、信号生成器42の出力位相に対する、信号生成器42の出力位相の誤差を補正させる(ステップST27)。 As a method of selecting a set of slave modules in step ST20, for example, a second slave module 30 2 paired with the first slave module 301 with reference to the first slave module 30 1 (i = 1). ,..., 30 N-1 may be selected in order. When a set of slave modules is represented by (30 i , 30 j ), select the set in the order of (30 1 , 30 2 ), (30 1 , 30 3 ), ..., (30 1 , 30 N-1 ) It is possible. In this case, the phase controller 27 controls the second slave module 31 signal generator 42 j in j, for the output phase of the signal generator 42 i, the error of the output phase of the signal generator 42 j correction (Step ST27).

 以上に説明したように、実施の形態2によれば、第1および第2のスレーブモジュール31,31は測距モードで動作することにより、第1および第2の計測値τ,τをそれぞれ計測する。その後、第1のスレーブモジュール31が位相掃引送信モードで動作すると同時に、第2のスレーブモジュール31が通常送信モードで動作する。第3のスレーブモジュール31は、受信モードで動作して、ビート信号Sbcw3の信号振幅を最大化させる移相量φcnt0を検出する。そして、位相差算出部26は、計測値τ,τと移相量φcnt0とに基づき、アンテナ素子61,61から出力された測距信号間の位相差Δφを算出することができる。したがって、本実施の形態のレーダ装置2は、複数のアンテナ素子61~61N-1について複数の信号生成器42~42N-1を有しているにもかかわらず、これらアンテナ素子61~61N-1から出力された測距信号間の位相差を高精度に算出することができる。たとえ、スレーブモジュール31~31N-1が分散して配置されている場合でも、位相差の高精度な算出が可能である。よって、本実施の形態の位相差検出回路は、スレーブモジュール31~31N-1における信号生成器42~42N-1の出力位相を高い精度で互いに同期させることができる。 As described above, according to the second embodiment, the first and second slave modules 31 i , 31 j operate in the distance measurement mode to obtain the first and second measured values τ 1 , τ Measure 2 respectively. Then, the first slave module 31 i is at the same time operate at a phase sweep transmit mode, the second slave module 31 j operates in the normal transmission mode. Third slave module 31 N is operating in the receive mode, to detect a phase shift amount phi cnt0 to maximize signal amplitude of the beat signal S bcw3. Then, the phase difference calculation unit 26 calculates the phase difference Δφ between the ranging signals output from the antenna elements 61 i and 61 j based on the measured values τ 1 and τ 2 and the phase shift amount φ cnt0. it can. Therefore, although the radar apparatus 2 according to the present embodiment includes the plurality of signal generators 42 1 to 42 N-1 for the plurality of antenna elements 61 1 to 61 N-1 , these antenna elements 61 The phase difference between the ranging signals output from 1 to 61 N-1 can be calculated with high accuracy. Even if the slave modules 31 1 to 31 N-1 are distributed, high-precision calculation of the phase difference is possible. Therefore, the phase difference detection circuit of the present embodiment can synchronize the output phases of the signal generators 42 1 to 42 N-1 in the slave modules 31 1 to 31 N-1 with high accuracy.

 以上、図面を参照して本発明に係る種々の実施の形態について述べたが、これら実施の形態は本発明の例示であり、これら実施の形態以外の様々な形態を採用することもできる。たとえば、上記実施の形態1,2の位相差検出回路はレーダ技術に適用されているが、これに限定されるものではない。実施の形態1,2の位相差検出回路が無線通信システムに適用されてもよい。 As mentioned above, although various embodiments according to the present invention have been described with reference to the drawings, these embodiments are merely examples of the present invention, and various embodiments other than these embodiments can be adopted. For example, although the phase difference detection circuit of the first and second embodiments is applied to radar technology, it is not limited to this. The phase difference detection circuit of Embodiments 1 and 2 may be applied to a wireless communication system.

 なお、本発明の範囲内において、上記実施の形態1,2の自由な組み合わせ、各実施の形態の任意の構成要素の変形、または各実施の形態の任意の構成要素の省略が可能である。 Within the scope of the present invention, free combinations of Embodiments 1 and 2 described above, deformation of any component of each embodiment, or omission of any component of each embodiment are possible.

 本発明に係る位相差検出回路は、たとえば、車両(たとえば、自動車または鉄道車両)などの移動体に搭載されるレーダシステムまたは無線通信システムに適用されることが可能である。 The phase difference detection circuit according to the present invention can be applied to, for example, a radar system or a wireless communication system mounted on a mobile object such as a vehicle (for example, a car or a railway vehicle).

 Tgt ターゲット、1,2 レーダ装置、20 マスタモジュール、21 マスタモジュール、22 基準信号発生器、23 動作制御回路、24 制御回路、25 動作制御部、26 位相差算出部、27 位相制御部、28 データ記憶部、30~30,31~31 スレーブモジュール、40~40,41~41 送受信回路、42~42 信号生成器、420 PLL回路、421 位相比較器、422 チャージポンプ回路、423 ループフィルタ、424 電圧制御発振器(VCO)、425 方向性結合器、426 可変移相器、427 可変分周器、428 ΔΣ変調器、43~43 スイッチ回路、44~44 サーキュレータ、45~45 ミキサ、46~46 A/D変換器(ADC)、50~50,51~51 信号処理回路、52~52 変調制御部、53~53 送信制御部、54~54 位相差算出部、55~55 測距部、56~56 位相制御部、58 移相量検出部、60 アレイアンテナ、61~61 アンテナ素子。 Tgt target, 1 and 2 radar devices, 20 master modules, 21 master modules, 22 reference signal generators, 23 operation control circuits, 24 control circuits, 25 operation control units, 26 phase difference calculation units, 27 phase control units, 28 data Memory unit, 30 1 to 30 N , 31 1 to 31 N slave module, 40 1 to 40 N , 41 1 to 41 N transceiver circuit, 42 1 to 42 N signal generator, 420 PLL circuit, 421 phase comparator, 422 Charge pump circuit 423 loop filter 424 voltage controlled oscillator (VCO) 425 directional coupler 426 variable phase shifter 427 variable frequency divider 428 Δ 変 調 modulator 43 1 to 43 N switch circuit 44 1 to 44 N circulator, 45 1 ~ 45 N mixers, 46 1 ~ 46 N A / D converter (ADC), 50 1 50 N, 51 1 ~ 51 N signal processing circuits, 52 1 ~ 52 N modulation control unit, 53 1 ~ 53 N transmission control unit, 54 1 ~ 54 N phase difference calculating section, 55 1 ~ 55 N distance measuring unit, 56 1 to 56 N phase control unit, 58 N phase shift amount detection unit, 60 array antennas, 61 1 to 61 N antenna elements.

Claims (16)

 第1のアンテナ素子および第2のアンテナ素子と接続された状態で使用される位相差検出回路であって、
 第1の測距モードで動作した後に送信モードで動作するように制御され、前記第1の測距モードでは、周波数変調された第1の測距信号を生成し、前記第1の測距信号を前記第1のアンテナ素子から送信させた後に外部空間内のターゲットから反射波を受信して第1の受信信号を生成し、前記送信モードでは、周波数変調されない高周波信号を生成し、前記高周波信号を前記第1のアンテナ素子から送信させる第1の送受信回路と、
 第2の測距モードで動作した後に受信モードで動作するように制御され、前記第2の測距モードでは、周波数変調された第2の測距信号を生成し、前記第2の測距信号を前記第2のアンテナ素子から送信させた後に前記ターゲットから反射波を受信して第2の受信信号を生成し、前記受信モードでは、前記高周波信号に対応する反射波を前記ターゲットから受信して第3の受信信号を生成する第2の送受信回路と、
 前記第1の受信信号に基づき、前記第1の送受信回路と前記ターゲットとの間における前記第1の測距信号の往復伝播時間を示す第1の計測値を算出し、かつ、前記第2の受信信号に基づき、前記第2の送受信回路と前記ターゲットとの間における前記第2の測距信号の往復伝播時間を示す第2の計測値を算出する計測部と、
 前記第1の測距信号と前記第2の測距信号との間の位相差を算出する位相差算出部と
を備え、
 前記第2の送受信回路は、前記第3の受信信号と前記第2の測距信号との間の周波数差を示すビート信号を生成し、
 前記位相差算出部は、前記第1の計測値、前記第2の計測値および前記ビート信号に基づいて前記位相差を算出する
ことを特徴とする位相差検出回路。
A phase difference detection circuit used in connection with a first antenna element and a second antenna element, comprising:
After operating in the first ranging mode, it is controlled to operate in the transmission mode, and in the first ranging mode, a frequency-modulated first ranging signal is generated, and the first ranging signal is generated. Is transmitted from the first antenna element to receive a reflected wave from a target in the external space to generate a first reception signal, and in the transmission mode, generate a high frequency signal which is not frequency-modulated, and the high frequency signal A first transmission / reception circuit for transmitting the signal from the first antenna element;
After being operated in the second ranging mode, it is controlled to operate in the receiving mode, and in the second ranging mode, a frequency-modulated second ranging signal is generated, and the second ranging signal is generated. Is transmitted from the second antenna element to receive a reflected wave from the target to generate a second reception signal, and in the reception mode, a reflected wave corresponding to the high frequency signal is received from the target A second transmission / reception circuit that generates a third reception signal;
A first measurement value indicating a round-trip propagation time of the first distance measurement signal between the first transmission / reception circuit and the target is calculated based on the first received signal, and the second measured value is calculated. A measurement unit that calculates a second measurement value indicating a round-trip propagation time of the second distance measurement signal between the second transmission / reception circuit and the target based on the reception signal;
A phase difference calculation unit that calculates a phase difference between the first distance measurement signal and the second distance measurement signal;
The second transmission / reception circuit generates a beat signal indicating a frequency difference between the third reception signal and the second ranging signal.
The phase difference detection circuit, wherein the phase difference calculation unit calculates the phase difference based on the first measurement value, the second measurement value, and the beat signal.
 請求項1記載の位相差検出回路であって、
 位相制御部を更に備え、
 前記第1の送受信回路は、前記第1の測距信号を出力する第1の信号生成器を有し、
 前記第2の送受信回路は、前記第2の測距信号を出力する第2の信号生成器と、当該第2の信号生成器の出力位相を可変に調整する位相調整回路とを含み、
 前記位相制御部は、前記位相差算出部で算出された位相差に基づき、前記位相調整回路を制御して前記第2の信号生成器の出力位相の誤差を補正させることを特徴とする位相差検出回路。
The phase difference detection circuit according to claim 1, wherein
It further comprises a phase control unit,
The first transmission / reception circuit includes a first signal generator that outputs the first ranging signal.
The second transmission / reception circuit includes a second signal generator that outputs the second ranging signal, and a phase adjustment circuit that variably adjusts the output phase of the second signal generator.
The phase control unit controls the phase adjustment circuit based on the phase difference calculated by the phase difference calculation unit to correct an error in the output phase of the second signal generator. Detection circuit.
 請求項2記載の位相差検出回路であって、前記位相調整回路は可変移相器からなることを特徴とする位相差検出回路。 The phase difference detection circuit according to claim 2, wherein the phase adjustment circuit comprises a variable phase shifter.  請求項1記載の位相差検出回路であって、
 前記第1の送受信回路は、基準信号発生器と第1の信号伝送路を介して接続された第1の信号生成器を有し、
 前記第2の送受信回路は、前記基準信号発生器と第2の信号伝送路を介して接続された第2の信号生成器を有し、
 前記第1の信号生成器および前記第2の信号生成器は、前記基準信号発生器から供給された基準信号に基づいて前記第1の測距信号および前記第2の測距信号をそれぞれ生成することを特徴とする位相差検出回路。
The phase difference detection circuit according to claim 1, wherein
The first transmission / reception circuit includes a first signal generator connected to a reference signal generator via a first signal transmission line.
The second transmission / reception circuit includes a second signal generator connected to the reference signal generator via a second signal transmission line.
The first signal generator and the second signal generator respectively generate the first ranging signal and the second ranging signal based on the reference signal supplied from the reference signal generator. A phase difference detection circuit characterized by
 請求項1または請求項2記載の位相差検出回路であって、前記位相差算出部は、前記ビート信号の直流成分および該ビート信号の振幅を検出し、当該検出された直流成分、当該検出された振幅、前記第1の計測値および前記第2の計測値に基づいて前記位相差を算出することを特徴とする位相差検出回路。 The phase difference detection circuit according to claim 1 or 2, wherein the phase difference calculation unit detects a direct current component of the beat signal and an amplitude of the beat signal, and detects the detected direct current component. A phase difference detection circuit that calculates the phase difference based on the amplitude, the first measurement value, and the second measurement value.  請求項5記載の位相差検出回路であって、前記ビート信号の直流成分がDbcw2、該ビート信号の振幅がα、前記第1の計測値がτ、前記第2の計測値がτ、前記高周波信号の周波数がfcw1、前記位相差がΔφでそれぞれ表されるとき、前記位相差は、
 Δφ=Arccos(2×Dbcw2/α)-2πfcw1(τ+τ)/2、
との式に基づいて算出されることを特徴とする位相差検出回路。
The phase difference detection circuit according to claim 5, wherein the direct current component of the beat signal is D bcw2 , the amplitude of the beat signal is α, the first measurement value is τ 1 , and the second measurement value is τ 2. When the frequency of the high frequency signal is represented by f cw1 and the phase difference is represented by Δφ, the phase difference is
Δφ = Arccos (2 × D bcw2 / α) -2πf cw11 + τ 2 ) / 2,
The phase difference detection circuit, which is calculated based on the following equation.
 請求項1記載の位相差検出回路であって、
 前記第2の送受信回路は、
 前記第2の測距信号を出力する第2の信号生成器と、
 前記第2の信号生成器の信号出力端と前記第2のアンテナ素子との間に設けられたスイッチ回路とを有し、
 前記スイッチ回路は、前記第2の送受信回路が前記第2の測距モードで動作するときは、前記第2の信号生成器の信号出力端と前記第2のアンテナ素子との間を接続し、前記第2の送受信回路が前記受信モードで動作するときは、前記第2の信号生成器の信号出力端と前記第2のアンテナ素子との間の信号経路を切断することを特徴とする位相差検出回路。
The phase difference detection circuit according to claim 1, wherein
The second transmission / reception circuit is
A second signal generator for outputting the second ranging signal;
And a switch circuit provided between the signal output terminal of the second signal generator and the second antenna element,
The switch circuit connects between the signal output end of the second signal generator and the second antenna element when the second transmission / reception circuit operates in the second ranging mode, When the second transmission / reception circuit operates in the reception mode, the signal path between the signal output terminal of the second signal generator and the second antenna element is disconnected. Detection circuit.
 請求項1または請求項2記載の位相差検出回路であって、
 前記計測部は、前記第1の受信信号に基づいて前記第1の計測値を算出する第1の計測回路と、前記第2の受信信号に基づいて前記第2の計測値を算出する第2の計測回路とを含み、
 前記第1の送受信回路および前記第1の計測回路は、第1のレーダ回路を構成し、
 前記第2の送受信回路および前記第2の計測回路は、第2のレーダ回路を構成する
ことを特徴とする位相差検出回路。
The phase difference detection circuit according to claim 1 or 2, wherein
The measurement unit calculates a first measurement circuit that calculates the first measurement value based on the first reception signal, and calculates a second measurement value based on the second reception signal. Including the measurement circuit of
The first transmission / reception circuit and the first measurement circuit constitute a first radar circuit,
A phase difference detection circuit characterized in that the second transmission / reception circuit and the second measurement circuit constitute a second radar circuit.
 請求項2または請求項3記載の位相差検出回路と、
 前記第1のアンテナ素子および前記第2のアンテナ素子を含むアレイアンテナと
を備えることを特徴とするレーダ装置。
A phase difference detection circuit according to claim 2 or 3;
A radar apparatus comprising: an array antenna including the first antenna element and the second antenna element.
 第1のアンテナ素子、第2のアンテナ素子および第3のアンテナ素子と接続された状態で使用される位相差検出回路であって、
 第1の測距モードで動作した後に第1の送信モードで動作するように制御され、前記第1の測距モードでは、周波数変調された第1の測距信号を生成し、前記第1の測距信号を前記第1のアンテナ素子から送信させた後に外部空間内のターゲットから反射波を受信して第1の受信信号を生成し、前記第1の送信モードでは、周波数変調されない第1の高周波信号を生成し、前記第1の高周波信号を前記第1のアンテナ素子から送信させると同時に前記第1の高周波信号の位相を時間とともに変化させる第1の送受信回路と、
 第2の測距モードで動作した後に第2の送信モードで動作するように制御され、前記第2の測距モードでは、周波数変調された第2の測距信号を生成し、前記第2の測距信号を前記第2のアンテナ素子から送信させた後に前記ターゲットから反射波を受信して第2の受信信号を生成し、前記第2の送信モードでは、周波数変調されない第2の高周波信号を生成し、前記第2の高周波信号を前記第2のアンテナ素子から送信させる第2の送受信回路と、
 前記第1の高周波信号および前記第2の高周波信号の双方に対応する反射波を前記ターゲットから受信して第3の受信信号を生成し、当該第3の受信信号と予め設定された周波数を有するローカル信号との間の周波数差を示すビート信号を生成する受信回路と、
 前記第1の受信信号に基づき、前記第1の送受信回路と前記ターゲットとの間における前記第1の測距信号の往復伝播時間を示す第1の計測値を算出し、かつ、前記第2の受信信号に基づき、前記第2の送受信回路と前記ターゲットとの間における前記第2の測距信号の往復伝播時間を示す第2の計測値を算出する計測部と、
 前記ビート信号の振幅を最大化させる当該第1の高周波信号の移相量を検出する移相量検出部と、
 当該検出された移相量、前記第1の計測値および前記第2の計測値に基づき、前記第1の測距信号と前記第2の測距信号との間の位相差を算出する位相差算出部と
を備えることを特徴とする位相差検出回路。
A phase difference detection circuit used in a state of being connected to a first antenna element, a second antenna element, and a third antenna element, comprising:
After operating in a first ranging mode, it is controlled to operate in a first transmission mode, and in the first ranging mode, a frequency modulated first ranging signal is generated, and the first ranging mode is performed. After the ranging signal is transmitted from the first antenna element, the reflected wave is received from the target in the external space to generate a first reception signal, and in the first transmission mode, the first reception signal is not modulated. A first transmission / reception circuit that generates a high frequency signal and causes the first high frequency signal to be transmitted from the first antenna element and simultaneously changes the phase of the first high frequency signal with time;
After operating in the second ranging mode, it is controlled to operate in the second transmission mode, and in the second ranging mode, a frequency modulated second ranging signal is generated, and the second ranging mode is performed. After the ranging signal is transmitted from the second antenna element, the reflected wave is received from the target to generate a second reception signal, and in the second transmission mode, the second high frequency signal which is not frequency modulated is A second transmission / reception circuit that generates and transmits the second high frequency signal from the second antenna element;
A reflected wave corresponding to both the first high frequency signal and the second high frequency signal is received from the target to generate a third reception signal, and the third reception signal has a predetermined frequency. A receiving circuit for generating a beat signal indicating a frequency difference between the local signal and
A first measurement value indicating a round-trip propagation time of the first distance measurement signal between the first transmission / reception circuit and the target is calculated based on the first received signal, and the second measured value is calculated. A measurement unit that calculates a second measurement value indicating a round-trip propagation time of the second distance measurement signal between the second transmission / reception circuit and the target based on the reception signal;
A phase shift amount detection unit that detects the phase shift amount of the first high frequency signal that maximizes the amplitude of the beat signal;
A phase difference for calculating a phase difference between the first distance measurement signal and the second distance measurement signal based on the detected phase shift amount, the first measurement value, and the second measurement value. A phase difference detection circuit comprising: a calculation unit.
 請求項10記載の位相差検出回路であって、
 位相制御部を更に備え、
 前記第1の送受信回路は、前記第1の測距信号を出力する第1の信号生成器を有し、
 前記第2の送受信回路は、前記第2の測距信号を出力する第2の信号生成器を有し、
 前記第1の信号生成器および前記第2の信号生成器のうちの少なくとも一方の信号生成器は、当該少なくとも一方の信号生成器の出力位相を可変に調整する位相調整回路を含み、
 前記位相制御部は、前記位相差算出部で算出された位相差に基づき、前記位相調整回路を制御して前記第1の信号生成器の出力位相および前記第2の信号生成器の出力位相のうちの少なくとも一方の誤差を補正させることを特徴とする位相差検出回路。
11. The phase difference detection circuit according to claim 10, wherein
It further comprises a phase control unit,
The first transmission / reception circuit includes a first signal generator that outputs the first ranging signal.
The second transmission / reception circuit includes a second signal generator that outputs the second ranging signal.
The signal generator of at least one of the first signal generator and the second signal generator includes a phase adjustment circuit that variably adjusts the output phase of the at least one signal generator,
The phase control unit controls the phase adjustment circuit based on the phase difference calculated by the phase difference calculation unit to control the output phase of the first signal generator and the output phase of the second signal generator. A phase difference detection circuit characterized by correcting at least one of the errors.
 請求項11記載の位相差検出回路であって、前記位相調整回路は可変移相器からなることを特徴とする位相差検出回路。 The phase difference detection circuit according to claim 11, wherein the phase adjustment circuit comprises a variable phase shifter.  請求項10記載の位相差検出回路であって、
 前記第1の送受信回路は、基準信号発生器と第1の信号伝送路を介して接続された第1の信号生成器を有し、
 前記第2の送受信回路は、前記基準信号発生器と第2の信号伝送路を介して接続された第2の信号生成器を有し、
 前記第1の信号生成器および前記第2の信号生成器は、前記基準信号発生器から供給された基準信号に基づいて前記第1の測距信号および前記第2の測距信号をそれぞれ生成することを特徴とする位相差検出回路。
11. The phase difference detection circuit according to claim 10, wherein
The first transmission / reception circuit includes a first signal generator connected to a reference signal generator via a first signal transmission line.
The second transmission / reception circuit includes a second signal generator connected to the reference signal generator via a second signal transmission line.
The first signal generator and the second signal generator respectively generate the first ranging signal and the second ranging signal based on the reference signal supplied from the reference signal generator. A phase difference detection circuit characterized by
 請求項10または請求項11記載の位相差検出回路であって、前記第1の計測値がτ、前記第2の計測値がτ、前記移相量がφcnt0、前記第1および第2の高周波信号の共通の周波数がfcw、前記位相差がΔφでそれぞれ表されるとき、前記位相差は、
  Δφ=φcnt0+2πfcw×(τ-τ)/2、
との式に基づいて算出されることを特徴とする位相差検出回路。
12. The phase difference detection circuit according to claim 10, wherein the first measurement value is τ 1 , the second measurement value is τ 2 , and the phase shift amount is φ cnt0 , the first and the first. When the common frequency of the high frequency signals of No. 2 is represented by f cw and the phase difference is represented by Δφ, the phase difference is
Δφ = φ cnt0 + 2πf cw × (τ 1 −τ 2 ) / 2,
The phase difference detection circuit, which is calculated based on the following equation.
 請求項10または請求項11記載の位相差検出回路であって、
 前記計測部は、前記第1の受信信号に基づいて前記第1の計測値を算出する第1の計測回路と、前記第2の受信信号に基づいて前記第2の計測値を算出する第2の計測回路とを含み、
 前記第1の送受信回路および前記第1の計測回路は、第1のレーダ回路を構成し、
 前記第2の送受信回路および前記第2の計測回路は、第2のレーダ回路を構成する
ことを特徴とする位相差検出回路。
12. The phase difference detection circuit according to claim 10, wherein
The measurement unit calculates a first measurement circuit that calculates the first measurement value based on the first reception signal, and calculates a second measurement value based on the second reception signal. Including the measurement circuit of
The first transmission / reception circuit and the first measurement circuit constitute a first radar circuit,
A phase difference detection circuit characterized in that the second transmission / reception circuit and the second measurement circuit constitute a second radar circuit.
 請求項11または請求項12記載の位相差検出回路と、
 前記第1のアンテナ素子、前記第2のアンテナ素子および前記第3のアンテナ素子を含むアレイアンテナと
を備えたことを特徴とするレーダ装置。
A phase difference detection circuit according to claim 11 or 12;
A radar apparatus comprising: an array antenna including the first antenna element, the second antenna element, and the third antenna element.
PCT/JP2017/045974 2017-12-21 2017-12-21 Phase difference detection circuit and radar device Ceased WO2019123613A1 (en)

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