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WO2019187439A1 - Current reduction device and current reduction method - Google Patents

Current reduction device and current reduction method Download PDF

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Publication number
WO2019187439A1
WO2019187439A1 PCT/JP2018/047978 JP2018047978W WO2019187439A1 WO 2019187439 A1 WO2019187439 A1 WO 2019187439A1 JP 2018047978 W JP2018047978 W JP 2018047978W WO 2019187439 A1 WO2019187439 A1 WO 2019187439A1
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Prior art keywords
switching element
current reducing
parallel
current
resistor
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PCT/JP2018/047978
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French (fr)
Japanese (ja)
Inventor
正登 安東
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Hitachi Ltd
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Hitachi Ltd
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60LPROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
    • B60L3/00Electric devices on electrically-propelled vehicles for safety purposes; Monitoring operating variables, e.g. speed, deceleration or energy consumption
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Definitions

  • the present invention relates to a current reducing device and a current reducing method.
  • the electric power converter and filter reactor which are electric components for driving railway vehicles, are mounted under the vehicle floor.
  • IGBT Insulated Gate Bipolar Transistor
  • MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • Patent Document 1 JP-A-2004-96877 (Patent Document 1) as background art in this technical field.
  • Patent Document 1 “a pantograph supplied with power from an overhead wire, a contactor connected to the pantograph and blocking the overhead power supplied from the pantograph, and an overhead wire power supplied via the contactor in three phases.
  • An inverter for converting to AC power a first resistor connected in series with the contactor, a second resistor connected in series with the first resistor, and having a higher resistance value than the first resistor;
  • a first switching element connected in parallel to a series circuit composed of the first resistor and the second resistor, and a second switching element connected in parallel to the second resistor,
  • the power supply device for an electric vehicle is described (see abstract).
  • Patent Document 1 when the switching element is turned off in order for the semiconductor current reducing device to reduce a large current, the large current flows through the current reducing resistor, so that an excessive surge voltage is generated and the switching element is destroyed. In order to suppress the surge voltage, it is effective to lower the resistance value of the current reducing resistor. On the other hand, since the current continues to flow through the current reducing resistor of the semiconductor current reducing device from when the current is reduced by the semiconductor current reducing device until the mechanical circuit breaker operates, the power consumption of the current reducing resistor increases. In order to reduce the power consumption, it is effective to increase the resistance value of the current reducing resistor. That is, suppression of the surge voltage during current reduction and reduction in power consumption are in a trade-off relationship with the resistance value of the current reduction resistance.
  • An object of the present invention is to achieve both suppression of a surge voltage of a switching element and reduction of power consumption of a current reducing resistor at the time of current reduction.
  • the present invention is arranged in a path connecting a current breaker connected to a DC overhead line and a filter reactor connected to a power converter, and is turned on from the DC overhead line by an ON operation thereof.
  • the first switching element that supplies power to the filter reactor, and when the first switching element is turned on, is connected in parallel to the first switching element, and when the first switching element is turned off, Forming a bypass path for guiding current from a DC overhead line to the filter reactor, and a plurality of current reducing means for reducing the current in the bypass path, wherein the plurality of current reducing means is a failure of the power converter.
  • an overcurrent generated in the DC overhead line due to a ground fault is reduced stepwise.
  • Example 1 of this invention It is the schematic of the electric vehicle in Example 1 of this invention. It is a circuit diagram of the electric motor drive system in Example 1 of this invention. It is an operation
  • FIG. 1 is a schematic diagram of an electric vehicle according to Embodiment 1 of the present invention.
  • electric power is supplied to a vehicle 8 from an overhead line (DC overhead line) 1 that is a power source via a current collector 7.
  • the supplied power is subjected to DC-AC power conversion through the current breaker 11, the semiconductor current reducing device 10, the filter reactor 9, and the power conversion device 6, and the electric motor 5 is driven by the converted AC power.
  • the electric motor 5 may be either an induction motor or a permanent magnet synchronous motor.
  • the power flow is opposite to that during powering. That is, the electric motor 5 operates as a generator, and after AC / DC power conversion is performed by the power converter 6, the filter 5, the semiconductor current reducer 10, the current disconnector 11, and the current collector 7 are connected to the overhead line 1. Electricity is regenerated. As an electrical ground, the negative voltage side of the power converter 6 is connected to the rail 2 via the wheel 3. The electric motor 5 is mounted on the carriage 4, and the carriage 4 supports the vehicle 8.
  • the voltage of the overhead wire 1 will be described as a direct current 1500V as an example.
  • FIG. 2 is a circuit diagram showing the overall configuration of the motor drive system according to the first embodiment of the present invention.
  • the motor drive system for driving the motor 5 includes a power converter 6, a filter reactor 9, a semiconductor current reducer 10, a current breaker 11, a current sensor 12, and a control circuit 13.
  • the power conversion device 6 includes a capacitor 105 and switching elements Q1 to Q6 as a DC-AC power conversion device. Switching elements Q1 and Q2 are connected in series to form a U phase, switching elements Q3 and Q4 are connected in series to form a V phase, and switching elements Q5 and Q6 are connected in series to form a W phase.
  • the diodes D1 to D6 are connected in parallel to the switching elements Q1 to Q6 so that the flow direction is opposite.
  • the switching elements Q1 to Q6 are IGBTs, it is necessary to connect the diodes D1 to D6.
  • the switching elements Q1 to Q6 are elements having a body diode such as a MOSFET, the diodes D1 to D6 are connected.
  • a MOSFET body diode can be used without connection.
  • a 2-in-1 element in which switching elements or diodes connected in series are mounted in the same package may be used.
  • the capacitor 105 removes noise flowing from the overhead wire 1 and smoothes the DC power.
  • the switching elements Q1 to Q6 of the U-phase, V-phase, and W-phase of the power conversion device 6 control, for example, PWM (Pulse Width Modulation) to convert the DC power of the capacitor 105 into AC power and Supply.
  • PWM Pulse Width Modulation
  • the semiconductor current reducing device 10 is disposed in a path connecting the current disconnector 11 connected to the overhead wire 1 and cutting off the power from the overhead wire 1 and the filter reactor 9 connected to the power conversion device 6.
  • the semiconductor current reducing device 10 includes switching elements Q7 to Q9, diodes D7 to D9 connected in parallel so that the flow directions of the switching elements Q7 to Q9 are opposite to each other, and current reducing resistors ( Resistors) 101 and 102 and charging resistors (resistors) 104.
  • the switching element Q7 is disposed in a path connecting the current breaker 11 connected to the overhead line 1 and the filter reactor 9 connected to the power conversion device 6, and the power of the overhead line 1 is generated by the ON operation. Then, it is supplied to the power converter 6 through the filter reactor 9.
  • a series circuit including a current reducing resistor 101 and a charging resistor 104 is connected in parallel to the switching element Q7, and a series circuit including a current reducing resistor 102, a switching element Q8 and an antiparallel diode D8 is connected in parallel to the current reducing resistor 101. It is connected.
  • a switching element Q9 and its antiparallel diode D9 are connected in parallel to the charging resistor 104.
  • the control signals from the control circuit 13 are supplied to the bases (gates) of the switching elements Q7 to Q9, and the on / off operation of the switching elements Q7 to Q9 is controlled by the control signal from the control circuit 13.
  • the control circuit 13 outputs a control signal stepwise based on the detection signal of the current sensor 12. For example, the control circuit 13 outputs, to the switching elements Q7 to Q9, control signals (off signals) for turning off all the switching elements Q7 to Q9 when the capacitor 105 is initially charged.
  • a control signal (ON signal) for turning on all Q9 is output to switching elements Q7 to Q9.
  • the control circuit 13 is turned off in response to the detection signal of the current sensor 12.
  • the control signal (off signal) to be turned off is output to the switching element Q7, and then the control signal (off signal) to be turned off is outputted to the switching element Q8.
  • the antiparallel diodes D7 to D9 may be body diodes.
  • a body diode is used, a diode chip is not required, and the switching elements Q7 to Q9 can be downsized.
  • the switching element Q7 is connected to a cooler (not shown), and the heat generated by the switching element Q7 is cooled by the cooler.
  • the switching elements Q1 to Q10 may be voltage controlled switching elements such as MOSFETs and IGBTs, or current controlled switching elements such as thyristors.
  • the diodes D1 to D10 may be PN diodes or SBDs (Schottky Barrier Diodes).
  • the semiconductors of the switching elements Q1 to Q10 and the diodes D1 to D10 may be Si (silicon) or SiC (silicon carbide) or GaN (gallium nitride), which is a semiconductor having a wider band gap than Si.
  • AC power supplied from the power converter 6 to the electric motor 5 is supplied from the capacitor 105.
  • the capacitor 105 In order to drive the power converter 6, the capacitor 105 needs to be initially charged. At the time of initial charge, switching elements Q7 to Q9 are all off.
  • the charging current of the capacitor 105 flows from the overhead wire 1 through the current breaker 11, the current reducing resistor 101, the charging resistor 104, and the filter reactor 9. The capacitor 105 is charged by this current, and the voltage of the capacitor 105 rises to the voltage of the overhead line 1.
  • the overhead wire 1 A large current flows from. Since this large current is supplied from the substation connected to the overhead line 1, when the large current exceeds the allowable current of the substation, the supply of power from the substation is stopped.
  • the slope of the large current increasing with time is the division of the voltage of the overhead wire 1 and the inductance value of the filter reactor 9. That is, as the inductance of the filter reactor 9 is smaller, the slope of increase of the large current with time becomes steeper, and thus it is necessary to cut off the large current at high speed.
  • the operation of the semiconductor current reducing device 10 and the current breaker 11 that cuts off a large current at high speed will be described using the operation waveform of FIG.
  • the on / off state of the switching element Q7 is controlled by the control circuit 13 based on the signal from the current sensor 12. For example, if the detection threshold of a large current for determining a ground fault or a short-circuit failure of the power conversion device 6 is 2000A, the switching element Q7 is in an ON state when the current flowing through the switching element Q7 is less than 2000A. On the other hand, when the current detection value of the current sensor 12 is 2000 A or more, the control circuit 13 outputs a control signal (off signal) to the switching element Q7 so that the switching element Q7 is turned off.
  • the switching elements Q8 and Q9 are turned on, so that a large current (overcurrent) is generated in parallel with the current reducing resistors 101 and 102 as shown by the characteristic 202 in FIG. It flows through the circuit and switching element Q9. At this time, a surge voltage calculated by multiplying the resistance values of the current reducing resistors 101 and 102 and a large current is generated between the collector and the emitter of the switching element Q7 as shown by the characteristic 204 in FIG. .
  • the switching element Q8 is turned off.
  • a control signal for turning off the switching element Q8 is generated based on a delay circuit added to the off signal of the switching element Q7 or a signal from the current sensor 12.
  • the DC voltage of the overhead line 1 is 1500 V
  • the resistance values of the current reducing resistors 101 and 102 are 4 ⁇
  • the characteristics of the related art with respect to the characteristics 201 to 204 are the characteristics 301 to 304.
  • the surge voltage of the switching device Q7 increases, so that the rated voltage of the switching device Q7 is increased.
  • the volume of the cooler increases as the conduction loss increases.
  • the switching element Q7 when the switching element Q7 is turned on, the current reducing resistors 101 and 102 are connected in parallel to the switching element Q7, and when the switching element Q7 is turned off, the current reducing resistors 101 and 102 and the switching element Q8 are connected.
  • Q9 forms a bypass path for guiding the current (overcurrent) from the overhead wire 1 to the power converter 6 through the filter reactor 9, and the resistance value is smaller than the resistance value of the current-reducing resistors 101 and 102 alone (synthesis)
  • the switching element Q8 is turned off to remove the current reducing resistor 102 from the parallel connection with the switching element Q7, and the resistance value is larger than the combined resistance value of the current reducing resistors 101 and 102.
  • the current reducing resistors 101 and 102, the charging resistor 104, and the switching elements Q8 and Q9 are connected in parallel to the switching element Q7 when the switching element Q7 is turned on, and the large current from the overhead line 1 is turned on when the switching element Q7 is turned off.
  • a bypass path is formed to lead current, for example, overcurrent generated in the overhead wire 1 due to a failure or ground fault of the power converter 6 to the power converter 6 via the filter reactor 9, and the current in the bypass path is reduced stepwise.
  • a plurality of current reducing means are configured to flow.
  • the current reducing resistor 101, the charging resistor 104, and the switching element Q9 are configured as a first current reducing means or a main current reducing means that is always connected in parallel to the switching element Q7 when the switching element Q9 is turned on.
  • the current reducing resistor 102 and the switching element Q8 are connected to the switching element Q7 from the state of being connected in parallel to the switching element Q7 by the ON operation of the switching element Q8 when the switching element Q7 is OFF.
  • the resistance value of the resistor for reducing the overcurrent in two stages using the current reducing resistors 101 and 102 can be obtained.
  • FIG. 4 is a circuit diagram of an electric motor drive system according to the second embodiment of the present invention.
  • the operations of the power conversion device 6 and the electric motor 5 are the same as those in the first embodiment, and are omitted.
  • a series circuit of a current reducing resistor 103 and a switching element Q10 is connected in parallel to the current reducing resistor 101. Note that an antiparallel diode D10 is connected to the switching element Q10.
  • the switching element Q7 is turned off, and the current of the overhead wire 1 is reduced (first stage reduction) with the combined resistance value of the current reducing resistors 101, 102, 103, and then the time t
  • the switching element Q8 is turned off, and the current of the overhead wire 1 is reduced (second stage current reduction) with the combined resistance value of the current reducing resistors 101 and 103.
  • the switching element Q10 is turned off, and the current of the overhead line 1 is further reduced (third stage reduction) by the current reduction resistor 101.
  • each of the current reducing resistors 101 to 103 is 6 ⁇ .
  • the current reducing resistor 101 and the charging resistor 104 are configured as first current reducing means or main current reducing means that is always connected in parallel to the switching element Q7 by the ON operation of the switching element Q9.
  • the current reducing resistor 102 and the switching element Q8 are connected to the switching element Q7 from the state of being connected in parallel to the switching element Q7 by the ON operation of the switching element Q8 when the switching element Q7 is OFF.
  • the switching element Q7 When the switching element Q7 is turned off, the current reducing resistor 103 and the switching element Q10 are connected in parallel to the switching element Q7 by the switching element Q10 being turned on, and thereafter (the second current reducing means or the auxiliary current reducing means is connected). After being disconnected from the parallel connection with the switching element Q7), the switching element Q10 is configured as a third current reducing means or an auxiliary current reducing means in which the parallel connection with the switching element Q7 is disconnected by the off operation of the switching element Q10.
  • a series circuit of the current reducing resistor 102 and the switching element Q8 and a series circuit of the current reducing resistor 103 and the switching element Q10 are connected in parallel to the current reducing resistor 101 in a plurality of stages.
  • the total power consumption of the current reducing resistors 101 to 103 can be further reduced while further suppressing the surge voltage of the switching element Q7.
  • the resistance value of the current reducing resistor was switched in three stages by using the current reducing resistors 101 to 103 and the switching elements Q8 and Q10.
  • the series circuit of the switching element and the current reducing resistor was reduced in current.
  • the number of stages connected in parallel to the resistor 101 may be two or more.
  • FIG. 5 is a circuit diagram of an electric motor drive system in Embodiment 3 of the present invention.
  • the operations of the power conversion device 6 and the electric motor 5 are the same as those in the first embodiment, and are omitted.
  • the semiconductor current reducing device 10 shown in the third embodiment includes switching elements Q7 to Q9, antiparallel diodes D7 to D9, current reducing resistors 101 and 102, and a charging resistor 104.
  • a series circuit of the current reducing resistor 101 and the switching element Q9 and a series circuit of the current reducing resistor 102 and the switching element Q9 and the charging resistor 104 are connected in parallel to the switching element Q7, respectively.
  • the on / off states of the switching elements Q7 to Q9 due to the ground fault or the failure of the power converter 6 are the same as in the first embodiment.
  • the switching element Q7 is turned off to reduce the large current
  • the large current flows through the current reducing resistors 101 and 102 and the charging resistor 104.
  • the overcurrent is reduced by the current reducing resistors 101 and 102.
  • the overcurrent is distributed and supplied to the current reducing resistors 101 and 102 and the charging resistor 104, and more resistors flow at the time of current reduction than in the first embodiment. Power consumption is distributed. For this reason, compared with the first embodiment, at least the number of resistors constituting the charging resistor 104 can be reduced, and the size of the resistor and the size of the entire device can be reduced.
  • the current reducing resistor 101, the charging resistor 104, and the switching element Q9 are configured as first current reducing means or main current reducing means that is always connected in parallel to the switching element Q7 when the switching element Q9 is turned on.
  • the current reducing resistor 102 and the switching element Q8 are connected to the switching element Q7 from the state of being connected in parallel to the switching element Q7 by the ON operation of the switching element Q8 when the switching element Q7 is OFF.
  • the same effects as in the first embodiment can be obtained, and the power consumption of the current reducing resistors 101 and 102 and the charging resistor 104 associated with the current reducing operation can be reduced as compared with the first embodiment. And the size of the resistor can be reduced.
  • the series circuit including the switching element and the current reducing resistor is parallel to the switching element Q7 in two stages.
  • the circuit may have three or more stages.
  • control circuit 13 can be integrated with the semiconductor current reducing device 10. Further, a current reducing device including the current breaker 11 and the semiconductor current reducing device 10 is configured, or a current reducing device including the current disconnector 11, the semiconductor current reducing device 10 and the control circuit 13 is configured. You can also.
  • the control circuit 13 for example, after outputting a control signal (ON signal) for turning on the switching elements Q7, Q8, Q9, the detection output of the current sensor 12 for detecting the overcurrent generated in the overhead wire 1 is output. Based on this, it is possible to configure a control circuit that outputs a control signal (off signal) for turning off the switching element Q7 and then outputs a control signal (off signal) for turning off the switching element Q8.
  • the control circuit 13 outputs a control signal (ON signal) for turning on the switching elements Q7, Q8, Q9, and Q10, and then detects the output of the current sensor 12 that detects an overcurrent generated in the overhead wire 1.
  • the control signal (off signal) for turning off the switching element Q7 is output, and then the control signal (off signal) for turning off the switching element Q8 is output. Thereafter, the switching element Q10 is turned off. It is possible to configure a control circuit that outputs a control signal (off signal).
  • each of the above-described configurations, functions, etc. may be realized by hardware by designing a part or all of them, for example, by an integrated circuit.
  • Each of the above-described configurations, functions, and the like may be realized by software by interpreting and executing a program that realizes each function by the processor.
  • Information such as programs, tables, and files that realize each function is stored in memory, a hard disk, a recording device such as an SSD (Solid State Drive), an IC (Integrated Circuit) card, an SD (Secure Digital) memory card, a DVD ( It can be recorded on a recording medium such as Digital Versatile Disc).

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  • Life Sciences & Earth Sciences (AREA)
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  • Mechanical Engineering (AREA)
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Abstract

This current reduction device comprises: a first switching element that is disposed in a pathway joining an interrupter connected to a DC overhead wire and a filter reactor connected to a power conversion device, and that supplies electric power from the DC overhead wire to the filter reactor through an ON operation; and a plurality of current reduction means that are connected in parallel to the first switching element during the ON operation of the first switching element, and that form a bypass pathway guiding current from the DC overhead wire to the filter reactor and reduce the current in the bypass pathway during an OFF operation of the first switching element; the plurality current reduction means incrementally reducing overcurrent that occurs in the DC overhead line due to malfunction or a ground fault of the power conversion device.

Description

減流装置および減流方法Current reducing device and current reducing method

 本発明は、減流装置および減流方法に関する。 The present invention relates to a current reducing device and a current reducing method.

 鉄道車両駆動用の電気品である電力変換装置やフィルタリアクトルは車両の床下に搭載されている。近年では、車両のメンテナンス性を向上するために、車両機器や設備の劣化・故障を把握するためのモニタリング装置の搭載が検討されている。車両の床下スペースは有限であることから、これらのモニタリング装置を新たに車両に搭載するためには、駆動電気品を小型化する必要がある。電力変換装置では、電圧駆動型のパワー半導体であるIGBT(Insulated Gate Bipolar Transistor)やMOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)が適用されている。IGBTやMOSFETをはじめとするパワー半導体は、高速なスイッチング動作により、スイッチング損失を低減できることから、電力変換装置の冷却器を小型化することができる。 The electric power converter and filter reactor, which are electric components for driving railway vehicles, are mounted under the vehicle floor. In recent years, in order to improve the maintainability of vehicles, mounting of monitoring devices for grasping deterioration / failure of vehicle equipment and facilities has been studied. Since the space under the floor of the vehicle is limited, it is necessary to reduce the size of the drive electrical component in order to newly install these monitoring devices in the vehicle. In the power converter, an IGBT (Insulated Gate Bipolar Transistor) and a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), which are voltage-driven power semiconductors, are applied. Since power semiconductors such as IGBTs and MOSFETs can reduce switching loss by a high-speed switching operation, the cooler of the power converter can be downsized.

 フィルタリアクトルを小型化するためには、そのインダクタンス値を低減することが有効である。しかし、インダクタンス値を低減すると、電力変換装置が故障、もしくは地絡が生じたときに、架線から流入する単位時間当たりの電流が増大する。通常、この大電流は、高速度遮断器など機械式の装置で遮断していたが、インダクタンス値を低減すると単位時間当たりの電流が増大するため、機械式遮断器の遮断速度では変電所の許容電流を超過することが懸念される。そこで、半導体減流装置と機械式遮断器を組み合わせることで、従来の機械式遮断器単体に比べて大電流を高速に減流し遮断することが可能になり、フィルタリアクトルのインダクタンス値の低減と遮断電流の低減を両立することが検討されている。 To reduce the size of the filter reactor, it is effective to reduce its inductance value. However, when the inductance value is reduced, the current per unit time flowing from the overhead line increases when the power conversion device fails or a ground fault occurs. Normally, this large current was interrupted by a mechanical device such as a high-speed circuit breaker. However, if the inductance value is reduced, the current per unit time increases. There is concern about exceeding the current. Therefore, by combining a semiconductor current reducer and a mechanical circuit breaker, it is possible to reduce and shut off a large current at a higher speed than a conventional mechanical circuit breaker, and to reduce and shut off the inductance value of the filter reactor. It has been studied to achieve both current reduction.

 本技術分野の背景技術として特開2004-96877号公報(特許文献1)がある。この公報には、「架線から電力を供給されるパンタグラフと、前記パンタグラフと接続され前記パンタグラフから供給される架線電力を遮断する接触器と、前記接触器を介して供給された架線電力を三相交流電力に変換するインバータと、前記接触器と直列接続された第一の抵抗と、前記第一の抵抗と直列に接続され、前記第一の抵抗よりも抵抗値の高い第二の抵抗と、前記第一の抵抗と前記第二の抵抗からなる直列回路に並列に接続された第一のスイッチング素子と、前記第二の抵抗と並列接続された第二のスイッチング素子とを備えることを特徴とする電気車用電源装置」と記載されている(要約参照)。 There is JP-A-2004-96877 (Patent Document 1) as background art in this technical field. In this publication, “a pantograph supplied with power from an overhead wire, a contactor connected to the pantograph and blocking the overhead power supplied from the pantograph, and an overhead wire power supplied via the contactor in three phases. An inverter for converting to AC power, a first resistor connected in series with the contactor, a second resistor connected in series with the first resistor, and having a higher resistance value than the first resistor; A first switching element connected in parallel to a series circuit composed of the first resistor and the second resistor, and a second switching element connected in parallel to the second resistor, The power supply device for an electric vehicle is described (see abstract).

特開2004-96877号公報JP 2004-96877 A

 特許文献1において、半導体減流装置が大電流を減流するために、スイッチング素子をオフすると、大電流が減流抵抗に流れるため、過大なサージ電圧が発生しスイッチング素子が破壊する。サージ電圧の抑制には、減流抵抗の抵抗値を低くすることが有効である。一方、半導体減流装置で減流してから機械式遮断器が動作するまでの間は、半導体減流装置の減流抵抗に電流が流れ続けるため、減流抵抗の消費電力量が増大する。この消費電力量の削減には減流抵抗の抵抗値を高くすることが有効である。すなわち、減流時のサージ電圧の抑制と消費電力量の削減は、減流抵抗の抵抗値に対してトレードオフの関係にある。 In Patent Document 1, when the switching element is turned off in order for the semiconductor current reducing device to reduce a large current, the large current flows through the current reducing resistor, so that an excessive surge voltage is generated and the switching element is destroyed. In order to suppress the surge voltage, it is effective to lower the resistance value of the current reducing resistor. On the other hand, since the current continues to flow through the current reducing resistor of the semiconductor current reducing device from when the current is reduced by the semiconductor current reducing device until the mechanical circuit breaker operates, the power consumption of the current reducing resistor increases. In order to reduce the power consumption, it is effective to increase the resistance value of the current reducing resistor. That is, suppression of the surge voltage during current reduction and reduction in power consumption are in a trade-off relationship with the resistance value of the current reduction resistance.

 本発明の課題は、減流時にスイッチング素子のサージ電圧の抑制と減流抵抗の消費電力量の削減を両立することにある。 An object of the present invention is to achieve both suppression of a surge voltage of a switching element and reduction of power consumption of a current reducing resistor at the time of current reduction.

 前記課題を解決するために、本発明は、直流架線に接続された断流器と電力変換装置に接続されたフィルタリアクトルとを結ぶ経路の中に配置されて、そのオン動作により前記直流架線からの電力を前記フィルタリアクトルに供給する第一のスイッチング素子と、前記第一のスイッチング素子のオン動作時に、前記第一のスイッチング素子に並列接続され、前記第一のスイッチング素子のオフ動作時に、前記直流架線からの電流を前記フィルタリアクトルに導くバイパス経路を形成し、前記バイパス経路における電流を減流する複数の減流手段と、を備え、前記複数の減流手段は、前記電力変換装置の故障もしくは地絡により前記直流架線に生じた過電流を段階的に減流することを特徴とする。 In order to solve the above problems, the present invention is arranged in a path connecting a current breaker connected to a DC overhead line and a filter reactor connected to a power converter, and is turned on from the DC overhead line by an ON operation thereof. The first switching element that supplies power to the filter reactor, and when the first switching element is turned on, is connected in parallel to the first switching element, and when the first switching element is turned off, Forming a bypass path for guiding current from a DC overhead line to the filter reactor, and a plurality of current reducing means for reducing the current in the bypass path, wherein the plurality of current reducing means is a failure of the power converter. Alternatively, an overcurrent generated in the DC overhead line due to a ground fault is reduced stepwise.

 本発明によれば、減流時にスイッチング素子のサージ電圧の抑制と減流抵抗の消費電力量の削減を両立することができる。 According to the present invention, it is possible to achieve both suppression of the surge voltage of the switching element and reduction of the power consumption of the current reducing resistor when the current is reduced.

本発明の実施例1における電気車の概略図である。It is the schematic of the electric vehicle in Example 1 of this invention. 本発明の実施例1における電動機駆動システムの回路図である。It is a circuit diagram of the electric motor drive system in Example 1 of this invention. 本発明の実施例1における半導体減流装置の動作波形図である。It is an operation | movement waveform diagram of the semiconductor current reduction apparatus in Example 1 of this invention. 本発明の実施例2における電動機駆動システムの回路図である。It is a circuit diagram of the electric motor drive system in Example 2 of this invention. 本発明の実施例3における電動機駆動システムの回路図である。It is a circuit diagram of the electric motor drive system in Example 3 of this invention.

 以下、図面を用いて実施例を説明する。 Hereinafter, examples will be described with reference to the drawings.

 図1は、本発明の実施例1における電気車の概略図である。図1において、電気車を加速するための力行時には、電力源である架線(直流架線)1から集電装置7を介して車両8に電力が供給される。供給された電力は断流器11と半導体減流装置10とフィルタリアクトル9と電力変換装置6を介して直流-交流電力変換され、変換された交流電力により電動機5が駆動される。電動機5の駆動により、車輪3が回転することで車両8が前進する。電動機5は誘導電動機または永久磁石同期電動機のどちらでもよい。 FIG. 1 is a schematic diagram of an electric vehicle according to Embodiment 1 of the present invention. In FIG. 1, during power running for accelerating an electric vehicle, electric power is supplied to a vehicle 8 from an overhead line (DC overhead line) 1 that is a power source via a current collector 7. The supplied power is subjected to DC-AC power conversion through the current breaker 11, the semiconductor current reducing device 10, the filter reactor 9, and the power conversion device 6, and the electric motor 5 is driven by the converted AC power. By driving the electric motor 5, the vehicle 8 moves forward by rotating the wheel 3. The electric motor 5 may be either an induction motor or a permanent magnet synchronous motor.

 電気車を減速するための回生時には、電力の流れが力行時とは逆になる。すなわち、電動機5が発電機として動作し、電力変換装置6により交流-直流電力変換されたのちにフィルタリアクトル9と半導体減流装置10と断流器11と集電装置7を介して架線1に電力が回生される。電気的なグランドとして、電力変換装置6の負電圧側は車輪3を介してレール2に接続されている。電動機5は台車4に搭載されており、台車4は車両8を支えている。以下では架線1の電圧は一例として直流1500Vとして説明する。 When regenerating to decelerate an electric vehicle, the power flow is opposite to that during powering. That is, the electric motor 5 operates as a generator, and after AC / DC power conversion is performed by the power converter 6, the filter 5, the semiconductor current reducer 10, the current disconnector 11, and the current collector 7 are connected to the overhead line 1. Electricity is regenerated. As an electrical ground, the negative voltage side of the power converter 6 is connected to the rail 2 via the wheel 3. The electric motor 5 is mounted on the carriage 4, and the carriage 4 supports the vehicle 8. Hereinafter, the voltage of the overhead wire 1 will be described as a direct current 1500V as an example.

 図2は、本発明の実施例1における電動機駆動システムの全体構成を示す回路図である。図2において、電動機5を駆動するための電動機駆動システムは、電力変換装置6、フィルタリアクトル9、半導体減流装置10、断流器11、電流センサ12、制御回路13を備えている。電力変換装置6は、直流-交流電力変換装置としてキャパシタ105およびスイッチング素子Q1~Q6を備えている。スイッチング素子Q1、Q2は、直列接続されてU相を、スイッチング素子Q3、Q4は、直列接続されてV相を、スイッチング素子Q5、Q6は、直列接続されてW相をそれぞれ構成する。 FIG. 2 is a circuit diagram showing the overall configuration of the motor drive system according to the first embodiment of the present invention. In FIG. 2, the motor drive system for driving the motor 5 includes a power converter 6, a filter reactor 9, a semiconductor current reducer 10, a current breaker 11, a current sensor 12, and a control circuit 13. The power conversion device 6 includes a capacitor 105 and switching elements Q1 to Q6 as a DC-AC power conversion device. Switching elements Q1 and Q2 are connected in series to form a U phase, switching elements Q3 and Q4 are connected in series to form a V phase, and switching elements Q5 and Q6 are connected in series to form a W phase.

 各スイッチング素子Q1~Q6には、通流方向が逆方向となるようにダイオードD1~D6が並列接続される。ここで、スイッチング素子Q1~Q6がIGBTの場合にはダイオードD1~D6を接続する必要があるが、スイッチング素子Q1~Q6がMOSFETなどボディダイオードを有する素子である場合には、ダイオードD1~D6を接続せずにMOSFETのボディダイオードを利用することができる。また、直列接続されたスイッチング素子もしくはダイオードが同一のパッケージに搭載された2in1素子を用いても良い。 The diodes D1 to D6 are connected in parallel to the switching elements Q1 to Q6 so that the flow direction is opposite. Here, when the switching elements Q1 to Q6 are IGBTs, it is necessary to connect the diodes D1 to D6. However, when the switching elements Q1 to Q6 are elements having a body diode such as a MOSFET, the diodes D1 to D6 are connected. A MOSFET body diode can be used without connection. Further, a 2-in-1 element in which switching elements or diodes connected in series are mounted in the same package may be used.

 キャパシタ105は架線1から流入するノイズを除去し、直流電力を平滑化する。電力変換装置6のU相、V相、W相のスイッチング素子Q1~Q6が、たとえばPWM(Pulse Width Modulation)制御することにより、キャパシタ105の直流電力を交流電力に変換し、電動機5に交流電力を供給する。 The capacitor 105 removes noise flowing from the overhead wire 1 and smoothes the DC power. The switching elements Q1 to Q6 of the U-phase, V-phase, and W-phase of the power conversion device 6 control, for example, PWM (Pulse Width Modulation) to convert the DC power of the capacitor 105 into AC power and Supply.

 架線1に接続されて、架線1からの電力を遮断する断流器11と、電力変換装置6に接続されたフィルタリアクトル9とを結ぶ経路の中に半導体減流装置10を配置している。半導体減流装置10は、スイッチング素子Q7~Q9と、各スイッチング素子Q7~Q9と通流方向が逆方向となるように並列接続されたダイオード(逆並列ダイオード)D7~D9と、減流抵抗(抵抗器)101、102および充電抵抗(抵抗器)104で構成されている。 The semiconductor current reducing device 10 is disposed in a path connecting the current disconnector 11 connected to the overhead wire 1 and cutting off the power from the overhead wire 1 and the filter reactor 9 connected to the power conversion device 6. The semiconductor current reducing device 10 includes switching elements Q7 to Q9, diodes D7 to D9 connected in parallel so that the flow directions of the switching elements Q7 to Q9 are opposite to each other, and current reducing resistors ( Resistors) 101 and 102 and charging resistors (resistors) 104.

 スイッチング素子Q7は、架線1に接続された断流器11と、電力変換装置6に接続さされたフィルタリアクトル9とを結ぶ経路の中に配置されて、そのオン動作により架線1らの電力を、フィルタリアクトル9を介して電力変換装置6に供給する。スイッチング素子Q7には、減流抵抗101、充電抵抗104を含む直列回路が並列接続され、減流抵抗101には、減流抵抗102、スイッチング素子Q8とその逆並列ダイオードD8を含む直列回路が並列接続されている。充電抵抗104には、スイッチング素子Q9とその逆並列ダイオードD9が並列接続されている。 The switching element Q7 is disposed in a path connecting the current breaker 11 connected to the overhead line 1 and the filter reactor 9 connected to the power conversion device 6, and the power of the overhead line 1 is generated by the ON operation. Then, it is supplied to the power converter 6 through the filter reactor 9. A series circuit including a current reducing resistor 101 and a charging resistor 104 is connected in parallel to the switching element Q7, and a series circuit including a current reducing resistor 102, a switching element Q8 and an antiparallel diode D8 is connected in parallel to the current reducing resistor 101. It is connected. A switching element Q9 and its antiparallel diode D9 are connected in parallel to the charging resistor 104.

 スイッチング素子Q7~Q9のベース(ゲート)には、制御回路13からの制御信号が供給され、スイッチング素子Q7~Q9は、制御回路13からの制御信号によってオンオフ動作が制御される。制御回路13は、電流センサ12の検出信号を基に制御信号を段階的に出力する。例えば、制御回路13は、キャパシタ105の初期充電時に、スイッチング素子Q7~Q9を全てオフ動作させる制御信号(オフ信号)をスイッチング素子Q7~Q9に出力し、キャパシタ105の充電後に、スイッチング素子Q7~Q9を全てオン動作させる制御信号(オン信号)をスイッチング素子Q7~Q9に出力する。その後、電流センサ12が、架線1からの電流が過電流(例えば、2000A以上の電流)になったことを検出した場合、制御回路13は、電流センサ12の検出信号に応答して、オフ動作させる制御信号(オフ信号)をスイッチング素子Q7に出力し、その後、オフ動作させる制御信号(オフ信号)をスイッチング素子Q8に出力する。 The control signals from the control circuit 13 are supplied to the bases (gates) of the switching elements Q7 to Q9, and the on / off operation of the switching elements Q7 to Q9 is controlled by the control signal from the control circuit 13. The control circuit 13 outputs a control signal stepwise based on the detection signal of the current sensor 12. For example, the control circuit 13 outputs, to the switching elements Q7 to Q9, control signals (off signals) for turning off all the switching elements Q7 to Q9 when the capacitor 105 is initially charged. A control signal (ON signal) for turning on all Q9 is output to switching elements Q7 to Q9. Thereafter, when the current sensor 12 detects that the current from the overhead wire 1 has become an overcurrent (for example, a current of 2000 A or more), the control circuit 13 is turned off in response to the detection signal of the current sensor 12. The control signal (off signal) to be turned off is output to the switching element Q7, and then the control signal (off signal) to be turned off is outputted to the switching element Q8.

 スイッチング素子Q7~Q9がMOSFETの場合、逆並列ダイオードD7~D9はボディダイオードでもよい。ボディダイオードを使用した場合、ダイオードのチップが不要となるため、スイッチング素子Q7~Q9を小型化できる。また、スイッチング素子Q7には冷却器(図示せず)が接続されており、スイッチング素子Q7の発熱は冷却器により冷却される。 When the switching elements Q7 to Q9 are MOSFETs, the antiparallel diodes D7 to D9 may be body diodes. When a body diode is used, a diode chip is not required, and the switching elements Q7 to Q9 can be downsized. The switching element Q7 is connected to a cooler (not shown), and the heat generated by the switching element Q7 is cooled by the cooler.

 スイッチング素子Q1~Q10は、MOSFETやIGBTなどの電圧制御型スイッチング素子や、サイリスタなどの電流制御型スイッチング素子でよい。ダイオードD1~D10は、PNダイオードやSBD(Schottky Barrier Diode)などでよい。スイッチング素子Q1~Q10およびダイオードD1~D10の半導体は、その母材として、Si(シリコン)やSiよりもバンドギャップが広い半導体であるSiC(炭化ケイ素)やGaN(窒化ガリウム)でもよい。 The switching elements Q1 to Q10 may be voltage controlled switching elements such as MOSFETs and IGBTs, or current controlled switching elements such as thyristors. The diodes D1 to D10 may be PN diodes or SBDs (Schottky Barrier Diodes). The semiconductors of the switching elements Q1 to Q10 and the diodes D1 to D10 may be Si (silicon) or SiC (silicon carbide) or GaN (gallium nitride), which is a semiconductor having a wider band gap than Si.

 電力変換装置6から電動機5に供給される交流電力はキャパシタ105から供給される。電力変換装置6を駆動するためにキャパシタ105は初期充電をする必要がある。初期充電時には、スイッチング素子Q7~Q9はすべてオフ状態である。キャパシタ105の充電電流は、架線1から断流器11と減流抵抗101と充電抵抗104とフィルタリアクトル9を介して流れる。この電流によりキャパシタ105は充電され、キャパシタ105の電圧は架線1の電圧まで上昇する。 AC power supplied from the power converter 6 to the electric motor 5 is supplied from the capacitor 105. In order to drive the power converter 6, the capacitor 105 needs to be initially charged. At the time of initial charge, switching elements Q7 to Q9 are all off. The charging current of the capacitor 105 flows from the overhead wire 1 through the current breaker 11, the current reducing resistor 101, the charging resistor 104, and the filter reactor 9. The capacitor 105 is charged by this current, and the voltage of the capacitor 105 rises to the voltage of the overhead line 1.

 キャパシタ105が充電されると、半導体減流装置10のスイッチング素子Q7~Q9はすべてオン状態になる。電力変換装置6が動作を開始すると、架線1から断流器11とスイッチング素子Q7とフィルタリアクトル9を介して電力変換装置6に直流電力が供給される。 When the capacitor 105 is charged, all the switching elements Q7 to Q9 of the semiconductor current reducing device 10 are turned on. When the power conversion device 6 starts operation, DC power is supplied from the overhead wire 1 to the power conversion device 6 through the current breaker 11, the switching element Q 7, and the filter reactor 9.

 ここで、たとえば、フィルタリアクトル9と電力変換装置6との間で地絡が起きた場合、若しくは電力変換装置6のU相、V相、W相のいずれかの相が短絡故障すると、架線1から大電流が流れる。この大電流は、架線1に接続された変電所から供給されるため、大電流が変電所の許容電流を超過すると、変電所からの電力の供給が停止する。 Here, for example, when a ground fault occurs between the filter reactor 9 and the power converter 6, or when any of the U phase, V phase, and W phase of the power converter 6 is short-circuited, the overhead wire 1 A large current flows from. Since this large current is supplied from the substation connected to the overhead line 1, when the large current exceeds the allowable current of the substation, the supply of power from the substation is stopped.

 架線1やフィルタリアクトル9の配線抵抗を無視すると、この大電流が時間とともに増加する傾きは、架線1の電圧とフィルタリアクトル9のインダクタンス値の除算となる。すなわち、フィルタリアクトル9のインダクタンスが小さいほど時間とともに大電流が増加する傾きは急峻となるため、大電流を高速に遮断する必要がある。 If the wiring resistance of the overhead wire 1 and the filter reactor 9 is ignored, the slope of the large current increasing with time is the division of the voltage of the overhead wire 1 and the inductance value of the filter reactor 9. That is, as the inductance of the filter reactor 9 is smaller, the slope of increase of the large current with time becomes steeper, and thus it is necessary to cut off the large current at high speed.

 図3の動作波形を用いて、大電流を高速に遮断する半導体減流装置10および断流器11の動作を説明する。スイッチング素子Q7のオン、オフ状態は、電流センサ12の信号を基に制御回路13によって制御される。たとえば、地絡や電力変換装置6の短絡故障を判定する大電流の検出閾値を2000Aとすると、スイッチング素子Q7に流れている電流が2000A未満の場合、スイッチング素子Q7はオン状態である。一方、電流センサ12の電流検出値が2000A以上となると、スイッチング素子Q7をオフ状態にするように、制御回路13が制御信号(オフ信号)をスイッチング素子Q7に出力する。 The operation of the semiconductor current reducing device 10 and the current breaker 11 that cuts off a large current at high speed will be described using the operation waveform of FIG. The on / off state of the switching element Q7 is controlled by the control circuit 13 based on the signal from the current sensor 12. For example, if the detection threshold of a large current for determining a ground fault or a short-circuit failure of the power conversion device 6 is 2000A, the switching element Q7 is in an ON state when the current flowing through the switching element Q7 is less than 2000A. On the other hand, when the current detection value of the current sensor 12 is 2000 A or more, the control circuit 13 outputs a control signal (off signal) to the switching element Q7 so that the switching element Q7 is turned off.

 ここで、時刻t=t1で地絡もしくは電力変換装置6の故障が生じると、架線1の電流は急峻に上昇する。時刻t=t2において、図3(a)の特性201に示すように、架線1の電流が、スイッチング素子Q7をオフ動作にするための検出閾値である2000Aに達すると、制御信号(オフ信号)によりスイッチング素子Q7はオフ状態になる。ここで、スイッチング素子Q7は、半導体であるため、ターンオフ動作に要する時間は数μsから数十μs程度である。 Here, when a ground fault or a failure of the power converter 6 occurs at time t = t1, the current of the overhead wire 1 rises sharply. At time t = t2, when the current of the overhead line 1 reaches 2000A, which is a detection threshold for turning off the switching element Q7, as shown by the characteristic 201 in FIG. 3A, a control signal (off signal) Thus, the switching element Q7 is turned off. Here, since the switching element Q7 is a semiconductor, the time required for the turn-off operation is about several μs to several tens μs.

 スイッチング素子Q7がオフ状態になると、スイッチング素子Q8、Q9はオン状態であるため、図3(b)の特性202に示すように、大電流(過電流)が、減流抵抗101、102の並列回路およびスイッチング素子Q9を介して流れる。このとき、スイッチング素子Q7のコレクタ-エミッタ間には、図3(d)の特性204に示すように、減流抵抗101、102の抵抗値と大電流の乗算で算出されるサージ電圧が発生する。たとえば、減流抵抗101、102の抵抗値がそれぞれ4Ω、大電流の検出閾値が2000Aとすると、スイッチング素子Q7のコレクタ-エミッタ間に生じるサージ電圧は、4000V(=4Ω/2×2000A)となる。すなわち、スイッチング素子Q7のコレクタ-エミッタ間に生じるサージ電圧を低減するためには、減流抵抗101、102の抵抗値を小さくすることが有効である。 When the switching element Q7 is turned off, the switching elements Q8 and Q9 are turned on, so that a large current (overcurrent) is generated in parallel with the current reducing resistors 101 and 102 as shown by the characteristic 202 in FIG. It flows through the circuit and switching element Q9. At this time, a surge voltage calculated by multiplying the resistance values of the current reducing resistors 101 and 102 and a large current is generated between the collector and the emitter of the switching element Q7 as shown by the characteristic 204 in FIG. . For example, assuming that the resistance values of the current reducing resistors 101 and 102 are 4Ω and the detection threshold of a large current is 2000A, the surge voltage generated between the collector and the emitter of the switching element Q7 is 4000V (= 4Ω / 2 × 2000A). . That is, in order to reduce the surge voltage generated between the collector and emitter of the switching element Q7, it is effective to reduce the resistance values of the current reducing resistors 101 and 102.

 時刻t=t2で生じた架線1の大電流は、減流抵抗101、102で減流される。減流後の架線1の電流は、架線1の直流電圧と減流抵抗101、102の抵抗値(減流抵抗101、102の合成抵抗値)の除算で定まる。たとえば、架線1の直流電圧が1500Vで減流抵抗101、102の抵抗値がそれぞれ4Ωとすると、減流後の架線1の電流は750A(=1500V/4Ω/2)となる。 The large current of the overhead wire 1 generated at time t = t2 is reduced by the current reduction resistors 101 and 102. The current of the overhead wire 1 after the current reduction is determined by the division of the DC voltage of the overhead wire 1 and the resistance value of the current reduction resistors 101 and 102 (the combined resistance value of the current reduction resistors 101 and 102). For example, if the DC voltage of the overhead wire 1 is 1500 V and the resistance values of the current reducing resistors 101 and 102 are 4Ω, the current of the overhead wire 1 after the current reduction is 750 A (= 1500 V / 4Ω / 2).

 時刻t=t3でスイッチング素子Q8がオフ状態となる。スイッチング素子Q8をオフ状態とする制御信号は、スイッチング素子Q7のオフ信号に遅延回路を入れることや、電流センサ12の信号を基に生成される。スイッチング素子Q8がオフ状態になると、スイッチング素子Q7、Q8のコレクタ-エミッタ間には、図3(d)の特性204に示すように、減流抵抗102の抵抗値と減流電流の乗算で算出されるサージ電圧が発生する。上記のとおり、減流抵抗102の抵抗値が4Ω、減流電流が750Aとすると、スイッチング素子Q7、Q8のコレクタ-エミッタ間に生じるサージ電圧は、3000V(=4Ω×750A)となる。 At time t = t3, the switching element Q8 is turned off. A control signal for turning off the switching element Q8 is generated based on a delay circuit added to the off signal of the switching element Q7 or a signal from the current sensor 12. When the switching element Q8 is turned off, between the collector and emitter of the switching elements Q7 and Q8, as shown by the characteristic 204 in FIG. 3D, calculation is performed by multiplying the resistance value of the current reducing resistor 102 and the current reducing current. Generated surge voltage. As described above, assuming that the resistance value of the current reducing resistor 102 is 4Ω and the current reducing current is 750A, the surge voltage generated between the collector and emitter of the switching elements Q7 and Q8 is 3000V (= 4Ω × 750A).

 スイッチング素子Q8がオフ状態になると、減流抵抗102に電流が流れなくなり、減流抵抗101で架線1の電流を減流する。このとき、減流後の架線1の電流は、架線1と減流抵抗101の抵抗値の除算で定まる。上記の通り、架線1の直流電圧が1500Vで減流抵抗101の抵抗値が4Ωとすると、減流後の架線1の電流は375A(=1500V/4Ω)となる。本実施例の効果により架線1の大電流は段階的に減流される。 When the switching element Q8 is turned off, no current flows through the current reducing resistor 102, and the current in the overhead wire 1 is reduced by the current reducing resistor 101. At this time, the current of the overhead wire 1 after current reduction is determined by dividing the resistance value of the overhead wire 1 and the current reduction resistance 101. As described above, when the DC voltage of the overhead wire 1 is 1500 V and the resistance value of the current reducing resistor 101 is 4Ω, the current of the overhead wire 1 after the current reduction is 375 A (= 1500 V / 4Ω). Due to the effect of the present embodiment, the large current of the overhead wire 1 is reduced stepwise.

 時刻t=t4で断流器11を釈放し、架線1から供給される電力を遮断する。時刻t=t2から時刻t=t4までの間、架線1の電流は、減流抵抗101、102により減流されるため、減流抵抗101、102は損失が発生する。この消費電力量は、架線1の電圧の二乗と減流抵抗101、102の抵抗値の除算に、断流器11が動作するまでの時間の乗算となる。たとえば、架線1の直流電圧が1500Vで減流抵抗101、102の抵抗値がそれぞれ4Ω、時刻t=t2から時刻t=t3までの間が10msをすると、当該期間の減流抵抗101、102の合計消費電力量は、図3(c)の特性203に示すように、11250J(=1500V/2Ω×10ms)となる。時刻t=t3から時刻t=t4までの間が90msとすると、当該期間の減流抵抗101の消費電力量は、図3(c)の特性203に示すように、50625J(=1500V/4Ω×90ms)となる。すなわち、減流抵抗101、102の消費電力量を削減するためには、減流抵抗101、102の抵抗値を大きくすることが有効である。なお、特性201~204に対する従来技術の特性は、特性301~304である。 The breaker 11 is released at time t = t4, and the power supplied from the overhead wire 1 is cut off. From time t = t2 to time t = t4, the current in the overhead wire 1 is reduced by the current reducing resistors 101 and 102, and thus the current reducing resistors 101 and 102 generate losses. This amount of power consumption is obtained by multiplying the division of the square of the voltage of the overhead wire 1 and the resistance values of the current reducing resistors 101 and 102 by the time until the circuit breaker 11 operates. For example, if the DC voltage of the overhead line 1 is 1500 V, the resistance values of the current reducing resistors 101 and 102 are 4Ω, and the time between time t = t2 and time t = t3 is 10 ms, The total power consumption is 11250 J (= 1500 V 2 / 2Ω × 10 ms) as shown by the characteristic 203 in FIG. Assuming that 90 ms is from time t = t3 to time t = t4, the power consumption of the current reducing resistor 101 during this period is 50625J (= 1500 V 2 / 4Ω as shown by the characteristic 203 in FIG. 3C. × 90 ms). That is, in order to reduce the power consumption of the current reducing resistors 101 and 102, it is effective to increase the resistance values of the current reducing resistors 101 and 102. Note that the characteristics of the related art with respect to the characteristics 201 to 204 are the characteristics 301 to 304.

 このように、時刻t=t2で生じるスイッチング素子Q7のコレクタ-エミッタ間のサージ電圧の低減と、時刻t=t2から時刻t=t4で生じる減流抵抗101、102の消費電力量の削減には、トレードオフの関係にある。すなわち、スイッチング素子Q7のサージ電圧の低減のために、減流抵抗101、102の抵抗値を小さくすると、減流抵抗101、102の消費電力量が増大し、減流抵抗101、102の体積が大きくなる。一方、減流抵抗101、102の消費電力量を削減するために、減流抵抗101、102の抵抗値を大きくすると、スイッチング素子Q7のサージ電圧が増大するため、スイッチング素子Q7の定格電圧を高くする必要があり、導通損失の増大に伴い冷却器の体積が大きくなる。 As described above, the reduction of the surge voltage between the collector and the emitter of the switching element Q7 generated at time t = t2 and the reduction of the power consumption of the current reducing resistors 101 and 102 generated from time t = t2 to time t = t4. There is a trade-off relationship. That is, if the resistance values of the current reducing resistors 101 and 102 are reduced to reduce the surge voltage of the switching element Q7, the power consumption of the current reducing resistors 101 and 102 increases, and the volume of the current reducing resistors 101 and 102 increases. growing. On the other hand, when the resistance value of the current reducing resistors 101 and 102 is increased in order to reduce the power consumption of the current reducing resistors 101 and 102, the surge voltage of the switching device Q7 increases, so that the rated voltage of the switching device Q7 is increased. The volume of the cooler increases as the conduction loss increases.

 そこで、本実施例おいては、スイッチング素子Q7のオン動作時に、スイッチング素子Q7に減流抵抗101、102を並列接続し、スイッチング素子Q7のオフ動作時に、減流抵抗101、102とスイッチング素子Q8、Q9で架線1からの電流(過電流)を、フィルタリアクトル9を介して電力変換装置6に導くバイパス経路を形成し、減流抵抗101、102単体の抵抗値よりも抵抗値の小さい(合成抵抗値の小さい)減流抵抗101、102で過電流を減流(第一段階の減流)し、時刻t=t2で生じるスイッチング素子Q7のコレクタ-エミッタ間のサージ電圧を低減している。さらに、時刻t=t3では、スイッチング素子Q8をオフ動作させて、減流抵抗102を、スイッチング素子Q7との並列接続から外し、減流抵抗101、102の合成抵抗値よりも抵抗値が大きい減流抵抗101のみで過電流を減流(第二段階の減流)し、時刻t=t2から時刻t=t4で生じる減流抵抗101の消費電力量を削減している。 Therefore, in this embodiment, when the switching element Q7 is turned on, the current reducing resistors 101 and 102 are connected in parallel to the switching element Q7, and when the switching element Q7 is turned off, the current reducing resistors 101 and 102 and the switching element Q8 are connected. , Q9 forms a bypass path for guiding the current (overcurrent) from the overhead wire 1 to the power converter 6 through the filter reactor 9, and the resistance value is smaller than the resistance value of the current-reducing resistors 101 and 102 alone (synthesis) The overcurrent is reduced (first stage reduction) by the current-reducing resistors 101 and 102 having a small resistance value, and the surge voltage between the collector and the emitter of the switching element Q7 generated at time t = t2 is reduced. Further, at time t = t3, the switching element Q8 is turned off to remove the current reducing resistor 102 from the parallel connection with the switching element Q7, and the resistance value is larger than the combined resistance value of the current reducing resistors 101 and 102. The overcurrent is reduced only by the current resistor 101 (second stage current reduction), and the power consumption of the current reducing resistor 101 generated from time t = t2 to time t = t4 is reduced.

 この際、減流抵抗101、102と充電抵抗104及びスイッチング素子Q8、Q9は、スイッチング素子Q7のオン動作時に、スイッチング素子Q7に並列接続され、スイッチング素子Q7のオフ動作時に、架線1からの大電流、例えば、電力変換装置6の故障もしくは地絡により架線1に生じた過電流を、フィルタリアクトル9を介して電力変換装置6に導くバイパス経路を形成し、バイパス経路における電流を段階的に減流する複数の減流手段を構成する。減流抵抗101と充電抵抗104及びスイッチング素子Q9は、スイッチング素子Q9のオン動作により、スイッチング素子Q7に常時並列接続される第一の減流手段又は主減流手段として構成される。減流抵抗102とスイッチング素子Q8は、スイッチング素子Q7のオフ動作時に、スイッチング素子Q8のオン動作でスイッチング素子Q7に並列接続された状態から、その後、スイッチング素子Q8のオフ動作により、スイッチング素子Q7との並列接続が外される第二の減流手段又は補助減流手段として構成される。 At this time, the current reducing resistors 101 and 102, the charging resistor 104, and the switching elements Q8 and Q9 are connected in parallel to the switching element Q7 when the switching element Q7 is turned on, and the large current from the overhead line 1 is turned on when the switching element Q7 is turned off. A bypass path is formed to lead current, for example, overcurrent generated in the overhead wire 1 due to a failure or ground fault of the power converter 6 to the power converter 6 via the filter reactor 9, and the current in the bypass path is reduced stepwise. A plurality of current reducing means are configured to flow. The current reducing resistor 101, the charging resistor 104, and the switching element Q9 are configured as a first current reducing means or a main current reducing means that is always connected in parallel to the switching element Q7 when the switching element Q9 is turned on. The current reducing resistor 102 and the switching element Q8 are connected to the switching element Q7 from the state of being connected in parallel to the switching element Q7 by the ON operation of the switching element Q8 when the switching element Q7 is OFF. Are configured as second current reducing means or auxiliary current reducing means from which the parallel connection is removed.

 本実施例によれば、新たにスイッチング素子Q8と減流抵抗102を搭載することにより、減流抵抗101、102を用いて、過電流を2段階で減流するための抵抗器の抵抗値が変更可能となることで、スイッチング素子Q7のサージ電圧の低減と、減流抵抗101、102の消費電力量の削減を両立することが可能となる。 According to the present embodiment, by newly installing the switching element Q8 and the current reducing resistor 102, the resistance value of the resistor for reducing the overcurrent in two stages using the current reducing resistors 101 and 102 can be obtained. By being able to change, it becomes possible to achieve both reduction of the surge voltage of the switching element Q7 and reduction of the power consumption of the current reducing resistors 101 and 102.

 また、図3における特性201、202、203は、時刻t=t3を経過した後、特性301、302、303よりも小さい値を示している。特性204は、時刻t=t2では、特性304よりも小さい値を示している。すなわち、図3の特性から、本実施例では、スイッチング素子Q7のサージ電圧の低減と、減流抵抗101、102の消費電力量の削減を両立していることが分かる。 Further, the characteristics 201, 202, and 203 in FIG. 3 indicate values smaller than the characteristics 301, 302, and 303 after the time t = t3. The characteristic 204 shows a smaller value than the characteristic 304 at time t = t2. That is, it can be seen from the characteristics of FIG. 3 that the present embodiment achieves both the reduction of the surge voltage of the switching element Q7 and the reduction of the power consumption of the current reducing resistors 101 and 102.

 図4は、本発明の実施例2における電動機駆動システムの回路図である。本実施例において、電力変換装置6や電動機5の動作は、実施例1と同様のため省略する。 FIG. 4 is a circuit diagram of an electric motor drive system according to the second embodiment of the present invention. In the present embodiment, the operations of the power conversion device 6 and the electric motor 5 are the same as those in the first embodiment, and are omitted.

 実施例2の半導体減流装置10は実施例1に加えて、減流抵抗103とスイッチング素子Q10の直列回路が減流抵抗101に並列に接続されている。なお、スイッチング素子Q10には、逆並列ダイオードD10が接続されている。 In the semiconductor current reducing device 10 of the second embodiment, in addition to the first embodiment, a series circuit of a current reducing resistor 103 and a switching element Q10 is connected in parallel to the current reducing resistor 101. Note that an antiparallel diode D10 is connected to the switching element Q10.

 スイッチング素子Q10のオン、オフ状態は、スイッチング素子Q8のオフ信号に対して遅延時間を入れて生成された制御信号や、電流センサ12の検出値を基に生成される制御信号を制御回路13から出力することで制御される。たとえば、スイッチング素子Q8のオフ信号から10ms後に、制御回路13からスイッチング素子Q10に制御信号(オフ信号)を入力する。この制御信号により、時刻t=t3から時刻t=t4の間に、スイッチング素子Q10がオフ動作することで、架線1の電流が、減流抵抗101によってさらに減流される。すなわち、時刻t=t2で、スイッチング素子Q7をオフにして、減流抵抗101、102、103の合成抵抗値で、架線1の電流を減流(第一段階の減流)した後、時刻t=t3で、スイッチング素子Q8をオフにして、減流抵抗101、103の合成抵抗値で、架線1の電流を減流(第二段階の減流)し、時刻t=t3から時刻t=t4の間に、スイッチング素子Q10をオフにして、架線1の電流を、減流抵抗101によってさらに減流(第三段階の減流)することになる。 The on / off state of the switching element Q10 is a control signal generated from the control circuit 13 based on the detection value of the current sensor 12 or a control signal generated by adding a delay time to the off signal of the switching element Q8. Controlled by output. For example, a control signal (off signal) is input from the control circuit 13 to the switching element Q10 after 10 ms from the off signal of the switching element Q8. With this control signal, the switching element Q10 is turned off between time t = t3 and time t = t4, whereby the current of the overhead wire 1 is further reduced by the current reducing resistor 101. That is, at time t = t2, the switching element Q7 is turned off, and the current of the overhead wire 1 is reduced (first stage reduction) with the combined resistance value of the current reducing resistors 101, 102, 103, and then the time t At time t = t3, the switching element Q8 is turned off, and the current of the overhead wire 1 is reduced (second stage current reduction) with the combined resistance value of the current reducing resistors 101 and 103. From time t = t3 to time t = t4 During this period, the switching element Q10 is turned off, and the current of the overhead line 1 is further reduced (third stage reduction) by the current reduction resistor 101.

 この際、たとえば、減流抵抗101~103の合計抵抗値を実施例1にあわせて2Ωとすると、減流抵抗101~103はそれぞれ6Ωとなる。この結果、時刻t=t2におけるスイッチング素子Q7に発生するサージ電圧は、実施例1と同様の4000Vである。一方、時刻t=t3からt=t4の間にスイッチング素子Q10がオフすることで、減流後の架線1の電流は、250A(1500V/6Ω)となる。この電流は実施例1よりも低くなり、減流抵抗101~103の合計消費電力量を削減することができる。 At this time, for example, if the total resistance value of the current reducing resistors 101 to 103 is 2Ω in accordance with the first embodiment, each of the current reducing resistors 101 to 103 is 6Ω. As a result, the surge voltage generated in the switching element Q7 at time t = t2 is 4000 V as in the first embodiment. On the other hand, when the switching element Q10 is turned off between time t = t3 and t = t4, the current of the overhead wire 1 after the current reduction becomes 250 A (1500 V / 6Ω). This current is lower than that in the first embodiment, and the total power consumption of the current reducing resistors 101 to 103 can be reduced.

 この際、減流抵抗101と充電抵抗104は、スイッチング素子Q9のオン動作により、スイッチング素子Q7に常時並列接続される第一の減流手段又は主減流手段として構成される。減流抵抗102とスイッチング素子Q8は、スイッチング素子Q7のオフ動作時に、スイッチング素子Q8のオン動作でスイッチング素子Q7に並列接続された状態から、その後、スイッチング素子Q8のオフ動作により、スイッチング素子Q7との並列接続が外される第二の減流手段又は補助減流手段として構成される。減流抵抗103とスイッチング素子Q10は、スイッチング素子Q7のオフ動作時に、スイッチング素子Q10のオン動作でスイッチング素子Q7に並列接続された状態から、その後(第二の減流手段又は補助減流手段が、スイッチング素子Q7との並列接続から外された後)、スイッチング素子Q10のオフ動作により、スイッチング素子Q7との並列接続が外される第三の減流手段又は補助減流手段として構成される。 At this time, the current reducing resistor 101 and the charging resistor 104 are configured as first current reducing means or main current reducing means that is always connected in parallel to the switching element Q7 by the ON operation of the switching element Q9. The current reducing resistor 102 and the switching element Q8 are connected to the switching element Q7 from the state of being connected in parallel to the switching element Q7 by the ON operation of the switching element Q8 when the switching element Q7 is OFF. Are configured as second current reducing means or auxiliary current reducing means from which the parallel connection is removed. When the switching element Q7 is turned off, the current reducing resistor 103 and the switching element Q10 are connected in parallel to the switching element Q7 by the switching element Q10 being turned on, and thereafter (the second current reducing means or the auxiliary current reducing means is connected). After being disconnected from the parallel connection with the switching element Q7), the switching element Q10 is configured as a third current reducing means or an auxiliary current reducing means in which the parallel connection with the switching element Q7 is disconnected by the off operation of the switching element Q10.

 本実施例によれば、減流抵抗102とスイッチング素子Q8の直列回路と、減流抵抗103とスイッチング素子Q10の直列回路をそれぞれ減流抵抗101に対して並列に、複数段接続することにより、スイッチング素子Q7のサージ電圧をより抑制しつつ、減流抵抗101~103の合計消費電力量をより削減することができる。なお、実施例2は、減流抵抗101~103およびスイッチング素子Q8、Q10を用いることで、減流抵抗の抵抗値を3段階に切り替えたが、スイッチング素子と減流抵抗の直列回路を減流抵抗101に並列に接続する段数は2段以上の複数段であればよい。スイッチング素子と減流抵抗の直列回路を2段以上の複数段とすることで、スイッチング素子Q7のサージ電圧を更に抑制しつつ、減流抵抗101~103の合計消費電力量を更に削減することができる。 According to this embodiment, a series circuit of the current reducing resistor 102 and the switching element Q8 and a series circuit of the current reducing resistor 103 and the switching element Q10 are connected in parallel to the current reducing resistor 101 in a plurality of stages. The total power consumption of the current reducing resistors 101 to 103 can be further reduced while further suppressing the surge voltage of the switching element Q7. In Example 2, the resistance value of the current reducing resistor was switched in three stages by using the current reducing resistors 101 to 103 and the switching elements Q8 and Q10. However, the series circuit of the switching element and the current reducing resistor was reduced in current. The number of stages connected in parallel to the resistor 101 may be two or more. By making the series circuit of the switching element and the current reducing resistor into two or more stages, it is possible to further reduce the total power consumption of the current reducing resistors 101 to 103 while further suppressing the surge voltage of the switching element Q7. it can.

 図5は、本発明の実施例3における電動機駆動システムの回路図である。本実施例において、電力変換装置6や電動機5の動作は、実施例1と同様のため省略する。 FIG. 5 is a circuit diagram of an electric motor drive system in Embodiment 3 of the present invention. In the present embodiment, the operations of the power conversion device 6 and the electric motor 5 are the same as those in the first embodiment, and are omitted.

 実施例3に示す半導体減流装置10は、スイッチング素子Q7~Q9とその逆並列ダイオードD7~D9および減流抵抗101、102と充電抵抗104で構成されている。減流抵抗101とスイッチング素子Q9の直列回路および減流抵抗102とスイッチング素子Q9の直列回路および充電抵抗104は、それぞれスイッチング素子Q7に対して並列に接続されている。 The semiconductor current reducing device 10 shown in the third embodiment includes switching elements Q7 to Q9, antiparallel diodes D7 to D9, current reducing resistors 101 and 102, and a charging resistor 104. A series circuit of the current reducing resistor 101 and the switching element Q9 and a series circuit of the current reducing resistor 102 and the switching element Q9 and the charging resistor 104 are connected in parallel to the switching element Q7, respectively.

 電力変換装置6が動作を開始する前のキャパシタ105の初期充電において、スイッチング素子Q7~Q9はすべてオフ状態である。すなわち、キャパシタ105の充電電流は架線1から断流器11および充電抵抗104を介して流れる。 In the initial charging of the capacitor 105 before the power conversion device 6 starts operation, all the switching elements Q7 to Q9 are in the off state. That is, the charging current of the capacitor 105 flows from the overhead wire 1 through the current breaker 11 and the charging resistor 104.

 地絡や電力変換装置6の故障に伴うスイッチング素子Q7~Q9のオン、オフ状態は実施例1と同様である。大電流を減流するためにスイッチング素子Q7がオフ状態になると、大電流(過電流)は、減流抵抗101、102および充電抵抗104を流れる。実施例1では、減流抵抗101、102で過電流を減流していた。これに対して、実施例3では、過電流を減流抵抗101、102および充電抵抗104に分散して流し、実施例1に比べて減流時に流れる抵抗器が多くなるので、各抵抗器における消費電力量が分散される。このため、実施例1に比べて、少なくとも充電抵抗104を構成する抵抗器の数を少なくすることができ、抵抗器の小型化及び装置全体の小型化を図ることができる。 The on / off states of the switching elements Q7 to Q9 due to the ground fault or the failure of the power converter 6 are the same as in the first embodiment. When the switching element Q7 is turned off to reduce the large current, the large current (overcurrent) flows through the current reducing resistors 101 and 102 and the charging resistor 104. In the first embodiment, the overcurrent is reduced by the current reducing resistors 101 and 102. On the other hand, in the third embodiment, the overcurrent is distributed and supplied to the current reducing resistors 101 and 102 and the charging resistor 104, and more resistors flow at the time of current reduction than in the first embodiment. Power consumption is distributed. For this reason, compared with the first embodiment, at least the number of resistors constituting the charging resistor 104 can be reduced, and the size of the resistor and the size of the entire device can be reduced.

 この際、減流抵抗101と充電抵抗104及びスイッチング素子Q9は、スイッチング素子Q9のオン動作でスイッチング素子Q7に常時並列接続される第一の減流手段又は主減流手段として構成される。減流抵抗102とスイッチング素子Q8は、スイッチング素子Q7のオフ動作時に、スイッチング素子Q8のオン動作でスイッチング素子Q7に並列接続された状態から、その後、スイッチング素子Q8のオフ動作により、スイッチング素子Q7との並列接続が外される第二の減流手段又は補助減流手段として構成される。 At this time, the current reducing resistor 101, the charging resistor 104, and the switching element Q9 are configured as first current reducing means or main current reducing means that is always connected in parallel to the switching element Q7 when the switching element Q9 is turned on. The current reducing resistor 102 and the switching element Q8 are connected to the switching element Q7 from the state of being connected in parallel to the switching element Q7 by the ON operation of the switching element Q8 when the switching element Q7 is OFF. Are configured as second current reducing means or auxiliary current reducing means from which the parallel connection is removed.

 本実施例によれば、実施例1と同様の効果を奏することができると共に、実施例1に比べて、減流動作に伴う減流抵抗101、102および充電抵抗104の消費電力量を削減することができると共に抵抗器の小型化を図ることができる。 According to the present embodiment, the same effects as in the first embodiment can be obtained, and the power consumption of the current reducing resistors 101 and 102 and the charging resistor 104 associated with the current reducing operation can be reduced as compared with the first embodiment. And the size of the resistor can be reduced.

 なお、実施例3において、スイッチング素子と減流抵抗を含む直列回路のスイッチング素子Q7に対する並列数は2段であるが、実施例2に示すように、スイッチング素子Q10と減流抵抗103を含む直列回路を3段以上にしても良い。 In the third embodiment, the series circuit including the switching element and the current reducing resistor is parallel to the switching element Q7 in two stages. The circuit may have three or more stages.

 なお、本発明は上記した実施例に限定されるものではなく、様々な変形例が含まれる。例えば、制御回路13を半導体減流装置10と一体化することができる。また、断流器11と、半導体減流装置10とを有する減流装置を構成したり、断流器11と、半導体減流装置10及び制御回路13を有する減流装置を構成したりすることもできる。この際、制御回路13としては、例えば、スイッチング素子Q7、Q8、Q9をオン動作させる制御信号(オン信号)を出力した後、架線1に生じた過電流を検出する電流センサ12の検出出力を基に、スイッチング素子Q7をオフ動作させる制御信号(オフ信号)を出力し、その後、スイッチング素子Q8をオフ動作させる制御信号(オフ信号)を出力する制御回路を構成することができる。 In addition, this invention is not limited to the above-mentioned Example, Various modifications are included. For example, the control circuit 13 can be integrated with the semiconductor current reducing device 10. Further, a current reducing device including the current breaker 11 and the semiconductor current reducing device 10 is configured, or a current reducing device including the current disconnector 11, the semiconductor current reducing device 10 and the control circuit 13 is configured. You can also. At this time, as the control circuit 13, for example, after outputting a control signal (ON signal) for turning on the switching elements Q7, Q8, Q9, the detection output of the current sensor 12 for detecting the overcurrent generated in the overhead wire 1 is output. Based on this, it is possible to configure a control circuit that outputs a control signal (off signal) for turning off the switching element Q7 and then outputs a control signal (off signal) for turning off the switching element Q8.

 また、制御回路13としては、例えば、スイッチング素子Q7、Q8、Q9、Q10をオン動作させる制御信号(オン信号)を出力した後、架線1に生じた過電流を検出する電流センサ12の検出出力を基に、スイッチング素子Q7をオフ動作させる制御信号(オフ信号)を出力し、その後、スイッチング素子Q8をオフ動作させる制御信号(オフ信号)を出力し、さらに、その後、スイッチング素子Q10をオフ動作させる制御信号(オフ信号)を出力する制御回路を構成することができる。 For example, the control circuit 13 outputs a control signal (ON signal) for turning on the switching elements Q7, Q8, Q9, and Q10, and then detects the output of the current sensor 12 that detects an overcurrent generated in the overhead wire 1. , The control signal (off signal) for turning off the switching element Q7 is output, and then the control signal (off signal) for turning off the switching element Q8 is output. Thereafter, the switching element Q10 is turned off. It is possible to configure a control circuit that outputs a control signal (off signal).

 上記した実施例は本発明を分かりやすく説明するために詳細に説明したものであり、必ずしも説明した全ての構成を備えるものに限定されるものではない。また、ある実施例の構成の一部を他の実施例の構成に置き換えることが可能であり、また、ある実施例の構成に他の実施例の構成を加えることも可能である。また、各実施例の構成の一部について、他の構成の追加・削除・置換をすることが可能である。 The above-described embodiments have been described in detail for easy understanding of the present invention, and are not necessarily limited to those having all the configurations described. Further, a part of the configuration of one embodiment can be replaced with the configuration of another embodiment, and the configuration of another embodiment can be added to the configuration of one embodiment. Further, it is possible to add, delete, and replace other configurations for a part of the configuration of each embodiment.

 また、上記の各構成、機能等は、それらの一部又は全部を、例えば、集積回路で設計する等によりハードウェアで実現してもよい。また、上記の各構成、機能等は、プロセッサがそれぞれの機能を実現するプログラムを解釈し、実行することによりソフトウェアで実現してもよい。各機能を実現するプログラム、テーブル、ファイル等の情報は、メモリや、ハードディスク、SSD(Solid State Drive)等の記録装置、または、IC(Integrated Circuit)カード、SD(Secure Digital)メモリカード、DVD(Digital Versatile Disc)等の記録媒体に記録して置くことができる。 Also, each of the above-described configurations, functions, etc. may be realized by hardware by designing a part or all of them, for example, by an integrated circuit. Each of the above-described configurations, functions, and the like may be realized by software by interpreting and executing a program that realizes each function by the processor. Information such as programs, tables, and files that realize each function is stored in memory, a hard disk, a recording device such as an SSD (Solid State Drive), an IC (Integrated Circuit) card, an SD (Secure Digital) memory card, a DVD ( It can be recorded on a recording medium such as Digital Versatile Disc).

1 架線、2 レール、3 車輪、4 台車、5 電動機、6 電力変換装置、7 集電装置、8 車両、9 フィルタリアクトル、10 半導体減流装置、11 断流器、12 電流センサ、Q1~Q10 スイッチング素子、D1~D10 ダイオード、101~103 減流抵抗、104 充電抵抗、105 キャパシタ 1 overhead line, 2 rails, 3 wheels, 4 carts, 5 motors, 6 power converters, 7 current collectors, 8 vehicles, 9 filter reactors, 10 semiconductor current reducers, 11 current breakers, 12 current sensors, Q1 to Q10 Switching element, D1 to D10 diode, 101 to 103, current reducing resistance, 104 charging resistance, 105 capacitor

Claims (12)

 直流架線に接続された断流器と電力変換装置に接続されたフィルタリアクトルとを結ぶ経路の中に配置されて、そのオン動作により前記直流架線からの電力を前記フィルタリアクトルに供給する第一のスイッチング素子と、
 前記第一のスイッチング素子のオン動作時に、前記第一のスイッチング素子に並列接続され、前記第一のスイッチング素子のオフ動作時に、前記直流架線からの電流を前記フィルタリアクトルに導くバイパス経路を形成し、前記バイパス経路における電流を減流する複数の減流手段と、を備え、
 前記複数の減流手段は、
 前記電力変換装置の故障もしくは地絡により前記直流架線に生じた過電流を段階的に減流することを特徴とする減流装置。
A first line is arranged in a path connecting a current breaker connected to the DC overhead line and a filter reactor connected to the power converter, and supplies power from the DC overhead line to the filter reactor by the ON operation. A switching element;
A bypass path is formed that is connected in parallel to the first switching element when the first switching element is turned on, and that guides current from the DC overhead line to the filter reactor when the first switching element is turned off. A plurality of current reducing means for reducing current in the bypass path,
The plurality of current reducing means includes:
An overcurrent generated in the DC overhead line due to a failure of the power converter or a ground fault is gradually reduced.
 請求項1に記載の減流装置において、
 前記複数の減流手段は、
 前記第一のスイッチング素子に並列接続される主減流手段と、
 前記第一のスイッチング素子のオフ動作時に、前記第一のスイッチング素子に並列接続された状態から、その後、前記第一のスイッチング素子との並列接続が外される1又は2以上の補助減流手段と、を備えることを特徴とする減流装置。
The current reducing device according to claim 1,
The plurality of current reducing means includes:
Main current reducing means connected in parallel to the first switching element;
One or more auxiliary current reducing means for removing the parallel connection with the first switching element from the state connected in parallel with the first switching element during the OFF operation of the first switching element And a current reducing device.
 請求項1に記載の減流装置において、
 前記複数の減流手段は、
 前記第一のスイッチング素子に並列接続される第一の減流手段と、
 前記第一のスイッチング素子のオフ動作時に、前記第一のスイッチング素子に並列接続された状態から、その後、前記第一のスイッチング素子との並列接続が外される第二の減流手段と、を備え、
 前記第一の減流手段は、
 前記第一のスイッチング素子に並列に接続される回路であって、第一の抵抗器と第二の抵抗器を含む第一の直列回路と、前記第二の抵抗器に並列に配置される第二のスイッチング素子と、を有し、前記第一の抵抗器は、前記第二のスイッチング素子のオン動作により、前記第一のスイッチング素子に並列接続され、
 前記第二の減流手段は、
 第三の抵抗器と第三のスイッチング素子を含む第二の直列回路を有し、前記第二の直列回路は、前記第一のスイッチング素子のオン動作時に、前記第三のスイッチング素子のオン動作により、前記第一の抵抗器と共に前記第一のスイッチング素子に並列接続され、前記第一のスイッチング素子がオフ動作した後、前記第三のスイッチング素子のオフ動作により、前記第一のスイッチング素子との並列接続が外されることを特徴とする減流装置。
The current reducing device according to claim 1,
The plurality of current reducing means includes:
First current reducing means connected in parallel to the first switching element;
A second current reducing means for removing the parallel connection with the first switching element from the state connected in parallel with the first switching element during the off operation of the first switching element; Prepared,
The first current reducing means includes
A circuit connected in parallel to the first switching element, the first series circuit including a first resistor and a second resistor, and a first circuit arranged in parallel to the second resistor Two switching elements, and the first resistor is connected in parallel to the first switching element by the ON operation of the second switching element,
The second current reducing means includes
A second series circuit including a third resistor and a third switching element; and the second series circuit is configured to turn on the third switching element when the first switching element is turned on. The first switching element and the first switching element are connected in parallel with each other, and after the first switching element is turned off, the third switching element is turned off. The current reducing device is characterized in that the parallel connection is removed.
 請求項1に記載の減流装置において、
 前記複数の減流手段は、
 前記第一のスイッチング素子に並列接続される第一の減流手段と、
 前記第一のスイッチング素子のオフ動作時に、前記第一のスイッチング素子との並列接続が段階的に外される第二の減流手段と第三の減流手段を備え、
 前記第一の減流手段は、
 前記第一のスイッチング素子に並列に接続される回路であって、第一の抵抗器と第二の抵抗器を含む第一の直列回路と、前記第二の抵抗器に並列に配置される第二のスイッチング素子と、を有し、前記第一の抵抗器は、前記第二のスイッチング素子のオン動作により、前記第一のスイッチング素子に並列接続され、
 前記第二の減流手段は、
 第三の抵抗器と第三のスイッチング素子を含む第二の直列回路を有し、前記第二の直列回路は、前記第一のスイッチング素子のオン動作時に、前記第三のスイッチング素子のオン動作により、前記第一の抵抗器と共に前記第一のスイッチング素子に並列接続され、前記第一のスイッチング素子がオフ動作した後、前記第三のスイッチング素子のオフ動作により、前記第一のスイッチング素子との並列接続が外され、
 前記第三の減流手段は、
 前記第一のスイッチング素子のオン動作時に、前記第二の直列回路に並列接続される回路であって、第四の抵抗器と第四のスイッチング素子を含む第三の直列回路を有し、前記第三の直列回路は、前記第一のスイッチング素子のオン動作時に、前記第四のスイッチング素子のオン動作により、前記第一の抵抗器と共に前記第一のスイッチング素子に並列接続され、前記第一のスイッチング素子のオフ動作時に、前記第三のスイッチング素子がオフ動作した後の、前記第四のスイッチング素子のオフ動作により、前記第一のスイッチング素子との並列接続が外されることを特徴とする減流装置。
The current reducing device according to claim 1,
The plurality of current reducing means includes:
First current reducing means connected in parallel to the first switching element;
A second current reducing means and a third current reducing means for removing the parallel connection with the first switching element in a stepwise manner when the first switching element is turned off;
The first current reducing means includes
A circuit connected in parallel to the first switching element, the first series circuit including a first resistor and a second resistor, and a first circuit arranged in parallel to the second resistor Two switching elements, and the first resistor is connected in parallel to the first switching element by the ON operation of the second switching element,
The second current reducing means includes
A second series circuit including a third resistor and a third switching element; and the second series circuit is configured to turn on the third switching element when the first switching element is turned on. The first switching element and the first switching element are connected in parallel with each other, and after the first switching element is turned off, the third switching element is turned off. Is disconnected in parallel,
The third current reducing means includes
A circuit connected in parallel to the second series circuit during the ON operation of the first switching element, comprising a third series circuit including a fourth resistor and a fourth switching element; The third series circuit is connected in parallel to the first switching element together with the first resistor by the on operation of the fourth switching element when the first switching element is on. In the off operation of the switching element, the parallel connection with the first switching element is removed by the off operation of the fourth switching element after the third switching element is turned off. Current reducing device.
 請求項1に記載の減流装置において、
 前記複数の減流手段は、
 前記第一のスイッチング素子に並列接続される第一の減流手段と、
 前記第一のスイッチング素子のオフ動作時に、前記第一のスイッチング素子に並列接続された状態から、その後、前記第一のスイッチング素子との並列接続が外される第二の減流手段と、を備え、
 前記第一の減流手段は、
 第一の抵抗器と第二のスイッチング素子を含む第一の直列回路と、前記第一のスイッチング素子と並列に接続される第二の抵抗器と、を有し、前記第一の直列回路は、前記第二のスイッチング素子のオン動作により、前記第一のスイッチング素子に並列接続され、
 前記第二の減流手段は、
 第三の抵抗器と第三のスイッチング素子を含む第二の直列回路を有し、前記第二の直列回路は、前記第一のスイッチング素子のオン動作時に、前記第三のスイッチング素子のオン動作により、前記第一のスイッチング素子に並列接続され、前記第一のスイッチング素子のオフ動作時に、前記第三のスイッチング素子のオフ動作により、前記第一のスイッチング素子との並列接続が外されることを特徴とする減流装置。
The current reducing device according to claim 1,
The plurality of current reducing means includes:
First current reducing means connected in parallel to the first switching element;
A second current reducing means for removing the parallel connection with the first switching element from the state connected in parallel with the first switching element during the off operation of the first switching element; Prepared,
The first current reducing means includes
A first series circuit including a first resistor and a second switching element; and a second resistor connected in parallel with the first switching element, wherein the first series circuit is , By the on operation of the second switching element, connected in parallel to the first switching element,
The second current reducing means includes
A second series circuit including a third resistor and a third switching element; and the second series circuit is configured to turn on the third switching element when the first switching element is turned on. The parallel connection to the first switching element is disconnected in parallel with the first switching element, and when the first switching element is turned off, the parallel connection with the first switching element is removed by the off operation of the third switching element. A current reducing device.
 請求項1~5のうちいずれか1項に記載の減流装置において、
 前記スイッチング素子は、シリコン又はシリコンより大きいバンドギャップを有する半導体材料を母材とすることを特徴とする遮断装置。
The current reducing device according to any one of claims 1 to 5,
The switching device is characterized in that a semiconductor material having a band gap larger than that of silicon or silicon is used as a base material.
 請求項1~5のうちいずれか1項に記載の減流装置において、
 前記スイッチング素子は、MOSFET又はIGBTの電圧駆動型素子であることを特徴とする遮断装置。
The current reducing device according to any one of claims 1 to 5,
The switching device is a MOSFET or IGBT voltage driven device.
 直流架線に接続された断流器と電力変換装置に接続されたフィルタリアクトルとを結ぶ経路の中に配置されて、そのオン動作により前記直流架線からの電力を前記フィルタリアクトルに供給する第一のスイッチング素子と、
 前記第一のスイッチング素子のオン動作時に、前記第一のスイッチング素子に並列接続され、前記第一のスイッチング素子のオフ動作時に、前記直流架線からの電流を前記フィルタリアクトルに導くバイパス経路を形成し、前記バイパス経路における電流を減流する複数の減流手段と、を備えた減流装置における減流方法であって、
 前記複数の減流手段が、前記電力変換装置の故障もしくは地絡により前記直流架線に生じた過電流を段階的に減流する複数の減流ステップを有することを特徴とする減流方法。
A first line is arranged in a path connecting a current breaker connected to the DC overhead line and a filter reactor connected to the power converter, and supplies power from the DC overhead line to the filter reactor by the ON operation. A switching element;
A bypass path is formed that is connected in parallel to the first switching element when the first switching element is turned on, and that guides current from the DC overhead line to the filter reactor when the first switching element is turned off. A current reducing method in a current reducing device comprising: a plurality of current reducing means for reducing current in the bypass path;
The current reducing method, wherein the plurality of current reducing means include a plurality of current reducing steps for gradually reducing an overcurrent generated in the DC overhead line due to a failure of the power converter or a ground fault.
 請求項8に記載の減流方法において、
 前記複数の減流ステップは、
 前記複数の減流手段のうち主減流手段が、前記第一のスイッチング素子に並列接続される主減流ステップと、
 前記複数の減流手段のうち1又は2以上の補助減流手段が、前記第一のスイッチング素子のオフ動作時に、前記第一のスイッチング素子に並列接続された状態から、その後、前記第一のスイッチング素子との並列接続が外される1又は2以上の補助減流ステップと、を含むことを特徴とする減流方法。
The current reducing method according to claim 8,
The plurality of current reduction steps include:
A main current reducing step in which main current reducing means among the plurality of current reducing means is connected in parallel to the first switching element;
One or more auxiliary current reducing means among the plurality of current reducing means are connected in parallel to the first switching element when the first switching element is turned off. One or more auxiliary current reducing steps in which the parallel connection with the switching element is removed.
 請求項8に記載の減流方法において、
 前記複数の減流手段は、
 前記第一のスイッチング素子に並列接続される第一の減流手段と、
 前記第一のスイッチング素子のオフ動作時に、前記第一のスイッチング素子に並列接続された状態から、その後、前記第一のスイッチング素子との並列接続が外される第二の減流手段と、を備え、
 前記第一の減流手段は、
 前記第一のスイッチング素子に並列に接続される回路であって、第一の抵抗器と第二の抵抗器を含む第一の直列回路と、前記第二の抵抗器に並列に配置される第二のスイッチング素子と、を有し、
 前記第二の減流手段は、
 第三の抵抗器と第三のスイッチング素子を含む第二の直列回路を有し、前記第二の直列回路は、前記第一のスイッチング素子のオン動作時に、前記第三のスイッチング素子のオン動作により、前記第一の抵抗器と共に前記第一のスイッチング素子に並列接続され、
 前記複数の減流ステップのうち第一の減流ステップでは、
 前記第一の抵抗器が、前記第二のスイッチング素子のオン動作により、前記第一のスイッチング素子に並列接続され、
 前記複数の減流ステップのうち第二の減流ステップでは、
 前記第二の直列回路が、前記第一のスイッチング素子がオフ動作した後、前記第三のスイッチング素子のオフ動作により、前記第一のスイッチング素子との並列接続が外されることを特徴とする減流方法。
The current reducing method according to claim 8,
The plurality of current reducing means includes:
First current reducing means connected in parallel to the first switching element;
A second current reducing means for removing the parallel connection with the first switching element from the state connected in parallel with the first switching element during the off operation of the first switching element; Prepared,
The first current reducing means includes
A circuit connected in parallel to the first switching element, the first series circuit including a first resistor and a second resistor, and a first circuit arranged in parallel to the second resistor Two switching elements,
The second current reducing means includes
A second series circuit including a third resistor and a third switching element; and the second series circuit is configured to turn on the third switching element when the first switching element is turned on. Is connected in parallel to the first switching element together with the first resistor,
In the first current reducing step among the plurality of current reducing steps,
The first resistor is connected in parallel to the first switching element by the ON operation of the second switching element,
In the second current reducing step among the plurality of current reducing steps,
In the second series circuit, after the first switching element is turned off, the parallel connection with the first switching element is removed by the off operation of the third switching element. Current reduction method.
 請求項8に記載の減流方法において、
 前記複数の減流手段は、
 前記第一のスイッチング素子に並列接続される第一の減流手段と、
 前記第一のスイッチング素子のオフ動作時に、前記第一のスイッチング素子との並列接続が段階的に外される第二の減流手段と第三の減流手段を備え、
 前記第一の減流手段は、
 前記第一のスイッチング素子に並列に接続される回路であって、第一の抵抗器と第二の抵抗器を含む第一の直列回路と、前記第二の抵抗器に並列に配置される第二のスイッチング素子と、を有し、
 前記第二の減流手段は、
 第三の抵抗器と第三のスイッチング素子を含む第二の直列回路を有し、前記第二の直列回路は、前記第一のスイッチング素子のオン動作時に、前記第三のスイッチング素子のオン動作により、前記第一の抵抗器と共に前記第一のスイッチング素子に並列接続され、
 前記第三の減流手段は、
 前記第一のスイッチング素子のオン動作時に、前記第二の直列回路に並列接続される回路であって、第四の抵抗器と第四のスイッチング素子を含む第三の直列回路を有し、前記第三の直列回路は、前記第一のスイッチング素子のオン動作時に、前記第四のスイッチング素子のオン動作により、前記第一の抵抗器と共に前記第一のスイッチング素子に並列接続され、
 前記複数の減流ステップのうち第一の減流ステップでは、
 前記第一の抵抗器が、前記第二のスイッチング素子のオン動作により、前記第一のスイッチング素子に並列接続され、
 前記複数の減流ステップのうち第二の減流ステップでは、
 前記第二の直列回路が、前記第一のスイッチング素子がオフ動作した後、前記第三のスイッチング素子のオフ動作により、前記第一のスイッチング素子との並列接続が外され、
 前記複数の減流ステップのうち第三の減流ステップでは、
 前記第三の直列回路が、前記第一のスイッチング素子のオフ動作時に、前記第三のスイッチング素子がオフ動作した後の、前記第四のスイッチング素子のオフ動作により、前記第一のスイッチング素子との並列接続が外されることを特徴とする減流方法。
The current reducing method according to claim 8,
The plurality of current reducing means includes:
First current reducing means connected in parallel to the first switching element;
A second current reducing means and a third current reducing means for removing the parallel connection with the first switching element in a stepwise manner when the first switching element is turned off;
The first current reducing means includes
A circuit connected in parallel to the first switching element, the first series circuit including a first resistor and a second resistor, and a first circuit arranged in parallel to the second resistor Two switching elements,
The second current reducing means includes
A second series circuit including a third resistor and a third switching element; and the second series circuit is configured to turn on the third switching element when the first switching element is turned on. Is connected in parallel to the first switching element together with the first resistor,
The third current reducing means includes
A circuit connected in parallel to the second series circuit during the ON operation of the first switching element, comprising a third series circuit including a fourth resistor and a fourth switching element; The third series circuit is connected in parallel to the first switching element together with the first resistor by the on operation of the fourth switching element when the first switching element is on.
In the first current reducing step among the plurality of current reducing steps,
The first resistor is connected in parallel to the first switching element by the ON operation of the second switching element,
In the second current reducing step among the plurality of current reducing steps,
After the first switching element is turned off, the second series circuit is disconnected from the parallel connection with the first switching element by the off operation of the third switching element.
In a third current reducing step among the plurality of current reducing steps,
When the third switching element is turned off when the first switching element is turned off, the fourth switching element is turned off after the third switching element is turned off. The current reduction method is characterized in that the parallel connection is removed.
 請求項8に記載の減流方法において、
 前記複数の減流手段は、
 前記第一のスイッチング素子に並列接続される第一の減流手段と、
 前記第一のスイッチング素子のオフ動作時に、前記第一のスイッチング素子に並列接続された状態から、その後、前記第一のスイッチング素子との並列接続が外される第二の減流手段と、を備え、
 前記第一の減流手段は、
 第一の抵抗器と第二のスイッチング素子を含む第一の直列回路と、前記第一のスイッチング素子と並列に接続される第二の抵抗器と、を有し、
 前記第二の減流手段は、
 第三の抵抗器と第三のスイッチング素子を含む第二の直列回路を有し、前記第二の直列回路は、前記第一のスイッチング素子のオン動作時に、前記第三のスイッチング素子のオン動作により、前記第一のスイッチング素子に並列接続され、
 前記複数の減流ステップのうち第一の減流ステップでは、
 前記第一の直列回路が、前記第二のスイッチング素子のオン動作により、前記第一のスイッチング素子に並列接続され、
 前記複数の減流ステップのうち第二の減流ステップでは、
 前記第二の直列回路が、前記第一のスイッチング素子のオフ動作時に、前記第三のスイッチング素子のオフ動作により、前記第一のスイッチング素子との並列接続が外されることを特徴とする減流方法。
The current reducing method according to claim 8,
The plurality of current reducing means includes:
First current reducing means connected in parallel to the first switching element;
A second current reducing means for removing the parallel connection with the first switching element from the state connected in parallel with the first switching element during the off operation of the first switching element; Prepared,
The first current reducing means includes
A first series circuit including a first resistor and a second switching element; and a second resistor connected in parallel with the first switching element;
The second current reducing means includes
A second series circuit including a third resistor and a third switching element; and the second series circuit is configured to turn on the third switching element when the first switching element is turned on. Is connected in parallel to the first switching element,
In the first current reducing step among the plurality of current reducing steps,
The first series circuit is connected in parallel to the first switching element by the ON operation of the second switching element,
In the second current reducing step among the plurality of current reducing steps,
The second series circuit is configured such that when the first switching element is turned off, the parallel connection with the first switching element is disconnected by the off operation of the third switching element. Flow method.
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JP2001037004A (en) * 1999-07-26 2001-02-09 Hitachi Ltd Inverter type electric car control device
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JP2008253084A (en) * 2007-03-30 2008-10-16 Railway Technical Res Inst Hybrid power system

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JP2001037004A (en) * 1999-07-26 2001-02-09 Hitachi Ltd Inverter type electric car control device
JP2006067732A (en) * 2004-08-27 2006-03-09 Toshiba Corp Electric vehicle control device
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