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WO2019153431A1 - 一种高频氮化镓/石墨烯异质结热电子晶体管的制备方法 - Google Patents

一种高频氮化镓/石墨烯异质结热电子晶体管的制备方法 Download PDF

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WO2019153431A1
WO2019153431A1 PCT/CN2018/079383 CN2018079383W WO2019153431A1 WO 2019153431 A1 WO2019153431 A1 WO 2019153431A1 CN 2018079383 W CN2018079383 W CN 2018079383W WO 2019153431 A1 WO2019153431 A1 WO 2019153431A1
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graphene
heterojunction
gallium nitride
gan
electron transistor
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何荧峰
郑新和
彭铭曾
卫会云
刘三姐
李美玲
宋祎萌
仇鹏
安运来
王瑾
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University of Science and Technology Beijing USTB
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/30—Devices controlled by electric currents or voltages
    • H10D48/32—Devices controlled by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H10D48/36—Unipolar devices
    • H10D48/362—Unipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions, e.g. hot electron transistors [HET], metal base transistors [MBT], resonant tunnelling transistors [RTT], bulk barrier transistors [BBT], planar doped barrier transistors [PDBT] or charge injection transistors [CHINT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/01—Manufacture or treatment
    • H10D48/031—Manufacture or treatment of three-or-more electrode devices
    • H10D48/032—Manufacture or treatment of three-or-more electrode devices of unipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions, e.g. hot electron transistors [HET], metal base transistors [MBT], resonant tunneling transistors [RTT], bulk barrier transistors [BBT], planar doped barrier transistors [PDBT] or charge injection transistors [CHINT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82—Heterojunctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN

Definitions

  • the invention relates to the technical field of semiconductor devices, in particular to a method for preparing a high frequency gallium nitride/graphene heterojunction thermal electron transistor.
  • GaN materials The research and application of GaN materials is the forefront and hotspot of global semiconductor research. It is a new semiconductor material for the development of microelectronic devices and optoelectronic devices. Together with semiconductor materials such as SiC and diamond, it is known as the first generation of Ge and Si. Third-generation semiconductor materials after semiconductor materials, second-generation GaAs, and InP compound semiconductor materials. It has a wide direct band gap, strong atomic bonds, high thermal conductivity, good chemical stability (nearly corroded by any acid) and strong anti-irradiation ability in optoelectronics, high temperature and high power devices and high There are broad prospects for the application of frequency microwave devices. However, there is still a lot of room for the development of GaN-based semiconductors. People have been looking for ways to solve the problems of "high-density dislocations, slow working speed, poor heat dissipation performance, high integration and difficult interconnection" of GaN semiconductor materials.
  • a two-dimensional electron gas formed by a gallium nitride heterojunction material such as GaN/AlGaN has a high electron density, which is advantageous for achieving high power, and a high electron mobility transistor (HEMT) made of an AlGaN/GaN heterojunction is used at a high temperature and high power.
  • HEMT high electron mobility transistor
  • single-layer graphene is only 0.34 nm, which is the thinnest two-dimensional material discovered by humans so far. Because of its very good strength, flexibility, electrical conductivity, thermal conductivity, optical properties, it has made great progress in the fields of physics, materials science, electronic information, computer, aerospace and other fields. As one of the newest nanomaterials found to be the thinnest, strongest, and most conductive and thermally conductive, graphene is called “black gold" and is the “king of new materials.” scientistss even predict that graphene will “completely change the 21st century.” ". It is very possible to set off a revolutionary new technology and new industrial revolution that has swept the world.
  • thermoelectric transistors Unlike conventional bipolar transistors that rely on electron and hole carriers to work, thermoelectric transistors rely on cold electrons (electrons that are in thermal equilibrium with the lattice) and hot electrons to work. Cold electrons provide the conductance of the different layers in the device, and the hot electrons carry the input information and magnify it in the device.
  • the typical structure of such a device is very similar to that of a bipolar transistor, and also has an emitter region (E), a base region (B), and a collector region (C). There is a barrier between each side of the base region of the hot electron transistor connected to the emitter region and the collector region.
  • the barrier function is to bind the cold electrons in their respective regions, and the hot electrons injected from the emitter region into the base region have A sufficiently large amount of energy passes through the barrier of the collector region, almost independent of the collector voltage, so the device has a very high output impedance R 0 .
  • Old-fashioned thermal electron transistors have not attracted much interest due to process and materials. Old-fashioned thermal electron transistors use metal as the base region, and since the mean free path of the hot electrons in the metal is very short, there is a problem of electron scattering. The obvious way is to reduce the thickness of the metal base, which will result in a large base resistance and a lack of metal tightness. The appearance of graphene has brought about a turning point in this problem. Graphene has metal-like properties.
  • the carrier mobility of graphene at room temperature is about 15000 cm 2 /(V ⁇ s), which is more than 10 for silicon materials. This guarantees a quasi-ballistic transport of hot electrons, while the single-layer graphene is very thin, only 0.34 nm.
  • the electron mobility of graphene is less affected by temperature changes. At any temperature between 50 and 500 K, the electron mobility of single-layer graphene is around 15000 cm 2 /(V ⁇ s), which ensures that the device is in poor condition. It can also work normally in the environment.
  • the production of graphene is also mature in the process. High-quality graphene templates can be obtained by stripping and transfer, and related products are sold, so graphene is an ideal material to replace the metal base.
  • GaN is easy to form a mixed crystal with AlN, InN, etc., and the heterostructure formed by using it as a two-dimensional electron gas generated by the emitter will increase the carrier density, and the current transfer mechanism of the two-dimensional electron gas to the graphene can be effectively improved.
  • the electron-emitting efficiency from the emitter to the base, together with the ultra-thin base of graphene, is beneficial for high-frequency, high-power devices.
  • the corresponding base layer to the collector layer of the collector region also needs to be replaced with a thin layer of GaN, which minimizes the thermal electron backscattering of graphene to the barrier layer relative to the metal oxide, thereby increasing the current gain effect.
  • GaN also has high thermal conductivity and stable chemical properties.
  • ALD is a method of forming a deposited film by alternately passing a gas phase precursor pulse into the reactor and chemically adsorbing and reacting on the deposited substrate. Due to the self-limiting characteristics of ALD, the deposited film has the advantages of controllable thickness, good shape retention and uniformity.
  • the graphene surface is chemically inert, and the growth of the film on the graphene surface requires activation treatment or growth at high temperatures.
  • the use of PEALD to deposit a gallium nitride film on the surface of graphene has the following advantages: 1.
  • the N source provided in PEALD is a Plasma gas, which does not require a very high temperature to form an active site on the surface of graphene to prevent graphene damage. 2.
  • the thickness of the grown GaN film can be controlled relatively accurately by the number of cycles, and the process is simple and reliable. 3.
  • the international production of electronic devices tends to be nanoscale, and ALD deposition methods are gaining more and more attention. People are constantly making various technological improvements, and PEALD growth can better integrate with new technologies and continuously reduce device size.
  • the technical problem to be solved by the present invention is to provide a method for preparing a high-frequency gallium nitride/graphene heterojunction thermal electron transistor, which can combine the advantages of graphene and gallium nitride to effectively improve the efficiency of the thermal electronic device.
  • the device size is reduced by PEALD technology.
  • the preparation method comprises the following steps:
  • step (3) transferring the graphene to the surface of the heterostructure in step (1) as a base region, and forming a base electrode by photolithography;
  • step (3) (4) using PEALD to grow a GaN film on the graphene in step (3) as a second barrier layer, and forming a metal collector region on the surface of the GaN film to complete high-frequency gallium nitride/graphene heterojunction thermal electrons Preparation of transistors.
  • a heterogeneous structure is formed by depositing a thin film layer of a group III nitride ternary alloy material on the GaN substrate by MOCVD, and the deposited thin film layer has a thickness of 10 to 15 nm; in the step (1), the heterostructure is GaN.
  • the interface with the group III nitride ternary alloy material serves as an emitter region, and the group III nitride ternary alloy material serves as the first barrier layer.
  • the emitter electrode of the emitter region in step (1) is one of Ti/Al/Ni/Au, Ti/Al/Mo/Au, Ti/Al/Ti/Au metal stack, and is formed by a lift-off process;
  • the metal is grown layer by layer by the electron beam evaporation method on the surface of the pattern obtained in the step (2), and then placed in acetone to remove the photoresist and the metal on the photoresist to obtain an emitter electrode.
  • the emitter electrode forming the emitter region in the step (1) is formed by a lift-off process and then rapidly annealed, and the annealing is performed in a vacuum environment or an inert gas.
  • the annealing temperature is 800 to 900 ° C, and the annealing time is 0.5 to 2 minutes.
  • the ion etching is low energy ion etching in a BCl 3 /Cl 2 environment, and the etching depth is 140-160 nm.
  • Step (3) Using the MOCVD growth transfer method, graphene is obtained on the surface of the heterojunction, and then the base electrode is formed on the surface of the graphene by a lift-off process, and the base electrode is a Ti/Pd/Au metal stack.
  • Step (3) The number of graphene layers obtained on the surface of the heterojunction is 1-4 layers by MOCVD growth transfer method.
  • Step (3) After forming the base electrode on the surface of the graphene, patterning is performed by photolithography and ion etching. In the photolithography, the MMA photoresist is spin-coated as a buffer layer, and then a positive photoresist is applied. Finally, the excess graphene is further removed by an ion etching machine and an oxygen plasma.
  • a second GaN barrier layer is deposited on the surface of the graphene by using PEALD, and triethyl gallium and Ar/N 2 /H 2 are respectively used as a Ga source and an N source, and the second barrier layer has a thickness of 10-15 nm.
  • the three gas volumes Ar:N 2 :H 2 in the Ar/N 2 /H 2 mixed gas are 1:3:6.
  • step (4) a metal collector region was prepared by a lift-off process on a GaN film, and annealed at 400 ° C for 5 minutes.
  • the invention adjusts the structure of the thermoelectric device on the basis of the conventional thermoelectric device, adopts the heterojunction as the emitter region and uses the group III nitride ternary alloy material as the first barrier layer, and simultaneously in the graphene A GaN thin film was formed as a second barrier layer by a method using PEALD.
  • This approach has the following three advantages:
  • Using a heterojunction as an emissive region and using a Group III nitride ternary alloy material as the first barrier layer can reduce the number of process steps;
  • the two-dimensional electron gas generated by using the heterojunction will increase the carrier density, and the current transfer mechanism of the two-dimensional electron gas to the graphene can effectively improve the electron emission efficiency from the emitter to the base;
  • the use of PEALD to grow GaN thin films on graphene combines the advantages of graphene high carrier mobility and GaN wide band gap to further improve the efficiency of the thermal electronic device, simplify the production process, and reduce the device size.
  • FIG. 1 is a schematic view showing a process of preparing a high-frequency gallium nitride/graphene heterojunction thermal electron transistor according to the present invention
  • FIG. 2 is a schematic view showing a specific preparation process in the embodiment of the present invention, wherein (a) is the step (1) operation, (b) is the step (2) operation, (c) is the step (3) operation, and (d) is Step (4) operation, (e) is the step (5) operation, (f) is the step (6) operation, and (g) is the step (7) operation;
  • FIG. 3 is an energy band diagram of a high-frequency gallium nitride/graphene heterojunction thermal electron transistor according to the present invention, wherein (a) is in an equilibrium state and (b) is in a voltage-increasing state;
  • FIG. 4 is a schematic view showing the structure of a high frequency gallium nitride/graphene heterojunction thermal electron transistor of the present invention.
  • 10-GaN substrate 20-AlGaN film; 30-emitter electrode; 40-graphene film; 50-base electrode; 60-GaN film; 70-collector.
  • thermoelectric transistor uses a heavily doped Si substrate as the base region, but the current density obtained is low, which limits the use of the thermoelectric device at high frequencies.
  • the old thermal electron transistor uses metal oxide as the second barrier layer, and its growth process is complicated and the performance is not satisfactory.
  • the present invention provides a method for preparing a high frequency gallium nitride/graphene heterojunction thermal electron transistor.
  • step (3) transferring the graphene to the surface of the heterostructure in step (1) as a base region, and forming a base electrode by photolithography;
  • thermoelectric transistor preparation using PEALD to grow a GaN film on the graphene in the step (3) as a second barrier layer, and forming a metal collector region on the surface of the GaN film to complete a high-frequency graphene/gallium nitride structure of the thermoelectric transistor preparation.
  • the structure of the produced hot electron transistor is shown in FIG.
  • a 1.2 ⁇ m GaN substrate 10 is provided, and a group III nitride ternary alloy material is grown on the GaN substrate 10 to form a heterostructure; specifically: MOCVD of the GaN substrate 10 at 1100 ° C
  • the AlGaN thin film 20 epitaxially grown in a thickness of 10 to 15 nm forms a heterostructure in which the molar component concentration of Al is 25% to 30%.
  • the emitter electrode 30 is directly formed on the heterostructure obtained in the step (1); specifically:
  • the photoresist is spin-coated on the surface of the heterostructure grown in step (1) to define the position and shape of the emitter electrode 30, and the photoresist required to grow the position of the emitter electrode 30 is removed by a developing technique, and the electron beam evaporation method is used.
  • Ti/Al/Ni/Au was grown layer by layer on the obtained pattern surface, and then placed in acetone to remove the photoresist and the metal on the photoresist to obtain an electrode.
  • the product is then annealed in a vacuum environment or inert gas to form an ohmic contact with an annealing temperature of 800 to 900 ° C and an annealing time of 0.5 to 2 minutes.
  • step (2) As shown in Figure 2(c), the product obtained in step (2) is subjected to low-energy ion etching; specifically:
  • the sample obtained in the step (2) is placed in a process gas environment containing Cl 2 and BCl 3 for low energy ion etching with an etching depth of 140-160 nm.
  • a single layer of graphene was grown on a copper sheet by MOCVD at a temperature of 1000 ° C, and the source was H 2 and CH 4 gas.
  • the PMMA material is then spin coated onto the graphene film 40 grown on copper, and the PMMA is placed face up in the copper etchant for a period of time to completely dissolve the copper.
  • the obtained PMMA/graphene film was transferred to 10% HCl for about 20 minutes.
  • the film was rinsed with deionized water for a period of time and transferred to a patterned GaN/AlGaN wafer, and finally PMMA was removed to obtain a graphene film 40.
  • the base electrode 50 is formed on the surface of the graphene by a lift-off technique, which has been previously described and will not be repeated.
  • the MMA material was then spin-coated on the surface of the graphene layer as a buffer layer, which was then patterned with a positive photoresist. After patterning, an ion etch machine was used to remove excess graphene and impact the surface with Plasma gas. Finally, the product was placed in an acetone solution to clean the surface of the graphene layer.
  • the surface of the graphene is deposited by PEALD as the second barrier layer by PEALD; specifically: firstly using UV/Ozone to the product in step (5) at 100 W power
  • the surface of the graphene was activated by pretreatment for 30 s.
  • the sample is then sent to the PEALD reaction chamber, and the temperature of the sample stage is raised to 200 ° C using triethyl gallium GaEt 3 and Ar/N 2 /H 2 (1:3:6) as Ga source and N, respectively.
  • the source was deposited for 100 cycles under the conditions of a growth parameter of 0.5 s GaEt 3 dose/25 s purge/50 s plasma/15 s purge to obtain a GaN thin film 60 having a film thickness of about 10 to 15 nm.
  • the collector region 70 is formed by a lift-off technique on the GaN barrier layer deposited in the step (6), and annealed in an inert gas atmosphere for 4 minutes at a temperature of 400 °C. Finally, a high frequency gallium nitride/graphene heterojunction thermal electron transistor is obtained.
  • thermoelectric transistor obtained in the above process in the equilibrium state and the applied voltage state are respectively shown in Fig. 3 (a) and Fig. 3 (b).

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Abstract

本发明提供一种高频氮化镓/石墨烯异质结热电子晶体管的制备方法，属于半导体器件技术领域。该方法首先在GaN衬底上生长Ⅲ族氮化物三元合金材料形成异质结构作为发射区和第一势垒层，并在异质结上通过光刻技术生长电极；用离子刻蚀技术进行器件绝缘化；转移石墨烯至异质结表面作为基区，通过光刻技术形成基区电极；最后使用PEALD在石墨烯上生长GaN薄膜作为第二势垒层，并在表面形成金属集电区。本发明通过使用PEALD在石墨烯上沉积GaN作为第二势垒层，将石墨烯与GaN基宽禁带半导体材料相结合，发挥两种材料体系的优势，有效提升了热电子晶体管的性能，缩小器件尺寸。该方法热预算低，对石墨烯造成的损伤小，有效避免了器件在生产过程中造成的损伤。

Description

一种高频氮化镓/石墨烯异质结热电子晶体管的制备方法 技术领域
本发明涉及半导体器件技术领域，特别是指一种高频氮化镓/石墨烯异质结热电子晶体管的制备方法。
背景技术
GaN材料的研究与应用是目前全球半导体研究的前沿和热点，是研制微电子器件、光电子器件的新型半导体材料，并与SiC、金刚石等半导体材料一起，被誉为是继第一代Ge、Si半导体材料、第二代GaAs、InP化合物半导体材料之后的第三代半导体材料。它具有宽的直接带隙、强的原子键、高的热导率、化学稳定性好(几乎不被任何酸腐蚀)等性质和强的抗辐照能力，在光电子、高温大功率器件和高频微波器件应用方面有着广阔的前景。然而，GaN基半导体的发展仍有很大空间，人们一直在寻找能够解决GaN半导体材料“高密度位错、工作速度慢、散热性能不良、高集成和互联难度大”这些问题的解决途径。
GaN/AlGaN等氮化镓异质结材料形成的二维电子气的电子密度高，有利于实现大功率，使用AlGaN/GaN异质结制成的高电子迁移率晶体管(HEMT)在高温大功率方面有非常好的应用前景，是目前国际国内的研究热点。
单层石墨烯的厚度仅为0.34nm，是人类目前为止发现的最薄的二维材料。由于其十分良好的强度、柔韧、导电、导热、光学特性，在物理学、材料学、电子信息、计算机、航空航天等领域都得到了长足的发展。作为目前发现的最薄、强度最大、导电导热性能最强的一种新型纳米材料，石墨烯被称为“黑金”，是“新材料之王”，科学家甚至预言石墨烯将“彻底改变21世纪”。极有可能掀起一场席卷全球的颠覆性新技术新产业革命。
与常规的双极晶体管依靠电子和空穴载流子工作有所不同，热电子晶体管是依靠冷电子(与晶格热平衡的电子)和热电子来工作的。冷电子提供器件中不同层的电导，热电子携带输入信息，并使之在器件中放大。这种器件的典型结构很类似于双极晶体管，也具有发射区(E)、基区(B)和集电区(C)。在热电子晶体管的基区两侧各有一个势垒与发射区和集电区相连,势垒的作用是把冷电子束缚在它们各自的区域内，从发射区注入到基区的热电子具有足够大的能量穿过集电区的势垒，几乎与集电极电压无关，因此这种器件具有很高的输出阻抗R 0。由于工艺和材料的原因，老式的热电子晶体管并没能引起人们的兴趣。老式的热电子晶体管使用金属作为基区，由于金属中热电子的平均自由程非常短，所以存在电子散射问题。显而易见的办法是减薄金属基区厚度，这将导致基区电阻变大同时金属的致密性也无法保障。石墨烯的出现给这个问题带来了转机，石墨烯具有类金属特性，石墨烯在室温下的载流子迁移率约为15000cm 2/(V·s)，这一数值超过了硅材料的10倍，这保证了热电子的准弹道输运，同时单层石墨烯非常薄，仅0.34nm。另外石墨烯的电子迁移率受温度变化的影响较小，50～500K之间的任何温度下，单层石墨烯的电子迁移率都在15000cm 2/(V·s)左右，保证了器件在恶劣环境下也能正常工作。在工艺上对石墨烯的生产也已成熟，高品质的石墨烯模板可以通过剥离和转移获得，并有相关产品销售，所以石墨烯就成了代替金属基区的理想材料。
GaN易与AlN、InN等构成混晶，将其形成的异质结构用作发射极产生的二维电子气将提升载流子密度，结合二维电子气到石墨烯的电流传输机制可以有效提升发射极到基极的电子发射效率，再加上石墨烯的超薄基区，这种热电子晶体管有利于实现高频大功率器件。相应的基区到集电区的势垒层也需要换用GaN薄层，这样做相对于金属氧化物能使石墨烯到势垒层的热电子背散射最小化，从而提升电流增益效应。除此之外氮化镓还具有高的热导率、稳定的化学特性，结合石墨烯，将大幅提升器件的性能和恶劣环境下的工作能力。目前国 际上已有石墨烯表面上氮化物的生长报道，因此在石墨烯上实现氮化镓的ALD生长不存在技术问题。
ALD是通过将气相前驱体脉冲交替地通入反应器并在沉积基体上化学吸附并反应而形成沉积膜的一种方法。由于ALD的自限制特征，其沉积得到的薄膜具有厚度可控，保形性好且均匀的优势。石墨烯表面具有化学惰性，在石墨烯表面生长薄膜需要先进行活化处理或在高温下进行生长。使用PEALD在石墨烯表面沉积氮化镓薄膜具有如下优势：1.PEALD中的提供的N源是Plasma气体，不需要很高的温度就能在石墨烯表面形成活性位点，防止石墨烯损伤。2.由于PEALD的自限制特征，可以通过循环次数来相对精确控制生长的GaN薄膜厚度，工艺简单可靠。3.国际上电子器件制作趋向纳米级，ALD沉积方法正越来越受到重视，人们不断对其进行各种技术改进，利用PEALD生长能更好的与新技术接轨，不断缩小器件尺寸。
发明内容
本发明要解决的技术问题是提供一种高频氮化镓/石墨烯异质结热电子晶体管的制备方法，能把石墨烯和氮化镓的优势结合起来，有效提升热电子器件的效率，同时通过PEALD技术缩小器件尺寸。
该制备方法包括步骤如下：
(一)在GaN衬底上生长Ⅲ族氮化物三元合金材料形成异质结构作为发射区和第一势垒层，并在异质结上通过光刻技术生长电极；
(二)用离子刻蚀技术进行器件绝缘化；
(三)转移石墨烯至步骤(一)中异质结构表面作为基区，通过光刻技术形成基区电极；
(四)使用PEALD在步骤(三)中的石墨烯上生长GaN薄膜作为第二势垒层，并在GaN薄膜表面形成金属集电区，完成高频氮化镓/石墨烯异质结热电子晶体管的制备。
其中，步骤(一)中在GaN衬底上通过MOCVD沉积Ⅲ族氮化物三元合金材料薄膜层形成异质结构，沉积的薄膜层厚度为10～15nm； 步骤(一)中异质结构以GaN和Ⅲ族氮化物三元合金材料交界面作为发射区，以Ⅲ族氮化物三元合金材料作为第一势垒层。
步骤(一)中发射区的发射电极为Ti/Al/Ni/Au,Ti/Al/Mo/Au,Ti/Al/Ti/Au金属叠层中的一种，采用lift-off工艺形成；
lift-off工艺的具体过程为：
(1)在生长的异质结表面旋涂光刻胶，定义出电极的位置和形状；
(2)利用显影技术将需要生长发射区电极位置的光刻胶去除；
(3)利用电子束蒸发方式在步骤(2)获得的图形表面逐层生长金属，随后放入丙酮中，去除光刻胶及光刻胶上金属，获得发射电极。
步骤(一)中形成发射区的发射电极采用lift-off工艺形成后进行快速退火，退火在真空环境或惰性气体的保护中进行，退火温度为800～900℃，退火时间为0.5～2分钟。
步骤(二)中离子刻蚀为在BCl 3/Cl 2环境中低能离子刻蚀，刻蚀深度为140-160nm。
步骤(三)采用MOCVD生长转移的方法在异质结表面获得石墨烯，然后采用lift-off工艺在石墨烯表面形成基区电极，基区电极为Ti/Pd/Au金属叠层。
步骤(三)采用MOCVD生长转移的方法在异质结表面获得石墨烯层数为1～4层。
步骤(三)石墨烯表面生成基区电极后通过光刻和离子刻蚀进行石墨烯图案化，其中光刻时，先旋涂MMA光刻胶作为缓冲层，再涂上正性光刻胶，最后用离子刻蚀机和氧等离子体进一步去除多余石墨烯。
步骤(四)中利用PEALD在石墨烯表面沉积GaN第二势垒层，以三乙基镓和Ar/N 2/H 2分别作为Ga源和N源，第二势垒层厚度为10～15nm，其中Ar/N 2/H 2混合气体中三种气体体积Ar：N 2：H 2为1:3:6。
步骤(四)中在GaN薄膜上通过lift-off工艺制备金属集电区，并在400℃下退火5分钟。
本发明的上述技术方案的有益效果如下：
本发明在传统热电子器件的基础上，对热电子器件的结构做出了调整，采用异质结作为发射区并使用Ⅲ族氮化物三元合金材料作为第一势垒层，同时在石墨烯上使用PEALD的方法生成GaN薄膜作为第二势垒层。这种做法有以下三点优点：
1、使用异质结作为发射区并使用Ⅲ族氮化物三元合金材料作为第一势垒层可以减少工艺步骤；
2、使用异质结产生的二维电子气将提升载流子密度，结合二维电子气到石墨烯的电流传输机制可以有效提升发射极到基极的电子发射效率；
3、在石墨烯上用PEALD生长GaN薄膜，结合石墨烯高载流子迁移率和GaN宽禁带的优势，进一步提升热电子器件效率，简化生产工艺，缩小器件尺寸。
附图说明
图1为本发明的高频氮化镓/石墨烯异质结热电子晶体管的制备方法程示意图；
图2为本发明实施例中具体制备工艺过程示意图，其中，(a)为步骤(一)操作，(b)为步骤(二)操作，(c)为步骤(三)操作，(d)为步骤(四)操作，(e)为步骤(五)操作，(f)为步骤(六)操作，(g)为步骤(七)操作；
图3为本发明高频氮化镓/石墨烯异质结热电子晶体管的能带图，其中，(a)为平衡状态，(b)为加电压状态；
图4为本发明的高频氮化镓/石墨烯异质结热电子晶体管的结构示意图。
其中：10-GaN衬底；20-AlGaN薄膜；30-发射区电极；40-石墨烯薄膜；50-基区电极；60-GaN薄膜；70-集电区。
具体实施方式
为使本发明要解决的技术问题、技术方案和优点更加清楚，下面将结合附图及具体实施例进行详细描述。
原有热电子晶体管采用重掺杂Si衬底作为基区，然而获得的电流密度却很低，这限制了热电子器件在高频下的使用。同时，旧热电子晶体管采用金属氧化物作为第二势垒层，其生长流程复杂，且性能不如人意。
为了克服以上缺点，结合石墨烯和氮化镓的优势，进一步提升热电子器件的性能，本发明提供一种高频氮化镓/石墨烯异质结热电子晶体管的制备方法。
如图1所示，该制备方法大致步骤如下：
(一)在GaN衬底上生长Ⅲ族氮化物三元合金材料形成异质结构作为发射区和第一势垒层，并在异质结上通过光刻技术生长电极；
(二)用离子刻蚀技术进行器件绝缘化；
(三)转移石墨烯至步骤(一)中异质结构表面作为基区，通过光刻技术形成基区电极；
(四)使用PEALD在步骤(三)中的石墨烯上生长GaN薄膜作为第二势垒层，并在GaN薄膜表面形成金属集电区，完成高频石墨烯/氮化镓结构的热电子晶体管制备。
制得的热电子晶体管结构如图4所示。
在具体操作过程中，按如下步骤进行制备：
(一)如图2(a)，提供1.2μmGaN衬底10，在GaN衬底10上生长Ⅲ族氮化物三元合金材料形成异质结构；具体为：让GaN衬底10在1100℃的MOCVD中外延生长10～15nm的AlGaN薄膜20形成异质结构，其中Al的摩尔组分浓度为25％～30％。
(二)如图2(b)，在步骤(一)所得异质结构上直接形成发射区电极30；具体为：
在步骤(一)生长的异质结构表面旋涂光刻胶，定义出发射区电极30的位置和形状，利用显影技术将需要生长发射区电极30位置的光刻胶去除，利用电子束蒸发方式在获得的图形表面逐层生长 Ti/Al/Ni/Au，随后放入丙酮中，去除光刻胶及光刻胶上金属，获得电极。随后让产品在真空环境或惰性气体的保护中进行退火以形成欧姆接触，退火温度为800～900℃，退火时间为0.5～2分钟。
(三)如图2(c)，对步骤(二)所得产品进行低能离子刻蚀；具体为：
将步骤(二)得到的样品放入包含Cl 2和BCl 3工艺气体环境中进行低能离子刻蚀，刻蚀深度为140-160nm。
(四)如图2(d)，转移石墨烯至步骤(三)所得产品；具体为：
采用MOCVD在铜片上生长单层石墨烯，温度为1000℃，源采用H 2和CH 4气体。随后在铜上生长的石墨烯薄膜40上旋涂PMMA材料，将PMMA面朝上放置在铜蚀刻剂中一段时间使铜完全溶解。将获得的PMMA/石墨烯膜转移到10％HCl中放大约20分钟。最后，将该膜用去离子水冲洗一段时间，并转移到图案化的GaN/AlGaN晶片上，最后去除PMMA得到石墨烯薄膜40。
(五)如图2(e)，通过lift-off技术在步骤(四)所得石墨烯表面形成基区电极，并通过光刻和离子刻蚀技术图案化石墨烯，进行器件绝缘化；具体为：
通过lift-off技术在石墨烯表面形成基区电极50，lift-off技术前面已描述，不再重复。随后在石墨烯层表面旋涂MMA材料作为缓冲层，再用正光刻胶对其进行图案化。在图案化后使用离子刻蚀机去除多余石墨烯，并用Plasma气体冲击表面。最后将产品放在丙酮溶液中清理石墨烯层表面。
(六)如图2(f)，在步骤(五)石墨烯表面通过PEALD沉积GaN薄膜60作为第二势垒层；具体为：先用UV/Ozone对步骤(五)中产品在100W功率下预处理30s，活化石墨烯表面。紧接着将样品送入PEALD反应室中，将样品台的温度升高至200℃，使用三乙基镓GaEt 3和Ar/N 2/H 2(1:3:6)分别作为Ga源和N源，在生长参数为：0.5s GaEt 3dose/25s purge/50s plasma/15s purge的条件下沉积100个周期，得到膜厚约为10～15nm的GaN薄膜60。
(七)如图2(g)，在步骤(六)沉积的GaN势垒层上通过lift-off技术形成集电区70，并在惰性气体环境中退火4分钟，温度为400℃。最后得到高频氮化镓/石墨烯异质结热电子晶体管。
上述过程制得的热电子晶体管在平衡状态和加电压状态的能带图分别如图3(a)、图3(b)所示。
以上所述是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明所述原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (10)

  1. 一种高频氮化镓/石墨烯异质结热电子晶体管的制备方法，其特征在于：包括步骤如下：
    (一)在GaN衬底上生长Ⅲ族氮化物三元合金材料形成异质结构作为发射区和第一势垒层，并在异质结上通过光刻技术生长电极；
    (二)用离子刻蚀技术进行器件绝缘化；
    (三)转移石墨烯至步骤(一)中异质结构表面作为基区，通过光刻技术形成基区电极；
    (四)使用PEALD在步骤(三)中的石墨烯上生长GaN薄膜作为第二势垒层，并在GaN薄膜表面形成金属集电区，完成高频石墨烯/氮化镓结构的热电子晶体管制备。
  2. 根据权利要求1所述的高频氮化镓/石墨烯异质结热电子晶体管的制备方法，其特征在于：所述步骤(一)中在GaN衬底上通过MOCVD沉积Ⅲ族氮化物三元合金材料薄膜层形成异质结构，沉积的薄膜层厚度为10～15nm；步骤(一)中异质结构以GaN和Ⅲ族氮化物三元合金材料的交界面作为发射区，以Ⅲ族氮化物三元合金材料作为第一势垒层。
  3. 根据权利要求1所述的高频氮化镓/石墨烯异质结热电子晶体管的制备方法，其特征在于：所述步骤(一)中发射区的发射电极为Ti/Al/Ni/Au,Ti/Al/Mo/Au,Ti/Al/Ti/Au金属叠层中的一种，采用lift-off工艺形成；
    lift-off工艺的具体过程为：
    (1)在生长的异质结表面旋涂光刻胶，定义出电极的位置和形状；
    (2)利用显影技术将需要生长发射区电极位置的光刻胶去除；
    (3)利用电子束蒸发方式在步骤(2)获得的图形表面逐层生长金属，随后放入丙酮中，去除光刻胶及光刻胶上金属，获得发射电极。
  4. 根据权利要求3所述的高频氮化镓/石墨烯异质结热电子晶体管的制备方法，其特征在于：所述步骤(一)中形成发射区的发射电极采用lift-off工艺形成后进行快速退火，退火在真空环境或惰性气体 的保护中进行，退火温度为800～900℃，退火时间为0.5～2分钟。
  5. 根据权利要求1所述的高频氮化镓/石墨烯异质结热电子晶体管的制备方法，其特征在于：所述步骤(二)中离子刻蚀为在BCl 3/Cl 2环境中低能离子刻蚀，刻蚀深度为140-160nm。
  6. 根据权利要求1所述的高频氮化镓/石墨烯异质结热电子晶体管的制备方法，其特征在于：所述步骤(三)采用MOCVD生长转移的方法在异质结表面获得石墨烯，然后采用lift-off工艺在石墨烯表面形成基区电极，基区电极为Ti/Pd/Au金属叠层。
  7. 根据权利要求6所述的高频氮化镓/石墨烯异质结热电子晶体管的制备方法，其特征在于：所述步骤(三)采用MOCVD生长转移的方法在异质结表面获得石墨烯层数为1～4层。
  8. 根据权利要求1所述的高频氮化镓/石墨烯异质结热电子晶体管的制备方法，其特征在于：所述步骤(三)石墨烯表面生成基区电极后通过光刻和离子刻蚀进行石墨烯图案化，其中光刻时，先旋涂MMA光刻胶作为缓冲层，再涂上正性光刻胶，最后用离子刻蚀机和氧等离子体进一步去除多余石墨烯。
  9. 根据权利要求1所述的高频氮化镓/石墨烯异质结热电子晶体管的制备方法，其特征在于：所述步骤(四)中利用PEALD在石墨烯表面沉积GaN第二势垒层，以三乙基镓和Ar/N 2/H 2分别作为Ga源和N源，第二势垒层厚度为10～15nm，其中，Ar/N 2/H 2混合气体中三种气体体积Ar：N 2：H 2为1:3:6。
  10. 根据权利要求1所述的高频氮化镓/石墨烯异质结热电子晶体管的制备方法，其特征在于：所述步骤(四)中在GaN薄膜上通过lift-off工艺制备金属集电区，并在400℃下退火5分钟。
PCT/CN2018/079383 2018-02-06 2018-03-18 一种高频氮化镓/石墨烯异质结热电子晶体管的制备方法 Ceased WO2019153431A1 (zh)

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