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WO2019144611A1 - Cellule solaire à hétérojonction et son procédé de préparation - Google Patents

Cellule solaire à hétérojonction et son procédé de préparation Download PDF

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Publication number
WO2019144611A1
WO2019144611A1 PCT/CN2018/101989 CN2018101989W WO2019144611A1 WO 2019144611 A1 WO2019144611 A1 WO 2019144611A1 CN 2018101989 W CN2018101989 W CN 2018101989W WO 2019144611 A1 WO2019144611 A1 WO 2019144611A1
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Prior art keywords
back field
solar cell
heterojunction solar
passivation layer
intrinsic
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PCT/CN2018/101989
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English (en)
Chinese (zh)
Inventor
郁操
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Beijing Juntai Innovation Technology Co Ltd
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Beijing Juntai Innovation Technology Co Ltd
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Priority to CN201880001491.8A priority Critical patent/CN110326119A/zh
Publication of WO2019144611A1 publication Critical patent/WO2019144611A1/fr
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/30—Coatings
    • H10F77/306—Coatings for devices having potential barriers
    • H10F77/311—Coatings for devices having potential barriers for photovoltaic cells
    • H10F77/315—Coatings for devices having potential barriers for photovoltaic cells the coatings being antireflective or having enhancing optical properties
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/16—Photovoltaic cells having only PN heterojunction potential barriers
    • H10F10/164—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells
    • H10F10/165—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells
    • H10F10/166—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells the Group IV-IV heterojunctions being heterojunctions of crystalline and amorphous materials, e.g. silicon heterojunction [SHJ] photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/20—Electrodes
    • H10F77/206—Electrodes for devices having potential barriers
    • H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
    • H10F77/219—Arrangements for electrodes of back-contact photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/30—Coatings
    • H10F77/306—Coatings for devices having potential barriers
    • H10F77/311—Coatings for devices having potential barriers for photovoltaic cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present application relates to, but is not limited to, the field of solar cell technology, and in particular, but not limited to, a heterojunction solar cell and a method of fabricating the same.
  • Heterojunction solar cells have the advantages of high efficiency, high stability, low temperature coefficient, double-sided power generation, and large space for cost reduction, and are expected to become one of the mainstream photovoltaic technologies in the future.
  • the present application provides a heterojunction solar cell and a preparation method thereof, which improve the short circuit current density of the battery and improve the power generation efficiency of the battery.
  • the application provides a heterojunction solar cell, the heterojunction solar cell comprising:
  • a first intrinsic passivation layer disposed on a front side of the crystalline silicon substrate
  • a second intrinsic passivation layer disposed on a back side of the crystalline silicon substrate
  • An anti-reflection layer disposed on the first intrinsic passivation layer
  • An emitter disposed on the second intrinsic passivation layer and a first back field, and an insulating arrangement between the emitter and the first back field;
  • a second back field disposed on the emitter, wherein the second back field is insulated from the first back field
  • Electrodes disposed on the first back field and the second back field.
  • the heterojunction solar cell is a full back contact heterojunction solar cell.
  • the crystalline silicon substrate is of a first conductivity type, and the reflection is of a second conductivity type, and the first back field and the second back field are also the first conductivity type.
  • the crystalline silicon substrate is an N-type crystalline silicon substrate.
  • the crystalline silicon substrate is a P-type crystalline silicon substrate.
  • the crystalline silicon substrate is a monocrystalline silicon wafer or a polycrystalline silicon wafer.
  • the first intrinsic passivation layer and the second intrinsic passivation layer are both intrinsic amorphous silicon based layers.
  • the intrinsic amorphous silicon based layer is an intrinsic amorphous silicon film or an intrinsic amorphous silicon oxide alloy film.
  • the electrode is a silver gate electrode or a copper gate electrode.
  • the emission is at least one of: an amorphous silicon film, an amorphous silicon alloy film, a microcrystalline silicon film, or a microcrystalline silicon alloy film.
  • the first back field is at least one of: an amorphous silicon film, an amorphous silicon alloy film, a microcrystalline silicon film, or a microcrystalline silicon alloy film; and the second back field is at least as follows A: an amorphous silicon film, an amorphous silicon alloy film, a microcrystalline silicon film, or a microcrystalline silicon alloy film.
  • the crystalline silicon substrate is N-type
  • the emission is P-type
  • the first back field is N-type
  • the second back field is N-type
  • the crystalline silicon substrate is P-type
  • the emission is extremely N-type
  • the first back field is P-type
  • the second back field is P-type
  • the application also provides a method for preparing a heterojunction solar cell, the method comprising the following steps:
  • An electrode is formed on the back field.
  • the method further includes: before forming an emitter in the first region on the second intrinsic passivation layer,
  • a mask on the second intrinsic passivation layer other than the first region is masked.
  • the first intrinsic passivation layer, the second intrinsic passivation layer, the anti-reflection layer, and the like are formed by a plasma enhanced chemical vapor deposition method or a hot wire chemical vapor deposition method.
  • the emitter is formed by a plasma enhanced chemical vapor deposition method or a hot wire chemical vapor deposition method.
  • the method further includes: before forming a back field on the second intrinsic passivation layer other than the first region and the emitter
  • FIG. 1 is a schematic structural view of a heterojunction solar cell according to an embodiment of the present application.
  • FIG. 2 is a flow chart of a method for preparing a heterojunction solar cell according to an embodiment of the present application
  • FIG. 3 is a view showing a state in which a second region on a second intrinsic amorphous silicon layer is masked
  • Figure 4 is a state diagram after forming a back field
  • Fig. 5 is a view showing a state in which a groove is formed on the back field.
  • Heterojunction solar cells usually include an amorphous silicon film, a transparent conductive oxide layer (TCO), a gate line electrode, etc., and an amorphous silicon film, a TCO layer absorbs incident sunlight, and a front gate.
  • TCO transparent conductive oxide layer
  • the occlusion of the line and the like affect the further improvement of the short-circuit current density of the solar cell of the structure.
  • the embodiment of the present application provides a heterojunction solar cell, and the heterojunction solar cell includes:
  • a first intrinsic passivation layer disposed on a front side of the crystalline silicon substrate
  • a second intrinsic passivation layer disposed on a back side of the crystalline silicon substrate
  • An anti-reflection layer disposed on the first intrinsic passivation layer
  • An emitter disposed on the second intrinsic passivation layer and a first back field, and an insulating arrangement between the emitter and the first back field;
  • a second back field disposed on the emitter, wherein the second back field is insulated from the first back field
  • Electrodes disposed on the first back field and the second back field.
  • the heterojunction solar cell is a full back contact heterojunction solar cell.
  • the crystalline silicon substrate is of a first conductivity type, and the reflection is of a second conductivity type, and the first back field and the second back field are also of the first conductivity type.
  • the first conductivity type is a P type
  • the second conductivity type is an N type
  • the first conductivity type is an N type
  • the second conductivity type may be a P type.
  • the heterojunction solar cell provided by the embodiment of the present invention avoids blocking the incident light by the electrode grid line disposed on the front surface of the crystalline silicon substrate, can realize current gain, and effectively improve the photoelectric conversion efficiency of the heterojunction solar cell;
  • the reverse side of the crystalline silicon substrate enables the transport of electrons and holes.
  • the crystalline silicon substrate may be an N-type crystalline silicon substrate or a P-type crystalline silicon substrate.
  • the crystalline silicon substrate may be a single crystal silicon wafer or a polycrystalline silicon wafer.
  • the first intrinsic passivation layer and the second intrinsic passivation layer may both be intrinsic amorphous silicon based layers.
  • the intrinsic amorphous silicon based layer may be at least one of: an intrinsic amorphous silicon layer, an intrinsic amorphous silicon film, an intrinsic amorphous silicon oxide layer, or an intrinsic non- Crystalline silicon oxide film.
  • the heterojunction solar cell may include:
  • a first intrinsic amorphous silicon based layer disposed on a front side of the single crystal silicon wafer
  • a second intrinsic amorphous silicon based layer disposed on a back side of the single crystal silicon wafer
  • An anti-reflection layer disposed on the first intrinsic amorphous silicon substrate
  • An emitter disposed on the second intrinsic amorphous silicon substrate and a first back field, and an insulating arrangement between the emitter and the first back field;
  • a second back field disposed on the emitter, wherein the second back field is insulated from the first back field
  • Electrodes disposed on the first back field and the second back field.
  • the single crystal silicon wafer may be an N-type single crystal silicon wafer or a P-type single crystal silicon wafer.
  • the first intrinsic amorphous silicon based layer and the second intrinsic amorphous silicon based layer may both be intrinsic amorphous silicon films or intrinsic amorphous silicon oxide alloy films.
  • the anti-reflection layer may be any one of SiO x , SiN x , Ta 2 O 5 , and TiO 2 .
  • the antireflection layer may be a single layer film or a multilayer composite film. This anti-reflection layer is also referred to as an anti-reflection film layer.
  • the electrode may be a silver gate electrode or a copper gate electrode.
  • the emitter may be at least one of a P-type amorphous silicon film, a P-type amorphous silicon alloy film, a P-type microcrystalline silicon film, or a P-type microcrystalline silicon alloy film.
  • the emitter may be at least one of an N-type amorphous silicon film, an N-type amorphous silicon alloy film, an N-type microcrystalline silicon film, or an N-type microcrystalline silicon alloy film.
  • the crystalline silicon substrate is an N-type crystalline silicon substrate; the emission is a P-type amorphous silicon film, a P-type amorphous silicon alloy film, a P-type microcrystalline silicon film, or P The microcrystalline silicon alloy film; the first back field is an N-type back field, and may be an N-type silicon-based film.
  • the first back field is at least one of the following: an N-type amorphous silicon film, an N-type amorphous a silicon alloy film, an N-type microcrystalline silicon film, or an N-type microcrystalline silicon alloy film;
  • the second back field is an N-type back field, and may be an N-type silicon-based film, for example, the second back field is at least one of the following Species: N-type amorphous silicon film, N-type amorphous silicon alloy film, N-type microcrystalline silicon film, or N-type microcrystalline silicon alloy film.
  • the crystalline silicon substrate is a P-type crystalline silicon substrate; the emission is an N-type amorphous silicon film, an N-type amorphous silicon alloy film, an N-type microcrystalline silicon film, or N
  • the first back field is at least one of the following: a P-type amorphous silicon film, a P-type amorphous a silicon alloy film, a P-type microcrystalline silicon film, or a P-type microcrystalline silicon alloy film;
  • the second back field is a P-type back field, and may be a P-type silicon-based film, for example, the second back field is at least one of the following Species: P-type amorphous silicon film, P-type amorphous silicon alloy film, P-type microcrystalline silicon film, or P-type microcrystalline silicon alloy film.
  • the embodiment of the present application further provides a method for preparing a heterojunction solar cell, and the method includes the following steps:
  • An electrode is formed on the back field.
  • the method for preparing a heterojunction solar cell is a full-back contact heterojunction solar cell preparation method.
  • the crystalline silicon substrate is of a first conductivity type, and the reflection is of a second conductivity type, and the first back field and the second back field are also the first conductivity type.
  • the first intrinsic passivation layer, the second intrinsic passivation layer, and the anti-reflection layer may be formed by plasma enhanced chemical vapor deposition or hot filament chemical vapor deposition. And the emitter.
  • the method for preparing a heterojunction solar cell may include the following steps:
  • An electrode is formed on the back field.
  • an embodiment of the present application provides a heterojunction solar cell including a single crystal silicon wafer 100 , a first intrinsic amorphous silicon layer 200 , a second intrinsic amorphous silicon layer 400 , and anti-reflection.
  • the second back field 620 is disposed on the emitter 500, and the emitter 500 and the first back field 610 are disposed between the second back field 620 and the first back field 610, and the electrode 700 is disposed at The first back field 610 and the second back field 620 are on.
  • Both the emitter 500 and the second back field 620 are silicon-based films with high doping concentration (high doping concentration is generally exhibited in the conductivity of the material, and the photoconductivity of the emitter material can be ⁇ 5 ⁇ 10 -5 s/cm.
  • the photo-conductivity of the back-field material may be ⁇ 5 ⁇ 10 ⁇ 3 s/cm, and an NP tunneling junction is formed at the contact surface of the emitter 500 and the second back field 620, whereby the transport of holes can be directly realized.
  • the heterojunction solar cell provided by the embodiment of the present invention avoids blocking the incident light on the front surface of the single crystal silicon wafer 100, and can achieve a current gain of 4.5% or more, thereby effectively improving the photoelectricity of the heterojunction solar cell. Conversion efficiency.
  • the single crystal silicon wafer 100 may be an N-type single crystal silicon wafer.
  • the first intrinsic amorphous silicon layer 200 and the second intrinsic amorphous silicon layer 400 may each be an intrinsic amorphous silicon film (a). -Si:H) or an intrinsic amorphous silicon oxide film (a-SiO x :H), whereby the open circuit voltage can be increased, thereby improving the conversion efficiency of the battery.
  • the first intrinsic amorphous silicon layer 200 and the second intrinsic amorphous silicon layer 400 are both intrinsic amorphous silicon films.
  • the electrode 700 may be a silver gate electrode or a copper electrode.
  • the emitter 500 can be a P-type amorphous silicon film or a P-type microcrystalline silicon film to increase the open circuit voltage of the battery, thereby improving the conversion efficiency of the battery.
  • the emitter 500 is a P-type microcrystalline silicon. film.
  • the anti-reflection film layer 300 may be any one of SiO x , SiN x , Ta 2 O 5 , and TiO 2 (in SiO x and SiN x , the size of x determines the refractive index of the material, and the larger x is the refraction of the material. The smaller the rate, the refractive index of the anti-reflection film layer can be between 1.5 and 2.5), and its effect is mainly to reduce the light absorption of the battery by reducing the reflection loss of sunlight on the surface of the battery.
  • the anti-reflection film layer 300 may have a surface passivation effect.
  • the embodiment of the present application further provides a method for preparing a full back contact heterojunction solar cell, and the method includes the following steps:
  • the area other than the first area on the second intrinsic amorphous silicon layer 400 may be the second area, and the first area and the second area may be spaced apart.
  • the preparation method of the embodiment of the present application may further include: after step S300, before step S400,
  • the emitter 500 When the emitter 500 is formed, it may be performed on the entire surface of the second intrinsic amorphous silicon layer 400. After the emitter 500 is formed on the entire surface of the second intrinsic amorphous silicon layer 400, it is also required to pass chemical etching or engraving. The non-emitter 500 region of the second intrinsic amorphous silicon 400 is removed by a thinning method. However, for this preparation method, the damage of the second intrinsic amorphous silicon layer 400 is liable to occur during chemical etching and scribing, and the precision control of the removal of the emitter 500 cannot be ensured.
  • the second region ie, the non-emitter region
  • the second region may be masked before the emitter 500 is formed to prevent the emitter 500 from covering the second region, so that the emitter 500 may be formed. While retaining the second area, it also simplifies the process.
  • the mask region 900 may be disposed in the second region to mask the second region. After the emitter 500 is formed, the mask sheet 900 may be removed.
  • the first intrinsic amorphous silicon layer 200 and the second intrinsic non-deposited layer may be formed by Plasma Enhanced Chemical Vapor Deposition (PECVD) or Hot Wire Chemical Vapor Deposition (HWCVD).
  • PECVD Plasma Enhanced Chemical Vapor Deposition
  • HWCVD Hot Wire Chemical Vapor Deposition
  • step S600 may include:
  • Step S610 can include:
  • a trench 800 is formed on the back field 600 by mechanical scoring or laser scribing to insulate the emitter 500 and the second back field 620 on the emitter 500 from the first back field 610, respectively.
  • the trench 800 may cause the first back field 610 formed on the second intrinsic amorphous silicon layer 400 to be spaced apart from the emitter 500 and the second back field 620 formed on the emitter 500, respectively, thereby the back field 600
  • the spacing is the first back field 610 on the second intrinsic amorphous silicon layer 400 and the second back field 620 on the emitter 500, thereby implementing the second back field 620 on the emitter 500 and the emitter 500, respectively.
  • the insulation of the back field 610 is the first back field 610 on the second intrinsic amorphous silicon layer 400 and the second back field 620 on the emitter 500, thereby implementing the second back field 620 on the emitter 500 and the emitter 500, respectively.
  • the trenches 800 may also be formed by other means.
  • the preparation method may further include: after step S400, before step S500,
  • the region separation of the field that is, the mask is formed at a position where the trench is to be formed, so that the region of the second region where the first back field 610 is to be formed may be separated from the first region, thereby enabling the emitter 500 and the second back field.
  • the 620 is insulated from the first back field 610 in the second region, respectively.
  • the preparation of the electrode 700 can be accomplished by a screen printing process or an electroplating process, and in some embodiments of the present application, the electrode 700 is prepared by a screen printing process.
  • the preparation method of the embodiment of the present application may further include: performing the fluffing cleaning on the single crystal silicon wafer 100 before the first intrinsic amorphous silicon layer 200 is formed on the front surface of the single crystal silicon wafer 100.
  • the purpose of the texturing is to produce a suede structure that can reduce the reflection of surface sunlight.
  • the effective suede structure can make the incident light reflect and refract multiple times on the surface of the silicon wafer, which increases the absorption of light and reduces the reflectivity.
  • the purpose of cleaning is to eliminate all kinds of pollutants adsorbed on the surface of the silicon wafer, and the cleanliness of the cleaning directly affects the yield and reliability of the battery, improves the overall minority life of the device, and improves the open circuit voltage of the battery.
  • the heterojunction solar cell and the preparation method thereof provided by the embodiments of the present invention avoid the shielding of the incident light by the gate line of the front surface of the single crystal silicon wafer, and the absorption of the short-wavelength (300-600 nm) light by the emitter surface of the light-injecting surface.
  • the loss can achieve a current gain of 4.5% or more, which effectively improves the photoelectric conversion efficiency of the heterojunction solar cell.

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Abstract

La présente invention porte sur une cellule solaire à hétérojonction et sur son procédé de préparation. La cellule comprend un substrat en silicium cristallin, une première couche de passivation intrinsèque, une seconde couche de passivation intrinsèque, une couche antireflet, un premier champ répulsif en face arrière, un second champ répulsif en face arrière, une électrode d'émetteur, ainsi que des électrodes positive et négative; la première couche de passivation intrinsèque est disposée au niveau de la face avant du substrat en silicium cristallin; la seconde couche de passivation intrinsèque est disposée au niveau de la face arrière du substrat en silicium cristallin; la couche antireflet est disposée sur la première couche de passivation intrinsèque; l'électrode d'émetteur et le premier champ répulsif en face arrière sont disposés sur la seconde couche de passivation intrinsèque; le second champ répulsif en face arrière est disposé sur l'électrode d'émetteur; l'électrode d'émetteur est isolée du premier champ répulsif en face arrière et le second champ répulsif en face arrière est isolé du premier champ répulsif en face arrière; les électrodes sont disposées sur le premier champ répulsif en face arrière et le second champ répulsif en face arrière.
PCT/CN2018/101989 2018-01-29 2018-08-23 Cellule solaire à hétérojonction et son procédé de préparation Ceased WO2019144611A1 (fr)

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