[go: up one dir, main page]

WO2019001067A1 - 一种像素电路、其驱动方法及显示面板 - Google Patents

一种像素电路、其驱动方法及显示面板 Download PDF

Info

Publication number
WO2019001067A1
WO2019001067A1 PCT/CN2018/081838 CN2018081838W WO2019001067A1 WO 2019001067 A1 WO2019001067 A1 WO 2019001067A1 CN 2018081838 W CN2018081838 W CN 2018081838W WO 2019001067 A1 WO2019001067 A1 WO 2019001067A1
Authority
WO
WIPO (PCT)
Prior art keywords
node
module
control
signal
pole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2018/081838
Other languages
English (en)
French (fr)
Inventor
马国强
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to US16/300,636 priority Critical patent/US10957257B2/en
Publication of WO2019001067A1 publication Critical patent/WO2019001067A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0238—Improving the black level
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a pixel circuit, a driving method thereof, and a display panel.
  • AMOLED Active Matrix Organic Light Emitting Diode
  • TFT LCD Thin Film Transistor Liquid Crystal Display
  • the luminescence brightness of the OLED is quite sensitive to the change of its driving current, and the driving transistor for driving the illuminating device is difficult to be completely consistent in the manufacturing process, that is, it is difficult to achieve uniformity of the driving transistors in each OLED pixel circuit. Threshold voltage.
  • factors such as process flow and device aging, as well as temperature changes during operation can exacerbate the non-uniformity between the threshold voltages of the drive transistors in each pixel circuit. This results in a large difference in the current flowing through the OLEDs in the respective pixels, resulting in uneven display brightness, thereby affecting the display effect of the entire image.
  • the pixel circuit provided by the embodiment of the present disclosure includes: a reset module, a compensation module, a driving module, a control module, a data signal writing module, a power input module, and a light emitting device.
  • the power input module, the driving module, the control module, and the light emitting device are sequentially connected in series, one end of the light emitting device is connected to a reference potential end, and the other end of the light emitting device is connected to the control module through a first node,
  • the reset module is connected in parallel with the light emitting device, and the driving module includes a driving transistor.
  • a first end of the reset module is connected to a first node between the light emitting device and the control module, a second end of the reset module is connected to the reference potential end, and a control end of the reset module is configured to receive a reset signal And outputting, by the control of the reset signal, a reference potential signal of the reference potential end to the first node;
  • the first end of the compensation module is connected to the first node, and the second end is connected to the power source a second node connected between the input module and the driving module, a third end connected to a gate of a driving transistor in the driving module, and a control end configured to receive a first control signal for use in the first control a compensation voltage is stored for a gate of a driving transistor of the driving module under control of a signal;
  • the driving module is connected to the control module via a third node for controlling an output signal at a third end of the compensation module And the second node is connected to the third node;
  • the control end of the control module is configured to receive a second
  • a first pole of the drive transistor is coupled to the second node and a second pole is coupled to the third node.
  • the power input module includes a second switching transistor; a gate of the second switching transistor is configured to receive the second control signal, a first pole is configured to receive the power signal, and a second pole Connected to the second node.
  • control module includes a third switching transistor; a gate of the third switching transistor is configured to receive the second control signal, a first pole is connected to the third node, and a second pole is The first node is connected.
  • the data signal writing module includes a fourth switching transistor; a gate of the fourth switching transistor is configured to receive the first control signal, and a first pole is configured to input the data signal, The two poles are connected to the third node.
  • the compensation module includes a fifth switching transistor and a capacitor; a gate of the fifth switching transistor is configured to receive the first control signal, a first pole is connected to the second node, and a second The poles are respectively connected to one end of the capacitor and the gate of the driving transistor; the other end of the capacitor is connected to the first node.
  • the reset module includes a sixth switching transistor; a gate of the sixth switching transistor is configured to receive a reset signal, a first pole is coupled to the reference potential terminal, and a second pole is coupled to the first Nodes are connected.
  • the compensation voltage is the sum of the data voltage and a threshold voltage of the drive transistor.
  • Another embodiment of the present disclosure is directed to a driving method for a pixel circuit according to any of the preceding embodiments, the driving method comprising:
  • the reset module connects the first node to the reference potential terminal under the control of the reset signal; the data signal writing module controls the data signal under the control of the first control signal Writing to the third node, the compensation module stores a compensation voltage for the gate of the driving transistor in the driving module under the control of the first control signal; the power input module is in the second Outputting the power signal to the second node under control of a control signal, the driving module connecting the second node to the third node under control of the compensation voltage, the control module The third node is in communication with the first node under the control of the second control signal.
  • Yet another embodiment of the present disclosure provides a display panel that can include the pixel circuit as described in any of the foregoing embodiments.
  • a pixel circuit including: a driving transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, a fifth switching transistor, a sixth switching transistor, a capacitor, and a light emitting device.
  • a gate of the driving transistor is respectively connected to one end of the capacitor and a second pole of the fifth switching transistor, a first pole of the driving transistor is connected to the second node, and a second pole of the driving transistor is connected to the third node a gate of the second switching transistor for receiving a second control signal, a first pole for receiving a power signal, a second pole connected to the second node, and a gate of the third switching transistor for receiving
  • the second control signal the first pole is connected to the third node, the second pole is connected to the first node;
  • the gate of the fourth switching transistor is used for receiving the first control signal, and the first pole is used for receiving a data signal, a second pole is connected to the third node;
  • a gate of the fifth switching transistor is configured to receive the first control signal,
  • the driving transistor is an N-type transistor
  • the second switching transistor, the third switching transistor, the fourth switching transistor, the fifth switching transistor, and the sixth switching transistor are all P-type transistors.
  • FIG. 1 schematically shows a structural block diagram of a pixel circuit provided in accordance with an embodiment of the present disclosure
  • FIGS. 2a and 2b are schematic structural diagrams of a pixel circuit according to an embodiment of the present disclosure
  • FIG. 3 is an exemplary operational timing diagram for the pixel circuit shown in FIG. 2b;
  • FIG. 4 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present disclosure.
  • the embodiment of the present disclosure provides a pixel circuit, as shown in FIG. 1 , which may include: a reset module 01 , a compensation module 02 , a driving module 03 , a control module 04 , a data signal writing module 05 , a power input module 06 , and a light emitting device OLED.
  • the power input module, the driving module, the control module and the light emitting device are sequentially connected in series, one end of the light emitting device is connected to the reference potential end, and the other end of the light emitting device is connected to the control module through the first node, and the reset module is connected in parallel with the light emitting device.
  • the drive module includes a drive transistor.
  • One end of the reset module 01 is connected to the reference potential terminal Vss, and the other end of the reset module is connected to the first node P1, and the control end Reset is used to receive the reset signal; the reset module 01 is used to control the reference potential end under the control of the reset signal
  • the reference signal is output to the first node P1.
  • the reference potential signal is a low level signal.
  • the first end of the compensation module 02 is connected to the first node P1, the second end is connected to the second node P2, and the control end is configured to receive the first control signal S1, the third end of the compensation module and the driving transistor in the driving module 03.
  • the gate is connected; the compensation module 02 is configured to provide a compensation voltage to the gate of the driving transistor of the driving module 03 under the control of the first control signal S1.
  • the first end of the driving module 03 is connected to the second node P2, and the second end is connected to the third node P3.
  • the driving module 03 is configured to control the second node P2 and the second node under the control of the output signal of the third end of the compensation module.
  • Three nodes P3 are connected.
  • the control terminal 04 is configured to receive the second control signal S2, the first end is connected to the third node P3, the second segment is connected to the first node P1, and the control module 04 is configured to be under the control of the second control signal S2.
  • the third node P3 is connected to the first node P1 to drive the light emitting device OLED to emit light.
  • the control end of the data signal writing module 05 is configured to receive the first control signal S1, the first end is for receiving the data signal Vdata, the second end is connected to the third node P3, and the data signal writing module 05 is used for the first control Under the control of the signal S1, the data signal Vdata is written to the third node P3.
  • the power input module 06 receives the power signal Vdd and the second control signal S2, and the output end of the power input module 06 is connected to the second node P2; the power input module 06 is configured to output the power signal Vdd under the control of the second control signal S2. Go to the second node P2.
  • the compensation module may provide a compensation voltage to the gate voltage when the driving transistor in the driving module operates to eliminate or reduce the driving voltage of the threshold voltage of the driving transistor to the OLED light emitting device. The effect is to improve the uniformity of the luminance of the light-emitting device, thereby improving the image display quality of the display panel.
  • Figure 2a shows an example of the pixel current shown in Figure 1.
  • the driving module 03 can include: a driving transistor T1; the gate of the driving transistor T1 is connected to the third end of the compensation module 02, the first pole is connected to the second node P2, and the second pole and the third node P3 Connected.
  • the driving transistor can be turned on under the control of the output signal of the third end of the compensation module, whereby the second node can be connected to the third node.
  • the power input module 06 may include: a second switching transistor T2; the gate of the second switching transistor T2 is configured to receive the second control signal S2, the first pole For receiving the power signal Vdd, the second pole is connected to the second node P2.
  • the second switching transistor can be turned on under the control of the second control signal, and the turned-on second switching transistor can output the power signal to the second node.
  • the control module 04 may include: a third switching transistor T3; the gate of the third switching transistor T3 is configured to receive the second control signal S2, the first pole and The third node P3 is connected, and the second pole is connected to the first node P1.
  • the third switching transistor can be turned on under the control of the second control signal, and the turned-on third switching transistor can connect the first node with the third node.
  • the data signal writing module 05 may include: a fourth switching transistor T4; the gate of the fourth switching transistor T4 is used to input the first control signal S1, One pole is used to input the data signal Vdata, and the second pole is connected to the third node P3.
  • the fourth switching transistor can be turned on under the control of the first control signal, and the turned-on fourth switching transistor can output the data signal to the third node.
  • the compensation module 02 may include: a fifth switching transistor T5 and a capacitor C; wherein a gate of the fifth switching transistor T5 is configured to receive the first control signal S1
  • the first pole is connected to the second node P2, and the second pole is respectively connected to one end of the capacitor C and the gate of the driving transistor in the driving module 03; the other end of the capacitor C is connected to the first node P1.
  • the fifth switching transistor may be turned on under the control of the first control signal, and the turned-on fifth switching transistor may connect the second node to the gate of the driving transistor.
  • the reset module 01 may include: a sixth switching transistor T6; a gate of the sixth switching transistor T6 is configured to receive a reset signal Reset, and the first pole is used for receiving Referring to the potential signal Vss, the second pole is connected to the first node P1.
  • the sixth switching transistor can be turned on under the control of the reset signal, and the turned-on sixth switching transistor can output the reference potential signal to the first node.
  • Figure 2a shows the main components of the various modules in the pixel circuit, and those skilled in the art will appreciate that the various modules of the pixel circuit may also include elements not shown in Figure 2a. However, in one embodiment, each of the pixel circuits described in the above embodiments may also be composed only of the elements described above. Therefore, in this embodiment, as shown in FIG. 2b, the pixel circuit includes a driving transistor T1, switching transistors T2 to T6, a capacitor C, and a light emitting device OLED.
  • the gate of the driving transistor T1 is respectively connected to one end of the capacitor C and the second pole of the fifth switching transistor T5, and drives only the first pole and the second pole of the transistor T1 to be connected to the second node P2 and the third node P3, respectively.
  • the gate of the second switching transistor T2 is for receiving the second control signal S2, the first pole is for receiving the power signal Vdd, the second pole is connected with the second node P2, and the gate of the third switching transistor T3 is for receiving the second Control signal S2, the first pole is connected to the third node P3, the second pole is connected to the first node P1;
  • the gate of the fourth switching transistor T4 is for receiving the first control signal S1, and the first pole is for receiving the data signal Vdata
  • the second pole is connected to the third node P3;
  • the gate of the fifth switching transistor T5 is for receiving the first control signal S1, the first pole is connected to the second node P2;
  • the other end of the capacitor C is connected to the first node P1;
  • the driving transistor T1 is an N-type metal oxide semiconductor field effect transistor
  • the switching transistor T2-T6 is a P-type metal oxide semiconductor field effect transistor.
  • the source of the driving transistor T1 is connected to the third node P3, and the drain thereof is connected to the second node P2.
  • the driving current for driving the light emitting device OLED to emit light can be expressed as:
  • Vo is the voltage of the anode of the light emitting device OLED
  • K is a constant related to the process parameters and geometric dimensions of the driving transistor T1
  • Vgs is the voltage difference between the gate of the driving transistor and the first pole.
  • the driving transistor and the switching transistor mentioned in the above embodiments of the present disclosure may be a thin film transistor (TFT) or a metal oxide semiconductor field effect transistor (MOS), which is not limited herein.
  • TFT thin film transistor
  • MOS metal oxide semiconductor field effect transistor
  • the first and second poles of these transistors can be interchanged without specific distinction.
  • Fig. 3 shows a timing diagram of a signal for a pixel circuit as shown in Fig. 2b, in which three time periods t1 to t3 are shown. In the following description, a high level signal is indicated by 1 and a low level signal is indicated by 0.
  • the data signal Vdata charges one end of the capacitor C through the driving transistor T1 and the fifth switching transistor T5 until the voltage at one end of the capacitor C is Vdata+Vth, thereby writing the threshold voltage Vth to the capacitor C, completing the driving transistor Compensation of the gate voltage.
  • the driving current for driving the light emitting device OLED to emit light is independent of the threshold voltage Vth, so that the influence of the variation of the threshold voltage on the light emitting brightness of the light emitting device can be eliminated;
  • the driving current I thereof is increased, so that the problem of brightness degradation caused by aging of the light-emitting device OLED can be improved.
  • an embodiment of the present disclosure provides a driving method for a pixel circuit provided by the foregoing embodiment of the present disclosure.
  • the driving method may include:
  • the reset module connects the first node to the reference potential terminal under the control of a reset signal.
  • the data signal writing module writes the data signal to the third node under the control of the first control signal;
  • the compensation module is the gate of the driving transistor in the driving module under the control of the first control signal Polar storage compensation voltage;
  • the power input module outputs the power signal to the second node under the control of the second control signal; the driving module connects the second node to the third node under the control of the compensation voltage; the control module is in the Under the control of the two control signals, the third node is connected to the first node.
  • an embodiment of the present disclosure provides a display panel including the above pixel circuit provided by an embodiment of the present disclosure.
  • the display panel can be applied to any product or component having a display function such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like. Since the principle of solving the problem of the display panel is similar to that of the pixel circuit, the implementation of the display panel can be referred to the implementation of the pixel circuit described above, and the repeated description is omitted.
  • Embodiments of the present disclosure provide a pixel circuit, a driving method thereof, and a display panel.
  • the pixel circuit includes: a reset module, a compensation module, a driving module, a control module, a data signal writing module, a power input module, and a light emitting device.
  • the power input module, the drive module, the control module, and the light emitting device are sequentially connected in series.
  • the reset module is connected in parallel to both ends of the light emitting device, and one end of the light emitting device is connected to the reference potential signal segment, and the reset module is configured to output the reference potential signal to the other end of the light emitting device under the control of the reset signal.
  • the data signal writing module can write the data signal to the third node between the driving module and the control module under the control of the first control signal.
  • the compensation module is connected to the first node between the light emitting device and the control module, the second node between the power input module and the driving module, and the driving module, and the compensation module receives the first control signal.
  • the compensation module may store a compensation voltage for the gate of the driving transistor in the driving module under the control of the first control signal, and the compensation voltage is substantially the sum of the data signal voltage and the threshold voltage of the driving transistor.
  • the driving module can communicate the power input module with the control module under the control of the compensation voltage provided by the compensation module, and the control module can communicate the driving module with the light emitting device under the control of the second control signal, thereby driving the light emitting device to emit light.
  • the driving current for driving the light emitting device to emit light can be prevented from being affected by the threshold voltage of the driving transistor, thereby improving the influence of the threshold voltage drift on the brightness of the light emitting device, and improving the light emitting device.
  • the brightness uniformity of the light is increased, thereby improving the display quality of the display panel.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

一种像素电路、其驱动方法及显示面板，该像素电路包括：复位模块(01)、补偿模块(02)、驱动模块(03)、控制模块(04)、数据信号写入模块(05)、电源输入模块(06)和发光器件(OLED)。补偿模块(02)可以为对驱动模块(03)中的驱动晶体管的栅极存储补偿电压，从而减轻或消除驱动晶体管的阈值电压对发光器件(OLED)的驱动电流的影响，可以提高发光器件的发光亮度均一性，进而提高显示面板的显示质量。

Description

一种像素电路、其驱动方法及显示面板
相关申请的交叉引用
本申请要求于2017年6月29日递交的中国专利申请No.201710515661.1的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开涉及显示技术领域，尤其涉及一种像素电路、其驱动方法及显示面板。
背景技术
随着显示技术的进步，越来越多的有源矩阵有机发光二极管(Active Matrix Organic Light Emitting Diode，AMOLED)显示面板进入市场，与传统的晶体管液晶显示面板(Thin Film Transistor Liquid Crystal Display，TFT LCD)相比，有源矩阵有机发光二极管显示面板具有低能耗、生产成本低、自发光、宽视角及响应速度快等优点，目前，在手机、PDA、数码相机等显示领域已经开始逐步取代传统的LCD显示屏。与TFT LCD利用稳定的电压控制亮度不同，AMOLED属于电流驱动，需要稳定的电流来控制发光。
OLED的发光亮度对其驱动电流的变化相当敏感，且用于驱动发光器件发光的驱动晶体管在制作过程中很难做到完全一致，即，很难实现各个OLED像素电路中的驱动晶体管具有一致的阈值电压。此外，工艺制程和器件老化，以及工作过程中温度的变化等因素会加剧各像素电路中的驱动晶体管的阈值电压之间的不均匀性。这样就导致了流过各个像素中的OLED的电流存在较大差异，使得显示亮度不均，从而影响整个图像的显示效果。
发明内容
本公开实施例提供的像素电路包括：复位模块、补偿模块、驱动模块、控制模块、数据信号写入模块、电源输入模块和发光器件。所述电源输入模块、所述驱动模块、所述控制模块以及所述发光器件依 次串联连接，发光器件的一端连接至参考电位端，发光器件的另一端通过第一节点连接至所述控制模块，所述复位模块与所述发光器件并联连接，所述驱动模块包括驱动晶体管。所述复位模块的第一端连接至所述发光器件和所述控制模块之间的第一节点，复位模块的第二端连接至所述参考电位端，复位模块的控制端用于接收复位信号，用于在所述复位信号的控制下，将参考电位端的参考电位信号输出到所述第一节点；所述补偿模块的第一端与所述第一节点相连，第二端与所述电源输入模块和所述驱动模块之间的第二节点相连，第三端与所述驱动模块中的驱动晶体管的栅极相连，控制端用于接收第一控制信号，用于在所述第一控制信号的控制下，为所述驱动模块的驱动晶体管的栅极存储补偿电压；所述驱动模块经由第三节点连接至所述控制模块，用于在所述补偿模块的第三端的输出信号的控制下，将所述第二节点与所述第三节点连通；所述控制模块的控制端用于接收第二控制信号，用于在所述第二控制信号的控制下，将所述第三节点与所述第一节点连通；所述数据信号写入模块的控制端用于接收所述第一控制信号，数据信号写入模块的第一端用于接收数据信号，数据信号写入模块的第二端与所述第三节点相连，数据信号写入模块用于在所述第一控制信号的控制下，将所述数据信号写入到所述第三节点；所述电源输入模块接收电源信号和所述第二控制信号，用于在所述第二控制信号的控制下，将所述电源信号输出到所述第二节点。
在一些实施例中，驱动晶体管的第一极与所述第二节点相连，第二极与所述第三节点相连。
在一些实施例中，所述电源输入模块包括第二开关晶体管；所述第二开关晶体管的栅极用于接收所述第二控制信号，第一极用于接收所述电源信号，第二极与所述第二节点相连。
在一些实施例中，所述控制模块包括第三开关晶体管；所述第三开关晶体管的栅极用于接收所述第二控制信号，第一极与所述第三节点相连，第二极与所述第一节点相连。
在一些实施例中，所述数据信号写入模块包括第四开关晶体管；所述第四开关晶体管的栅极用于接收所述第一控制信号，第一极用于输入所述数据信号，第二极与所述第三节点相连。
在一些实施例中，所述补偿模块包括第五开关晶体管和电容；所 述第五开关晶体管的栅极用于接收所述第一控制信号，第一极与所述第二节点相连，第二极分别与所述电容的一端和所述驱动晶体管的栅极相连；所述电容的另一端与所述第一节点相连。
在一些实施例中，所述复位模块包括第六开关晶体管；所述第六开关晶体管的栅极用于接收复位信号，第一极连接至所述参考电位端，第二极与所述第一节点相连。
在一些实施例中，所述补偿电压是所述数据电压和所述驱动晶体管的阈值电压的和。
本公开的另一实施例通了一种用于如前述任一实施例所述的像素电路的驱动方法，该驱动方法包括：
所述复位模块在所述复位信号的控制下，将所述第一节点连接至所述参考电位端；所述数据信号写入模块在所述第一控制信号的控制下，将所述数据信号写入到所述第三节点，所述补偿模块在所述第一控制信号的控制下，为所述驱动模块中的驱动晶体管的栅极存储补偿电压；所述电源输入模块在所述第二控制信号的控制下，将所述电源信号输出到所述第二节点，所述驱动模块在所述补偿电压的控制下，将所述第二节点与所述第三节点连通，所述控制模块在所述第二控制信号的控制下，将所述第三节点与所述第一节点连通。
本公开的又一实施例提供了一种显示面板，其可包括如前述是任一实施例所述的像素电路。
本公开的另一实施提供的像素电路包括：驱动晶体管、第二开关晶体管、第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管、电容和发光器件。所述驱动晶体管的栅极分别与所述电容的一端和所述第五开关晶体管的第二极相连，驱动晶体管的第一极与第二节点相连，驱动晶体管的第二极与第三节点相连；所述第二开关晶体管的栅极用于接收第二控制信号，第一极用于接收电源信号，第二极与所述第二节点相连；所述第三开关晶体管的栅极用于接收所述第二控制信号，第一极与所述第三节点相连，第二极与第一节点相连；所述第四开关晶体管的栅极用于接收第一控制信号，第一极用于接收数据信号，第二极与所述第三节点相连；所述第五开关晶体管的栅极用于接收所述第一控制信号，第一极与所述第二节点相连；所述电容的另一端与所述第一节点相连；所述第六开关晶体管的栅极用于 接收复位信号，第一极连接至参考电位信号端，第二极与所述第一节点相连；所述发光器件的第一端与所述第一节点相连，第二端连接至所述参考电位信号端。
在一些实施例中，所述驱动晶体管是N型晶体管，所述第二开关晶体管、第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管均为P型晶体管。
附图说明
图1示意性地示出根据本公开实施例提供的像素电路的结构框图；
图2a和图2b为本公开实施例提供的像素电路的具体结构示意图；
图3为针对图2b所示的像素电路的示例性工作时序图；
图4为本公开实施例提供的像素电路的驱动方法流程图。
具体实施方式
下面结合附图，对本公开实施例提供的像素电路、其驱动方法及显示面板的具体实施方式进行详细的说明。
本公开实施例提供了一种像素电路，如图1所示，可以包括：复位模块01、补偿模块02、驱动模块03、控制模块04、数据信号写入模块05、电源输入模块06和发光器件OLED。电源输入模块、驱动模块、控制模块以及发光器件依次串联连接，发光器件的一端连接至参考电位端，发光器件的另一端通过第一节点连接至所述控制模块，复位模块与发光器件并联连接，驱动模块包括驱动晶体管。
复位模块01的一端连接至参考电位端Vss，，复位模块的另一端与第一节点P1相连，其控制端Reset用于接收复位信号；复位模块01用于在复位信号控制下，将参考电位端的参考信号输出到第一节点P1。在一个实施例中，参考电位信号是低电平信号。
补偿模块02的第一端与第一节点P1相连，第二端与第二节点P2相连，控制端用于接收第一控制信号S1，补偿模块的第三端与驱动模块03中的驱动晶体管的栅极相连；补偿模块02用于在第一控制信号S1的控制下，向驱动模块03的驱动晶体管的栅极提供补偿电压。
驱动模块03的第一端与第二节点P2相连，第二段与第三节点P3相连；驱动模块03用于在补偿模块的的第三端的输出信号的控制下， 将第二节点P2与第三节点P3连通。
控制模块04的控制端用于接收第二控制信号S2，第一端与第三节点P3相连，第二段与第一节点P1相连；控制模块04用于在第二控制信号S2的控制下，将第三节点P3与第一节点P1连通，以驱动发光器件OLED发光。
数据信号写入模块05的控制端用于接收第一控制信号S1，第一端用于接收数据信号Vdata，第二端与第三节点P3相连；数据信号写入模块05用于在第一控制信号S1的控制下，将数据信号Vdata写入到第三节点P3。
电源输入模块06接收电源信号Vdd和第二控制信号S2，电源输入模块06的输出端与第二节点P2相连；电源输入模块06用于在第二控制信号S2的控制下，将电源信号Vdd输出到第二节点P2。
对于本公开实施例提供的上述像素电路，其中的补偿模块可以对驱动模块中的驱动晶体管工作时的栅极电压提供补偿电压，以消除或减轻驱动晶体管的阈值电压对OLED发光器件的驱动电流的影响，，从而提高发光器件的发光亮度均一性，进而提高显示面板的图像显示质量。
图2a示出了图1所示的像素电流的一个示例。如图2a所示，驱动模块03可以包括：驱动晶体管T1；驱动晶体管T1的栅极与补偿模块02的第三端相连，第一极与第二节点P2相连，第二极与第三节点P3相连。具体地，驱动晶体管可以在补偿模块的第三端的输出信号的控制下导通，由此可以将第二节点与第三节点连通。
本公开实施例提供的上述像素电路中，如图2a所示，电源输入模块06可以包括：第二开关晶体管T2；第二开关晶体管T2的栅极用于接收第二控制信号S2，第一极用于接收电源信号Vdd，第二极与第二节点P2相连。具体地，第二开关晶体管可以在第二控制信号的控制下导通，导通的第二开关晶体管可以将电源信号输出到第二节点。
本公开实施例提供的上述像素电路中，如图2a所示，控制模块04可以包括：第三开关晶体管T3；第三开关晶体管T3的栅极用于接收第二控制信号S2，第一极与第三节点P3相连，第二极与第一节点P1相连。具体地，第三开关晶体管可以在第二控制信号的控制下导通，导通的第三开关晶体管可以将第一节点与第三节点连通。
本公开实施例提供的上述像素电路中，如图2a所示，数据信号写入模块05可以包括：第四开关晶体管T4；第四开关晶体管T4的栅极用于输入第一控制信号S1，第一极用于输入数据信号Vdata，第二极与第三节点P3相连。具体地，第四开关晶体管可以在第一控制信号的控制下导通，导通的第四开关晶体管可以将数据信号输出到第三节点。
本公开实施例提供的上述像素电路中，如图2a所示，补偿模块02可以包括：第五开关晶体管T5和电容C；其中，第五开关晶体管T5的栅极用于接收第一控制信号S1，第一极与第二节点P2相连，第二极分别与电容C的一端和驱动模块03中的驱动晶体管的栅极相连；电容C的另一端与第一节点P1相连。具体地，第五开关晶体管可以在第一控制信号的控制下导通，导通的第五开关晶体管可以将第二节点与驱动晶体管的栅极连通。
本公开实施例提供的上述像素电路中，如图2a所示，复位模块01可以包括：第六开关晶体管T6；第六开关晶体管T6的栅极用于接收复位信号Reset，第一极用于接收参考电位信号Vss，第二极与第一节点P1相连。具体地，第六开关晶体管可以在复位信号的控制下导通，导通的第六开关晶体管可以将参考电位信号输出到第一节点。
图2a示出了像素电路中各个模块的主要元件，本领域技术人员能够理解到的是，像素电路的各个模块还可包括图2a中未示出的元件。然而，在一个实施例中，上述实施例所述的像素电路中的各个模块也可以仅由以上描述的元件组成。因此，在该实施例中，如图2b所示，像素电路包括：驱动晶体管T1、开关晶体管T2～T6、电容C和发光器件OLED。
驱动晶体管T1的栅极分别与电容C的一端和第五开关晶体管T5的第二极相连，驱动仅晶体管T1的第一极和第二极分别与第二节点P2和第三节点P3相连。第二开关晶体管T2的栅极用于接收第二控制信号S2，第一极用于接收电源信号Vdd，第二极与第二节点P2相连；第三开关晶体管T3的栅极用于接收第二控制信号S2，第一极与第三节点P3相连，第二极与第一节点P1相连；第四开关晶体管T4的栅极用于接收第一控制信号S1，第一极用于接收数据信号Vdata，第二极与第三节点P3相连；第五开关晶体管T5的栅极用于接收第一控制信号S1，第一极与第二节P2相连；电容C的另一端与第一节点P1相连；第六 开关晶体管T6的栅极用于接收复位信号Reset，第一极用于接收参考电位信号Vss，第二极与第一节点P1相连；发光器件OLED的阳极与第一节点P1相连，阴极连接至参考电位信号端。在图2b所示的示例中，驱动晶体管T1是N型金属氧化物半导体场效应管，开关晶体管T2-T6是P型金属氧化物半导体场效应管。在该示例中，驱动晶体管T1的源极连接至第三节点P3，其漏极连接至第二节点P2。
对于图2b所示实施例提供的像素电路，驱动发光器件OLED发光的驱动电流可以表示为：
Figure PCTCN2018081838-appb-000001
其中，Vo为发光器件OLED阳极的电压，K是与驱动晶体管T1的工艺参数和几何尺寸有关的常数，Vgs为驱动晶体管的栅极和第一极之间的电压差。由上述电流计算公式可以看出，驱动发光器件OLED发光的驱动电流与阈值电压Vth无关，从而可以消除阈值电压的变化对发光器件的发光亮度的影响。此外，随着发光器件的老化，发光器件的阳极电压Vo可逐渐升高，此时其驱动电流I随之升高，从而可以改善发光器件OLED老化造成的亮度下降的问题。
本公开上述实施例中提到的驱动晶体管和开关晶体管可以是薄膜晶体管(TFT，Thin Film Transistor)，也可以是金属氧化物半导体场效应管(MOS，Metal Oxide Semiconductor)，在此不做限定。在具体实施中，这些晶体管的第一极和第二极可以互换，不做具体区分。下面，结合示例性的工作时序对本公开实施例提供的像素电路的工作过程进行详细描述。图3示出了针对如图2b所示的像素电路信号时序图，在该信号时序图中，示出了t1～t3三个时间段。在下述描述中，以1表示高电平信号，0表示低电平信号。
在t1阶段，Reset＝0，S1＝1，S2＝1。由于Reset＝0，因此，第六开关晶体管T6导通，导通的第六开关晶体管T6将低电平的参考电位信号Vss输出到第一节点P1，从而实现对第一节点P1的复位，即，对发光器件OLED的阳极以及电容C的一端进行复位。
在t2阶段，Reset＝1，S1＝0，S2＝1。由于S1＝0，因此，第四开关晶体管T4和第五开关晶体管T5导通；导通的第四开关晶体管T4将数据信号Vdata输出到第三节点P3；导通的第五开关晶体管T5将第二节点P2与驱动晶体管T1的栅极连通。此时，驱动晶体管T1的源极和漏 极之间的电压近似为驱动晶体管T1的阈值电压Vth。数据信号Vdata通过驱动晶体管T1和第五开关晶体管T5对电容C的一端进行充电，直到电容C一端的电压为Vdata+Vth，从而实现将阈值电压Vth写入到电容C，完成了对驱动晶体管的栅极电压的补偿。
在t3阶段，Reset＝1，S1＝1，S2＝0。由于S2＝0，因此，第二开关晶体管T2和第三开关晶体管T3导通；导通的第二开关晶体管T2将电源信号Vdd输出到第二节点P2；驱动晶体管T1在电容C与驱动晶体管T1的栅极相连的一端所保持的电压信号的控制下导通，导通的驱动晶体管T1将第二节点P2与第三节点P3导通；导通的第三开关晶体管T3将第三节点P3与第一节点P1导通，从而驱动发光器件OLED发光。此时，驱动晶体管T1的栅极和源极之间的电压可表示为：Vgs＝(Vdata+Vth)-(Vdd-Vo+Vss)，因此，驱动发光器件OLED发光的驱动电流为：
Figure PCTCN2018081838-appb-000002
由上述电流计算公式可以看出，对于本公开实施例提供的像素电路，驱动发光器件OLED发光的驱动电流与阈值电压Vth无关，从而可以消除阈值电压的变化对发光器件的发光亮度的影响；同时，随着发光器件的老化造成发光器件的阳极电压Vo升高时，其驱动电流I随之升高，从而可以改善发光器件OLED老化造成的亮度下降的问题。
基于同一发明构思，本公开实施例提供了一种用于本公开前述实施例提供的像素电路的驱动方法，如图4所示，该驱动方法可以包括：
S101、在复位阶段，复位模块在复位信号的控制下，将所述第一节点连接至所述参考电位端；
S102、在补偿阶段，数据信号写入模块在第一控制信号的控制下，将数据信号写入到第三节点；补偿模块在第一控制信号的控制下，为驱动模块中的驱动晶体管的栅极存储补偿电压；
S103、在发光阶段，电源输入模块在第二控制信号的控制下，将电源信号输出到第二节点；驱动模块在补偿电压的控制下，将第二节点与第三节点连通；控制模块在第二控制信号的控制下，将第三节点与第一节点连通。
基于同一发明构思，本公开实施例提供了一种显示面板，包括本公开实施例提供了的上述像素电路。该显示面板可以应用于手机、平 板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。由于该显示面板解决问题的原理与像素电路相似，因此该显示面板的实施可以参见上述像素电路的实施，重复之处不再赘述。
本公开实施例提供了一种像素电路、其驱动方法及显示面板，该像素电路包括：复位模块、补偿模块、驱动模块、控制模块、数据信号写入模块、电源输入模块和发光器件，其中所述电源输入模块、所述驱动模块、所述控制模块以及所述发光器件依次串联连接。复位模块并联至发光器件的两端，发光器件的一端连接至参考电位信号段，复位模块用于在复位信号的控制下，将参考电位信号输出到发光器件的另一端。数据信号写入模块可以在第一控制信号的控制下，将数据信号写入驱动模块和控制模块之间的第三节点。补偿模块与发光器件和控制模块之间的第一节点、电源输入模块和驱动模块之间的第二节点以及驱动模块连接，并且补偿模块接收第一控制信号。补偿模块可以在第一控制信号的控制下，为驱动模块中的驱动晶体管的栅极存储补偿电压，该补偿电压大致为数据信号电压和驱动晶体管的阈值电压的和。驱动模块可以在补偿模块所提供的补偿电压的控制下将电源输入模块与控制模块连通，同时控制模块可以在第二控制信号的控制下将驱动模块与发光器件连通，从而驱动发光器件发光。
利用本公开实施例提供的上述的像素电路，可以使得用于驱动发光器件发光的驱动电流免受驱动晶体管的阈值电压的影响，从而可以改善阈值电压漂移对发光器件的亮度的影响，提高发光器件的发光亮度均一性，进而提高显示面板的显示质量。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (12)

  1. 一种像素电路，包括：复位模块、补偿模块、驱动模块、控制模块、数据信号写入模块、电源输入模块和发光器件，所述电源输入模块、所述驱动模块、所述控制模块以及所述发光器件依次串联连接，发光器件的一端连接至参考电位端，发光器件的另一端通过第一节点连接至所述控制模块，所述复位模块与所述发光器件并联连接，所述驱动模块包括驱动晶体管，
    其中所述复位模块的第一端连接至所述发光器件和所述控制模块之间的第一节点，复位模块的第二端连接至所述参考电位端，复位模块的控制端用于接收复位信号，用于在所述复位信号的控制下，将参考电位端的参考电位信号输出到所述第一节点；
    所述补偿模块的第一端与所述第一节点相连，第二端与所述电源输入模块和所述驱动模块之间的第二节点相连，第三端与所述驱动模块中的驱动晶体管的栅极相连，控制端用于接收第一控制信号，用于在所述第一控制信号的控制下，为所述驱动模块的驱动晶体管的栅极存储补偿电压；
    所述驱动模块经由第三节点连接至所述控制模块，用于在所述补偿模块的第三端的输出信号的控制下，将所述第二节点与所述第三节点连通；
    所述控制模块的控制端用于接收第二控制信号，用于在所述第二控制信号的控制下，将所述第三节点与所述第一节点连通；
    所述数据信号写入模块的控制端用于接收所述第一控制信号，数据信号写入模块的第一端用于接收数据信号，数据信号写入模块的第二端与所述第三节点相连，数据信号写入模块用于在所述第一控制信号的控制下，将所述数据信号写入到所述第三节点；
    所述电源输入模块接收电源信号和所述第二控制信号，用于在所述第二控制信号的控制下，将所述电源信号输出到所述第二节点。
  2. 如权利要求1所述的像素电路，其中所述驱动晶体管的第一极与所述第二节点相连，第二极与所述第三节点相连。
  3. 如权利要求1所述的像素电路，其中所述电源输入模块，包括第二开关晶体管；
    所述第二开关晶体管的栅极用于接收所述第二控制信号，第一极用于接收所述电源信号，第二极与所述第二节点相连。
  4. 如权利要求1所述的像素电路，其中所述控制模块，包括：第三开关晶体管；
    所述第三开关晶体管的栅极用于接收所述第二控制信号，第一极与所述第三节点相连，第二极与所述第一节点相连。
  5. 如权利要求1所述的像素电路，其中所述数据信号写入模块，包括：第四开关晶体管；
    所述第四开关晶体管的栅极用于接收所述第一控制信号，第一极用于输入所述数据信号，第二极与所述第三节点相连。
  6. 如权利要求1所述的像素电路，其中所述补偿模块，包括：第五开关晶体管和电容；其中，
    所述第五开关晶体管的栅极用于接收所述第一控制信号，第一极与所述第二节点相连，第二极分别与所述电容的一端和所述驱动晶体管的栅极相连；所述电容的另一端与所述第一节点相连。
  7. 如权利要求1所述的像素电路，其中所述复位模块，包括：第六开关晶体管；
    所述第六开关晶体管的栅极用于接收复位信号，第一极连接至所述参考电位端，第二极与所述第一节点相连。
  8. 如权利要求1-7中任一项所述的像素电路，其中所述补偿电压是所述数据电压和所述驱动晶体管的阈值电压的和。
  9. 一种用于如权利要求1-8任一项所述的像素电路的驱动方法，包括：
    所述复位模块在所述复位信号的控制下，将所述第一节点连接至所述参考电位端；
    所述数据信号写入模块在所述第一控制信号的控制下，将所述数据信号写入到所述第三节点，所述补偿模块在所述第一控制信号的控制下，为所述驱动模块中的驱动晶体管的栅极存储补偿电压；
    所述电源输入模块在所述第二控制信号的控制下，将所述电源信号输出到所述第二节点，所述驱动模块在所述补偿电压的控制下，将所述第二节点与所述第三节点连通，所述控制模块在所述第二控制信号的控制下，将所述第三节点与所述第一节点连通。
  10. 一种显示面板，包括如权利要求1-8任一项所述的像素电路。
  11. 一种像素电路，包括：驱动晶体管、第二开关晶体管、第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管、电容和发光器件；其中，
    所述驱动晶体管的栅极分别与所述电容的一端和所述第五开关晶体管的第二极相连，驱动晶体管的第一极与第二节点相连，驱动晶体管的第二极与第三节点相连；
    所述第二开关晶体管的栅极用于接收第二控制信号，第一极用于接收电源信号，第二极与所述第二节点相连；
    所述第三开关晶体管的栅极用于接收所述第二控制信号，第一极与所述第三节点相连，第二极与第一节点相连；
    所述第四开关晶体管的栅极用于接收第一控制信号，第一极用于接收数据信号，第二极与所述第三节点相连；
    所述第五开关晶体管的栅极用于接收所述第一控制信号，第一极与所述第二节点相连；
    所述电容的另一端与所述第一节点相连；
    所述第六开关晶体管的栅极用于接收复位信号，第一极连接至参考电位信号端，第二极与所述第一节点相连；
    所述发光器件的第一端与所述第一节点相连，第二端连接至所述参考电位信号端。
  12. 如权利要求1所述的像素电路，其中所述驱动晶体管是N型晶体管，所述第二开关晶体管、第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管均为P型晶体管。
PCT/CN2018/081838 2017-06-29 2018-04-04 一种像素电路、其驱动方法及显示面板 Ceased WO2019001067A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US16/300,636 US10957257B2 (en) 2017-06-29 2018-04-04 Pixel circuit, driving method thereof and display panel

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710515661.1A CN107103882A (zh) 2017-06-29 2017-06-29 一种像素电路、其驱动方法及显示面板
CN201710515661.1 2017-06-29

Publications (1)

Publication Number Publication Date
WO2019001067A1 true WO2019001067A1 (zh) 2019-01-03

Family

ID=59663824

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/081838 Ceased WO2019001067A1 (zh) 2017-06-29 2018-04-04 一种像素电路、其驱动方法及显示面板

Country Status (3)

Country Link
US (1) US10957257B2 (zh)
CN (1) CN107103882A (zh)
WO (1) WO2019001067A1 (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107103882A (zh) 2017-06-29 2017-08-29 京东方科技集团股份有限公司 一种像素电路、其驱动方法及显示面板
CN107516488A (zh) * 2017-09-20 2017-12-26 上海天马有机发光显示技术有限公司 一种像素电路、其驱动方法、显示面板及显示装置
CN112489599B (zh) * 2020-12-23 2022-09-27 武汉华星光电半导体显示技术有限公司 Amoled像素驱动电路、驱动方法及显示面板
CN113066435B (zh) * 2021-03-25 2022-07-12 京东方科技集团股份有限公司 像素驱动电路、显示面板和显示装置
CN115376456A (zh) * 2021-05-20 2022-11-22 京东方科技集团股份有限公司 像素电路及其驱动方法、显示面板、显示装置
CN118116324A (zh) * 2024-04-11 2024-05-31 厦门天马显示科技有限公司 像素驱动电路、显示面板以及显示装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110227903A1 (en) * 2010-03-17 2011-09-22 Sang-Moo Choi Pixel and organic light emitting display device using the same
CN102956192A (zh) * 2011-08-17 2013-03-06 乐金显示有限公司 有机发光二极管显示装置
CN102982766A (zh) * 2012-12-10 2013-03-20 友达光电股份有限公司 一种像素补偿电路
CN104809989A (zh) * 2015-05-22 2015-07-29 京东方科技集团股份有限公司 一种像素电路、其驱动方法及相关装置
CN107103882A (zh) * 2017-06-29 2017-08-29 京东方科技集团股份有限公司 一种像素电路、其驱动方法及显示面板

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20060038847A (ko) * 2004-11-01 2006-05-04 주식회사 대우일렉트로닉스 능동소자를 이용한 유기 이엘 소자 구동의 소자 구조
JP2010039435A (ja) * 2008-08-08 2010-02-18 Sony Corp 表示パネルモジュール及び電子機器
CN101996579A (zh) * 2010-10-26 2011-03-30 华南理工大学 有源有机电致发光显示器的像素驱动电路及其驱动方法
CN103280182B (zh) * 2013-05-29 2015-04-15 中国科学院上海高等研究院 Amoled阈值电压的补偿方法及补偿电路
CN104867442B (zh) * 2014-02-20 2017-10-31 北京大学深圳研究生院 一种像素电路及显示装置
US9778800B2 (en) * 2014-06-27 2017-10-03 Boe Technology Group Co., Ltd. Pixel circuit, display panel and display apparatus
CN204680360U (zh) * 2015-02-02 2015-09-30 信利（惠州）智能显示有限公司 一种像素电路及显示装置
CN104680976B (zh) * 2015-02-09 2017-02-22 京东方科技集团股份有限公司 像素补偿电路、显示装置及驱动方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110227903A1 (en) * 2010-03-17 2011-09-22 Sang-Moo Choi Pixel and organic light emitting display device using the same
CN102956192A (zh) * 2011-08-17 2013-03-06 乐金显示有限公司 有机发光二极管显示装置
CN102982766A (zh) * 2012-12-10 2013-03-20 友达光电股份有限公司 一种像素补偿电路
CN104809989A (zh) * 2015-05-22 2015-07-29 京东方科技集团股份有限公司 一种像素电路、其驱动方法及相关装置
CN107103882A (zh) * 2017-06-29 2017-08-29 京东方科技集团股份有限公司 一种像素电路、其驱动方法及显示面板

Also Published As

Publication number Publication date
US20200320934A1 (en) 2020-10-08
CN107103882A (zh) 2017-08-29
US10957257B2 (en) 2021-03-23

Similar Documents

Publication Publication Date Title
CN107358915B (zh) 一种像素电路、其驱动方法、显示面板及显示装置
CN107610652B (zh) 像素电路、其驱动方法、显示面板及显示装置
US10083658B2 (en) Pixel circuits with a compensation module and drive methods thereof, and related devices
US9601057B2 (en) Pixel circuit, organic electroluminesce display panel and display device
JP6474911B2 (ja) 画素回路、有機エレクトロルミネセンス表示パネル、表示装置及びその駆動方法
CN104575398B (zh) 像素电路及其驱动方法、显示装置
CN108492770B (zh) 一种像素补偿电路、其驱动方法及显示面板、显示装置
US10565933B2 (en) Pixel circuit, driving method thereof, array substrate, display device
US10297195B2 (en) Pixel circuit and driving method thereof, array substrate, display panel and display device
CN105931599B (zh) 像素驱动电路及其驱动方法、显示面板、显示装置
US10204558B2 (en) Pixel circuit, driving method thereof, and display apparatus
CN107452338B (zh) 一种像素电路、其驱动方法、显示面板及显示装置
US20170116918A1 (en) Pixel circuit and driving method for the pixel circuit
WO2018076719A1 (zh) 像素驱动电路及其驱动方法、显示面板和显示装置
CN107346654B (zh) 一种像素电路及其驱动方法、显示装置
WO2019001067A1 (zh) 一种像素电路、其驱动方法及显示面板
CN107507567A (zh) 一种像素补偿电路、其驱动方法及显示装置
US20200035158A1 (en) Pixel driving circuit, method for driving the same and display device
WO2016141681A1 (zh) 像素电路及其驱动方法、显示装置
WO2017045357A1 (zh) 像素电路及其驱动方法、显示基板及显示装置
CN106971691A (zh) 一种像素电路、驱动方法及显示装置
CN113066439B (zh) 一种像素电路、驱动方法、电致发光显示面板及显示装置
WO2016155161A1 (zh) Oeld像素电路、显示装置及控制方法
WO2019047701A1 (zh) 像素电路及其驱动方法、显示装置
CN106297663B (zh) 一种像素电路、其驱动方法及相关装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18823043

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18823043

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 28.05.2020)

122 Ep: pct application non-entry in european phase

Ref document number: 18823043

Country of ref document: EP

Kind code of ref document: A1