WO2019057085A1 - Display panel - Google Patents

Abstract

A display panel (10), comprising: a first substrate, a second substrate and display medium molecules sandwiched between the first substrate and the second substrate. The first substrate is provided with multiple pixel units (110), which are arranged in rows and columns; and the second substrate is provided with a common electrode layer (21), and the common electrode layer (21) comprises multiple common electrode regions (210), which correspond to the multiple pixel units (110) on a one-to-one basis. Each of the pixel units (110) comprises multiple pixel electrodes (PE1, PE2), which are arranged at intervals, and each of the pixel electrodes (PE1, PE2) includes multiple electrode regions with different slit orientations. Each of the common electrode regions (210) is formed with multiple hollowed patterns (2101, 2103), which are arranged at intervals, and the multiple hollowed patterns (2101, 2103) correspond to and mate with the multiple pixel electrodes (PE1, PE2) on a one-to-one basis, such that display medium molecules between the common electrode region (210) and a pixel unit (110) corresponding to the common electrode region (210) form multiple domains with different orientation directions.

Description

Display panel Technical field

The present disclosure relates to the field of display technologies, and in particular, to a display panel.

Background technique

As the display specifications of liquid crystal displays continue to move toward large sizes, when the size of the pixels is large, some liquid crystal molecules cannot be tilted in a short time, and even tilting cannot occur. Therefore, it is difficult for the liquid crystal display to have a good wide viewing angle, and the response speed of the liquid crystal molecules is slow. Therefore, in order to improve the response speed and wide viewing angle characteristics of the liquid crystal molecules, it is generally required to match the design of the protrusions, that is, to provide protrusions on the color filter substrate and the array substrate to give liquid crystal molecules when no voltage is applied. The pretilt angle allows the liquid crystal molecules to tilt rapidly toward the pretilt angle when the liquid crystal display is applied with a voltage. However, due to the interaction of the protrusions with the liquid crystal molecules, the liquid crystal display often causes light leakage near the edges of the protrusions, thereby lowering the contrast of the liquid crystal display.

Summary of the invention

Embodiments of the present disclosure provide a display panel to achieve a technical effect of realizing wide viewing angle characteristics and faster response speed on the basis of suppressing light leakage.

Specifically, in one aspect, a display panel is provided, including: a first substrate, the first substrate is provided with a plurality of pixel units arranged in rows and columns, and each of the pixel units includes a plurality of pixel electrodes disposed at intervals And each of the pixel electrodes includes a plurality of electrode regions having different slit orientations; a second substrate, the second substrate is provided with a common electrode layer, and the common electrode layer includes one-to-one correspondence with the plurality of pixel units a plurality of common electrode regions, each of the common electrode regions being formed with a plurality of hollow patterns arranged at intervals; and display medium molecules interposed between the first substrate and the second substrate . Wherein the plurality of hollow patterns and the plurality of pixel electrodes are matched in a one-to-one correspondence such that display medium molecules between the common electrode region and the pixel unit corresponding to the common electrode region form different orientation directions Multiple domains. The plurality of pixel electrodes of the pixel unit include a first pixel electrode and a second pixel electrode disposed at intervals, the pixel unit further comprising: a data line; a first scan line; a second scan line; a control circuit that connects the data line, the first scan line, the second scan line, and the common electrode line and includes a plurality of active switching elements; a conductive connection line, a conductive connection line connected to the second pixel electrode through a via hole and extending across the first pixel electrode to be connected to the control circuit; wherein the first scan line, the second scan line, and the control circuit Located on a first side of the first pixel electrode, the second pixel electrode is located on a second side of the first pixel electrode opposite the first side.

In another aspect, a display panel is provided, including: a first substrate, the first substrate is provided with a plurality of pixel units arranged in a row, each of the pixel units includes a plurality of pixel electrodes arranged at intervals and each One of the pixel electrodes includes a plurality of electrode regions having different slit orientations; a second substrate, the second substrate is provided with a common electrode layer, and the common electrode layer includes a plurality of one-to-one correspondence with the plurality of pixel units a common electrode region, each of the common electrode regions is formed with a plurality of hollow patterns arranged at intervals; and display medium molecules interposed between the first substrate and the second substrate. Wherein the plurality of hollow patterns and the plurality of pixel electrodes are matched in a one-to-one correspondence such that display medium molecules between the common electrode region and the pixel unit corresponding to the common electrode region form different orientation directions Multiple domains.

In an embodiment of the present disclosure, the plurality of pixel electrodes of the pixel unit include a first pixel electrode and a second pixel electrode that are disposed at intervals, the pixel unit further includes: a data line; a first scan line; a second scan line; a common electrode wiring; a control circuit that connects the data line, the first scan line, the second scan line, and the common electrode line and includes a plurality of active switching elements a conductive connection line connected to the second pixel electrode through a via hole and extending across the first pixel electrode to be connected to the control circuit; wherein the first scan line, the second A scan line and the control circuit are located on a first side of the first pixel electrode, and the second pixel electrode is located on a second side of the first pixel electrode opposite the first side. The plurality of active switching elements include: a first thin film transistor, a source electrode of the first thin film transistor is connected to the data line, and a gate electrode of the first thin film transistor is connected to the first scan line, the a drain electrode of a thin film transistor is connected to the first pixel electrode; a second thin film transistor, a source electrode of the second thin film transistor is connected to the data line, and a gate electrode of the second thin film transistor is connected to the first scan line a drain electrode of the second thin film transistor is connected to the conductive connection line to be connected to the second pixel electrode; and a third thin film transistor, a source electrode of the third thin film transistor is capacitively coupled to the common electrode wiring And capacitively coupled to the drain electrode of the first thin film transistor, a drain electrode of the third thin film transistor is connected to the drain electrode of the second thin film transistor, and a gate electrode of the third thin film transistor is connected to the Second scan line.

In an embodiment of the present disclosure, the drain electrode of the first thin film transistor is connected to the first pixel electrode through a first transparent conductive layer, and the first transparent conductive layer extends across the second scan line Thereafter, the source electrode portion of the third thin film transistor is partially overlapped such that the source electrode of the third thin film transistor forms a capacitive coupling with the drain electrode of the first thin film transistor.

In an embodiment of the present disclosure, the drain electrode of the second thin film transistor is connected to the conductive connection line through a second transparent conductive layer extending across the second scan line.

In an embodiment of the present disclosure, the common electrode wiring is connected to the third transparent conductive layer, and the third transparent conductive layer partially overlaps with the source electrode of the third thin film transistor such that the third The source electrode of the thin film transistor is capacitively coupled to the common electrode wiring.

In an embodiment of the present disclosure, the common electrode wiring is disposed around the first pixel electrode and the second pixel electrode and partially overlaps the first pixel electrode and the second pixel electrode such that The first pixel electrode and the second pixel electrode respectively form a storage capacitor with the common electrode wiring.

In an embodiment of the present disclosure, the drain electrode of the first thin film transistor is connected to the first pixel electrode through a first transparent conductive layer, and the first transparent conductive layer extends across the second scan line And overlapping with the source electrode of the third thin film transistor to form a capacitive coupling between the source electrode of the third thin film transistor and the drain electrode of the first thin film transistor; the second thin film transistor The drain electrode is connected to the conductive connection line through a second transparent conductive layer extending across the second scan line; and the common electrode line is connected to the third transparent conductive layer, and the third transparent conductive layer The source electrode portion of the third thin film transistor is partially overlapped such that the source electrode of the third thin film transistor forms a capacitive coupling with the common electrode wiring.

In an embodiment of the present disclosure, the first pixel electrode includes four electrode regions having different slit orientations, and the hollow pattern corresponding to the first pixel electrode is one continuous pattern and includes two lengths arranged in a cross A slot and a plurality of short slots having four different orientations extending laterally from the two elongated slots.

In an embodiment of the present disclosure, the first pixel electrode includes a crisscrossed stem portion to form four electrode regions, and the slit orientations of the four electrode regions are different from each other.

In one embodiment of the present disclosure, the plurality of pixel electrodes of the same pixel unit have different area sizes, and the size of the plurality of hollow patterns of the common electrode region corresponding to the pixel unit Different sizes.

In an embodiment of the present disclosure, the first half portion and the second half portion of each of the pixel electrode packages are connected, the first half portion and the second portion have the same number but the slit orientations are not mutually The same electrode area.

In an embodiment of the present disclosure, each of the pixel electrodes includes a first half and a second half connected, the first half and the second portion having different numbers and the slit orientations are also mutually Different electrode areas.

In an embodiment of the present disclosure, the second substrate is provided with a color filter layer, the color filter layer being located on a side of the common electrode layer remote from the display medium molecule; the color filter layer a plurality of color filters arranged in a row and a row; the plurality of color filters are in one-to-one correspondence with the plurality of common electrode regions and include a red filter, a green filter, and a blue filter, each One of the common electrode regions corresponds to a red filter, a green filter or a blue filter.

In an embodiment of the present disclosure, a size of the hollow pattern in the common electrode region corresponding to the green color filter is larger than a size of the hollow pattern in the common electrode region corresponding to the red color filter, and The size of the hollow pattern in the common electrode region corresponding to the red color filter is larger than the size of the hollow pattern in the common electrode region corresponding to the blue color filter.

In an embodiment of the present disclosure, the display medium molecule is a liquid crystal molecule, and the display panel is a liquid crystal display panel.

In an embodiment of the present disclosure, the display panel further includes a plastic frame disposed between the first substrate and the second substrate to and the first substrate and the second substrate The housing space is collectively enclosed to accommodate the display medium molecules.

In an embodiment of the present disclosure, the pixel electrode is a transparent electrode, and the conductive connection line is an opaque metal wire.

In an embodiment of the present disclosure, the first substrate is an array substrate, the second substrate is a color filter substrate; the second substrate further includes a color filter layer, and the color filter layer is located The common electrode layer is away from a side of the display medium molecule.

In an embodiment of the present disclosure, the slit of the pixel electrode is a hollow structure closed at both ends or a hollow structure in which one end is closed and the other end is open.

Embodiments of the present disclosure form a three-dimensional spatial structure by forming a multi-oriented slit on a pixel electrode and forming a specific hollow pattern in a corresponding common electrode region, so that display medium molecules can be viewed from a plurality of different perspectives. The range is controlled to achieve the technical effects of wide viewing angle characteristics and faster response speed and can overcome light leakage.

DRAWINGS

In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings used in the description of the embodiments will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the present disclosure, Those skilled in the art can also obtain other drawings based on these drawings without paying any creative work.

FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure.

2 is a schematic plan view of the pixel unit array shown in FIG. 1.

FIG. 3 is an enlarged schematic view showing a layout structure of the pixel unit shown in FIG. 2. FIG.

4 is an equivalent circuit diagram of the pixel unit shown in FIG.

FIG. 5 is a schematic view showing a slit orientation direction on a pixel electrode of the pixel unit shown in FIG. 2. FIG.

6 is a schematic plan view of the common electrode layer and the color filter layer shown in FIG. 1.

Fig. 7 is an enlarged schematic view showing the structure of the common electrode region shown in Fig. 6.

8 is a schematic view showing a slit orientation direction on a pixel electrode of a pixel unit in another embodiment.

Detailed ways

The technical solutions in the embodiments of the present disclosure are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present disclosure. It is obvious that the described embodiments are only a part of the embodiments of the present disclosure, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present disclosure without departing from the inventive scope are the scope of the disclosure.

As shown in FIG. 1 , a display panel 10 according to an embodiment of the present disclosure includes: a first substrate such as an array substrate 10, a second substrate such as a color filter substrate 20, a bezel 30, and a plurality of display medium molecules such as liquid crystal. Molecule 40. The array substrate 10 and the color filter substrate 20 are disposed opposite to each other, and the plastic frame 30 is disposed between the array substrate 10 and the color filter substrate 20 to form an accommodation space together with the array substrate 10 and the color filter substrate 20 to accommodate These liquid crystal molecules 40. Further, these display medium molecules such as liquid crystal molecules 40 form a display medium layer such as a liquid crystal layer.

The array substrate 10 is provided with a pixel unit array 11, and the pixel unit array 11 is located on a side of the array substrate 10 adjacent to the liquid crystal molecules 40. The color filter substrate 20 is provided with a common electrode layer 21 and a color filter layer 23, and the color filter layer 23 is located on the side of the common electrode layer 21 away from the liquid crystal molecules 40. 2 shows that a plurality of pixel units 110 in the pixel unit array 11 are arranged in a matrix.

3 and 4, wherein FIG. 3 shows a layout structure of a single pixel unit 110, and FIG. 4 shows an equivalent circuit diagram of a single pixel unit 110. As shown in FIG. 3 and FIG. 4, the pixel unit 110 includes a plurality of pixel electrodes, such as a pixel electrode PE1 (first pixel electrode), PE2 (second pixel electrode), a data line DL, and a scan line SLa (first). Scan line), SLb (second scan line), common electrode line VL, conductive connection line CL, and control circuit 1101. The control circuit 1101 connects the data line DL, the scanning line SLa, the scanning line SLb, and the common electrode wiring VL. The scan line SLa, the scan line SLb, and the control circuit 1101 are located on the upper side of the pixel electrode PE1, and the pixel electrode PE2 is located on the lower side of the pixel electrode PE1, so that the pixel electrode PE1 and the pixel electrode PE2 are located in the same control circuit 1101 and the scan lines SLa, SLb. side. The conductive connection line CL is connected to the pixel electrode PE2 through the via hole VH and extends across the pixel electrode PE1 to be connected to the control circuit 1101.

3 and FIG. 4, the control circuit 1101 includes a plurality of active switching elements such as a thin film transistor T1 (first thin film transistor), a thin film transistor T2 (second thin film transistor), and a thin film transistor T3 (third thin film transistor). And charge sharing capacitors Ccs1 and Ccs2. Specifically, the source electrode S1 of the thin film transistor T1 and the source electrode S2 of the thin film transistor T2 are connected to the same data line DL, and the gate electrode G1 of the thin film transistor T1 and the gate electrode G2 of the thin film transistor T2 are connected to the same scanning line SLa, and the thin film transistor T1 The drain electrode D1 is connected to the pixel electrode PE1, the drain electrode D2 of the thin film transistor T2 is connected to the conductive connection line CL to be connected to the pixel electrode PE2, and the source electrode S3 of the thin film transistor T3 is capacitively coupled to the common electrode wiring VL to form the charge sharing capacitor Ccs2. Capacitively coupled to the drain electrode D1 of the thin film transistor T1 to form a charge sharing capacitor Ccs1, the drain electrode D3 of the thin film transistor T3 is connected to the drain electrode D2 of the thin film transistor T2, and the gate electrode G3 of the thin film transistor T3 is connected to the scan line SLb. It should be noted here that a plurality of active switching elements such as T1, T2, and T3 in the control circuit 1101 can also be replaced with other three-terminal switching elements, and thus one of the source electrode and the drain electrode can be collectively referred to as the first power. Extreme and the other are collectively referred to as a second electrode terminal, and the gate electrode may be collectively referred to as a control electrode terminal.

It can also be seen from FIG. 3 that the drain electrode D1 of the thin film transistor T1 is connected to the pixel electrode PE1 through the transparent conductive layer ITO1 (first transparent conductive layer), and the transparent conductive layer ITO1 extends across the scan line SLb and the source of the thin film transistor T3. The electrode S3 partially overlaps to form the charge sharing capacitor Ccs1 such that the source electrode S3 of the thin film transistor T3 forms a capacitive coupling with the drain electrode D1 of the thin film transistor T1; further, the drain electrode D2 of the thin film transistor T2 passes through the transparent conductive layer extending across the scan line SLb. ITO2 (second transparent conductive layer) is connected to the conductive connection line CL; further, the common electrode line VL is connected to the transparent conductive layer ITO3 (third transparent conductive layer), and the transparent conductive layer ITO3 is partially overlapped with the source electrode S3 of the thin film transistor T3. The charge sharing capacitor Ccs2 is such that the source electrode S3 of the thin film transistor T3 is capacitively coupled with the common electrode wiring VL. Here, since the charge sharing capacitors Ccs1, Ccs2 are formed in regions other than the pixel electrodes PE1, PE2, that is, in the region covered by the black matrix (BM) without occupying the light-transmitting region of the pixel unit 110, the pixels can be improved. Opening ratio. In addition, the common electrode wiring VL is disposed around the pixel electrode PE1 and the pixel electrode PE2 and partially overlaps the pixel electrodes PE1 and PE2 such that the pixel electrode PE1 and the pixel electrode PE2 form the storage capacitors Cst1 and Cst2 with the common electrode wiring VL, respectively. The common electrode wiring VL is substantially U-shaped in FIG.

As described above, the pixel electrode PE1 includes the stem portions MB that are intersected, for example, in a crisscross manner to form four electrode regions, and the slits ST1, ST2, ST3, and ST4 of the four electrode regions are oriented differently from each other. In this embodiment, the entire area of the pixel electrode PE1 is roughly divided into four electrode regions, and each electrode region is formed with a plurality of slits ST1 disposed in parallel with the horizontal trunk or the vertical trunk of the trunk portion MB at an angle. ST2, ST3 or ST4, and the alignment directions of the slits ST1, ST2, ST3, and ST4 are, for example, 45°, 135°, 225°, and 315° as shown in FIG. 5, respectively, so that the color filter substrate 20 can be used. The upper common electrode layer 21 cooperates to generate an oblique electric field to induce the liquid crystal molecules 40 in different electrode regions to reverse in different directions, thereby realizing multi-domain display, so that the effects seen in the respective directions tend to be average and uniform. Here, the slits ST1, ST2, ST3, and ST4 are hollow structures and are closed at both ends. Of course, in other embodiments, the hollow structures may be closed at one end and open at the other end. Further, the pixel electrode PE1 is typically a transparent electrode such as an ITO (Indium Tin Oxide) electrode or the like. Furthermore, it can be seen from FIG. 3 of the present embodiment that the electrode regions of the four slits having different orientations of the pixel electrode PE2 form two pairs of symmetrically distributed electrode regions, for example, in terms of rotationally symmetric distribution. The electrode region having the slit ST1 and the electrode region formed with the slit ST3 are rotationally symmetrically distributed, and the electrode region in which the slit ST2 is formed and the electrode region in which the slit ST4 is formed are rotationally symmetrically distributed; and in terms of axisymmetric, The electrode region in which the slit ST1 is formed and the electrode region in which the slit ST4 is formed are axially symmetrically distributed with respect to the vertical direction, and the electrode region in which the slit ST2 is formed and the electrode region in which the slit ST3 is formed are axisymmetric with respect to the vertical direction distributed.

Similarly, the pixel electrode PE2 includes a stem portion that is disposed, for example, crosswise to form four electrode regions, and the slits ST5, ST6, ST7, and ST8 of the four electrode regions are oriented differently from each other. In this embodiment, the entire area of the pixel electrode PE2 is roughly divided into four electrode regions, and each electrode region is formed with a plurality of slits ST5 and ST6 arranged in parallel at a certain angle with the horizontal trunk or the vertical trunk of the trunk portion. , ST7 or ST8, and the alignment directions of the slits ST5, ST6, ST7, and ST8 are, for example, 45°, 135°, 225°, and 315° as shown in FIG. 5, respectively, so that the color filter substrate 20 can be used. The common electrode layer 21 cooperates to generate an oblique electric field to induce the liquid crystal molecules 40 in different electrode regions to reverse in different directions, thereby realizing multi-domain display, so that the effects seen in the respective directions tend to be average and uniform. Here, the slits ST5, ST6, ST7, and ST8 are hollow structures and are closed at both ends. Of course, in other embodiments, the hollow structures may be closed at one end and open at the other end. In addition, the pixel electrode PE2 is typically a transparent electrode such as an ITO electrode or the like. Furthermore, it can be seen from FIG. 3 of the present embodiment that the electrode regions of the four slits having different orientations of the pixel electrode PE2 form two pairs of symmetrically distributed electrode regions, for example, in terms of rotationally symmetric distribution. The electrode region having the slit ST5 and the electrode region formed with the slit ST7 are rotationally symmetrically distributed, and the electrode region in which the slit ST6 is formed and the electrode region in which the slit ST8 is formed are rotationally symmetrically distributed; and in terms of axisymmetric, The electrode region in which the slit ST5 is formed and the electrode region in which the slit ST8 is formed are axially symmetrically distributed with respect to the vertical direction, and the electrode region in which the slit ST6 is formed and the electrode region in which the slit ST7 is formed are axisymmetric with respect to the vertical direction distributed.

Such a multi-domain display, for example, an eight-domain display can increase the viewing angle of the display panel, and the arrangement of the thin film transistor T3 and the charge sharing capacitors Ccs1, Ccs2 in the control circuit 1101 can achieve charge sharing to improve the multi-domain display large-view character bias. The basic principle of charge sharing is: first, when the scan signal is transmitted from the scan line SLa, the drain electrode and the source electrode of the thin film transistor T1 and the thin film transistor T2 are turned on, so that the voltages of the pixel electrode PE1 and the pixel electrode PE2 are on the data line DL. The same potential is reached by the transmitted data signal, and then when the scan signal is transmitted from the scan line SLb, the drain electrode and the source electrode of the thin film transistor T1 and the thin film transistor T2 are turned off, and the drain electrode and the source electrode of the thin film transistor T3 are simultaneously turned off. Turning on, causing the charge on the pixel electrode PE2 to be transferred to the common electrode line VL through the charge sharing capacitor Ccs2, causing a voltage difference between the voltage on the pixel electrode PE2 and the voltage on the pixel electrode PE1, thereby causing the liquid crystal in the region where the pixel electrode PE2 is located. The liquid crystal molecules in the region where the molecules and the pixel electrode PE1 are located are deflected at different deflection angles, and the multi-domain display compensates for the technical effect of the large-view role deviation.

Furthermore, the conductive connection line CL connecting the pixel electrode PE2 and extending across the pixel electrode PE1 is typically a region extending across the stem portion MB of the pixel electrode PE1, PE2, so that it may be an opaque metal wire to make full use of the impervious Low resistance characteristics of optical metal wires. In other embodiments, the conductive connection line CL may be a transparent conductive line such as an ITO conductive line to reduce the transmittance of the pixel unit 110.

Further, in FIG. 3, the pixel electrode PE1 and the pixel electrode PE2 have different area sizes. As an alternative embodiment, the pixel electrode PE1 and the pixel electrode PE2 may also have the same area size.

Referring to FIG. 1 and FIG. 6 together, as the color filter substrate 20 used in cooperation with the pixel unit 110 in the pixel unit array 11, the common electrode layer 21 includes one-to-one correspondence with the pixel unit 110 in the pixel unit array 11. A plurality of common electrode regions 210. In addition, the color filter substrate 20 further includes a color filter layer 23 located on a side of the common electrode layer 21 remote from the liquid crystal molecules 40 and including a plurality of color filters 230 arranged in a matrix, such as red. The filter R, the green filter G, and the blue filter B have a color filter 230 corresponding to the common electrode region 210. For example, one common electrode region 210 corresponds to one red filter R and one green filter. Sheet G or a blue filter B. In addition, it is worth mentioning that, for the common electrode layer 21, it may be a whole transparent conductive layer such as an ITO conductive layer, and the transparent conductive layer disposed in each of the common electrode regions 210 is effective corresponding to the color filter 230. a portion of the region; or the common electrode layer 21 may also be a plurality of strip-shaped transparent conductive layers, and each of the common electrode regions 210 is a portion corresponding to the effective region of the strip-shaped transparent conductive layer corresponding to the color filter 230; or a common electrode layer 21 is a plurality of transparent conductive blocks arranged in a row, and each common electrode region 210 is a portion of a corresponding one of the transparent conductive blocks corresponding to the effective area of the color filter 230. The effective area of the color filter 230 herein typically refers to the area of the color filter 230 that is not covered by the black matrix.

Referring to FIG. 7, a single common electrode region 210 is formed with a spaced pattern 2101 and a hollow pattern 2103 which are disposed in a one-to-one correspondence with the pixel electrode PE1 and the pixel electrode PE2 in the pixel unit 110 such that the common electrode region 210 and the pixel unit 110 are The liquid crystal molecules 40 therebetween form a plurality of domains having different orientation directions, for example, eight liquid crystal molecular domains, thereby realizing wide viewing angle characteristics.

The hollow pattern 2101 includes two long grooves 2101a and 2101b which are disposed in a crosswise manner, for example, a vertical cross or a cross, and communicate with each other, and a plurality of short grooves 21011 having different orientations extending laterally from the two long grooves 2101a and 2101b. , 21012, 21013 and 21014. The hollow pattern 2103 and the hollow pattern 2101 have the same shape, that is, the hollow pattern 2103 also includes two long grooves which are disposed at intersection and communicate with each other, and a plurality of short grooves having different orientations formed laterally extending from the two long grooves; It is worth mentioning here that the hollow pattern 2101 and the hollow pattern 2103 having the same shape may have different sizes, that is, the length and/or width of the long groove, and/or the length and/or width of the short groove may be different. For example, the area of the pixel electrode PE1 and the pixel electrode PE2 in the corresponding pixel unit 110 are different, and the hollow pattern 2101 and the hollow pattern 2103 in the same common electrode region 210 have different sizes. Of course, in other embodiments, the plurality of hollow patterns in the same common electrode region 210 may also have the same size. Furthermore, it can also be seen from FIG. 7 of the present embodiment that the hollow pattern 2101 divides the upper portion of the common electrode region 210 (the upper portion of the double broken line in FIG. 7) in which it is located into four common electrode sub-regions, which The four common electrode sub-regions constitute two pairs of symmetrically distributed common electrode sub-regions. For example, in terms of rotationally symmetric distribution, the common electrode sub-region formed with the short trench 21011 and the common electrode sub-region formed with the short trench 21013 are rotationally symmetric. The common electrode sub-region formed with the short trench 21012 and the common electrode sub-region formed with the short trench 21014 are rotationally symmetrically distributed; and in terms of axisymmetric, the common electrode sub-region formed with the short trench 21011 and the short trench are formed The common electrode sub-region of 21014 is axially symmetrically distributed with respect to the vertical direction, and the common electrode sub-region formed with the short trench 21012 and the common electrode sub-region formed with the short trench 21013 are axially symmetrically distributed with respect to the vertical direction; similarly, the hollow pattern 2103 divides the lower portion of the common electrode region 210 (the lower portion of the double dashed line in FIG. 7) into four common electrode sub-regions, and the four common electrode sub-regions constitute a symmetric distribution of the two pairs (for example, rotational symmetry) Or axial symmetry) of the sub-region of the common electrode; hollow pattern 10 is provided so that the two spaced areas on which the common electrode 2101,2103 symmetrically divided into four pairs of sub-regions of the common electrode.

Further, since the human eye is sensitive to green light in the three primary colors, the red light is second, and the blue light is less sensitive, so that the transmittance at the green filter G can be designed to be the largest, and the red filter is R times. The technical means may be such that the hollow pattern 2101 (and/or the hollow pattern 2103) in the common electrode region 210 corresponding to the green filter G is made in the common electrode region 210 corresponding to the red filter R. The hollow pattern 2101 (and/or the hollow pattern 2103) has a large size such that the hollow pattern 2101 (and/or the hollow pattern 2103) in the common electrode region 210 corresponding to the red filter R corresponds to the blue filter B. The hollow pattern 2101 (and/or the hollow pattern 2103) in the common electrode region 210 is large in size, so that color filters of different colors may have different transmittances to achieve a better display effect.

In addition, referring to FIG. 8, for a specific application, for example, a display panel of a liquid crystal television, in order to increase the breadth of the upper viewing angle, the pixel electrode in the pixel unit can be modified. For example, different from the foregoing embodiment, the area of the pixel electrode PE1 (PE2) is roughly divided into four equal parts to obtain four electrode regions. In the modified embodiment, the upper half of the pixel electrode PE1 (PE2) is used (adjacent control). The circuit 1101, the portion of the scanning line SLa and the scanning line SLb, the first half) are divided into four electrode regions, and the lower half (the portion away from the control circuit 1101, the scanning line SLa and the scanning line SLb, and the second half) are still divided. Two electrode regions, because the lower viewing angle of the liquid crystal television is not used, so that the slit orientation directions in the electrode regions on the same pixel electrode PE1 (PE2) are 30°, 60°, 135°, respectively. 225°, 300°, and 330°, thereby achieving a wider viewing angle of the display panel.

In the several embodiments provided herein, it should be understood that the disclosed systems, devices, and/or methods may be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the unit is only a logical function division. In actual implementation, there may be another division manner, for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in an electrical, mechanical or other form.

The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.

It should be noted that the above embodiments are only for explaining the technical solutions of the present disclosure, and are not intended to be limiting; although the present disclosure has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art that The technical solutions described in the foregoing embodiments are modified, or the equivalents of the technical features are replaced by the equivalents. The modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present disclosure.

Claims (20)

A display panel comprising: a first substrate, the first substrate is provided with a plurality of pixel units arranged in a row, each of the pixel units includes a plurality of pixel electrodes arranged at intervals and each of the pixel electrodes includes a plurality of slit orientations Electrode region; a second substrate, the second substrate is provided with a common electrode layer and the common electrode layer includes a plurality of common electrode regions in one-to-one correspondence with the plurality of pixel units, and each of the common electrode regions is formed with an interval arrangement Multiple openwork patterns; Displaying a medium molecule, the display medium molecule being interposed between the first substrate and the second substrate; Wherein the plurality of hollow patterns and the plurality of pixel electrodes are matched in a one-to-one correspondence such that display medium molecules between the common electrode region and the pixel unit corresponding to the common electrode region form different orientation directions Multiple domains; The plurality of pixel electrodes of the pixel unit include a first pixel electrode and a second pixel electrode that are disposed at intervals. The pixel unit further includes: Data line First scan line; Second scan line; Common electrode wiring; a control circuit that connects the data line, the first scan line, the second scan line, and the common electrode line and includes a plurality of active switching elements; a conductive connection line, the conductive connection line is connected to the second pixel electrode through a via hole and extends across the first pixel electrode to be connected to the control circuit; The first scan line, the second scan line, and the control circuit are located on a first side of the first pixel electrode, and the second pixel electrode is located on the first pixel electrode and the first The opposite side of the second side. A display panel comprising: a first substrate, the first substrate is provided with a plurality of pixel units arranged in a row, each of the pixel units includes a plurality of pixel electrodes arranged at intervals and each of the pixel electrodes includes a plurality of slit orientations Electrode region; a second substrate, the second substrate is provided with a common electrode layer and the common electrode layer includes a plurality of common electrode regions in one-to-one correspondence with the plurality of pixel units, and each of the common electrode regions is formed with an interval arrangement Multiple openwork patterns; Displaying a medium molecule, the display medium molecule being interposed between the first substrate and the second substrate; Wherein the plurality of hollow patterns and the plurality of pixel electrodes are matched in a one-to-one correspondence such that display medium molecules between the common electrode region and the pixel unit corresponding to the common electrode region form different orientation directions Multiple domains. The display panel of claim 2, wherein the plurality of pixel electrodes of the pixel unit comprise a first pixel electrode and a second pixel electrode disposed at intervals, the pixel unit further comprising: Data line First scan line; Second scan line; Common electrode wiring; a control circuit that connects the data line, the first scan line, the second scan line, and the common electrode line and includes a plurality of active switching elements; a conductive connection line, the conductive connection line is connected to the second pixel electrode through a via hole and extends across the first pixel electrode to be connected to the control circuit; The first scan line, the second scan line, and the control circuit are located on a first side of the first pixel electrode, and the second pixel electrode is located on the first pixel electrode and the first a second side opposite to one side; Wherein the plurality of active switching elements comprise: a first thin film transistor, a source electrode of the first thin film transistor is connected to the data line, a gate electrode of the first thin film transistor is connected to the first scan line, and a drain electrode of the first thin film transistor is connected to the first thin film transistor a pixel electrode; a second thin film transistor, a source electrode of the second thin film transistor is connected to the data line, a gate electrode of the second thin film transistor is connected to the first scan line, and a drain electrode of the second thin film transistor is connected to the conductive line Connecting a wire to be connected to the second pixel electrode; a third thin film transistor, a source electrode of the third thin film transistor is capacitively coupled to the common electrode wiring and capacitively coupled to the drain electrode of the first thin film transistor, and a drain electrode connection of the third thin film transistor The drain electrode of the second thin film transistor, the gate electrode of the third thin film transistor being connected to the second scan line. The display panel according to claim 3, wherein the drain electrode of the first thin film transistor is connected to the first pixel electrode through a first transparent conductive layer, and the first transparent conductive layer extends across the first The second scan line is then partially overlapped with the source electrode of the third thin film transistor such that the source electrode of the third thin film transistor forms a capacitive coupling with the drain electrode of the first thin film transistor. The display panel of claim 3, wherein the drain electrode of the second thin film transistor is connected to the conductive connection line by a second transparent conductive layer extending across the second scan line. The display panel according to claim 3, wherein the common electrode wiring is connected to the third transparent conductive layer, and the third transparent conductive layer partially overlaps with the source electrode of the third thin film transistor to cause The source electrode of the third thin film transistor is capacitively coupled to the common electrode wiring. The display panel according to claim 3, wherein the common electrode wiring is disposed around the first pixel electrode and the second pixel electrode and partially overlaps the first pixel electrode and the second pixel electrode So that the first pixel electrode and the second pixel electrode respectively form a storage capacitor with the common electrode wiring. The display panel according to claim 3, wherein the drain electrode of the first thin film transistor is connected to the first pixel electrode through a first transparent conductive layer, and the first transparent conductive layer extends across the first After the second scan line is overlapped with the source electrode portion of the third thin film transistor such that the source electrode of the third thin film transistor forms a capacitive coupling with the drain electrode of the first thin film transistor; Wherein the drain electrode of the second thin film transistor is connected to the conductive connection line through a second transparent conductive layer extending across the second scan line; Wherein the common electrode wiring is connected to the third transparent conductive layer, and the third transparent conductive layer partially overlaps with the source electrode of the third thin film transistor to make the source of the third thin film transistor The electrode forms a capacitive coupling with the common electrode wiring. The display panel according to claim 3, wherein the first pixel electrode comprises four electrode regions having different slit orientations, and the hollow pattern corresponding to the first pixel electrode is a continuous pattern and includes cross-settings Two elongated slots and a plurality of short slots having four different orientations extending laterally from the two elongated slots. The display panel according to claim 9, wherein the first pixel electrode includes a crisscrossed stem portion to form four electrode regions, and the slit orientations of the four electrode regions are different from each other. The display panel according to claim 2, wherein the plurality of pixel electrodes of the same pixel unit have different area sizes, and the plurality of hollow electrodes of the common electrode region corresponding to the pixel unit The size of the pattern is different. The display panel according to claim 2, wherein each of said first and second halves of said pixel electrode are connected to each other, said first half and said second portion having the same number but slit Electrode regions with different orientations. The display panel according to claim 2, wherein each of said pixel electrodes includes a first half portion and a second half portion connected, said first half portion and said second portion having different numbers and slits Electrode regions whose orientations are also different from each other. The display panel according to claim 2, wherein the second substrate is provided with a color filter layer, the color filter layer being located on a side of the common electrode layer remote from the display medium molecule; The filter layer includes a plurality of color filters arranged in a row and a row; the plurality of color filters are in one-to-one correspondence with the plurality of common electrode regions and include a red filter, a green filter, and a blue filter A light sheet, each of the common electrode regions corresponding to a red filter, a green filter or a blue filter. The display panel according to claim 14, wherein a size of the hollow pattern in the common electrode region corresponding to the green color filter is larger than a hollow pattern in the common electrode region corresponding to the red color filter The size, and the size of the hollow pattern in the common electrode region corresponding to the red color filter is larger than the size of the hollow pattern in the common electrode region corresponding to the blue color filter. The display panel according to claim 2, wherein the display medium molecules are liquid crystal molecules, and the display panel is a liquid crystal display panel. The display panel according to claim 2, wherein the display panel further comprises a plastic frame, the plastic frame is disposed between the first substrate and the second substrate to and the first substrate and the The second substrate collectively encloses an accommodation space to accommodate the display medium molecules. The display panel according to claim 3, wherein the pixel electrode is a transparent electrode, and the conductive connection line is an opaque metal wire. The display panel according to claim 2, wherein the first substrate is an array substrate, the second substrate is a color filter substrate; the second substrate further comprises a color filter layer, and the color filter The light layer is located on a side of the common electrode layer away from the display medium molecules. The display panel according to claim 2, wherein the slit of the pixel electrode is a hollow structure closed at both ends, or a hollow structure in which one end is closed and the other end is open.

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