WO2018139769A1 - Light emitting diode including light emitting cells - Google Patents

Abstract

According to the present embodiment, a light emitting diode comprises: a substrate; a first light emitting cell and a second light emitting cell which are aligned on the substrate and spaced apart from each other; and a wiring configured to electrically connect the first and second light emitting cells through an isolation region between the first and second light emitting cells. Each of the first and second light emitting cells includes side surfaces adjacent to the isolation region and protruding parts aligned at the side surfaces.

Description

Light Emitting Diodes Including Light Emitting Cells

The present invention relates to an electronic device, and more particularly to a light emitting diode including light emitting cells.

The light emitting diode is a semiconductor device including an N-type semiconductor and a P-type semiconductor, and emits light by recombination of electrons and holes. Since light emitting diodes have less power consumption and longer lifespans than conventional light bulbs or fluorescent lamps, they are used in backlight units, incandescent lamps, and fluorescent lamps, and their use has been extended to various areas.

Light emitting diodes including light emitting cells disposed on a single substrate have been studied. In such a light emitting diode structure, the light emitting cells are spaced apart from each other on the substrate and are connected to each other via wires. The structure of such a light emitting diode enables high integration of light emitting cells and enables driving using a high voltage AC power source. Such a light emitting diode may include light emitting cells connected in series. Alternatively, the light emitting diode may include light emitting cell groups each including light emitting cells connected in series, and the light emitting cell groups may be connected in parallel with each other.

The present invention is to provide a light emitting diode having an improved light output efficiency.

A light emitting diode according to an embodiment of the present invention, a substrate; First and second light emitting cells arranged on the substrate and spaced apart from each other; And a wiring configured to electrically connect the first and second light emitting cells through a separation region between the first and second light emitting cells, wherein each of the first and second light emitting cells is connected to the separation region. A neighboring side and protrusions arranged on the side.

The side surface, the first portion; And a second portion adjacent to the first portion and at least a portion of the wiring is located, and the protrusions may be disposed in the first portion.

The first and second light emitting cells may be arranged in a first direction, and the first and second portions of the side surface may be arranged in a second direction crossing the first direction.

The inclination angle of the second portion of the side surface may be higher than the inclination angle of the first portion of the side surface.

The width of the separation area in the second part may be wider than the width of the separation area in the first part.

The first and second light emitting cells are arranged in a first direction, and the protrusions may include: first protrusions arranged in a second direction crossing the first direction; And second protrusions arranged in the second direction and positioned between the first protrusions and the separation region.

The protrusions may be arranged in the second direction and include third protrusions positioned between the second protrusions and the separation region.

The protrusions may be arranged in a zigzag form along the side surface.

The side surface, the first portion; And a second portion disposed between the first portion and the separation region, wherein the protrusions may be disposed on the first portion.

The first and second light emitting cells may be arranged in a first direction, and each of the first and second portions may extend in a second direction crossing the first direction.

Each of the first and second light emitting cells may include curved patterns arranged along the protrusions on an upper surface adjacent to the side surface.

According to an embodiment of the present invention, a light emitting diode having improved light emission efficiency is provided.

1 is a plan view illustrating a light emitting diode according to an exemplary embodiment of the present invention.

2 is an enlarged view showing portions of light emitting cells neighboring each other and an isolation region therebetween;

3 is a cross-sectional view of the light emitting diode along the line II ′ of FIG. 2.

4 is a cross-sectional view of the light emitting diode along the line II-II ′ of FIG. 2.

5 is an enlarged view illustrating a region A of a light emitting diode according to another exemplary embodiment of the present invention.

FIG. 6 is a cross-sectional view of the light emitting diode along line III-III ′ of FIG. 5.

7 is an enlarged view illustrating region A of a light emitting diode according to another exemplary embodiment of the present invention.

8A to 8E are plan views illustrating modified examples of the light emitting diodes.

9 is a perspective view illustrating a light emitting diode package including a light emitting diode according to an exemplary embodiment of the present invention.

The description in the background of the technical field of the present invention is only for the purpose of understanding the background art of the technical idea of the present invention, and thus it can be understood as the content corresponding to the prior art known to those skilled in the art. none.

In the following description, for purposes of explanation, numerous specific details are set forth in order to assist in understanding the various embodiments. It may be evident, however, that various embodiments may be practiced without these specific details or in one or more equivalent ways. In other instances, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring the various embodiments.

In the drawings, the size or relative size of layers, films, panels, regions, etc. may be exaggerated for clarity. Like reference numerals denote like elements.

Throughout the specification, when an element or layer is described as being "connected" to another element or layer, it is not only directly connected, but also indirectly connected between other elements or layers in between. However, if a part is described as "directly connected" to another part, it means that there is no other element between that part and the other part. "At least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" is X one, Y one, Z one, or two of X, Y, and Z or Any combination of the above will be understood (e.g., XYZ, XYY, YZ, ZZ). Here, "and / or" includes all combinations of one or more of the configurations.

Herein, terms such as first, second, etc. may be used to describe various elements, elements, regions, layers, and / or sections, but such elements, elements, regions, layers, and / or the like. Or sections are not limited to these terms. These terms are used to distinguish one element, element, region, layer, and / or section from another element, element, region, layer, and / or section. Thus, the first element, element, region, layer, and / or section in one embodiment may be referred to as the second element, element, region, layer, and / or section in another embodiment.

Spatially relative terms such as "below", "above", and the like may be used for illustrative purposes, thereby describing the relationship of one device or feature to another device (s) or feature (s) as shown in the figures. do. This is only used to indicate the relationship of one component to another component in the drawings, but does not mean an absolute position. For example, when the device shown in the figure is inverted, elements depicted as being "below" of other elements or features are located in the direction of "above" other elements or features. Thus, in one embodiment, the term "below" may include both up and down directions. In addition, the device may be in other directions (eg, rotated 90 degrees or in other directions), and such spatially relative terms used herein are interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. Throughout the specification, when a portion "contains" a certain component, it means that it can further include other components, except to exclude other components unless specifically stated otherwise. Unless otherwise specified, terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.

1 is a plan view illustrating a light emitting diode 100 according to an exemplary embodiment of the present invention.

Referring to FIG. 1, the light emitting diode 100 includes a substrate SUB, a plurality of light emitting cells LEC1, LEC2, and LEC3, first and second extension electrodes 121 and 122, and first and second pads. (PAD1, PAD2), wiring 131, and insulating layer 132.

The substrate SUB may be an insulating or conductive substrate. For example, the substrate SUB may be a sapphire substrate, a gallium nitride substrate, a silicon carbide (SiC) substrate, or a silicon substrate. Furthermore, the substrate SUB may be a patterned sapphire substrate having concavo-convex patterns (see CCP in FIG. 3) on its top surface. The upper surface of the substrate SUB extends in the first direction D1 and the second direction D2.

First to third light emitting cells LEC1 to LEC3 are disposed on an upper surface of the substrate SUB. The first to third light emitting cells LEC1 to LEC3 are arranged in the first direction D1 and spaced apart from each other by a predetermined distance on the substrate SUB. A first isolation region SR1 is provided between the first and second light emitting cells LEC1 and LEC2. The second isolation region SR2 is provided between the second and third light emitting cells LEC2 and LEC3.

Each of the first to third light emitting cells LEC1 to LEC3 is sequentially stacked on the substrate SUB, the first conductive semiconductor layer 111, the active layer (see 113 in FIG. 3), and the second conductive semiconductor layer ( 112). The first and second conductive semiconductor layers 111 and 112 and the active layer may be formed of a gallium nitride-based semiconductor material (ie, (Al, In, Ga) N). The active layer is configured to emit light of a specific wavelength, for example ultraviolet light or blue light, and the first and second conductivity-type semiconductor layers 111 and 112 are formed of a material having a higher band gap than the active layer. Each of the first and second conductivity-type semiconductor layers 111 and 112 may be formed in a single layer or multiple layers. The active layer may have a single quantum well or multiple quantum well structures.

In each of the first to third light emitting cells LEC1 to LEC3, the transparent electrode 120 may be disposed. The transparent electrode 120 contacts at least a portion of the second conductivity type semiconductor layer 112.

Each of the first to third light emitting cells LEC1 to LEC3 includes a first extension electrode 121 connected to the transparent electrode 120 and a second extension electrode 122 connected to the first conductive semiconductor layer 111. Is placed.

The first extension electrode 121 of the first light emitting cell LEC1 extends from the first pad PAD1. The second extension electrode 122 of the first light emitting cell LEC1 and the first extension electrode 121 of the second light emitting cell LEC2 are connected to each other through a wiring 131. The second extension electrode 122 of the second light emitting cell LEC2 and the first extension electrode 121 of the third light emitting cell LEC3 are connected to each other through another wiring 131. The second extension electrode 122 of the third light emitting cell LEC3 extends to the second pad PAD2. Accordingly, the first to third light emitting cells LEC1 to LEC3 are connected in series between the first and second pads PAD1 and PAD2.

An insulating layer 132 may be provided under the wiring 131. The insulating layer 132 may prevent the wiring 131 from being electrically connected to the first and second conductive semiconductor layers 111 and 112. In addition, the insulating layer 132 may extend along the first extension electrode 121 between the second conductivity-type semiconductor layer 112 and the transparent electrode 120. Accordingly, the spread of the current flowing through the first extension electrode 121 and the transparent electrode 120 can be improved.

In example embodiments, the protrusions are disposed on the side surfaces SDS of the light emitting cells LEC1 to LEC3 adjacent to the isolation regions SR1 and SR2. This is described in detail with reference to FIGS. 2 to 5.

2 is an enlarged view showing portions of light emitting cells neighboring each other and an isolation region therebetween; 2 shows region A of FIG. 1 as an example. 3 is a cross-sectional view of the light emitting diode 100 along the line II ′ of FIG. 2.

1, 2, and 3, the light emitting cells LEC1 and LEC2 are formed of the first conductive semiconductor layer 111, the second conductive semiconductor layer 112, and the first and second conductive semiconductors. The mesas MS1 and MS2 each include the active layer 113 interposed between the layers 111 and 112. The transparent electrode 120 is provided on the mesas MS1 and MS2. The light emitting cells LEC1 and LEC2 include the inclined side surfaces SDS1 and SDS2 adjacent to the isolation region SR1.

The light emitting cells LEC1 and LEC2 include protrusions PRTR at the side surfaces SDS1 and SDS2 adjacent to the isolation region SR1. The protrusions PRTR may be arranged in at least one row. In FIG. 2, the protrusions PRTR include first protrusions PRTR1 and second protrusions PRTR2 arranged in two rows. The first protrusions PRTR1 are arranged in the second direction. The second protrusions PRTR2 are arranged in the second direction and are disposed between the first protrusions PRTR1 and the separation region SR1.

By the protrusions PRTR, the roughness of the side surfaces SDS1 and SDS2 increases. When the roughness of the side surfaces SDS1 and SDS2 increases, the probability that the light L emitted from the active layer 113 is emitted may be improved. For example, when light L emitted from the active layer 113 passes through the first conductivity-type semiconductor layer 111 and reaches the surface of the protrusions PRTR, the light L is totally reflected to light emitting diodes. The light may be refracted as shown in FIG. 2 and not emitted toward the bottom of the light emitting device 100, but may be emitted toward the top of the light emitting diode 100.

In the manufacturing process of the light emitting diode 100, the protrusions PRTR are formed in portions of the upper surfaces of the second conductivity-type semiconductor layer 112 adjacent to the side surfaces SDS1 and SDS2. Curved patterns (CRV) may be formed. Such curved fringes CRV may be arranged along the sides SDS1, SDS2.

In an embodiment, the size of the second protrusion PRTR2 may be smaller than the size of the first protrusion PRTR1. As another example, the sizes of the first and second protrusions PRTR1 and PRTR2 may be the same.

The protrusions PRTR may be spaced apart from the separation region SR1. Each of the side surfaces SDS1 and SDS2 may include a first portion P21 and a second portion P22 between the first portion P21 and the isolation region SR1. The protrusions PRTR may be disposed in the first portion P21 and may not be provided in the second portion P22.

The protrusions PRTR may not be provided in a region where the wiring 131 and the insulating layer 132 are positioned.

4 is a cross-sectional view of the light emitting diode 100 along the line II-II 'of FIG.

Referring to FIG. 4, the insulating layer 132 is an exposed portion of the substrate SUB and a first conductive semiconductor layer 111, an active layer 113, and a second conductive type of the second light emitting cell LEC2. A portion of the semiconductor layer 112 is covered. The insulating layer 132 separates the first conductive semiconductor layer 111, the active layer 113, and the second conductive semiconductor layer 112 of the second light emitting cell LEC2 from the wiring 131. As illustrated in FIG. 4, the insulating layer 132 may extend to a part of the first conductive semiconductor layer 111 of the first light emitting cell LEC1.

The wiring 131 is disposed on the insulating layer 132, the first conductive semiconductor layer 111 of the first light emitting cell LEC1, and the transparent electrode 120 of the second light emitting cell LEC2. Accordingly, the wiring 132 electrically connects the first conductive semiconductor layer 111 of the first light emitting cell LEC1 and the transparent electrode 120 of the second light emitting cell LEC2.

In FIG. 4, protrusions PRTR are not provided on the side surfaces SDS1 and SDS2. Accordingly, disconnection of the wiring 131 formed of a material such as metal by the protrusions PRTR may be prevented.

Referring to FIG. 2 again, the protrusions PRTR are spaced apart from the wiring 131 and the insulating layer 132 by a predetermined distance DT. Each of the side surfaces SDS1 and SDS2 may include first to third portions P11, P12, and P13 sequentially positioned along the second direction D2. The second portion P12 is positioned between the first and third portions P11 and P13, and the wiring 131 and the insulating layer 132 are disposed in the second portion P12. The protrusions PRTR may be disposed in the first and third portions P11 and P13 and may not be provided in the second portion P12.

Since the protrusions PRTR are not provided on the side surfaces SDS1 and SDS2 of the second part P12, during the etching process for separating the light emitting cells LEC1 and LEC2 from the manufacturing process of the LED 100. Sides SDS1 and SDS2 may be formed differently in the first to third portions P11, P12, and P13. In an embodiment, the inclination angles b (see FIG. 4) of the side surfaces SDS1 and SDS2 of the second portion P12, for example, an angle with respect to the top surface of the substrate SUB, may be defined in the first and third portions P11. , P13 may be greater than the inclination angles (a, FIG. 3) of the side surfaces SDS1 and SDS2. In an embodiment, the width W1 (see FIG. 4) of the separation region SR1 corresponding to the second portion P12 is the width of the separation region SR1 corresponding to the first and third portions P11 and P13. (W2, see FIG. 3).

According to the exemplary embodiment of the present disclosure, protrusions PRTR are disposed on side surfaces SDS1 and SDS2 of the light emitting cells LEC1 and LEC2 adjacent to the isolation region SR1. By the protrusions PRTR, the light emission efficiency of the light L emitted from the active layer 113 may be improved.

According to an embodiment of the present invention, the protrusions PRTR are disposed on the side surfaces SDS without an additional area for disposing the protrusions PRTR. Accordingly, the light emission efficiency of the light may be improved without increasing the area of the light emitting diode 100.

5 is an enlarged view illustrating a region A of the light emitting diode 100 according to another exemplary embodiment of the present invention. FIG. 6 is a cross-sectional view of the light emitting diode 100 along line III-III ′ of FIG. 5. 7 is an enlarged view illustrating a region A of the light emitting diode 100 according to another embodiment of the present invention.

1, 5, and 6, the light emitting cells LEC1 and LEC2 include protrusions PRTR. The protrusions PRTR are disposed on the side surfaces SDS1 and SDS2 adjacent to the isolation region SR1.

The protrusions PRTR may be arranged in three or more rows. The protrusions PRTR are first protrusions PRTR1 arranged in the second direction D2, and second protrusions DTR arranged in the second direction D2 and disposed between the first protrusions PRTR1 and the separation region SR1. The second protrusions PRTR2 and third protrusions PRTR3 arranged in the second direction D2 and disposed between the second protrusions PRTR2 and the separation region SR1 are included. When a large number of protrusions PRTR are provided, the probability that light emitted from the active layer 113 is emitted may be further improved.

In addition, it is understood that the protrusions PRTR may be arranged on the sides SDS1 and SDS2 in various forms. For example, referring to FIG. 7, the protrusions PRTR may be arranged in a zigzag form along side surfaces SDS1 and SDS2 as shown in FIG. 7.

Hereinafter, a method of manufacturing the light emitting diode 100 according to the embodiment of the present invention will be described.

First, the first conductivity type semiconductor layer 111, the active layer 113, and the second conductivity type semiconductor layer 112 are formed on the substrate SUB. Thereafter, a first etching process is performed to selectively etch the first conductive semiconductor layer 111, the active layer 113, and the second conductive semiconductor layer 112, thereby forming first to third mesas. The first to third mesas correspond to the first to third light emitting cells LEC1 to LEC3, respectively. In the first etching process, poles may be formed in edge regions adjacent to the isolation regions SR1 and SR2 among the regions in which the first to third light emitting cells LEC1 to LEC3 are to be formed. Can be. Each of the poles may include a portion of the first conductivity type semiconductor layer 111, a portion of the active layer 113, and a portion of the second conductivity type semiconductor layer 112.

Thereafter, a second etching process may be performed to form first to third light emitting cells LEC1 to LEC3 in the cell regions. A second etching process is performed such that the first to third light emitting cells LEC1 to LEC3 each include first to third mesas. Since the poles are formed in the edge regions of the cell regions, some of each of the poles may be left after the second etching process is completed. As such, from the poles, the protrusions PRTR described with reference to FIGS. 2, 5, and 7 may be provided.

According to this manufacturing method, protrusions PRTR may be formed on the side surfaces SDS of the light emitting cells LEC1 to LEC3 without an additional process.

8A to 8E are plan views illustrating modified examples of the light emitting diodes.

8A to 8E, the light emitting diode may include a plurality of light emitting cells LEC. The number of light emitting cells LECs included in the light emitting diode may vary.

The light emitting cells LEC of the light emitting diodes may be connected to each other through various connection structures. For example, the light emitting diode may include light emitting cells LEC connected in series between the first and second pads PAD1 and PAD2 (see FIGS. 8C and 8E). As another example, the light emitting diode may include light emitting cell groups connected in series between the first and second pads PAD1 and PAD2, which may be connected in parallel with each other (FIGS. 8A, 8B, and See FIG. 8D).

According to an embodiment of the present invention, the light emitting diode includes protrusions PRTR on side surfaces between the light emitting cells LEC. By providing the protrusions PRTR, the probability that light generated by the light emitting cells LEC is emitted may be improved.

9 is a perspective view illustrating a light emitting diode package 1000 including a light emitting diode according to an exemplary embodiment of the present invention.

Referring to FIG. 9, the LED package 1000 may include a housing 1110, first and second electrodes 1210 and 1220, first and second LEDs 1310 and 1320, and bonding wires 1410. 1420, 1430, 1440, molding member 1500, and at least one heat dissipation member 1610, 1620.

First and second electrodes 1210 and 1220 are disposed in the opening 1115 of the housing 1110. The first and second electrodes 1210 and 1220 may be electrodes of a lead frame or a printed circuit board mounted in the housing 1110. Each of the first and second light emitting diodes 1310 and 1320 includes any one of the light emitting diodes described with reference to FIGS. 1 and 8A through 8E. The first and second light emitting diodes 1310 and 1320 are fixed in the opening 1115 and the first and second electrodes 1210 and 1220 through the plurality of bonding wires 1410, 1420, 1430, and 1440. Is connected to. The first and second light emitting diodes 1310 and 1320 may be connected to the first electrode 1210 through the first and second bonding lines 1410 and 1420. The first and second light emitting diodes 1310 and 1320 may be connected to the second electrode 1220 through the third and fourth bonding lines 1430 and 1440. That is, the first and second light emitting diodes 1310 and 1320 may be connected in parallel between the first and second electrodes 1210 and 1220.

In FIG. 9, two light emitting diodes 1310 and 1320 are provided in the light emitting diode package 1000. However, this is only an example, and the number of light emitting diodes and the connection relationship between the light emitting diodes and the first and second electrodes 1210 and 1220 may be variously changed.

The opening 1115 of the housing 1110 is filled with the molding member 1500. The molding member 1500 covers the first and second light emitting diodes 1310 and 1320. Accordingly, the molding member 1500 may contact the semiconductor layers 111, 112, and 113 and the protrusions PRTR on the side surfaces SDS1 and SDS2 illustrated in FIG. 3. As the molding member 1500 having a refractive index close to the refractive index of the protrusions PRTR is selected, the light L emitted from the active layer 113 is formed at the boundary between the protrusions PRTR and the molding member 1500. The probability of total reflection and refraction rather than downward of the first and second light emitting diodes 1310 and 1320 increases toward the top of the first and second light emitting diodes 1310 and 1320.

The molding member 1500 may include an encapsulant for protecting the first and second light emitting diodes 1310 and 1320. The molding member 1500 may include a phosphor that converts wavelengths of light emitted from the first and second light emitting diodes 1310 and 1320.

The heat dissipation members 1610 and 1620 are fixed to the housing 1110. The heat dissipation members 1610 and 1620 may be configured to discharge heat generated when the first and second light emitting diodes 1310 and 1320 are driven to the outside.

In the present invention as described above has been described by the specific embodiments, such as specific components and limited embodiments and drawings, but this is provided to help a more general understanding of the present invention, the present invention is not limited to the above embodiments. For those skilled in the art, various modifications and variations are possible from these descriptions.

Therefore, the spirit of the present invention should not be limited to the described embodiments, and all the things that are equivalent to or equivalent to the claims as well as the following claims will belong to the scope of the present invention. .

According to an embodiment of the present invention, protrusions are disposed on side surfaces of the light emitting cells adjacent to the isolation region. By these protrusions, light emitted from the active layer can be efficiently emitted.

Claims (11)

Board; First and second light emitting cells arranged on the substrate and spaced apart from each other; And A wiring configured to electrically connect the first and second light emitting cells through a separation region between the first and second light emitting cells, Each of the first and second light emitting cells includes a side adjacent to the isolation region and protrusions arranged on the side. The method of claim 1, The side is, First portion; And A second portion adjacent to the first portion, wherein at least a portion of the wiring is located; The protrusions are disposed in the first portion. The method of claim 2, The first and second light emitting cells are arranged in a first direction, And the first and second portions of the side surface are arranged in a second direction crossing the first direction. The method of claim 2, The inclination angle of the second portion of the side is higher than the inclination angle of the first portion of the side. The method of claim 2, The width of the separation region in the second portion is wider than the width of the separation region in the first portion. The method of claim 1, The first and second light emitting cells are arranged in a first direction, The protrusions, First protrusions arranged in a second direction crossing the first direction; And And second protrusions arranged in the second direction and positioned between the first protrusions and the separation region. The method of claim 6, And the protrusions are arranged in the second direction and include third protrusions positioned between the second protrusions and the separation region. The method of claim 1, The protrusions are arranged in a zigzag form along the side. The method of claim 1, The side is, First portion; And A second portion disposed between the first portion and the separation region, The protrusions are disposed in the first portion. The method of claim 9, The first and second light emitting cells are arranged in a first direction, Wherein each of the first and second portions extends in a second direction crossing the first direction. The method of claim 1, Each of the first and second light emitting cells includes curved patterns arranged along the protrusions on an upper surface adjacent to the side surface.

Images