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WO2018171373A1 - 一种物理随机接入信道前导码序列确定方法及装置 - Google Patents

一种物理随机接入信道前导码序列确定方法及装置 Download PDF

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Publication number
WO2018171373A1
WO2018171373A1 PCT/CN2018/076981 CN2018076981W WO2018171373A1 WO 2018171373 A1 WO2018171373 A1 WO 2018171373A1 CN 2018076981 W CN2018076981 W CN 2018076981W WO 2018171373 A1 WO2018171373 A1 WO 2018171373A1
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preamble
sequence
time
subsequence
detected
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French (fr)
Inventor
任斌
达人
郑方政
托尼
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China Academy of Telecommunications Technology CATT
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China Academy of Telecommunications Technology CATT
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Priority to US16/496,947 priority Critical patent/US10772133B2/en
Priority to EP18771818.4A priority patent/EP3606268B1/en
Publication of WO2018171373A1 publication Critical patent/WO2018171373A1/zh
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J13/00—Code division multiplex systems
    • H04J13/0007—Code type
    • H04J13/0055—ZCZ [zero correlation zone]
    • H04J13/0059—CAZAC [constant-amplitude and zero auto-correlation]
    • H04J13/0062—Zadoff-Chu
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2602—Signal structure
    • H04L27/2605—Symbol extensions, e.g. Zero Tail, Unique Word [UW]
    • H04L27/2607—Cyclic extensions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0048—Allocation of pilot signals, i.e. of signals known to the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0053—Allocation of signalling, i.e. of overhead other than pilot signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W74/00—Wireless channel access
    • H04W74/002—Transmission of channel access control information
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W74/00—Wireless channel access
    • H04W74/08—Non-scheduled access, e.g. ALOHA
    • H04W74/0833—Random access procedures, e.g. with 4-step access

Definitions

  • the present application relates to the field of wireless communication technologies, and in particular, to a method and an apparatus for determining a physical random access channel preamble sequence.
  • NR New Radio, a new air interface
  • PRACH Physical Random Access Channel, a physical random access channel
  • M-order preamble sequence design scheme is proposed.
  • an M-th order preamble sequence is composed of a combination of M preamble sub-sequences for Msg1 transmission of one random access.
  • the UE User Equipment
  • the network (gNB/tRP (gNB: next generation NodeB, TRP: Transmission and Reception Point, transmitting and receiving nodes)) will detect the M preamble sub-sequences included in the M-th order preamble sequence on the time-frequency resources. Only when the M preamble subsequences are correctly detected can the M-order preamble sequence be correctly detected.
  • the preamble sequence is composed of two preamble subsequence combinations (illustrated as: Preamble-1, Preamble-2). Two consecutive preamble subsequences (Preamble-1 and Preamble-2) have their own CP (Cyclic Prefix), and GT (Guard Time) is reserved at the end of the 2nd order preamble sequence. .
  • Each preamble subsequence is independently selected by the UE to obtain a 2nd order preamble sequence, and is transmitted as Msg1 and detected separately on the network side. Only when the two preamble sub-sequences are correctly detected can the so-called second-order preamble sequence be correctly detected.
  • the PRACH root sequence uses a ZC (Zadoff-Chu) sequence as the root sequence (hereinafter referred to as the ZC root sequence), since each cell leader sequence is passed by the ZC root sequence through Ncs (cyclic shift, ie, zero-correlation
  • the area configuration is generated.
  • the preamble sequence of each cell is 64, and the preamble sequence used by the UE is randomly selected or allocated by the gNB (Next Generation Base Station), so in order to reduce the preamble between adjacent cells. If the sequence interference is too large, you need to correctly plan the ZC root sequence index.
  • the purpose of the planning is to allocate a ZC root sequence index to the cell to ensure that the preamble sequence generated by the neighboring cell using the index is different, thereby reducing mutual interference generated by the neighboring cells using the same preamble sequence.
  • N ZC represents the length of the ZC sequence
  • u represents the root index value of the ZC sequence
  • j sqrt(-1)
  • n represents the sequence element index.
  • the random access preamble is obtained by cyclically shifting the ZC sequence whose root index value is u th , as shown in the following equation:
  • C v represents a cyclic shift value
  • C v vN cs
  • v represents a vth cyclic shift Ncs
  • the shortcoming of the prior art is that under the condition that multiple users (UEs) select the same time-frequency resource transmission condition, the current M-th order preamble sequence scheme has a preamble sequence detection fuzzy problem.
  • the present application provides a method and apparatus for determining a physical random access channel preamble sequence to solve the problem of multi-user detection ambiguity existing in a multi-stage preamble sequence of NR PRACH.
  • a method for determining a PRACH preamble sequence including:
  • the preamble subsequences belonging to the same preamble sequence are determined according to the time of each preamble subsequence detected in this stage and the time of each preamble subsequence detected in the previous stage.
  • the detection window is a ZC sequence detection window.
  • the ZC sequence detection window is a ZC sequence detection window of the same root sequence, or a ZC sequence detection window of different root sequences.
  • the detection window detects the time of each preamble subsequence, it is detected at the timing position.
  • the preamble subsequences belonging to the same preamble sequence are determined according to the time of each preamble subsequence detected in this stage, and the time of each preamble subsequence detected in the previous stage, including:
  • the two preamble subsequences belong to the preamble of the same preamble sequence. Code subsequence.
  • a PRACH preamble sequence determining apparatus including:
  • a time determining module configured to receive each preamble subsequence in a previous stage, determine a time at which each preamble subsequence is detected in the detection window; receive each preamble subsequence in this stage, and determine that each preamble subsequence is detected in the detection window time;
  • a sequence determining module configured to determine a preamble subsequence belonging to the same preamble sequence according to the time of each preamble subsequence detected in this stage, and the time of each preamble subsequence detected in the previous stage.
  • the time determining module is further configured to determine a time when each of the preamble sub-sequences is detected in the ZC sequence detection window.
  • the ZC sequence detection window is a ZC sequence detection window of the same root sequence, or a ZC sequence detection window of different root sequences.
  • the time determining module is further configured to detect at a timing position when the detection window detects the time of each preamble subsequence.
  • the sequence determining module is further configured to: when determining the preamble subsequences belonging to the same preamble sequence according to the time of each preamble subsequence detected in this stage, and the time of each preamble subsequence detected in the previous stage If the time of the preamble subsequence detected in this stage and the time of a preamble subsequence detected in the previous stage are less than a preset difference threshold, the two preamble subsequences belong to the same preamble sequence. Preamble subsequence.
  • a PRACH preamble sequence determining apparatus including:
  • a transceiver for receiving and transmitting data under the control of a processor, performing the following processes:
  • Each preamble subsequence is received in this phase.
  • the ZC sequence detection window is a ZC sequence detection window of the same root sequence, or a ZC sequence detection window of different root sequences.
  • the processor is further configured to detect at a timing position when the detection window detects the time of each preamble subsequence.
  • the processor is further configured to determine a preamble subsequence belonging to the same preamble sequence according to a time of each preamble subsequence detected in this stage, and a time of each preamble subsequence detected in the previous stage. If the time of the preamble subsequence detected in this stage and the time of a preamble subsequence detected in the previous stage are less than a preset difference threshold, the two preamble subsequences belong to the same preamble sequence. The preamble subsequence.
  • the embodiment of the present application provides a cache synchronization abnormal device readable storage medium, including program code, when the program code is run on a computing device, the program code is used to enable the computing device to execute The steps of any of the above first aspects.
  • the relationship between the detected times of the preamble sub-sequences can be determined to determine whether Belong to the same preamble sequence, that is, when the relative timing offset between multiple users received by the network is greater than the relative timing estimation error between a certain user preamble subsequence, it can be determined whether it belongs to the same preamble sequence, Therefore, the ambiguity problem of the NR-PRACH M-th order preamble sequence scheme under the condition that multiple users select the same time-frequency resource transmission condition can be avoided, and the reliability of the preamble sequence scheme can be effectively guaranteed.
  • FIG. 3 is a schematic diagram of a second-order preamble sequence receiver detection based on a relative timing estimation position in the embodiment of the present application;
  • FIG. 4 is a schematic structural diagram of a PRACH preamble sequence determining apparatus according to an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a network side device according to an embodiment of the present application.
  • the shortcoming in the prior art is that under the condition that multiple users (UEs) select the same time-frequency resource transmission condition, the current M-th order preamble sequence scheme has a preamble sequence detection fuzzy problem.
  • UE 1 selects a 2nd order preamble sequence (a, b), where a and b are the first stage (stage-one) and the second stage (stage-two) preamble subsequence respectively;
  • UE 2 selects 2nd order A preamble sequence (c, d), where c and d are preamble subsequences of stage-one and stage-two, respectively.
  • the network will detect two preamble subsequences a and c at the stage-one and two preamble subsequences b and d at the stage-two.
  • the problem to be solved by the technical solution provided by the embodiment of the present application is the problem of multi-user detection ambiguity existing in the M-order preamble sequence of the NR PRACH.
  • a scheme for determining the M-order preamble sequence combination by using the relative timing estimation positions of all M-th order preamble sub-sequences is proposed, so as to avoid the network detecting the M-order preamble sequence detection under the condition that the multi-user selects the same time-frequency resource transmission condition.
  • FIG. 2 is a schematic diagram of an implementation process of a PRACH preamble sequence determining method, as shown in the figure, which may include:
  • Step 201 Receive each preamble subsequence in the previous stage, and determine a time when each preamble subsequence is detected in the detection window.
  • Step 202 Receive, in this stage, each preamble subsequence, and determine a time when each preamble subsequence is detected in the detection window;
  • Step 203 Determine, according to the time of each preamble subsequence detected in this stage, and the time of each preamble subsequence detected in the previous stage, the preamble subsequences belonging to the same preamble sequence.
  • the detection window is a ZC sequence detection window.
  • the ZC sequence detection window is a ZC sequence detection window of the same root sequence, or a ZC sequence detection window of different root sequences.
  • the two preamble subsequences belong to the preamble of the same preamble sequence. Code subsequence.
  • FIG. 3 is a schematic diagram of receiver detection of a second-order preamble sequence based on relative timing estimation positions.
  • UE1 selects a second-order preamble sequence (a, b)
  • UE2 selects a second-order preamble sequence (c, d).
  • the ZC sequence detection window may be the same root sequence or different root sequences.
  • a PRACH preamble sequence determining apparatus is further provided in the embodiment of the present application. Since the principle of solving the problem is similar to the PRACH preamble sequence determining method, the implementation of the apparatus can refer to the implementation of the method. , the repetition will not be repeated.
  • FIG. 4 is a schematic structural diagram of a PRACH preamble sequence determining apparatus, as shown in the figure, which may include:
  • the time determining module 401 is configured to receive each preamble subsequence in the previous stage, determine a time at which each preamble subsequence is detected in the detection window, and receive each preamble subsequence in this stage, and determine that each preamble is detected in the detection window. The time of the sequence;
  • the sequence determining module 402 is configured to determine, according to the time of each preamble subsequence detected in this stage, and the time of each preamble subsequence detected in the previous stage, the preamble subsequences belonging to the same preamble sequence.
  • the time determination module is further configured to determine a time at which each of the preamble subsequences is detected in the ZC sequence detection window.
  • the ZC sequence detection window is a ZC sequence detection window of the same root sequence, or a ZC sequence detection window of different root sequences.
  • the time determination module is further configured to detect at a timing position when the detection window detects the time of each preamble subsequence.
  • the sequence determining module is further configured to: when determining the preamble subsequences belonging to the same preamble sequence according to the time of each preamble subsequence detected in this stage, and the time of each preamble subsequence detected in the previous stage, If the time of the preamble subsequence detected in this stage and the time of a preamble subsequence detected in the previous stage are less than a preset difference threshold, the two preamble subsequences belong to the preamble of the same preamble sequence. Code subsequence.
  • FIG. 5 is a schematic structural diagram of a network side device, as shown in the figure, the device includes:
  • the processor 500 is configured to read a program in the memory 520 and perform the following process:
  • the transceiver 510 is configured to receive and transmit data under the control of the processor 500, and performs the following processes:
  • Each preamble subsequence is received in this phase.
  • the detection window is a ZC sequence detection window.
  • the ZC sequence detection window is a ZC sequence detection window of the same root sequence, or a ZC sequence detection window of different root sequences.
  • the detection window when the detection window detects the time of each preamble subsequence, it is detected at the timing position.
  • the preamble subsequences belonging to the same preamble sequence are determined according to the time of each preamble subsequence detected in this stage and the time of each preamble subsequence detected in the previous stage, including:
  • the two preamble subsequences belong to the preamble of the same preamble sequence. Code subsequence.
  • the bus architecture can include any number of interconnected buses and bridges, specifically linked by one or more processors represented by processor 500 and various circuits of memory represented by memory 520.
  • the bus architecture can also link various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art and, therefore, will not be further described herein.
  • the bus interface provides an interface.
  • Transceiver 510 can be a plurality of components, including a transmitter and a transceiver, providing means for communicating with various other devices on a transmission medium.
  • the processor 500 is responsible for managing the bus architecture and general processing, and the memory 520 can store data used by the processor 500 when performing operations.
  • An embodiment of the present invention provides a readable storage medium, which is a non-volatile storage medium, including program code, when the program code is run on a computing device, the program code is used to make the The operation of the computing device to perform any of the methods of determining the PRACH preamble sequence described above.
  • the technical solution provided by the embodiment of the present application avoids the ambiguity problem of the NR-PRACH M-th order preamble sequence scheme under the condition that multiple users select the same time-frequency resource transmission condition.
  • the relative timing deviation between multiple users received by the network is greater than the relative timing estimation error between a certain user preamble subsequence, the reliability of the preamble sequence scheme can be effectively guaranteed.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

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Abstract

本申请公开了一种物理随机接入信道前导码序列确定方法及装置，包括：在上一阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；在本阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列。采用本申请可以确定是否属于同一前导码序列，也因此能够避免下一代无线通信物理随机接入信道M阶前导码序列方案在多用户选择相同的时频资源发送条件下存在的模糊问题，能够有效保障该前导码序列方案的可靠性。

Description

一种物理随机接入信道前导码序列确定方法及装置
本申请要求在2017年3月22日提交中国专利局、申请号为201710175422.6、申请名称为“一种物理随机接入信道前导码序列确定方法及装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及无线通信技术领域，特别涉及一种物理随机接入信道前导码序列确定方法及装置。
背景技术
在5G(5 th generation，第五代)移动通信系统NR(New Radio，新空口)PRACH(Physical Random Access Channel，物理随机接入信道)前导码序列的研究中，为了进一步提高前导码的检测性能和降低短前导码序列的碰撞概率，提出了multi-stage(M阶)前导码序列设计方案。其中，一个M阶前导码序列由M个前导码子序列组合构成，用于一次随机接入的Msg1传输。UE(User Equipment，用户设备)从预定义或者网络配置的M阶前导码序列集合中选择一个M阶前导码序列，并且在网络配置的单个时频资源上传输。网络(gNB/TRP(gNB：next generation NodeB，下一代基站；TRP：Transmission and Reception Point，发送和接收节点))将在时频资源上分别检测M阶前导码序列包含的M个前导码子序列。只有当M个前导码子序列都检测正确时，才能称为该M阶前导码序列检测正确。
图1为M＝2时NR-PRACH M阶前导码序列设计方案示意图，如图所示，图1所示为一种M阶前导码序列设计方案的示例，其中M＝2，即一个2阶前导码序列由两个前导码子序列组合(图中示意为：Preamble-1,Preamble-2)构成。两个连续的前导码子序列(Preamble-1和Preamble-2)分别有各自的CP(Cyclic Prefix，循环前缀)，并且在2阶前导码序列的结尾处预留了GT(Guard  Time，保护时间)。每个前导码子序列由UE独立选择得到一个2阶前导码序列，并且作为Msg1发送，在网络侧分别进行检测。只有当2个前导码子序列都检测正确时，才能称为该2阶前导码序列检测正确。
PRACH根序列是采用ZC(Zadoff-Chu)序列作为根序列(以下简称为ZC根序列)的，由于每个小区前导序列是由ZC根序列通过Ncs(cyclic shift，循环移位，也即零相关区配置)生成，每个小区的前导码(Preamble)序列为64个，UE使用的前导码序列是随机选择或由gNB(下一代基站)分配的，因此为了降低相邻小区之间的前导码序列干扰过大就需要正确规划ZC根序列索引。规划目的是为小区分配ZC根序列索引以保证相邻小区使用该索引生成的前导码序列不同，从而降低相邻小区使用相同的前导码序列而产生的相互干扰。
定义根索引值为u th的Zadoff-Chu(ZC序列)下式所示：
Figure PCTCN2018076981-appb-000001
其中，N ZC表示ZC序列的长度，u表示ZC序列的根索引值，j＝sqrt(-1)，n表示序列元素索引。随机接入前导码由根索引值为u th的ZC序列进行循环移位得到，如下式所示：
x u,v(n)＝x u((n+C v)mod N ZC)   (2)
其中，C v表示循环移位值，C v＝vN cs，v表示第v个循环移位Ncs，取值范围为0,1,…,
Figure PCTCN2018076981-appb-000002
其中
Figure PCTCN2018076981-appb-000003
表示向下取整。
现有技术的不足在于：在多用户(UE)选择相同的时频资源发送条件下,目前的M阶前导码序列方案存在前导码序列检测模糊问题。
发明内容
本申请提供了一种物理随机接入信道前导码序列确定方法及装置，用以解决在NR PRACH的M阶(multi-stage)前导码序列存在的多用户检测模糊 的问题。
第一方面，本申请实施例中提供了一种PRACH前导码序列确定方法，包括：
在上一阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；
在本阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；
根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列。
可选的，所述检测窗口是ZC序列检测窗口。
可选的，所述ZC序列检测窗口是同一个根序列的ZC序列检测窗口，或者是不同根序列的ZC序列检测窗口。
可选的，在检测窗口检测各前导码子序列的时间时，是在定时位置上检测的。
可选的，根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列，包括：
若在本阶段中检测到的前导码子序列的时间与上一阶段中检测到的某前导码子序列的时间小于预设的差值门限时，则该两个前导码子序列属于同一前导码序列的前导码子序列。
第二方面，本申请实施例中提供了一种PRACH前导码序列确定装置，包括：
时间确定模块，用于在上一阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；在本阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；
序列确定模块，用于根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前 导码子序列。
可选的，时间确定模块进一步用于确定在ZC序列检测窗口检测到各前导码子序列的时间。
可选的，所述ZC序列检测窗口是同一个根序列的ZC序列检测窗口，或者是不同根序列的ZC序列检测窗口。
可选的，时间确定模块进一步用于在检测窗口检测各前导码子序列的时间时，在定时位置上检测。
可选的，序列确定模块进一步用于在根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列时，若在本阶段中检测到的前导码子序列的时间与上一阶段中检测到的某前导码子序列的时间小于预设的差值门限时，则该两个前导码子序列属于同一前导码序列的前导码子序列。
第三方面，本申请实施例中提供了一种PRACH前导码序列确定装置，包括：
处理器，用于读取存储器中的程序，执行下列过程：
确定在检测窗口检测到各前导码子序列的时间；
根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列；
收发机，用于在处理器的控制下接收和发送数据，执行下列过程：
在上一阶段中接收各前导码子序列；
在本阶段中接收各前导码子序列。
可选的，所述处理器进一步用于确定在ZC序列检测窗口检测到各前导码子序列的时间。
可选的，所述ZC序列检测窗口是同一个根序列的ZC序列检测窗口，或者是不同根序列的ZC序列检测窗口。
可选的，所述处理器进一步用于在检测窗口检测各前导码子序列的时间时，在定时位置上检测。
可选的，所述处理器进一步用于在根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列时，若在本阶段中检测到的前导码子序列的时间与上一阶段中检测到的某前导码子序列的时间小于预设的差值门限时，则该两个前导码子序列属于同一前导码序列的前导码子序列。
第四方面，本申请实施例中提供了一种缓存同步异常设备可读存储介质，包括程序代码，当所述程序代码在计算设备上运行时，所述程序代码用于使所述计算设备执行上述第一方面任一方法的步骤。
本申请有益效果如下：
在本申请实施例提供的技术方案中，由于属于同一前导码序列的前导码子序列之间在接收时间上存在关系，因而通过检测到的各前导码子序列的时间之间存在的关系便可以确定是否属于同一前导码序列，也即，当网络接收到的多个用户之间的相对定时偏差大于某个用户前导码子序列之间的相对定时估计误差时，便可以确定是否属于同一前导码序列，也因此能够避免NR-PRACH M阶前导码序列方案在多用户选择相同的时频资源发送条件下存在的模糊问题，能够有效保障该前导码序列方案的可靠性。
附图说明
此处所说明的附图用来提供对本申请的进一步理解，构成本申请的一部分，本申请的示意性实施例及其说明用于解释本申请，并不构成对本申请的不当限定。在附图中：
图1为背景技术中M＝2时NR-PRACH M阶前导码序列设计方案示意图；
图2为本申请实施例中PRACH前导码序列确定方法；
图3为本申请实施例中基于相对定时估计位置的2阶前导码序列接收机检测示意图；
图4为本申请实施例中PRACH前导码序列确定装置结构示意图；
图5为本申请实施例中网络侧设备结构示意图。
具体实施方式
发明人在发明过程注意到：
在现有的技术不足在于：在多用户(UE)选择相同的时频资源发送条件下,目前的M阶前导码序列方案存在前导码序列检测模糊问题。下面以M＝2为例进行说明。
假设系统中有两个UE在相同的时频资源上发送2阶前导码序列。UE 1选择了2阶前导码序列(a,b)，其中，a和b分别是第一阶段(stage-one)和第二阶段(stage-two)的前导码子序列；UE 2选择了2阶前导码序列(c,d)，其中，c和d分别是stage-one和stage-two的前导码子序列。网络将在stage-one检测到两个前导码子序列a和c，在stage-two检测到两个前导码子序列b和d。此时将产生四种可能的2阶前导码序列，即(a,b),(a,d),(c,b),and(c,d)。由于网络无法正确判断此时UE 1和UE 2实际发送的2阶前导码序列，产生了多用户2阶前导码序列检测模糊问题。
基于此，本申请实施例提供的技术方案要解决的问题是NR PRACH的M阶(multi-stage)前导码序列存在的多用户检测模糊的问题。方案中提出了一种利用所有M阶前导码子序列的相对定时估计位置来确定M阶前导码序列组合的方案，从而避免网络对于多用户选择相同时频资源发送条件下M阶前导码序列检测模糊的问题。下面结合附图对本申请的具体实施方式进行说明。
图2为PRACH前导码序列确定方法实施流程示意图，如图所示，可以包括：
步骤201、在上一阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；
步骤202、在本阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；
步骤203、根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列。
实施中，所述检测窗口是ZC序列检测窗口。
实施中，所述ZC序列检测窗口是同一个根序列的ZC序列检测窗口，或者是不同根序列的ZC序列检测窗口。
实施中，在检测窗口检测各前导码子序列的时间时，是在定时位置上检测的。
实施中，根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列，包括：
若在本阶段中检测到的前导码子序列的时间与上一阶段中检测到的某前导码子序列的时间小于预设的差值门限时，则该两个前导码子序列属于同一前导码序列的前导码子序列。
具体实施中，预定义的差值门限可以通过产品实现的精确度来确定，或者通过实际应用的小区中用户的定时位置的分辨率来确定，也可以自行设定。
下面以实例进行说明。
本例中，将基于2阶前导码子序列的相对定时估计位置进行说明，其他阶位经过适当扩展即可。
图3为基于相对定时估计位置的2阶前导码序列接收机检测示意图，如图所示，假设UE1选择了2阶前导码序列(a,b)，UE2选择了2阶前导码序列(c,d)。在stage-one的ZC序列检测窗口，网络将分别在定时位置T2和T5检测到两个子序列a和c，记录定时位置t(1,1)＝T2和t(1,2)＝T5；
具体实施中，对于定时位置，一种检测方案可以是采用检测窗口内的相关值功率的最大值与噪声功率的比值作为检测变量，与预先计算得到的检测门限进行比较，当某个定时位置Tn上的检测变量大于检测门限时，判断Tn上检测到子序列；否则，判断Tn上没有检测到子序列。
在stage-two的根ZC序列检测窗口，网络将分别在定时位置T2和T5检测到两个子序列b和d，记录定时位置t(2,1)＝T2和t(2,2)＝T5。
网络侧计算t(1,1)和t(2,1)的定时相对偏差delta_t1＝abs(t(1,1)-t(2,1))，并 与预定义的差值门限JW进行比较，当delta_t1小于JW时，判断这两个定时位置对应的子序列a和b属于同一个2阶前导码序列，即Pre_UE1＝(a,b)。
同理，网络侧计算t(1,2)和t(2,2)的定时相对偏差delta_t2＝abs(t(1,2)-t(2,2))，并与预定义的差值门限JW进行比较，当delta_t2小于JW时，判断这两个定时位置对应的子序列c和d属于同一个2阶前导码序列，即Pre_UE1＝(c,d)。
此时，网络侧不存在模糊问题。
实施中，ZC序列检测窗口可以是同一个根序列的，也可以是不同根序列的。
基于同一发明构思，本申请实施例中还提供了一种PRACH前导码序列确定装置，由于该装置解决问题的原理与一种PRACH前导码序列确定方法相似，因此该装置的实施可以参见方法的实施，重复之处不再赘述。
图4为PRACH前导码序列确定装置结构示意图，如图所示，可以包括：
时间确定模块401，用于在上一阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；在本阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；
序列确定模块402，用于根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列。
实施中，时间确定模块进一步用于确定在ZC序列检测窗口检测到各前导码子序列的时间。
实施中，所述ZC序列检测窗口是同一个根序列的ZC序列检测窗口，或者是不同根序列的ZC序列检测窗口。
实施中，时间确定模块进一步用于在检测窗口检测各前导码子序列的时间时，在定时位置上检测。
实施中，序列确定模块进一步用于在根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一 前导码序列的前导码子序列时，若在本阶段中检测到的前导码子序列的时间与上一阶段中检测到的某前导码子序列的时间小于预设的差值门限时，则该两个前导码子序列属于同一前导码序列的前导码子序列。
为了描述的方便，以上所述装置的各部分以功能分为各种模块或单元分别描述。当然，在实施本申请时可以把各模块或单元的功能在同一个或多个软件或硬件中实现。
在实施本申请实施例提供的技术方案时，可以按如下方式实施。
图5为网络侧设备结构示意图，如图所示，设备中包括：
处理器500，用于读取存储器520中的程序，执行下列过程：
确定在检测窗口检测到各前导码子序列的时间；
根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列；
收发机510，用于在处理器500的控制下接收和发送数据，执行下列过程：
在上一阶段中接收各前导码子序列；
在本阶段中接收各前导码子序列。
实施中，所述检测窗口是ZC序列检测窗口。
实施中，所述ZC序列检测窗口是同一个根序列的ZC序列检测窗口，或者是不同根序列的ZC序列检测窗口。
实施中，在检测窗口检测各前导码子序列的时间时，是在定时位置上检测的。
实施中，根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列，包括：
若在本阶段中检测到的前导码子序列的时间与上一阶段中检测到的某前导码子序列的时间小于预设的差值门限时，则该两个前导码子序列属于同一前导码序列的前导码子序列。
其中，在图5中，总线架构可以包括任意数量的互联的总线和桥，具体 由处理器500代表的一个或多个处理器和存储器520代表的存储器的各种电路链接在一起。总线架构还可以将诸如外围设备、稳压器和功率管理电路等之类的各种其他电路链接在一起，这些都是本领域所公知的，因此，本文不再对其进行进一步描述。总线接口提供接口。收发机510可以是多个元件，即包括发送机和收发机，提供用于在传输介质上与各种其他装置通信的单元。处理器500负责管理总线架构和通常的处理，存储器520可以存储处理器500在执行操作时所使用的数据。
本发明实施例提供一种可读存储介质，该可读存储介质为非易失性存储介质，包括程序代码，当所述程序代码在计算设备上运行时，所述程序代码用于使所述计算设备执行上述PRACH前导码序列确定的任意一种方法的动作。
综上所述，采用本申请实施例提供的技术方案避免了NR-PRACH M阶前导码序列方案在多用户选择相同的时频资源发送条件下存在模糊问题。当网络接收到的多个用户之间的相对定时偏差大于某个用户前导码子序列之间的相对定时估计误差时，能够有效保障了该前导码序列方案的可靠性。
本领域内的技术人员应明白，本申请的实施例可提供为方法、系统、或计算机程序产品。因此，本申请可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且，本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器和光学存储器等)上实施的计算机程序产品的形式。
本申请是参照根据本申请实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的 装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
显然，本领域的技术人员可以对本申请进行各种改动和变型而不脱离本申请的精神和范围。这样，倘若本申请的这些修改和变型属于本申请权利要求及其等同技术的范围之内，则本申请也意图包含这些改动和变型在内。

Claims (16)

  1. 一种物理随机接入信道PRACH前导码序列确定方法，其特征在于，包括：
    在上一阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；
    在本阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；
    根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列。
  2. 如权利要求1所述的方法，其特征在于，所述检测窗口是ZC序列检测窗口。
  3. 如权利要求2所述的方法，其特征在于，所述ZC序列检测窗口是同一个根序列的ZC序列检测窗口，或者是不同根序列的ZC序列检测窗口。
  4. 如权利要求1所述的方法，其特征在于，在检测窗口检测各前导码子序列的时间时，是在定时位置上检测的。
  5. 如权利要求1所述的方法，其特征在于，根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列，包括：
    若在本阶段中检测到的前导码子序列的时间与上一阶段中检测到的某前导码子序列的时间小于预设的差值门限时，则该两个前导码子序列属于同一前导码序列的前导码子序列。
  6. 一种PRACH前导码序列确定装置，其特征在于，包括：
    时间确定模块，用于在上一阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；在本阶段中接收各前导码子序列，确定在检测窗口检测到各前导码子序列的时间；
    序列确定模块，用于根据本阶段中检测到的各前导码子序列的时间，以 及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列。
  7. 如权利要求6所述的装置，其特征在于，时间确定模块进一步用于确定在ZC序列检测窗口检测到各前导码子序列的时间。
  8. 如权利要求7所述的装置，其特征在于，所述ZC序列检测窗口是同一个根序列的ZC序列检测窗口，或者是不同根序列的ZC序列检测窗口。
  9. 如权利要求6所述的装置，其特征在于，时间确定模块进一步用于在检测窗口检测各前导码子序列的时间时，在定时位置上检测。
  10. 如权利要求6所述的装置，其特征在于，序列确定模块进一步用于在根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列时，若在本阶段中检测到的前导码子序列的时间与上一阶段中检测到的某前导码子序列的时间小于预设的差值门限时，则该两个前导码子序列属于同一前导码序列的前导码子序列。
  11. 一种PRACH前导码序列确定装置，其特征在于，包括：
    处理器，用于读取存储器中的程序，执行下列过程：
    确定在检测窗口检测到各前导码子序列的时间；
    根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列；
    收发机，用于在处理器的控制下接收和发送数据，执行下列过程：
    在上一阶段中接收各前导码子序列；
    在本阶段中接收各前导码子序列。
  12. 如权利要求11所述的装置，其特征在于，所述处理器进一步用于确定在ZC序列检测窗口检测到各前导码子序列的时间。
  13. 如权利要求12所述的装置，其特征在于，所述ZC序列检测窗口是同一个根序列的ZC序列检测窗口，或者是不同根序列的ZC序列检测窗口。
  14. 如权利要求11所述的装置，其特征在于，所述处理器进一步用于在 检测窗口检测各前导码子序列的时间时，在定时位置上检测。
  15. 如权利要求11所述的装置，其特征在于，所述处理器进一步用于在根据本阶段中检测到的各前导码子序列的时间，以及上一阶段中检测到的各前导码子序列的时间确定属于同一前导码序列的前导码子序列时，若在本阶段中检测到的前导码子序列的时间与上一阶段中检测到的某前导码子序列的时间小于预设的差值门限时，则该两个前导码子序列属于同一前导码序列的前导码子序列。
  16. 一种缓存同步异常设备可读存储介质，其特征在于，包括程序代码，当所述程序代码在计算设备上运行时，所述程序代码用于使所述计算设备执行权利要求1～5任一所述方法的步骤。
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