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WO2018166266A1 - 基于指定位置的Mura缺陷修复方法及装置 - Google Patents

基于指定位置的Mura缺陷修复方法及装置 Download PDF

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Publication number
WO2018166266A1
WO2018166266A1 PCT/CN2017/117876 CN2017117876W WO2018166266A1 WO 2018166266 A1 WO2018166266 A1 WO 2018166266A1 CN 2017117876 W CN2017117876 W CN 2017117876W WO 2018166266 A1 WO2018166266 A1 WO 2018166266A1
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Prior art keywords
mura
pixel point
compensation data
demura
pixel
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English (en)
French (fr)
Inventor
郑增强
秦立
刘钊
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Wuhan Jingce Electronic Group Co Ltd
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Wuhan Jingce Electronic Group Co Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G3/2096—Details of the interface to the display terminal specific for a flat panel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0242—Compensation of deficiencies in the appearance of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0285—Improving the quality of display appearance using tables for spatial correction of display data
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0626—Adjustment of display parameters for control of overall brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/10—Mixing of images, i.e. displayed pixel being the result of an operation, e.g. adding, on the corresponding input pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data

Definitions

  • the present invention relates to the field of display technologies, and more particularly to a Mura defect repair method and apparatus based on a specified position for repairing a Mura defect of a flat display module.
  • Flat-panel displays have the advantages of high resolution, high brightness, and no geometric distortion. They are widely used in consumer electronics products such as TVs, computers, and mobile phones because of their small size, light weight, and low power consumption. , tablet, etc.
  • the flat display module is a main component of the flat display.
  • the manufacturing process is complicated and requires nearly 100 processes. Therefore, various display defects are inevitable in the manufacturing process, and these display defects are more commonly Mura defects.
  • the Mura defect is a visual discomfort caused by different colors or brightness differences in the same light source and the same background color, which seriously affects the quality of the flat panel display.
  • Mura repair is to improve the brightness uniformity by changing the gray value of the pixel, apply a lower gray value to pixels with higher display brightness, and apply higher gray value to pixels with lower display brightness. After the gradation compensation, the brightness of each pixel is close to the same, and the Mura defect is improved.
  • the current Mura repair method is based on global repair, which performs data compression according to a fixed BlockSize (area range, such as 4*4, 8*8, etc.). For a single compensation picture, only one compensation data value is needed in each BlockSize area, for example For the module of 3840*2160, when BlockSize is 8*8, FLASH only stores 481*271 compensation data, and the compensation data of other pixels in BlockSize area is calculated by interpolation algorithm.
  • the advantage of this Mura repair method is high efficiency and cost saving.
  • the linear interpolation algorithm calculates the essence of the Mura compensation data based on the brightness value of the pixel near the mura to be repaired, the brightness value of the mura to be repaired is smoothed, which has the following disadvantages. :
  • the present invention discloses a Mura defect repairing method and device based on a specified position, and for a plurality of Mura defect areas of different types and sizes of a flat display module, which can be specific to the flat display module.
  • Mura defect areas and pixel points are fixed-point repaired to improve the accuracy of Mura defect repair without increasing hardware costs.
  • the present invention provides a Mura defect repairing method based on a specified position for repairing a Mura defect of a flat display module, the method comprising the following steps:
  • Decoding the image input signal into the pixel gray data of the frame image performing interpolation calculation on the Mura designated area of the frame image according to the DeMura lookup table and the DeMura control data to obtain compensation data of the Mura designated area of the frame image, and the compensation is performed
  • the data is superimposed on the corresponding pixel grayscale data in the frame image to obtain a compensated frame image signal.
  • the DeMura lookup table includes an upper gray scale value and a lower gray scale value;
  • the DeMura control data includes a number of Mura designated regions, a BlockSize type of each Mura designated region, a starting point abscissa, a starting point ordinate, The number of horizontal blocks and the number of vertical blocks.
  • the DeMura control data further includes a plurality of compensation gray scale nodes
  • the DeMura lookup table includes a plurality of node lookup tables corresponding to the plurality of compensated gray scale nodes in one-to-one correspondence;
  • the gray value of the pixel point P x of the Mura designated area is on any of the compensated gray scale nodes, obtaining the pixel point P x from the node lookup table corresponding to any one of the compensated gray scale nodes Or the compensation data of the pixel points M and N in the same position in the same column, and obtain the compensation data of the pixel point P x in the current gray level by the following formula:
  • the pixel points M, N are adjacent to the pixel point P x , X Px represents the abscissa of the pixel point P x , P represents the compensation data of the pixel point P x ; X M represents the abscissa of the pixel point M, and M represents the pixel point M Compensation data; X N represents the abscissa of the pixel point N, and N represents the compensation data of the pixel point N;
  • the pixel points M, N are in the same column as the pixel point P x , Y Px represents the ordinate of the pixel point P x , P represents the compensation data of the pixel point P x ; Y M represents the ordinate of the pixel point M, and M represents the pixel point M Compensation data; Y N represents the ordinate of the pixel point N, and N represents the compensation data of the pixel point N.
  • the DeMura control data in the foregoing technical solution further includes a plurality of compensation grayscale nodes, where the DeMura lookup table includes a plurality of node lookup tables corresponding to the plurality of compensated grayscale nodes;
  • the gray value of the pixel point P y of the Mura designated area is between the two adjacent compensated gray scale nodes Plane1, Plane2, the gray values of the pixel point P y are respectively obtained in the two
  • the compensation data when the gray scale nodes Plane1 and Plane2 are compensated, and the compensation data of the pixel point P y at the current gray level T is obtained by the following formula:
  • P is the compensation data when the pixel point P y is at the current gray level T
  • R is the compensation data when the pixel point P y is at Plane 2
  • S is the compensation data when the pixel point P y is at Plane 1 .
  • each of the Mura designated areas in the above technical solution shares the upper gray scale value, the lower gray scale value, and the plurality of compensated gray scale nodes.
  • the compensation data of the single pixel point is obtained from the DeMura lookup table.
  • the present invention further provides a Mura defect repairing device based on a specified position for repairing a Mura defect of a flat display module, the Mura defect repairing device comprising a Flash IC and a Tcon board, the Tcon board further comprising a DeMuraTcon IC
  • the Flash IC is configured to store a DeMura lookup table and DeMura control data
  • the DeMuraTcon IC is configured to obtain compensation data of the Mura designated area of the flat display module according to the DeMura lookup table and the DeMura control data.
  • the DeMuraTcon IC is further configured to decode an image signal input by an external image source into pixel grayscale data of a frame image, and superimpose the compensation data on corresponding pixel grayscale data in the frame image, The compensated frame image signal is obtained.
  • the DeMura lookup table includes an upper gray scale value and a lower gray scale value;
  • the DeMura control data includes a number of Mura designated regions and a BlockSize type and a starting point of each Mura designated region. The abscissa, the starting point ordinate, the number of horizontal blocks, and the number of vertical blocks.
  • the invention can perform fixed point repair on the specific Mura defect area and pixel point of the flat display module, and improve the repairing accuracy of the Mura defect without increasing the hardware cost;
  • the present invention can perform fixed point repair on multiple Mura defect areas of different types and sizes on the flat display module, and compensate for large area Mura while compensating for Mura with large sharpness, such as splicing line and width smaller than BlockSize.
  • FIG. 1 is a schematic structural view of a Mura defect repairing device of the present invention
  • FIG. 2 is a schematic view of a plurality of Mura designated regions of the present invention.
  • FIG. 3 is a schematic diagram of a target pixel point of the present invention and its adjacent position pixel points;
  • FIG. 4 is a schematic diagram showing the relationship between the compensation data of the target pixel point of the present invention and the compensated gray-scale node;
  • Figure 5 is a flow chart showing the repair of a single pixel of the present invention.
  • a Mura defect repair is performed by using a 10-bit processing system (ie, 1024-level gray scale) and a flat display module having a resolution of 3840*2160 as an example.
  • a 10-bit processing system ie, 1024-level gray scale
  • a flat display module having a resolution of 3840*2160 as an example.
  • the hardware of this embodiment mainly includes a Flash IC and a Tcon board including a DeMuraTcon IC.
  • the Flash IC is mainly used to store DeMura LUT (DeMura lookup table) and DeMura Control Data (DeMura control data) input by an external Mura defect inspection device;
  • the DeMuraTcon IC is mainly used to: load DeMura LUT and DeMura from a Flash IC.
  • Control Data decode the image input from the external image source into each frame The picture, the gray level data of each pixel, calculate the compensation data for each pixel (sub-pixel) according to its gray level, position, corresponding DeMura LUT and DeMura Control Data, and the gray level and compensation data of the pixel The compensated gray value is superimposed, and then the compensated gray value is output to the flat display module for display, as shown in FIG.
  • the current flat display module especially the large-size flat display module, generally includes a flash IC for storing information such as Gamma data, vendor identification code, and the like.
  • the DeMura LUT and DeMura Control Data used are stored in the Flash IC.
  • the DeMura Control Data includes Mura overall control data and Mura region control data.
  • the Mura overall control data includes a Higbound (upper gray scale value), a low bound (lower gray scale value), a plurality of compensated gray scale nodes Plane, and a number of Mura designated regions.
  • the Higbound of the embodiment is 1000.
  • the Lowbound is 20, the compensated grayscale node Plane1 is 100, the compensated grayscale node Plane2 is 240, the compensated grayscale node Plane3 is 900, and the Mura designated area number is 3.
  • the Mura region control data is a parameter of each Mura designated region, including BlockSize type, starting point abscissa, starting point ordinate, horizontal block number, vertical block number, where BlockSize type information contains multiple sets of preset values: such as 16*16, 8*8 , 1*8, 8*1, 1*1, etc., different BlockSize types are used to compensate for different types of defects, as shown in Table 2. It should be noted that all the Mura designated areas in this embodiment share Higbound, Lowbound, and the plurality of compensated grayscale nodes Plane.
  • the DeMura LUT includes a plurality of node lookup tables Plane LUT (Plane1LUT, Plane2LUT, Plane3LUT...PlaneN LUT) corresponding to the plurality of compensated grayscale nodes Plane. Since each of the compensated grayscale nodes Plane corresponds to a node lookup table, the number of compensated grayscale nodes Plane determines the number of node lookup tables in each Mura designated area. In this embodiment, three compensated grayscale nodes Plane1, Plane2, and Plane3 are used. The three node lookup tables Plane1LUT, Plane2LUT, and Plane3LUT are taken as an example for description.
  • the DeMuraTcon IC generates a plurality of positions of the Mura designated area and a BlockSize (a precise rectangular area) according to the corresponding Mura area control data for the plurality of Mura designated areas, as shown in Tables 3 to 5.
  • DeMura LUT performs linear interpolation calculation according to the BlockSize of the specified area of the Mura (if the BlockSize type is set to 1*1, linear interpolation calculation is not needed, and it is directly obtained from the corresponding node lookup table), and the Mura is specified in the specified area.
  • the compensation data for each pixel obtains the Mura compensation data matrix for each Mura designated area.
  • BlockSize type 0 (represents BlockSize of 16*16) Starting point abscissa 0 Starting point ordinate 0 Horizontal block number 241 Number of vertical blocks 136
  • BlockSize type 2 (represents BlockSize of 1*8) Starting point abscissa 2060 Starting point ordinate 0 Horizontal block number 10 Number of vertical blocks 271
  • BlockSize type 3 (represents BlockSize of 1*1) Starting point abscissa 2050 Starting point ordinate 1800 Horizontal block number 40 Number of vertical blocks 60
  • DeMuraTcon IC loads DeMura Control Data and DeMura LUT from the Flash IC. This process is automatically executed after the flat display module is turned on for the first time.
  • DeMuraTcon IC determines which Mura designated area the pixel to be repaired is in, and determines which block of the Mura specified area is in the block, and determines which compensation gray scale node interval the gray point of the pixel is in, and then Calculating the compensation data of the pixel by linear interpolation in position and gray scale;
  • DeMuraTcon IC accumulates the corresponding compensation data in the specified area of each Mura to obtain the final compensation data. (If the pixel is only located in a certain Mura designated area, the compensation data corresponding to the other Mura designated area is defaulted to 0 is superimposed), and the final compensation data is superimposed on the original gray data of the pixel to obtain the gray value after the pixel point compensation, as shown in FIG. 2 .
  • the compensation data of the pixel point is in accordance with the node lookup table corresponding to the compensated gray level node.
  • the linear interpolation calculation is performed, that is, the linear interpolation method is used to calculate the compensation data of the target pixel at the current gray level.
  • P is the target pixel to be compensated
  • A, B, C, and D are From the adjacent four position nodes obtained from DeMura Control Data, the compensation data of four points A, B, C, and D can be directly obtained from the node lookup table corresponding to the compensated gray level node. Then the compensation data of the pixel point P can be calculated by the following formula:
  • X P represents the abscissa of point P
  • P represents the compensation data of point P
  • M represents the compensation data of point M
  • N represents the compensation data of point N
  • Y A represents the ordinate of point A
  • A represents the compensation data of point A
  • Y B represents the ordinate of point B
  • B represents the compensation data of point B
  • C represents the ordinate of point C
  • C represents the compensation data of point C
  • Y D represents the ordinate of point D
  • D represents the compensation data of point D.
  • the calculation of the compensation data of the pixel point P (2067, 1850) at the gray level of 240 (ie, Plane2) is taken as an example: starting from (0, 0), BlockSize of 16*16, the point is nearest.
  • the coordinates of the four compensation nodes are A (2064, 1840), B (2080, 1840), C (2080, 1856), D (2064, 1856), if the compensation data of the four points under the gray level 240 are respectively
  • the compensation data P1 of the available point P(2067, 1850) under the gray level 240 is calculated to be -1.9297, which Calculated as follows:
  • the Mura designated area control data setting corresponding to the Mura designated area 3 is as shown in Table 5.
  • the compensation range of the Mura designated area 3 is the single pixel point, and the pixel point P (2067, 1850) is included in the Mura designated area 3
  • the compensation data of the pixel is corresponding to the two compensated grayscale nodes.
  • the two-node look-up table is generated by linear interpolation calculation, that is, the linear interpolation method is used to calculate the compensation data of the target pixel under the target gray level, as shown in FIG. 4, R, S are the target pixel points in Plane3 and Plane2.
  • the compensation data of the target pixel point P under the T gray scale is calculated by the following formula:
  • the final compensation data of pixel point P on Plane2 is 7.8203 (value from Plane2LUT), and the final compensation data of pixel point P on Plane1 is 20.5 (value from Plane1LUT), then pixel point P is 120 gray.
  • the compensation data for the order is:
  • the pixel gradation of the point (2067, 1849) is 80.
  • the pixel gradation of the point (2067, 1849) is between Lowbound and plane1, and the pixel gradation is 80.
  • the compensation data is generated by linear interpolation calculation according to the corresponding compensation data of the position points on the two compensation gray scale nodes. Assume that the compensation data corresponding to plane1 is 5.5 (valued from Plane1LUT). According to the formula, the compensation data of the pixel when the pixel gradation is 80 is:
  • the pixel gradation of the point (2067, 1850) is 240.
  • the pixel gradation of the point (2068, 1849) is on the plane2, and the coordinates of the four nearest compensation plane nodes of the pixel point are respectively assumed.
  • the pixel gradation of the point (2068, 1849) is 200.
  • the pixel gradation of the point (2068, 1849) is between plane1 and plane2, and the pixel gradation is compensated when the pixel gradation is 200.
  • the data is generated by linear interpolation calculation according to the corresponding compensation data of the two compensated gray-scale nodes at the position point. Assume that the compensation data corresponding to plane1 is 5.5 (value from Plane1LUT), and the compensation data corresponding to plane2 is -2.5 (value from Plane2LUT). According to the formula, the pixel can be calculated when the pixel gradation is 200.
  • the compensation data is:
  • the pixel gradation of the point (2068, 1850) is 950.
  • the pixel gradation of the point (2068, 1850) is between plane3 and Highbound, and the pixel gradation is compensated when the pixel gradation is 950.
  • the data is generated by linear interpolation calculation according to the corresponding compensation data of the two compensated gray-scale nodes at the position point. Assume that the compensation data corresponding to the plane3 is 1.55 (takes the value from the Plane3LUT), and the compensation data of the pixel is calculated according to the formula:
  • the gray value displayed by the 2*2 matrix on the flat display module is:

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Abstract

本发明公开了一种基于指定位置的Mura缺陷修复方法及装置，用于对平面显示模组的Mura缺陷进行修复，该方法包括以下步骤：将图像输入信号解码成帧图像的像素灰度数据，根据DeMura查找表和DeMura控制数据在该帧图像的Mura指定区域上进行插值计算得到该帧图像的Mura指定区域的补偿数据，并将该补偿数据叠加到该帧图像中对应的像素灰度数据上，得到补偿后的帧图像信号。本发明可以对平面显示模组具体的Mura缺陷区域、像素点进行定点修复，在不增加硬件成本的情况下提升Mura缺陷修复精度。

Description

基于指定位置的Mura缺陷修复方法及装置 技术领域
本发明涉及显示技术领域，更具体地，涉及到一种基于指定位置的Mura缺陷修复方法及装置，用于对平面显示模组的Mura缺陷进行修复。
背景技术
平面显示器具有高分辨率、高亮度以及无几何变形等优点，同时由于其体积小、重量轻和功耗低，因而被广泛的应用在人们日常使用的消费电子产品中，例如电视、电脑、手机、平板等。平面显示模组是平面显示器的主体组成部分，其制造工艺复杂，需要近百道工序，因此在制造过程中难免会出现各种显示缺陷，而这些显示缺陷较为常见的是Mura(色斑)缺陷。Mura缺陷是在同一光源且底色相同的画面下，因视觉感受到的不同颜色或者亮度的差异，从而给人们带来视觉上的不适，严重影响着平面显示器的品质。
Mura修复是通过改变像素的灰度值来实现亮度均匀性的改善，对于显示亮度比较高的像素施加较低的灰度值，对于显示亮度比较低的像素，施加较高的灰度值，使得灰度补偿后各像素的亮度接近一致，实现Mura缺陷的改善。
目前的Mura修复方法是基于全局修复，按照固定的BlockSize(区域范围，例如4*4、8*8等)做数据压缩，对于单个补偿画面，每个BlockSize区域内只需要一个补偿数据值，例如3840*2160的模组，当BlockSize为8*8时，FLASH只存储481*271个补偿数据，BlockSize区域内其它像素点的补偿数据是通过插值算法计算出来。这种Mura修复方法的优势是效率高、节省成本，但由于线性插值算法计算Mura补偿数据的本质是基于待修复mura附近像素点的亮度值，对待修复mura的亮度值做平滑处理，存在以下不足：
1)如果Mura缺陷锐度较大，即BlockSize区域内Mura缺陷和非缺陷区域亮度变化明显时，平滑的补偿方式不能很好的抹平缺陷边缘区域的差异，Mura修复效果不理想；
2)如果将BlcokSize的精度提高，即缩小BlcokSize的区域范围，则可以解决上述问题，但屏端的Flash容量和Tcon端的数据缓存器(SRAM)容量会大幅增大。例如BlcokSize为1*1的补偿数据量是BlcokSize为8*8的补偿数据量大小的64倍，这样极大 增加了硬件成本。
发明内容
针对上述现有技术的不足，本发明公开了一种基于指定位置的Mura缺陷修复方法及装置，针对平面显示模组不同类型、不同大小的多个Mura缺陷区，可以对平面显示模组具体的Mura缺陷区域、像素点进行定点修复，在不增加硬件成本的情况下提升Mura缺陷修复精度。
为解决上述技术问题，本发明提供一种基于指定位置的Mura缺陷修复方法，用于对平面显示模组的Mura缺陷进行修复，该方法包括以下步骤：
将图像输入信号解码成帧图像的像素灰度数据，根据DeMura查找表和DeMura控制数据在该帧图像的Mura指定区域上进行插值计算得到该帧图像的Mura指定区域的补偿数据，并将该补偿数据叠加到该帧图像中对应的像素灰度数据上，得到补偿后的帧图像信号。
进一步地，上述技术方案中该DeMura查找表包括上限灰阶值、下限灰阶值；该DeMura控制数据包括Mura指定区域数量及各Mura指定区域的BlockSize类型、起始点横坐标、起始点纵坐标、横向Block个数、纵向Block个数。
更进一步地，该DeMura控制数据还包括有多个补偿灰阶节点，该DeMura查找表中包括有与该多个补偿灰阶节点一一对应的多个节点查找表；
若该Mura指定区域的像素点Px的灰度值处在任一个所述补偿灰阶节点上，则从该任一个所述补偿灰阶节点对应的节点查找表中获得与该像素点Px同行或同列相邻位置的像素点M、N的补偿数据，并通过下列公式得到该像素点Px在当前灰阶的补偿数据：
P＝((XN-XPx)*M+(XPx-XM)*N)/(XN-XM)
其中，像素点M、N与像素点Px同行，XPx表示像素点Px的横坐标，P表示像素点Px的补偿数据；XM表示像素点M的横坐标，M表示像素点M的补偿数据；XN表示像素点N的横坐标，N表示像素点N的补偿数据；
或者，
P＝((YN-YPx)*M+(YPx-YM)*N)/(YN-YM)
其中，像素点M、N与像素点Px同列，YPx表示像素点Px的纵坐标，P表示像素点Px的补偿数据；YM表示像素点M的纵坐标，M表示像素点M的补偿数据；YN表示像素点N的纵坐标，N表示像素点N的补偿数据。
更进一步地，上述技术方案中该DeMura控制数据还包括有多个补偿灰阶节点，该DeMura查找表中包括有与该多个补偿灰阶节点一一对应的多个节点查找表；
若该Mura指定区域的像素点Py的灰度值处在相邻的两个所述补偿灰阶节点Plane1、Plane2之间，则分别获得该像素点Py的灰度值处在该两个所述补偿灰阶节点Plane1、Plane2时的补偿数据，并通过下列公式得到该像素点Py在当前灰阶T时的补偿数据：
P＝((Plane2-T)*S+(T-Plane1)*R)/(Plane2-Plane1)
其中，P表示像素点Py处在当前灰阶T时的补偿数据，R表示像素点Py处在Plane2时的补偿数据，S表示像素点Py处在Plane1时的补偿数据。
更进一步地，上述技术方案中每个该Mura指定区域共用该上限灰阶值、该下限灰阶值及该多个补偿灰阶节点。
更进一步地，上述技术方案中若该Mura指定区域为单个像素点，则该单个像素点的补偿数据从该DeMura查找表中获取。
更进一步地，上述技术方案中若一像素点Pc同时位于多个Mura指定区域中，则将该像素点Pc在每个所述Mura指定区域中对应的补偿数据进行累加。
此外，本发明还另外提供一种基于指定位置的Mura缺陷修复装置，用于对平面显示模组的Mura缺陷进行修复，该Mura缺陷修复装置包括Flash IC和Tcon板，该Tcon板还包括DeMuraTcon IC；该Flash IC用于储存DeMura查找表和DeMura控制数据，该DeMuraTcon IC用于根据该DeMura查找表和DeMura控制数据得到该平面显示模组的Mura指定区域的补偿数据。
进一步地，上述技术方案中该DeMuraTcon IC还用于将外部图像源输入的图像信号解码成帧图像的像素灰度数据，并将该补偿数据叠加到该帧图像中对应的像素灰度数据上，得到补偿后的帧图像信号。
更进一步地，上述技术方案中该DeMura查找表包括上限灰阶值、下限灰阶值；该DeMura控制数据包括Mura指定区域数量及各Mura指定区域的BlockSize类型、起始点 横坐标、起始点纵坐标、横向Block个数、纵向Block个数。
本发明的有益效果在于：
1)本发明可以对平面显示模组具体的Mura缺陷区域、像素点进行定点修复，在不增加硬件成本的情况下提升Mura缺陷修复精度；
2)本发明可以对平面显示模组上不同类型、不同大小的多个Mura缺陷区同步进行定点修复，补偿大面积Mura的同时可以补偿锐度较大的Mura，例如拼接线、宽度小于BlockSize的垂直/水平白/黑带、水渍Mura及面积较小的黑白Gap等。
附图说明
图1本发明Mura缺陷修复装置的结构示意图；
图2本发明多个Mura指定区域示意图；
图3本发明目标像素点及其相邻位置像素点示意图；
图4本发明目标像素点的补偿数据与补偿灰阶节点的关系示意图；
图5本发明单个像素点的修复流程图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。此外，下面所描述的本发明各个实施方式中所涉及到的技术特征只要彼此之间未构成冲突就可以相互组合。
实施例：
本实施例以10位处理系统(即1024级灰度)、分辨率为3840*2160的平面显示模组进行Mura缺陷修复为例进行说明。
本实施例的硬件主要包括Flash IC、包含DeMuraTcon IC的Tcon板。其中，该Flash IC主要用于存储外部Mura缺陷检查设备输入的DeMura LUT(DeMura查找表)和DeMura Control Data(DeMura控制数据)；该DeMuraTcon IC主要用于：从Flash IC中载入DeMura LUT和DeMura Control Data，将外部图像源输入的图像解码为每一帧 画面、每一个像素点的灰度数据，对每一个像素(亚像素)按照其灰度、位置、对应的DeMura LUT和DeMura Control Data查找计算出补偿数据，并将该像素的灰度与补偿数据进行叠加得到补偿后的灰度值，然后再将该补偿后的灰度值输出到平面显示模组上显示出来，如图1所示。
上述实施例中，需要说明的是目前的平面显示模组，特别是大尺寸平面显示模组，其PCB板上一般包含有Flash IC，用于存放Gamma数据、厂商识别码等信息，上述实施例所使用到的DeMura LUT和DeMura Control Data都储存于该Flash IC中。
上述实施例中，该DeMura Control Data包括Mura整体控制数据和Mura区域控制数据。其中，该Mura整体控制数据包括Higbound(上限灰阶值)、Lowbound(下限灰阶值)、多个补偿灰阶节点Plane和Mura指定区域数量，如表1所示，本实施例的Higbound为1000、Lowbound为20、补偿灰阶节点Plane1为100、补偿灰阶节点Plane2为240、补偿灰阶节点Plane3为900、Mura指定区域数量为3；该Mura区域控制数据为各个Mura指定区域的参数，包括BlockSize(区域大小)类型、起始点横坐标、起始点纵坐标、横向Block(区域)个数、纵向Block个数，其中，BlockSize类型信息包含多组预设值：如16*16、8*8、1*8、8*1、1*1等，不同的BlockSize类型用于补偿不同类型的缺陷，如表2所示。需要说明的是，本实施例中所有的Mura指定区域都共用Higbound、Lowbound，以及所述多个补偿灰阶节点Plane。
表1
Lowbound 20
Plane1 100
Plane2 240
Plane3 900
Highbound 1000
Mura指定区域数量 3
表2
BlockSize类型 用于补偿的缺陷类型
16*16 大面积Mura
8*8 大面积Mura
1*8 垂直拼接线、垂直黑白带
8*1 水平拼接线、水平黑白带
1*1 水渍Mura、黑白Gap
上述实施例中，该DeMura LUT中包括有与该多个补偿灰阶节点Plane一一对应的多个节点查找表Plane LUT(Plane1LUT、Plane2LUT、Plane3LUT…PlaneN LUT)。由于每一个补偿灰阶节点Plane都对应一个节点查找表，所以补偿灰阶节点Plane的数量决定每一个Mura指定区域的节点查找表数量，本实施例以3个补偿灰阶节点Plane1、Plane2、Plane3及3个节点查找表Plane1LUT、Plane2LUT、Plane3LUT为例进行说明。
上述实施例中，该DeMuraTcon IC分别对多个Mura指定区域按照其对应的Mura区域控制数据生成该多个Mura指定区域的位置和BlockSize(一个精确的矩形区域)，如表3～表5所示；DeMura LUT按照该Mura指定区域的BlockSize进行线性插值计算(如果设定的BlockSize类型是1*1则不需要进行线性插值计算，直接从对应的节点查找表中获取)，生成该Mura指定区域内每个像素点的补偿数据，得到每个Mura指定区域的Mura补偿数据矩阵。
表3 Mura指定区域1控制数据
BlockSize类型 0(代表16*16的BlockSize)
起始点横坐标 0
起始点纵坐标 0
横向Block个数 241
纵向Block个数 136
表4 Mura指定区域2控制数据
BlockSize类型 2(代表1*8的BlockSize)
起始点横坐标 2060
起始点纵坐标 0
横向Block个数 10
纵向Block个数 271
表5 Mura指定区域3控制数据
BlockSize类型 3(代表1*1的BlockSize)
起始点横坐标 2050
起始点纵坐标 1800
横向Block个数 40
纵向Block个数 60
上述实施例中，该DeMuraTcon IC的具体工作流程是：
1)DeMuraTcon IC从Flash IC中载入DeMura Control Data和DeMura LUT，该过程在平面显示模组第一次开机后自动执行，完成以后后续不需要再执行；
2)DeMuraTcon IC判断需要修复的像素点处于哪个Mura指定区域，并判断该像素点处于该Mura指定区域的哪个Block内，以及判断该像素点的灰度处于哪一个补偿灰阶节点区间内，然后在位置和灰度上采用线性插值法计算该像素点的补偿数据；
3)DeMuraTcon IC将该像素点在各个Mura指定区域中对应的补偿数据累加得到最终的补偿数据(如果该像素点只位于某一个Mura指定区域，则将在其他Mura指定区域对应的补偿数据默认为0进行叠加)，并将最终的补偿数据叠加到该像素点的原始灰度数据上，得到该像素点补偿后的灰度值，如图2所示。
上述实施例中，当任一Mura指定区域中的某一像素点的灰度值处在某一个补偿灰阶节点上时，则该像素点的补偿数据按照该补偿灰阶节点对应的节点查找表进行线性插值计算生成，即在位置上采用线性插值法计算目标像素点在当前灰阶下的补偿数据，如图3所示，P是需要补偿的目标像素点，A、B、C、D是从DeMura Control Data中获取的相邻四个位置节点，从补偿灰阶节点对应的节点查找表中可以直接获取到A、B、C、D四点的补偿数据。则像素点P的补偿数据可以利用下列公式计算获得：
M＝((YM-YA)*D+(YD-YM)*A)/(YD-YA)
N＝((YN-YB)*C+(YC-YN)*B)/(YC-YB)
P＝((XN-XP)*M+(XP-XM)*N)/(XN-XM)
其中，XP表示P点的横坐标，P表示P点的补偿数据；XM、YM表示M点的横坐标和纵坐标，M表示M点的补偿数据；XN、YN表示N点的横坐标和纵坐标，N表示N点的补偿数据；YA表示A点的纵坐标，A表示A点的补偿数据；YB表示B点的纵坐标，B表示B点的补偿数据；YC表示C点的纵坐标，C表示C点的补偿数据；YD表示D点的纵坐标，D表示D点的补偿数据。
下面结合图5对像素点P(2067，1850)的Mura修复情况进行说明。
上述实施例中，Mura指定区域1为整体性的大面积Mura，其对应的Mura指定区域控制数据设定如表3所示，则Mura指定区域1的补偿范围就达到了(240*16)*(135*16)＝(3840*2160)，可以对整块屏的范围进行补偿。本实施例以像素点P(2067，1850)在灰度为240(即Plane2)下的补偿数据计算为例进行说明：以(0，0)为起点，16*16的BlockSize，该点最临近的四个补偿节点坐标分别为A(2064，1840)，B(2080，1840)，C(2080，1856)，D(2064，1856)，如果这四个点在灰阶240下的补偿数据分别为A＝-5，B＝2，C＝4，D＝-2(从Plane2LUT中取值)，则计算可得点P(2067，1850)在灰阶240下的补偿数据P1为-1.9297，其计算公式如下：
M＝((1850-1840)*(-2)+(1856-1850)*(-5))/(1856-1840)＝-3.125
N＝((1850-1840)*4+(1856-1850)*2)/(1856-1840)＝3.25
P1＝((2080-2067)*M+(2067-2064)*N)/(2080-2064)＝-1.9297。
Mura指定区域2对应的Mura指定区域控制数据设定如表4所示，则Mura指定区域2的补偿范围就达到了(9*1)*(270*8)＝(9*2160)，可以对该垂直拼接线所在的区域进行补偿。以(2060，0)为起点，1*8的BlockSize，点P(2067，1850)最临近的2个补偿节点坐标分别为E(2067，1848)，F(2067，1856)，如果这2个点在灰阶240上的补偿数据分别为E＝6，F＝9，则计算可得像素点P(2067，1850)在灰阶240下的补偿数据P2为6.75，其计算公式如下：
P2＝((1856-1850)*6+(1850-1848)*9)/(1856-1848)＝6.75。
Mura指定区域3对应的Mura指定区域控制数据设定如表5所示，则Mura指定区域3的补偿范围就为该单个像素点，像素点P(2067，1850)恰好包含于Mura指定区域3中，指定区域3中P点在灰阶240上的补偿数据直接从从Plane2LUT中取值P3＝3.0。
如图2、图5所示，则像素点P(2067，1850)处在Plane2上的最终补偿数据为：P＝P1+P2+P3＝7.8203。
上述实施例中，当任一Mura指定区域中的某一像素点的灰度值处在两个补偿灰阶节点之间时，则该像素点的补偿数据按照该两个补偿灰阶节点对应的两个节点查找表进行线性插值计算生成，即在灰度上采用线性插值法计算目标像素点在目标灰阶下的补偿数据，如图4所示，R、S是目标像素点在Plane3和Plane2灰阶下的补偿数据，则目标像素点P在T灰阶下的补偿数据由下列公式计算获得：
PT＝((Plane3-T)*S+(T-Plane2)*R)/(Plane3-Plane2)。
例如像素点P处在Plane2上的最终补偿数据为7.8203(从Plane2LUT中取值)，像素点P处在Plane1上的最终补偿数据为20.5(从Plane1LUT中取值)，则像素点P在120灰阶的补偿数据为：
P120＝(7.8203*(120-100)+20.5*(240-120))/(240-100)＝18.6886。
为了进一步说明平面显示模组的Mura缺陷修复过程，下文以表3所示的Mura指定区域1内的(2067、1849)、(2068、1849)、(2067、1850)、(2068、1850)4个像素点组成的2*2大小的图像区块的修复为例进行说明。本实施例中，Lowbound、Highbound对应的节点查找表全部为0。
假设某帧图像中2*2矩阵的像素灰度数据为：
Figure PCTCN2017117876-appb-000001
其中，点(2067、1849)的像素灰度为80，根据表1及图4可知，点(2067、1849)的像素灰度处于Lowbound与plane1之间，则像素灰度为80时该像素点的补偿数据按照该位置点在两个补偿灰阶节点上对应的补偿数据进行线性插值计算生成。假设该点在plane1对应的补偿数据为5.5(从Plane1LUT中取值)，根据公式可算出像素灰度为80时该像素点的补偿数据为：
P80＝[(100-80)*0+(80-20)*5.5]/(100-20)＝4.125。
点(2067、1850)的像素灰度为240，根据表1及图4可知，点(2068、1849)的像素灰度处于plane2上，假设该像素点最临近的四个补偿平面节点的坐标分别为A(2064，1840)，B(2080，1840)，C(2080，1856)，D(2064，1856)，如果这四个点在plane2 下的补偿数据分别为A＝-5，B＝2，C＝4，D＝-2(从Plane2LUT中取值)，则计算可得点(2067，1850)在灰阶240下的补偿数据P240为-1.9297，其计算公式如下：
M＝((1850-1840)*(-2)+(1856-1850)*(-5))/(1856-1840)＝-3.125
N＝((1850-1840)*4+(1856-1850)*2)/(1856-1840)＝3.25
P240＝((2080-2067)*M+(2067-2064)*N)/(2080-2064)＝-1.9297。
点(2068、1849)的像素灰度为200，根据表1及图4可知，点(2068、1849)的像素灰度处于plane1与plane2之间，则像素灰度为200时该像素点的补偿数据按照该位置点在两个补偿灰阶节点上对应的补偿数据进行线性插值计算生成。假设该点在plane1对应的补偿数据为5.5(从Plane1LUT中取值)，在plane2对应的补偿数据为-2.5(从Plane2LUT中取值)，根据公式可算出像素灰度为200时该像素点的补偿数据为：
P200＝[(200-100)*-2.5+(240-200)*5.5]/(240-100)＝-0.25。
点(2068、1850)的像素灰度为950，根据表1及图4可知，点(2068、1850)的像素灰度处于plane3与Highbound之间，则像素灰度为950时该像素点的补偿数据按照该位置点在两个补偿灰阶节点上对应的补偿数据进行线性插值计算生成。假设该点在plane3对应的补偿数据为1.55(从Plane3LUT中取值)，根据公式可算出像素灰度为950时该像素点的补偿数据为：
P950＝[(1000-950)*1.55+(950-900)*0]/(1000-900)＝0.775。
通过上述计算，可知该2*2矩阵对应的灰度补偿数据为：
Figure PCTCN2017117876-appb-000002
则，该2*2矩阵最终在平面显示模组上显示的灰度值为：
Figure PCTCN2017117876-appb-000003
本领域的技术人员容易理解，本说明书未作详细描述的内容属于本领域专业技术人员公知的现有技术，以上仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。

Claims (10)

  1. 一种基于指定位置的Mura缺陷修复方法，用于对平面显示模组的Mura缺陷进行修复，其特征在于，该方法包括以下步骤：
    将图像输入信号解码成帧图像的像素灰度数据，根据DeMura查找表和DeMura控制数据在该帧图像的Mura指定区域上进行插值计算得到该帧图像的Mura指定区域的补偿数据，并将该补偿数据叠加到该帧图像中对应的像素灰度数据上，得到补偿后的帧图像信号。
  2. 根据权利要求1所述的Mura缺陷修复方法，其特征在于，该DeMura查找表包括上限灰阶值、下限灰阶值；该DeMura控制数据包括Mura指定区域数量及各Mura指定区域的BlockSize类型、起始点横坐标、起始点纵坐标、横向Block个数、纵向Block个数。
  3. 根据权利要求1所述的Mura缺陷修复方法，其特征在于，该DeMura控制数据包括有多个补偿灰阶节点，该DeMura查找表中包括有与该多个补偿灰阶节点一一对应的多个节点查找表；
    若该Mura指定区域的像素点Px的灰度值处在任一个所述补偿灰阶节点上，则从该任一个所述补偿灰阶节点对应的节点查找表中获得与该像素点Px同行或同列相邻位置的像素点M、N的补偿数据，并通过下列公式得到该像素点Px在当前灰阶的补偿数据：
    P＝((XN-XPx)*M+(XPx-XM)*N)/(XN-XM)
    其中，像素点M、N与像素点Px同行，XPx表示像素点Px的横坐标，P表示像素点Px的补偿数据；XM表示像素点M的横坐标，M表示像素点M的补偿数据；XN表示像素点N的横坐标，N表示像素点N的补偿数据；
    或者，
    P＝((YN-YPx)*M+(YPx-YM)*N)/(YN-YM)
    其中，像素点M、N与像素点Px同列，YPx表示像素点Px的纵坐标，P表示像素点Px的补偿数据；YM表示像素点M的纵坐标，M表示像素点M的补偿数据；YN表示像素点N的纵坐标，N表示像素点N的补偿数据。
  4. 根据权利要求1所述的Mura缺陷修复方法，其特征在于，该DeMura控制数据包括有多个补偿灰阶节点；
    若该Mura指定区域的像素点Py的灰度值处在相邻的两个所述补偿灰阶节点Plane1、Plane2之间，则分别获得该像素点Py的灰度值处在Plane1、Plane2时的补偿数据，并通过下列公式得到该像素点Py在当前灰阶T时的补偿数据：
    P＝((Plane2-T)*S+(T-Plane1)*R)/(Plane2-Plane1)
    其中，P表示像素点Py处在当前灰阶T时的补偿数据，R表示像素点Py处在Plane2时的补偿数据，S表示像素点Py处在Plane1时的补偿数据。
  5. 根据权利要求2-4任一项所述的Mura缺陷修复方法，其特征在于，每个该Mura指定区域共用该上限灰阶值、该下限灰阶值及该多个补偿灰阶节点。
  6. 根据权利要求1所述的Mura缺陷修复方法，其特征在于，若该Mura指定区域为单个像素点，则该单个像素点的补偿数据从该DeMura查找表中获取。
  7. 根据权利要求1-4、6任一项所述的Mura缺陷修复方法，其特征在于，若一像素点Pc同时位于多个Mura指定区域中，则将该像素点Pc在每个该Mura指定区域中对应的补偿数据进行累加。
  8. 一种基于指定位置的Mura缺陷修复装置，用于对平面显示模组的Mura缺陷进行修复，该Mura缺陷修复装置包括Flash IC和Tcon板，其特征在于，该Tcon板还包括DeMuraTcon IC；该Flash IC用于储存DeMura查找表和DeMura控制数据，该DeMuraTcon IC用于根据该DeMura查找表和DeMura控制数据得到该平面显示模组的Mura指定区域的补偿数据。
  9. 根据权利要求8所述的Mura缺陷修复装置，其特征在于，该DeMuraTcon IC还用于将外部图像源输入的图像信号解码成帧图像的像素灰度数据，并将该补偿数据叠加到该帧图像中对应的像素灰度数据上，得到补偿后的帧图像信号。
  10. 根据权利要求8所述的Mura缺陷修复装置，其特征在于，该DeMura查找表包括上限灰阶值、下限灰阶值；该DeMura控制数据包括Mura指定区域数量及各Mura指定区域的BlockSize类型、起始点横坐标、起始点纵坐标、横向Block个数、纵向Block个数。
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