WO2018037509A1 - Storage system and storage control method - Google Patents

Abstract

This storage system sets an area aligned with two or more chunk pages based on a first chunk as a parcel which is a chunk component, regarding two or more zones when a first chunk that is at least one of one or more chunks is configured by using the two or more zones provided by two or more zone-providing storage devices. The storage system directly or indirectly allocates, to a logical volume, at least one chunk page among the two or more chunk pages based on the first chunk.

Description

Storage system and storage control method

The present invention generally relates to storage control, for example, storage control of a storage system having SMR (Shingled Magnetic Recording) -HDD (Hard Disk Drive).

As a storage system, for example, storage systems disclosed in Patent Documents 1 and 2 are known.

US7,904,749 US8,775,733

As the data held or used by users increases, the capacity of the PDEV (physical storage device) installed in the storage system is required to be increased. A PDEV is typically a non-volatile storage device, and an example of a PDEV is an HDD (Hard Disk Drive). As an HDD having a larger storage capacity than a normal HDD, an HDD to which an SMR (Shingled Magnetic Recording) technology is applied, that is, an SMR-HDD is known. The HDD is expected to continue to be relatively inexpensive in the future, and from this, a storage system including the SMR-HDD as a PDEV is conceivable.

According to one of the features of the SMR-HDD, a continuous logical area called a zone is defined in advance in the SMR-HDD. As a zone, a conventional zone in which random writing is possible can be defined, but a sequential writing in which random writing is not possible (that is, only sequential writing is possible for writing) is possible for writing according to SMR. Need to be defined. Specifically, for example, the conventional zone can be supported by a conventional command (typically, SCSI Block Command). However, the sequential zone cannot be supported by a conventional command, but can be supported by an SMR optimization command (Zoned Block Command) which is an example of an extended command.

If SMR-HDD is adopted as PDEV, a logical area based on SMR-HDD can be directly or indirectly allocated to a logical volume provided to a host system (one or more host computers) of a storage system. . However, there is no known technique that employs a sequential zone as a storage area that is the basis of a logical area allocated to a logical volume.

Not limited to SMR-HDD, there may be other types of zone providing storage devices (PDEVs) in which sequential zones are defined. The above-described problem is not limited to SMR-HDD, but may be a case where another type of zone providing storage device in which a sequential zone is defined is adopted as a PDEV installed in the storage system.

When the storage system is configured by using two or more zones provided by two or more zone providing storage devices, the first chunk, which is at least one of the one or more chunks, is configured using the two or more zones. For each, an area aligned with two or more chunk pages based on the first chunk is a parcel that is a component of the chunk. The storage system allocates at least one of the two or more chunk pages based on the first chunk directly or indirectly to the logical volume. “Indirect allocation” means that a chunk page is allocated to a logical volume via an allocation destination area of the chunk page. An example of the “allocation destination area” is a virtual page described later. “Direct allocation” means that the chunk page is allocated to the logical volume without passing through any allocation destination area.

A logical area based on a zone provided by a zone providing storage device can be appropriately allocated to a logical volume.

1 is a schematic diagram of Example 1. FIG. 1 shows a configuration of an entire system according to a first embodiment. An example of the storage hierarchy based on Example 1 is shown. Shows programs, tables and areas in memory. A correspondence relationship between chunks and chunk pages and corresponding to RAID5 is shown. A correspondence relationship between a chunk and a chunk page and corresponding to RAID4 is shown. An example of address mapping is shown. The structure of a logical volume management table is shown. The structure of an SMR-HDD management table is shown. The structure of a cluster mapping table is shown. The structure of a cluster reverse mapping table is shown. The structure of a cache management table is shown. The structure of a write destination virtual page management table is shown. The structure of a virtual page write pointer management table is shown. The flow of cache memory write processing is shown. The flow of read processing is shown. It is a schematic diagram of the outline | summary of a parity production | generation system (1). The flow of parity generation processing according to the parity generation method (1) is shown. It is a schematic diagram of the outline | summary of a parity production | generation system (2). It is a schematic diagram of the outline | summary of a parity production | generation system (3). The structure of a temporary storage area management table is shown. The flow of parity generation processing according to the parity generation method (3) is shown. The flow of the available capacity report processing is shown. An example of the storage hierarchy based on Example 2 is shown. An example of the address mapping which concerns on Example 3 is shown. The structure of a zone management table is shown. The flow of destage processing is shown.

Hereinafter, some examples will be described.

In the following description, the “interface part” includes one or more interfaces. The one or more interfaces may be one or more similar interface devices (for example, one or more NIC (Network Interface Card)) or two or more different interface devices (for example, NIC and HBA (Host Bus Adapter)). There may be.

In the following description, the “storage unit” includes one or more memories. The at least one memory may be a volatile memory or a non-volatile memory. The storage unit is mainly used during processing by the processor unit.

In the following description, the “processor unit” includes one or more processors. The at least one processor is typically a CPU (Central Processing Unit). The processor may include a hardware circuit that performs part or all of the processing.

In the following description, information may be described using an expression such as “xxx table”, but the information may be expressed in any data structure. That is, in order to show that the information does not depend on the data structure, the “xxx table” can be referred to as “xxx information”. In the following description, the configuration of each table is an example, and one table may be divided into two or more tables, or all or part of the two or more tables may be a single table. Good.

In the following description, the process may be described using “program” as a subject. However, the program is executed by a processor (for example, a CPU (Central Processing Unit)), so that a predetermined processing is appropriately performed. Since the processing is performed using a storage unit (for example, a memory) and / or an interface device (for example, a communication port), the subject of processing may be a processor (or an apparatus or system having the processor). The processor may include a hardware circuit that performs a part or all of the processing. The program may be installed in a computer-like device from a program source. The program source may be, for example, a recording medium (for example, non-transitory) readable by a program distribution server or a computer. In the following description, two or more programs may be realized as one program, or one program may be realized as two or more programs.

In the following description, the “host system” may be one or more physical host computers (for example, a cluster of host computers), or at least one virtual host computer (for example, VM (Virtual Machine)). ) May be included. Hereinafter, the host system is simply referred to as “host”.

In the following description, the “storage system” may be one or more physical storage devices, or at least one virtual storage device (for example, LPAR (Logical Partition) or SDS (Software Defined Storage). ) May be included.

In the following description, “PDEV” means a physical storage device, and is typically a nonvolatile storage device (for example, an auxiliary storage device). In the following embodiments, the PDEV is typically an SMR-HDD. However, not only the SMR-HDD but also other types of PDEVs, in particular, other types of PDEVs in which sequential zones are defined in advance, can be applied to the present invention.

Also, in the following description, “RAID” is an abbreviation for Redundant “Array” of “Independent” (or “Inexpensive)” Disks.

In the following description, the “RAID group” may be a group that stores data according to a RAID level (RAID configuration) configured and associated with a plurality of SMR-HDDs, or is configured and associated with a plurality of parcels (described later). It may be a group that stores data according to a specified RAID level (RAID configuration). The latter group may be called “chunk” in the embodiment, as will be described later.

Moreover, in the following description, when explaining without distinguishing the same kind of element, a reference code (or a common part in the reference sign) is used, and when explaining the same kind of element separately, the element ID (or Element reference signs) may be used. For example, “SMR-HDD 51” is described when the SMR-HDD is not particularly distinguished, and “SMR-HDD 1-1” is described when the individual SMR-HDD is distinguished. There are things to do.

In the following description, numbers are mainly used as element identifiers, but other types of codes may be used instead of or in addition to numbers.

In addition, the definitions of the plurality of types of storage areas in the following embodiments are as follows.
“Zone” is a storage area defined in advance in the SMR-HDD. A zone is a continuous logical storage area according to continuous logical addresses (typically LBA (Logical Block Address)). The zone can be supported (operated) by a command for the SMR-HDD. For example, a response describing the capacity of a zone can be acquired by a certain control command. A plurality of zones exist in one SMR-HDD. Note that the size of any zone in the SMR-HDD is the same.
“Parcel” means all or part of a zone.
“Stripes” are parts of parcels. A plurality of stripes in one SMR-HDD constitute one parcel in the SMR-HDD. In the stripe, either user data that is a part of a data unit corresponding to a stripe column (described later) including the stripe, or parity corresponding to the data unit is stored. A stripe in which user data is stored can be referred to as a “data stripe”, and a stripe in which parity is stored can be referred to as a “parity stripe”. “Data unit” means data in stripe columns.
“Chunk” is a storage area composed of a plurality of parcels existing in a plurality of SMR-HDDs. Accordingly, the chunk includes a plurality of stripes. The plurality of stripes include a data stripe and a parity stripe.
A “chunk page” is a storage area composed of a plurality of data stripes existing in a plurality of SMR-HDDs. In other words, the chunk page is composed of a plurality of stripes, but each of the plurality of stripes is a data stripe and does not include a parity stripe.
A “stripe column” is a storage area composed of a plurality of stripes of the same address respectively existing in a plurality of SMR-HDD areas constituting one RAID group.
The “cache stripe column” is a storage area corresponding to the stripe column and a storage area on the cache memory area. Data in the cache stripe column is stored (destaged) in a stripe column corresponding to the cache stripe column.
“Logical volume” is a logical storage area recognized by the host.
A “logical page” is a part of a logical volume. A logical volume is composed of a plurality of logical pages.
A “logical cluster” is a part of a logical page. A logical page is composed of a plurality of logical clusters.
The “virtual volume” is a so-called capacity expansion volume, and is typically a logical storage area according to Thin Provisioning. The virtual volume is an internal volume (a volume not provided to the host) associated with the logical volume.
A “virtual page” is a part of a virtual volume. A virtual volume is composed of a plurality of virtual pages.
A “virtual cluster” is a part of a virtual page. The virtual page is composed of a plurality of virtual clusters.

FIG. 1 is a schematic diagram of the first embodiment.

There are multiple SMR-HDDs 51. Each SMR-HDD 51 is an example of a zone providing storage device. Each SMR-HDD 51 provides a plurality of zones 50. As the zone 50, there is at least a sequential zone 50S. There may be a conventional zone 50C. The conventional zone 50C is a zone where random writing is possible. On the other hand, the sequential zone 50S is a zone where random writing is impossible, in other words, a zone where only sequential writing is possible for writing. In the present embodiment, the conventional zone 50C can be supported by a SCSI Block 例 Command which is an example of a conventional command. On the other hand, the sequential zone 50S cannot be supported by a conventional command, but is supported by an SMR optimization command (Zoned Block Command) which is an example of an extended command.

Each zone 50 includes a parcel 41. The parcel 41 includes a plurality of stripes 52 provided by the SMR-HDD 51 having the parcel 41. The size of the stripe 52 is, for example, 512 KB.

A plurality of chunk pages 60 are provided based on a plurality of SMR-HDDs 51. Each chunk page 60 includes a plurality of stripes 52 provided by a plurality of SMR-HDDs 51 that provide the chunk page 60, respectively.

According to the present embodiment, the unused area 53 can be provided in at least one sequential zone 50S. That is, at least one sequential zone 50 </ b> S can be composed of the parcel 41 and the unused area 53. In other words, instead of using up the entire area of the sequential zone 50 </ b> S (rather than providing it as a plurality of stripes 52), a partial area of the sequential zone 50 </ b> S can be defined as the unused area 53. The “unused area” is a storage area that is not used as an effective storage area. In other words, no part of the unused area is provided (not used) as at least part of the stripe 52. Accordingly, neither user data nor parity is stored in the unused area 53.

According to the present embodiment, the usable capacity of the storage system is defined as follows. The “usable capacity” is the capacity of an area where user data can be stored, and does not include the capacity of an area where parity can be stored. Typically, the size of the zone 50 (for example, the size of the sequential zone 50S) is larger than the page size. In the following definition, the RAID level is mD + nP (m is a natural number, n is an integer of 0 or more), that is, one stripe column is composed of m data stripes and n parity stripes. Suppose that
Usable capacity = total data stripe capacity = parcel size x m / (m + n) x number of parcels (1)

“Parcel size” is defined as follows. In the following definition, as in (Equation 1), the RAID level is mD + nP (m is a natural number, n is an integer of 0 or more), that is, one stripe column includes m data stripes and n Suppose that it is composed of one parity stripe.
Parcel size = int {zone size / (page size / m)} × (page size / m) (Formula 2)
* “Int” means that the decimal part is rounded down.
* “M” is “m” in “mD + nP”.

According to the above definition, when the zone size is 256 MB, the page size is 42 MB, and m = 3, the parcel size is 252 MB. Therefore, the size of the unused area 53 is 4 MB (= 256 MB (zone size) -252 MB (parcel size)). The “page size” may be the size of any one of the virtual page and the logical page (typically, the size of the virtual page and the logical page is the same). Further, according to the above definition, the parcel size may be the same as the zone size. In this case, the size of the unused area 53 is 0, that is, the unused area 53 is not necessary. .

In the specific example based on the above definition, the page size is 42 MB, but as in the specific example, the page size is preferably 42 MB. An example of the reason is as follows.

The stripe size is generally a power of 2 and is typically 512 KB. When the stripe size is 512 KB, the following situation is obtained with respect to the total size of the data stripes 52 in each stripe column.
RAID level case 1: RAID1 (1D + 1P)
Total size of data stripe 52 = 512 KB × 1 = 512 KB
RAID level case 2: RAID1 (2D + 2P)
Total size of data stripe 52 = 512 KB × 2 = 1024 KB
RAID level case 3: RAID 5 (3D + 1P)
Total size of data stripe 52 = 512 KB × 3 = 1536 KB
RAID level case 4: RAID 5 (7D + 1P)
Total size of data stripe 52 = 512 KB × 7 = 3584 KB
RAID level case 5: RAID 6 (6D + 2P)
Total size of data stripe 52 = 512 KB × 6 = 3072 KB
RAID level case 6: RAID 6 (14D + 2P)
Total size of data stripe 52 = 512 KB × 14 = 7168 KB

The least common multiple of RAID level cases 1 to 6 is 21 MB (= 512 KB × 2 × 3 × 7). By setting the page size to a natural multiple of the least common multiple (21 MB), for example, 42 MB (= 21 MB × 2), 512 KB × 1, 512 KB × 2, 512 KB × 3, 512 KB × 7, 512 KB × 6, and The page size is divisible by any of 512 KB × 14. For this reason, even when the RAID level of any of the above cases is used, when the data stripe 52 is associated with the page, N stripe columns can be associated with the page (N is a natural number). That is, the page size is preferably a natural number multiple of the least common multiple of a plurality of data stripe sizes total (stripe size × number of data stripes) respectively corresponding to a plurality of different RAID levels. When the page size is different from the page size according to this consideration, for example, when the page size is 64 MB, the above result cannot be obtained.

Although the page size can be determined in accordance with such consideration, it is desirable that the page size is an appropriate size in relation to the zone size defined in advance in the SMR-HDD 51. There is a technical problem that it is difficult to determine the page size and the area management burden is large.

Therefore, as described above, at least one sequential zone 50S is not used as a usable area, but the above technical problem is solved by a simple technical idea that a non-use area 53 is provided. Can do. That is, instead of adjusting the page size, it is possible to appropriately set the storage area size relationship between different storage hierarchies by adjusting the zone side size (parcel size) by providing the unused area 53 in the zone size. it can. If the above technical problems remain, it is difficult to adopt a PDEV such as the SMR-HDD 51 as the PDEV that constitutes the RAID group of the storage system. Therefore, it is possible to provide a storage system having the SMR-HDD 51, that is, a storage system having a larger capacity than a storage system having a normal HDD.

Hereinafter, this embodiment will be described in detail. Note that the non-use area 53 may also be provided in the conventional zone 50C as shown in FIG.

FIG. 2 shows the configuration of the entire system according to the first embodiment.

The storage system 100 is connected to one or more hosts 300 via a communication network such as SAN (Storage Area Network).

The storage system 100 includes a plurality of PDEVs including a plurality of SMR-HDDs 51 and a storage controller 110 connected to the plurality of PDEVs. The storage system 100 may include a RAID group based on the SMR-HDD 51 and a RAID group based on another type of PDEV (for example, an SSD or a normal HDD).

The storage controller 110 adjusts the zone side size (parcel size) described with reference to FIG. Specifically, for example, the storage controller 110 sends a command for inquiring the zone size to the SMR-HDD 51 (for example, a command “REPORT ZONE” supported by Zoned Block Command), and a response to the command (the zone size is The response described) is received from the SMR-HDD 51. The storage controller 110 uses the RAID configuration (which parcel 41 of which SMR-HDD 51 configures the RAID), the zone size of the SMR-HDD 51, and the number of data stripes (m) in the RAID configuration, as described above. By calculating (Equation 2), the parcel size is calculated for each RAID configuration. Further, by calculating the above (Equation 1) using the parcel size, the number of parcels in the storage system 100, the number of data stripes (m) in the RAID configuration, and the number of parity stripes (n) in the RAID configuration, Calculate available capacity.

The storage controller 110 has an interface unit, a storage unit, and a processor unit. An example of the interface unit is a plurality of FC (Fibre Channel) I / F (interface) 113, which is an example of a front-end interface unit connected to the host, and a plurality of examples of a back-end interface unit connected to the PDEV. SAS (Serial Attached SCSI) I / F115. An example of the storage unit is the memory 112. An example of the processor unit is the CPU 111.

FC I / F 113 is an interface for communicating with the host. The SAS I / F 115 is an interface for communicating with the SMR-HDD 51. The memory 112 stores programs and tables. The memory 112 may include a cache memory area in which data input / output to / from the PDEV such as the SMR-HDD 51 is temporarily stored. The CPU 111 reads and executes a program from the memory, and uses a table in the memory 112.

The storage controller 110 further has an ASIC (Application Specific Integrated Circuit) 116 that is an example of a hardware circuit. The ASIC 116 may be an example of an element included in the processor unit. Instead of the ASIC 116, other types of hardware circuits (for example, FPGA (Field-Programmable Gate Array)) may be employed. The ASIC 116 creates parity. In this embodiment, an ASIC 116 and a SAS I / F 115 are provided for each PDEV group 121. The PDEV group 121 may be a RAID group or may not be a RAID group.

Although not shown, the storage system 100 has a battery for power failure to protect dirty data (data not yet stored in the PDEV and stored in the cache memory area). Also good. Further, the memory 112 may be duplicated. Further, when the memories 112 are duplicated, the power supply systems of these memories 112 may be different.

The storage controller 110 may execute a Log-Structured write described later. The storage controller 110 may have at least one of a deduplication function and a compression function for reducing the amount of data regarding the Log-Structured write.

FIG. 3 shows an example of a storage hierarchy according to the first embodiment.

According to this example, distributed RAID is adopted. In a normal RAID, a RAID group is configured with HDD as a basic unit, whereas in distributed RAID, a RAID group is configured with parcel as a basic unit. A RAID group composed of a plurality of parcels 41 is called a chunk 303. For example, as a plurality of SMR-HDD groups, a first SMR-HDD group consisting of SMR-HDDs 1-1 to 1-3, a second SMR-HDD group consisting of SMR-HDDs 2-1 to 2-3, Suppose that there is a third SMR-HDD group consisting of SMR-HDDs 3-1 to 3-3 and a fourth SMR-HDD group consisting of SMR-HDDs 4-1 to 4-3. As an example of the realization of the distributed RAID, the parcel 41 in the SMR-HDD 1-1, the parcel 41 in the SMR-HDD 2-2, the parcel 41 in the SMR-HDD 3-1 and the parcel 41 in the SMR-HDD 4-3 are used. Chunk 303 is configured. There are a plurality of combinations of SMR-HDDs 51 that store the parcels 41 constituting the chunk 303. In the distributed RAID, when a certain SMR-HDD 51 fails, the CPU 111 selects the SMR-HDD 51 so that (almost) all the SMR-HDDs 51 in the storage system 100 are involved in RAID rebuild (collection copy) processing. be able to.

A plurality of data stripes included in the chunk 303 constitute a plurality of chunk pages 60. The chunk page 60 is a storage area allocated to the virtual page 302. The chunk 303 may be common to a plurality of virtual volumes 141, or a chunk 303 may be provided for each virtual volume 141. One or more chunks 303 may correspond to, for example, a capacity pool (a pool of chunk pages 60) according to Thin Provisioning.

There are a plurality of virtual volumes 141 and a plurality of logical volumes 151. The virtual volume 141 and the logical volume 151 may correspond by 1: 1, but in this embodiment, they correspond by many: many. That is, an area (for example, logical page 301) in the logical volume 151 corresponds to an area (for example, virtual page 302) in the virtual volume 141, and another area in the same logical volume 151 is an area in another virtual volume 141. It corresponds to. The logical volume 151 and the virtual volume 141 are associated by a cluster mapping table described later. A logical volume 151 is provided to the host 300.

FIG. 4 shows programs, tables, and areas in the memory 112.

In the memory 112, an I / O control program 401 and an area management program 402 are stored. The memory 112 also includes a cluster mapping table 411, a cluster reverse mapping table 412, a page mapping table 413, a chunk mapping table 414, a parcel mapping table 415, a RAID management table 416, a write destination virtual page management table 417, and a virtual page write pointer. A management table 418, a logical volume management table 419, an SMR-HDD management table 420, a cache management table 421, a temporary storage area management table 422, and a zone management table 423 are stored. The memory 112 has a cache memory area 430. At least one of the program and table on the memory 112 may be copied (backed up) to at least one SMR-HDD 51.

The I / O control program 401 controls data I / O. The area management program 402 executes calculation of area capacity.

The cluster mapping table 411 is a table that holds a cluster correspondence (mapping from the logical cluster to the virtual cluster) regarding the direction from the logical cluster to the virtual cluster. The cluster reverse mapping table 412 is a table that holds the cluster correspondence (mapping from the virtual cluster to the logical cluster) regarding the direction from the virtual cluster to the logical cluster. The page mapping table 413 is a table that holds the correspondence relationship between the virtual page 302 and the chunk page 60. The chunk mapping table 414 is a table that holds the correspondence between the chunk 303 and the chunk page 60 and the correspondence between the chunk page 60 and the stripe 52. The parcel mapping table 415 is a table that holds the correspondence between the parcel 41 and the stripe 52 and the correspondence between the parcel 41 and the zone 50. The correspondence relationship between the parcel 41 and the zone 50 may include the type of the zone 50 including the parcel 41 (whether it is a conventional zone or a sequential zone). The storage controller 110 can identify the correspondence relationship of the areas between the storage tiers by referring to at least one of these mapping tables (specifically, for example, areas (addresses) in a plurality of storage tiers can be identified. The final write destination or read source area (for example, the stripe 52 or the parcel 41 can be specified).

The RAID management table 416 holds information on the RAID configuration (RAID level) for each RAID group (for example, the SMR-HDD 51 number, parcel 41 number, RAID level, etc.). The write destination virtual page management table 417 is a table that holds information on the write destination virtual page (current write target virtual page 302) for each logical volume 151. The virtual page write pointer management table 418 is a table that holds information on a virtual page write pointer (relative position address in the virtual page 302) for each virtual page 302. The logical volume management table 419 is a table that holds capacity information for each logical volume 151. The SMR-HDD management table 420 is a table that holds information on the HDD number, zone size, parcel size, and unused area size for each SMR-HDD 51. The cache management table 421 is a table that holds the correspondence between cache slots (described later) and stripes 52. The temporary storage area management table 422 is a table that holds information regarding the stripe 52 used as a temporary storage area. The zone management table 423 is a table that holds information regarding the zone 50.

The cache memory area 430 is composed of a plurality of cache slots. That is, the cache slot is a part of the cache memory area 430.

FIG. 5 shows the correspondence relationship between the chunk 303 and the chunk page 60, and the correspondence relationship according to RAID5.

The chunk 303 is composed of a plurality of parcels 41. The plurality of parcels 41 typically exist in a plurality of different SMR-HDDs 51, respectively.

The chunk 303 can be regarded as a RAID group composed of a plurality of parcels 41. Because of RAID5, data stripes 52D and parity stripes 52P are mixed in each parcel 41. 5 and FIG. 6 and subsequent figures, for the stripe 52, the squares with numerals such as “1”, “2”, “3”,... Mean the data stripe 52D, and the description of “P”. A square with a means the parity stripe 52P.

One chunk 303 includes a plurality (or one) of chunk pages 60. Each chunk page 60 is composed of a plurality of stripes 52. The plurality of stripes 52 are all data stripes 52D. Each chunk page 60 does not include the parity stripe 52P.

FIG. 6 shows the correspondence between the chunk 303 and the chunk page 60 and the correspondence according to RAID4.

Because of the correspondence according to RAID 4, all of the plurality of stripes 52 constituting a certain parcel 41 in the chunk 303 are parity stripes 52P.

RAID 4 is, for example, a RAID level (RAID configuration) employed in a parity generation method (2) described later. In RAID4, all the stripes 52 in a certain parcel 41 are parity stripes 52P. A zone 50 including a certain parcel 41 may be a conventional zone 50C.

FIG. 7 shows an example of address mapping.

The logical volume 151 is provided to the host 300. The logical volume 151 is composed of a plurality of logical pages 301. The size of the logical page 301 is a fixed size (for example, 42 MB). Each logical page 301 is composed of a plurality of logical clusters 701. The size of the logical cluster 701 is also a fixed size (for example, 8 KB).

The virtual volume 141 is a so-called internal volume that is not directly provided to the host 300. The virtual volume 141 is composed of a plurality of virtual pages 302. The size of the virtual page 302 is also a fixed size (for example, 42 MB). Each virtual page 302 is composed of a plurality of virtual clusters 702. The size of the virtual cluster 702 may be a fixed size, but is a variable size in this embodiment. For example, the size of the virtual cluster 702 is 512 B (bytes) × N (N is a natural number). When the compression function of the storage controller 110 is used, the size of the virtual cluster may be smaller than the size of the logical cluster.

The logical cluster 701 and the virtual cluster 702 are mapped by the cluster mapping table 411 and the cluster reverse mapping table 412. The logical cluster 701 and the virtual cluster 702 have a relationship of X: 1 (X is a natural number). X is greater than 1 if the logical cluster 701 is deduplicated into one virtual cluster 702. The mapping between the logical cluster 701 and the virtual cluster 702 can be called “cluster mapping”.

One chunk page 60 is mapped to one virtual page 302. Statistical information such as the host 300 I / O frequency can be stored in at least one table on the memory 112 for each logical page 301 (or for each virtual page 302). The mapping between the virtual page 302 and the chunk page 60 can be referred to as “page mapping”.

By referring to at least one of the plurality of mapping tables described above, the storage controller 110 can identify the final read source area (for example, the stripe 52 or the parcel 41). Specifically, for example, the read source is specified in the read request received from the host 300 by the storage controller 110. The information indicating the read source includes, for example, a logical volume number and a logical address. The logical volume number is, for example, a LUN (Logical Unit Number). The logical address is, for example, an LBA (Logical Block Address). From the information indicating the read source, the final read source area can be specified in the following flow.
(S1) The I / O control program 401 identifies the logical cluster 701 from the logical volume number and logical address as the read source. The offset of the logical address specified as the read source from the head address of the logical page 301 including the specified logical cluster 701 is also specified.
(S2) The I / O control program 401 identifies the virtual cluster 702 corresponding to the identified logical cluster 701 by referring to the cluster mapping table 411.
(S3) The I / O control program 401 refers to the page mapping table 413, and identifies the chunk page 60 assigned to the virtual page 302 including the identified virtual cluster 702.
(S4) The I / O control program 401 specifies the data stripe 52D included in the specified chunk page 60 based on the chunk mapping table 414 and the specified offset.
(S5) The I / O control program 401 refers to the parcel mapping table 415 to identify the parcel 41 including the identified data stripe 52D and the SMR-HDD 51 that provides the parcel 41.
(S6) The I / O control program 401 transmits a read command specifying the address of the specified data stripe 52D to the specified SMR-HDD 51.

By the way, Log-Structured light can be adopted. For example, a Log-Structured light can be adopted as a light for the virtual page 302. Specifically, for example, when the logical volume 151 is updated, old data (pre-update data) in the virtual page 302 is overwritten with new data (updated data) according to the Log-Structured write method. Instead, a free virtual cluster 702 (an example of a free area) in the virtual page 302 is secured, and new data is written to the secured free virtual cluster 702. The free virtual cluster 702 can be specified by a write pointer for the virtual page 302. In this case, in the logical cluster 701 to which the old virtual cluster 702 (virtual cluster 702 in which old data is stored) is mapped, a new virtual cluster 702 (virtual cluster in which new data is written) is used instead of the old virtual cluster 702. 702) are mapped.

Note that the old virtual cluster 702, that is, the virtual cluster 702 that is not mapped to any logical cluster 701, is invalid data or an unused area. Invalid data can also be called garbage data. Garbage data may be collected by a so-called garbage collection process. This is because if even one old virtual cluster 702 is included in the virtual page 302, the chunk page 60 remains mapped to the virtual page 302, and the assignable chunk page 60 may be insufficient. Garbage collection processing is performed in units of chunks 303. The garbage collection process is as follows, for example. That is, the storage controller 110 copies only valid data (new data) from the copy source chunk 303 to the copy destination chunk 303 (an empty (unused) chunk 303). The storage controller 110 discards invalid data from the copy source chunk 303 and manages the copy source chunk 303 as an empty chunk 303. Further, the storage controller 110, for each of the plurality of parcels 41 included in the empty chunk 303, with respect to the sequential zone 50S including the parcel 41, Zoned Block Command “RESET WRITE POINTER” (drive write pointer reset command) ), The drive write pointer of the sequential zone 50S is reset to the head (this updates a drive write pointer 1504 described later). As described above, in the SMR-HDD 51, the unit for resetting the write pointer (which can be rephrased as a unit for changing the used area in the SMR-HDD 51 to an empty (unused) area) is the zone 50. It is. In addition, since one chunk 303 is associated with a plurality of zones 50, the garbage collection process is inevitably executed in units of chunks 303 (for example, garbage collection in units of chunk pages 60). Processing cannot be performed).

FIG. 8 shows the configuration of the logical volume management table 419.

The logical volume management table 419 holds a logical volume number 801 and a capacity 802 for each logical volume 151. The logical volume number 801 represents the number of the logical volume 151. The capacity 802 represents the capacity (usable capacity) of the logical volume 151.

FIG. 9 shows the configuration of the SMR-HDD management table 420.

The SMR-HDD management table 420 holds an HDD number 901, a zone size 902, a parcel size 904, and an unused area size 905 for each SMR-HDD 51. The HDD number 901 represents the number of the SMR-HDD 51 having the zone 50. The zone size 902 represents the size of the zone 50. The zone type 903 represents the type of the zone 50 (conventional zone or sequential zone). The parcel size 904 represents the size of the parcel 41 included in the zone 50. The unused area size 904 represents the size of the unused area 53 included in the zone 50.

The parcel size and the unused area size described in this table 420 are, for example, the sizes calculated by the area management program 402. These sizes are obtained from (Expression 2) described above based on the RAID management table 416 described above, for example.

The start address (LBA) and end address (LBA) of the parcel 41 are defined as follows.
-Start address of parcel 41 = parcel number x (zone size / sector size)
End address of parcel 41 = parcel number × (zone size ÷ sector size) + parcel size ÷ sector size−1

Note that the “sector” is the smallest unit of the logical storage area of the HDD. The sector size is 512 bytes in a typical HDD.

FIG. 10 shows the configuration of the cluster mapping table 411.

The cluster mapping table 411 holds logical cluster identification information 1001 and virtual cluster identification information 1002 for each logical cluster 701. The logical cluster identification information 1001 is identification information of the logical cluster 701 and represents, for example, a logical volume number and an LBA for the logical volume 151. The virtual cluster identification information 1002 is identification information of the virtual cluster 702 mapped from the logical cluster 701, and represents the virtual volume 141 number, the LBA for the virtual volume 141, and the size of the virtual cluster 702, for example.

FIG. 11 shows the configuration of the cluster reverse mapping table 412.

The cluster reverse mapping table 412 holds virtual cluster identification information 1101 and logical cluster identification information 1102 for each virtual cluster 702. The configurations of the virtual cluster identification information 1101 and the logical cluster identification information 1102 are as described with reference to FIG.

FIG. 12 shows the configuration of the cache management table 421.

The cache management table 421 has a plurality of entries 1202 corresponding to a plurality of cache slots 1201. Specifically, the cache management table 421 has a queue for each cache status, and an entry 1202 corresponding to the cache status slot 1201 corresponding to the queue is connected to the queue. The cache status includes empty, clean, and dirty. An empty slot is a slot 1201 in which no data is stored. The clean slot is a slot 1201 in which only clean data (data already stored in the SMR-HDD 51) is stored. The dirty slot is a slot 1201 in which dirty data (data not stored in the SMR-HDD 51) is stored. Data stored in the cache memory area 430 such as clean data and dirty data can be called “cache data”.

Cache data is classified as either upper cache data or lower cache data. In other words, dirty slots and clean slots can be classified into upper cache slots and lower cache slots.

The upper cache slot is a slot corresponding to an area in the logical volume 151. The size of the upper cache slot is equal to or smaller than the stripe size.

The lower cache slot is a slot corresponding to an area in the virtual volume 141. The size of the lower cache slot is equal to or smaller than the size of the stripe 52. A lower cache slot may correspond to one stripe 52.

Clean slots and dirty slots are classified as either upper cache slots or lower cache slots as described above. On the other hand, empty slots are not classified as either upper cache slots or lower cache slots.

The data in the upper cache slot is the upper cache data. The upper clean data, which is the clean data as the upper cache data, is at least a part of the data in accordance with the write request from the host 300 and is already written in the virtual volume 141 or in accordance with the read request from the host 300. The data is at least a part of the data and is read from the virtual volume 141. The upper dirty data, which is dirty data as the upper cache data, is data that is at least a part of data in accordance with a write request from the host 300 and has not yet been written to the virtual volume 141.

The data in the lower cache slot is the lower cache data. The lower clean data, which is clean data as the lower cache data, is data written from the logical volume 151 and already written to the PDEV (typically SMR-HDD 51) or read from the PDEV. It is data. The lower dirty data, which is dirty data as lower cache data, is data written from the logical volume 151 and not yet written to the PDEV.

As described above, in this embodiment, the logical volume 151 is provided above the virtual volume 141 in order to realize the Log-Structured write for the virtual page 302, and accordingly, the cache management is performed by the upper management and the lower management. It is divided into and.

Note that, when the compression function of the storage controller 110 is used, compressed data can be stored in the lower cache slot. As the compression method, various lossless compression methods such as an algorithm based on a Huffman code can be used.

FIG. 13 shows the configuration of the write destination virtual page management table 417.

The write destination virtual page management table 417 has a logical volume number 1301 and a write destination virtual page number 1302 for each logical volume 151. The write destination virtual page number 1302 represents the page number corresponding to the write destination virtual page (the current write target virtual page 302) for the corresponding logical volume 151. The logical volume 151 and the write destination virtual page may correspond to 1: 1, many: 1, and many: many.

FIG. 14 shows the configuration of the virtual page write pointer management table 418.

The virtual page write pointer management table 418 holds a virtual page number 1401, a virtual page write pointer 1402, and a head flag 1403 for each virtual page 302. The virtual page number 1401 represents the number of the virtual page 302. A virtual page write pointer 1402 represents a virtual page write pointer of the virtual page 302 (relative position information in the virtual page 302). The head flag 1403 is a flag indicating whether or not the virtual page write pointer points to the head of the virtual page 302. Note that the head flag may be omitted, and in that case, it may be determined whether the head is pointed based on the value of the virtual page write pointer.

FIG. 26 shows the configuration of the zone management table 423.

The zone management table 423 holds an HDD number 1501, a zone number 1502, a zone type 1503, and a drive pointer 1504 for each zone 50. The HDD number 1501 represents the number of the SMR-HDD 51 including the zone 50. The zone number 1502 represents the zone 50 number. The zone type 1503 represents the type of the zone 50.

The drive write pointer 1504 is address information indicating a write pointer in the sequential zone 50S. As the drive pointer 1504, the LBA of the SMR-HDD 51 is used. The drive write pointer 1504 is managed so that it matches the write pointer that the SMR-HDD 51 returns as a response to the REPORT ZONE command.

The drive write pointer 1504 is updated when dirty data of the data stripe or parity stripe is destaged to the SMR-HDD 51 or in response to a RESET WRITE POINTER command issued in the garbage collection process.

Since the drive write pointer can be acquired from the SMR-HDD 51 as a response to the REPORTREZONE command to the SMR-HDD 51, the drive write pointer 1504 need not be stored in the memory 112 for all the sequential zones 50S. A drive write pointer may be acquired from the SMR-HDD 51 and registered in the memory 112 as necessary.

FIG. 15 shows the flow of the cache memory write process. The cache memory write process is a process for writing data to the cache memory area. The cache memory write process is started by the I / O control program 401 when the storage controller 110 receives a write request from the host 300. S1501 and S1502 are processes performed in response to a write request, that is, synchronous processes. On the other hand, S1503 to S1507 are processing different from processing performed in response to the write request, that is, asynchronous processing. Asynchronous processing is repeatedly executed as appropriate.

The I / O control program 401 executes cache control for securing an upper cache slot for storing write data (data according to a write request) (S1501). The I / O control program 401 writes the write data to the upper cache slot, and sends a write completion report to the host 300 as a response to the write request (S1502).

Thereafter, the I / O control program 401 determines whether or not a new write destination virtual page 302 is necessary (S1503). For example, if the size of the free area of any virtual page 302 in use is less than the size of the write data, the determination result in S1503 is true. “In-use virtual page 302” means the virtual page 302 specified by the write destination virtual page number 1302 of the write destination virtual page management table 417 corresponding to the write data. Based on the virtual page write pointer management table 418, the size of the free area of the virtual page 302 in use can be specified from the virtual page size and the virtual page write pointer 1402 corresponding to the virtual page 302 in use.

If the determination result in S1503 is true (S1503: Y), the I / O control program 401 uses the virtual page 302 whose write pointer is the top of the virtual page (for example, the virtual page 302 whose top flag is “True”) as the write destination. The virtual page 302 is selected and the write destination virtual page management table 417 is updated (S1504). The I / O control program 401 secures a lower cache slot associated with the virtual cluster 702 according to the virtual page write pointer 1402 of the virtual page 302 (S1505). The I / O control program 401 copies the write data from the upper cache slot in which the write data was written in S1502 to the lower cache slot secured in S1505 (S1506). The I / O control program 401 uses the data in the cache stripe column including the lower cache slot to generate parity (S1507). Parity generation follows any one of parity generation methods (1) to (3) described later.

If the determination result in S1503 is false (S1503: N), the I / O control program 401 skips S1504 and executes S1505 to S1507. In S1505, any in-use virtual page 302 whose free area size is equal to or larger than the write data size is the write destination.

When at least one of the deduplication function and the compression function is employed in the storage controller 110, the deduplication process or the compression process may be executed in S1505 and S1506. In the deduplication processing, if the data in the logical cluster 701 is duplicate data, the cluster mapping is replaced. In the deduplication process, if the data in the logical cluster 701 is unique data (non-duplicate data), the data is written to the lower cache slot. In the compression process, the data of the logical cluster 701 is compressed when the data of the logical cluster 701 is written into the lower cache slot.

In the cache memory write process, the write destination logical cluster 701 (the logical cluster 701 corresponding to the LBA specified by the write request) is newly mapped to the virtual cluster 702, or the write destination logical cluster 701 has an old mapping destination. The virtual cluster 702 changes to the new virtual cluster 702. Further, the position of the virtual page write pointer for the virtual page 302 including the virtual cluster 702 that is the mapping destination of the write destination logical cluster 701 also advances by the size of the write data. Accordingly, the I / O control program 401 updates the cluster mapping table 411 and the cluster reverse mapping table 412 and updates the virtual page write pointer management table 418.

In the cache memory write process, when a new write destination virtual page 302 is selected, data is written to the virtual page 302, and therefore a new chunk page 60 is allocated to the virtual page 302. Along with this, the page mapping table 413 is also updated. That is, the correspondence between the new virtual page 302 and the chunk page 60 assigned to the virtual page 302 is registered in the page mapping table 413.

FIG. 27 shows the flow of destage processing. The destage process is a process of storing data from the cache memory area to the SMR-HDD 51.

The I / O control program 401 selects the dirty data to be destaged (S2701). For dirty data whose storage destination is a sequential zone, the I / O control program 401 first selects dirty data having a smaller storage destination address for each sequential zone. This is because when a plurality of dirty data is stored in a sequential zone, the plurality of dirty data needs to be written sequentially.

The I / O control program 401 destages the dirty data selected in S2701 to the SMR-HDD 51 (S2702). When the storage destination (destage destination) is a sequential zone, the dirty data selected in S2701 is written in ascending order of the storage destination address from the address indicated by the drive write pointer 1504 corresponding to the sequential zone. After destage, the drive write pointer 1504 is updated.

Note that, when the destage target is parity, the generated parity is destaged after the parity is generated. When the destaging target is user data (data based on parity), the user data may be destaged after parity generation, or parity generation may be performed after destaging user data.

FIG. 16 shows the flow of read processing. The read process is started by the I / O control program 401 when the storage controller 110 receives a read request from the host 300.

The I / O control program 401 executes cache control for searching for an upper cache slot storing read data (data according to a read request) (S1601). The I / O control program 401 determines whether read data exists in the upper cache slot (S1602).

If the determination result in S1602 is true (S1602: Y), the I / O control program 401 transmits the read data in the upper cache slot to the host 300 (S1607).

If the determination result in S1602 is false (S1602: N), the I / O control program 401 executes cache control for searching for a lower cache slot storing read data (S1603). The I / O control program 401 determines whether read data exists in the lower cache slot (S1604). If the determination result in S1604 is true (S1604: Y), the I / O control program 401 copies the read data from the lower cache slot to the upper cache slot (S1606), and the read data in the upper cache slot is transferred to the host 300. (S1607). On the other hand, if the determination result in S1604 is false (S1604: N), the I / O control program 401 executes staging control that secures a lower cache slot and reads read data from the SMR-HDD 51 in the lower cache slot (S1605). ). Thereafter, the I / O control program 401 executes S1606 and S1607.

In this embodiment, at least one of the following parity generation methods (1) to (3) is adopted. Hereinafter, each of the parity generation methods (1) to (3) will be described. In this embodiment, “parity generation” is a data operation on the cache memory area. Therefore, hereinafter, the area corresponding to the data stripe in the stripe string and the area in the cache stripe string is referred to as “cache data stripe”, and the area corresponding to the parity stripe in the stripe string and corresponding to the parity stripe in the cache stripe string. The area is called “cache parity stripe”.

FIG. 17 is a schematic diagram of an outline of the parity generation method (1).

As the parity generation method (1), an all-stripe write method, which is a method for generating parity when all user data respectively corresponding to all the data stripes 52D in the stripe column are in the cache stripe column, is adopted. In other words, the parity generation method (1) is a method in which a read-modify-write method in which user data is read from one of the data stripes 52D in the stripe column to the cache memory area and the user data is updated to update the parity does not occur. . According to the read-modify-write method, the parity is updated when the user data is updated. When the parity update and storage occur a plurality of times, a random write may occur for the zone 50 including the parity stripe 52P. However, if the zone 50 is the sequential zone 50S, the random write is not possible.

Therefore, the all stripe write method is adopted as the parity generation method (1). The parity generation method (1) may be employed particularly when the zone 50 including the parity stripe 52P is the sequential zone 50S. Therefore, for example, if the RAID level of the chunk 300 including the target stripe row is RAID 5, all the zones 50 including all the parcels 41 constituting the chunk 300 are sequential zones 50S. Further, for example, if the RAID level of the chunk 300 including the target stripe row is RAID 4, at least one zone 50 of the parcels 41 constituting the chunk 300 is a sequential zone 50S. In the parity generation method (1), parity (P) is generated based on all user data in the cache stripe column.

As described above, an area corresponding to one stripe 52 and in the cache memory area can be called a “cache stripe”. Since the stripe 52 is a fixed size, the cache stripe is also a fixed size. The size of the cache stripe is P times the size of the cache slot 1201 (P is a natural number). When a data unit (all user data) corresponding to the stripe column exists in the cache memory area 430, parity is generated on the cache memory area 430 based on the data unit, and the parity is asynchronously written to the SMR-HDD 51. It is. The data unit is written to the SMR-HDD 51 asynchronously with the cache memory write process of FIG. The data stripe 52D and the parity stripe 52P may be partial regions of the sequential zone 50S.

FIG. 18 shows a flow of parity generation processing according to the parity generation method (1).

If all user data is written in all the cache data stripes 1701D in the cache stripe column (S1801: Y), the I / O control program 401 sets the parity in the cache memory area 430 based on all the user data. Is generated (S1803). That is, the parity created based on all the user data is stored in the parity stripe 1701P.

When the I / O control program 401 does not write at least one user data to all the cache data stripes 1701D in the cache stripe column (S1801: N), the other conditions for generating the parity are satisfied (S1802: Y), parity is generated on the cache memory area 430 (S1803). When other conditions are satisfied, for example, when the empty slots are depleted in the cache memory area 430 (for example, when the number of empty slots becomes less than the threshold), the power supply to the storage system 100 is cut off and the memory At least one of the cases where 112 is operating on a battery, the storage system 100 is turned off, the duplication of dirty data is not maintained due to a failure of one of the duplicated memories 112 It's okay. In this case, the I / O control program 401 writes zero data (data in which all bits are 0) to the unwritten area (area indicated by the drive write pointer 1504) of the data stripe 52D in the stripe string, and then writes it to the stripe string. Parity may be generated based on all corresponding user data (for example, parity is generated using the ASIC 116), and the generated parity may be written in the parity stripe 52P. Note that the drive write pointer 1504 and the virtual page write pointer 1402 are updated by the amount of the written zero data.

FIG. 19 is a schematic diagram of the outline of the parity generation method (2).

In the parity generation method (2), before all the user data corresponding to the stripe column is written to the cache stripe column, the parity is generated based on the user data in the cache stripe column, and the parity is written to the parity stripe 52P. Alternatively, after all user data corresponding to the stripe column is written to the cache stripe column, parity may be generated based on all the user data, and the parity may be written to the parity stripe 52P. . The parity generation “before all user data corresponding to the stripe column is written to the cache stripe column” may be a parity update according to the read-modify-write method or a parity update according to the all-stripe write method. . Note that an unwritten area of the data stripe 52D needs to be regarded as zero data (data whose bit values are all 0).

In the parity generation method (2), any of the following (2-1) and (2-2) can be adopted.
(2-1) The zone 50 including the parity stripe 52P is the conventional zone 50C. Specifically, for example, the parity generation method (2) can be adopted when all the stripes 52 included in a certain parcel 41 are parity stripes 52P as in RAID4 (FIG. 6), for example. The conventional zone 50C is employed as the zone 50 including the. Even if not all the stripes 52 constituting a certain parcel 41 are parity stripes 52P, the parity generation method (2) may be employed when the zone 50 including the parity stripes 52P is the conventional zone 50C. The parity generation method (2) can be adopted at any RAID level other than RAID 4 as long as the parity level does not scatter and store parity. For example, RAID 1 is a RAID level that does not scatter and store parity.
(2-2) The parity stripe 52P is a stripe 52 based on a PDEV (typically a normal HDD or SSD) that provides a randomly writable logical area. The PDEV on which the parity stripe 52P is based may be, for example, a flash memory device.

FIG. 20 is a schematic diagram of the outline of the parity generation method (3).

According to the parity generation method (3), a temporary storage area 2001 used as a temporary parity stripe 52P is prepared. The temporary storage area 2001 is provided in the cache memory area 430, for example. In the present embodiment, one temporary storage area 2001 is provided for one chunk 303 (that is, one RAID group), but one temporary storage area 2001 may be provided for a plurality of chunks 303. The temporary storage area 2001 is associated with a PDEV 2002 (for example, SMR-HDD 51) that provides a randomly writable logical area (for example, the conventional zone 50C). The parity in the temporary storage area 2001 is appropriately stored in a randomly writable logical area provided by the PDEV 2002 (destage). That is, as a destaging destination of the parity in the temporary storage area 2001, the random storage writable logical area is associated with the temporary storage area 2001.

According to the parity generation method (3), before all the user data corresponding to the stripe column is written to the cache stripe column, the parity is generated based on the user data in the cache stripe column, and the parity is stored in the temporary storage area. Stored in 2001. After all user data corresponding to the stripe column is written to the cache stripe column, parity is generated based on all the user data, and after the parity is written to the temporary storage area 2001, the temporary storage area The parity in 2001 is written to the cache parity stripe 1701P.

During so-called collection copy and collection read, the condition that the dirty data corresponding to the parity in the cache stripe column does not exist in the cache memory area and the data is not written to the parity in the stripe column is satisfied. In such a case, correction copy or correction read can be performed using the parity in the temporary storage area 2001. It can be determined from the drive write pointer 1504 whether data has not been written in the parity in the stripe column. Specifically, whether or not data has been written to the parity in the stripe column corresponds to whether or not the LBA at the end of the parity stripe is exceeded. In other words, if dirty data corresponding to the parity in the cache stripe column exists in the cache memory area, correction copy or the like may be executed using the dirty data. If dirty data corresponding to the parity in the cache stripe column does not exist in the cache memory area, but data has been written to the parity in the stripe column, correction copy or the like may be executed using the parity.

In the parity generation method (3), any of the following (3-1) to (3-3) can be adopted.
(3-1) The destage destination area corresponding to the temporary storage area 2001 is an area in the conventional zone 50C of the SMR-HDD 51.
(3-2) The destage-destination PDEV 2002 corresponding to the temporary storage area 2001 is a PDEV other than the SMR-HDD 51. For example, a flash memory device is employed as such a PDEV.
(3-3) There is no destage destination PDEV corresponding to the temporary storage area 2001.

FIG. 21 shows the configuration of the temporary storage area management table 422.

The temporary storage area management table 422 holds a chunk number 2101, disk position information 2102, and cache position information 2103 for each temporary storage area 2001. The chunk number 2101 is the number of the chunk 303 corresponding to the temporary storage area 2001. The disk position information 2102 is an area corresponding to the temporary storage area 2001 and is information indicating the position of the area in the PDEV corresponding to the temporary storage area 2001. The disk position information 2102 is, for example, a combination of a parcel number and an address in the parcel 41. The cache position information 2103 is an area corresponding to the temporary storage area 2001 and is information indicating the position of the area in the cache memory area 430. The cache position information 2103 is, for example, a cache address.

In the parity generation method (3), the read-modify-write method and the all-stripe write method are selectively adopted. Hereinafter, the flow of parity generation processing according to the parity generation method (3) will be described, but before that, the read-modify-write method and the all-stripe write method will be described. In the description, user data is represented as “D” and parity is represented as “P”.

For example, it is assumed that old D1, old D2, old D3, and old P are stored in the stripe row. P = (D1) XOR (D2) XOR (D3).

When only the old D1 is updated to the new D1, the read-modify-write method can be adopted. In the read-modify-write method, a new P is obtained by the following formula.
New P = (old D1) XOR (new D1) XOR (old P)

On the other hand, in the all stripe write method, as in these examples, a new P is generated using D1 (new D1 or old D1), D2 (new D2 or old D2) and D3 (new D3 or old D3). . For example, when the old D1, the old D2, and the old D3 are updated to the new D1, the new D2, and the new D3, respectively, the all-stripe write method can be adopted. In that case, a new P is obtained by the following equation.
New P = (New D1) XOR (New D2) XOR (New D3)

Further, for example, even when only the old D3 is updated to the new D3, the all stripe write method can be adopted. In that case, a new P is obtained by the following equation.
New P = (old D1) XOR (old D2) XOR (new D3)

FIG. 22 shows the flow of parity generation processing according to the parity generation method (3). In the following description, the read-modify-write method is expressed as “RMW”, and the all-stripe write method is expressed as “ASW”. In the following description, it is assumed that D1, D2, D3, and P are stored in the target stripe column.

If the temporary storage area 2001 is uninitialized, the I / O control program 401 initializes the temporary storage area 2001 (S2201). Specifically, for example, the I / O control program 401 stores the parity (initial value) in the temporary storage area 2001 when it is assumed that the data in all the data stripes 52D in the stripe column is zero data. .

The I / O control program 401 refers to the virtual page write pointer management table 418 and determines whether or not the write pointer for the write destination virtual page 302 exceeds the end of the stripe column (S2202).

When the determination result in S2202 is true (S2202: Y), the I / O control program 401 determines which of RMW and ASW is selected (S2203). In S2203, a method is selected that minimizes the number of disk accesses (the number of accesses to the SMR-HDD 51) based on the number of user data existing in the cache memory area 430. This is because the number of disk accesses differs depending on whether RMW or ASW is used. For example, if new D1, new D2, and new D3 exist in the cache area, it is preferable to select ASW. This is because parity can be generated without causing disk access.

When RMW is selected in S2203 (S2203: RMW), the I / O control program 401 generates a parity based on the parity in the temporary storage area 2001 according to the RMW, and the generated parity is used as a cache parity stripe 1701P. (S2204). On the other hand, when ASW is selected in S2203 (S2203: ASW), the I / O control program 401 generates parity based on all user data in the cache stripe column in accordance with ASW, and the generated parity is cached. It is stored in the parity stripe 1701P (S2205).

Now, even if the determination result of S2202 is false (S2202: N), the I / O control program 401 determines which of RMW and ASW to select (S2206). In S2206, as in S2203, the method that minimizes the number of disk accesses is selected based on the number of user data existing in the cache memory area 430.

When the RMW is selected in S2206 (S2206: RMW), the I / O control program 401 generates a parity based on the parity in the temporary storage area 2001 according to the RMW, and the generated parity is stored in the temporary storage area 2001. Store (S2207). On the other hand, when ASW is selected in S2206 (S2203: ASW), the I / O control program 401 generates parity based on the user data in the cache stripe column in accordance with ASW, and the generated parity is temporarily stored in the storage area. It is stored in 2001 (S2208).

FIG. 23 shows the flow of the available capacity reporting process. This processing is started by the area management program 402 when the storage controller 110 receives a capacity inquiry from the host 300.

The area management program 402 calculates the total size of the data stripe 52D (S2301), and reports the calculated total size to the host 300 as an available capacity (S2302). In other words, the usable capacity does not include the capacity of the unused area 53 in the zone 50. Further, the calculation of S2301 may be the calculation of (Equation 1) described above.

Hereinafter, Example 2 will be described. At that time, differences from the first embodiment will be mainly described, and description of common points with the first embodiment will be omitted or simplified.

FIG. 24 shows an example of a storage hierarchy according to the second embodiment.

In the second embodiment, distributed RAID is not adopted. A RAID group composed of a plurality of SMR-HDDs 51 is employed as the RAID group.

Hereinafter, Example 3 will be described. At that time, the differences from the first and second embodiments will be mainly described, and the description of the common points with the first and second embodiments will be omitted or simplified.

FIG. 25 illustrates an example of address mapping according to the third embodiment.

According to the third embodiment, the virtual volume 141 does not exist under the logical volume 151. A lower cluster 2501 that is a partial area in the chunk page 60 is allocated to the logical cluster 701. In the third embodiment, Log-Structured storage is performed on the chunk page 60. All parcels constituting a chunk including the chunk page 60 in which Log-Structured storage is performed may be parcels included in the sequential zone.

The correspondence relationship between the logical cluster 701 and the lower cluster 2501 is managed by a cluster mapping table (however, the virtual cluster identification information 1002 is replaced with the lower cluster identification information). The size of the lower cluster 2501 may be an integer multiple of a block (for example, 512B). The size of the lower cluster 2501 may be variable.

In the third embodiment, the RAID group is a RAID group according to the distributed RAID described with reference to FIG. 3 (that is, a RAID group configured by a plurality of parcels 41 respectively existing in a plurality of different SMR-HDDs 51). Alternatively, it may be a normal RAID group (RAID group composed of a plurality of HDDs) described with reference to FIG.

As described above, the first to third embodiments have been described, and can be summarized as follows based on the description. In the following summary, matters not included in the above description may be included, and conversely, items existing in the above description may not be included.

<Summary>

In order to increase the storage capacity of the storage system, it is conceivable to adopt an SMR-HDD instead of a normal HDD. In the SMR-HDD, a continuous logical storage area called a zone is defined. A storage area including at least a part of a zone is allocated to the logical volume provided by the storage system. Therefore, at least one of the following problems can be considered.
(Problem 1) Relationship between a zone and an area belonging to a higher storage hierarchy than the zone.
(Problem 2) A RAID configuration is generally adopted for a storage system. There is a sequential zone as a zone, but for a RAID level (RAID configuration) where parity occurs, a set of user data and parity corresponding to one stripe column is not always written sequentially.
(Problem 3) When the storage system has a capacity expansion function such as Thin Provisioning, the write destination of the allocated page may exceed the write pointer of the sequential zone that is the basis of the page.

Issues 1 to 3 are solved by, for example, the following. In the embodiment, the plurality of PDEVs included in the storage system 100 are typically a plurality of SMR-HDDs 51. However, the plurality of PDEVs are PDEVs other than the plurality of SMR-HDDs 51, for example, normal HDDs and SDDs. Two or more PDEVs that provide a randomly writable logic area may be included.

<Solution of Problem 1>
The storage controller 110 provides the size of the parcel 41 provided as the area including the stripe 52, the size of the zone 50 including the parcel 41, and the chunk that is the logical area including the stripe 52 associated with the virtual page 302 or the logical page 301. This is determined based on the size of the page 60 and the number of data stripes (the number of data stripes 52D in one stripe column) according to the RAID level of the chunk (RAID group) including the parcel 41. When the parcel size is smaller than the zone size, a difference between the zone 50 and the parcel 41 becomes an unused area 53 (an area in which neither user data nor parody is stored). Specifically, the parcel size is determined according to the above (Equation 2).

<Solution of Problem 2>
(First Solution) The storage controller 110 executes writing according to the all stripe write method for the stripe columns associated with the parity stripes 52P included in the sequential zone 50S.
(Second Solution) The storage controller 110 adopts the conventional zone 50C as the zone 50 including the parity stripe 52P.
(Third Solution) For the stripe column including the parity stripe 52P included in the sequential zone 50S, the storage controller 110 stores the parity in the temporary storage area 2001 until all user data in the cache stripe column is updated. Store (save). That is, when a part of the old user data for the stripe column is updated to the new user data, the storage controller 110 uses the old user data, the new user data, and the old parity (parity in the temporary storage area 2001). Parity is generated and the new parity is stored in the temporary storage area 2001. When all user data in the cache stripe column becomes new user data, the storage controller 110 stores new parity based on all the new user data in the parity stripe 52P. The temporary storage area 2001 may be provided on the cache memory area 430. The destage destination of the temporary storage area 2001 is a PDEV that provides a logical area in which random writing is possible. The “random-writable logical area” is, for example, a logical area provided by a conventional zone 50C in the SMR-HDD 51 or a random-writable PDEV such as an SSD or a normal HDD.

<Solution of Problem 3>
The storage controller 110 selects the virtual page 302 whose write pointer points to the first LBA of the virtual page 302 as the virtual page 302 allocated to the logical volume 151, and allocates the selected virtual page 302 to the logical volume 151. That is, if the storage controller 110 can write the write data to at least one halfway write virtual page 302 (virtual page 302 whose write pointer does not point to the first LBA), the storage controller 110 writes to the halfway write virtual page 302. Append data. In other words, the storage controller 110 suppresses newly assigning the virtual page 302 to the logical volume 151 as long as the write data can be written to at least one halfway write virtual page 302. In an embodiment in which the virtual volume 141 does not exist, the virtual page 302 can be read as the chunk page 60, and the chunk page write pointer may be managed for each chunk page 60.

Although several embodiments have been described above, these are merely examples for explaining the present invention, and the scope of the present invention is not limited to these embodiments. The present invention can be implemented in various other forms.

100: Storage system

Claims (15)

A storage system connected to the host system,
A plurality of storage devices including a plurality of zone-providing storage devices;
Connected to the plurality of storage devices, providing a logical volume to the host system, and allocating at least one chunk page of a plurality of chunk pages based on one or more chunks directly or indirectly to the logical volume A storage controller,
Each of the plurality of zone providing storage devices provides a plurality of zones;
Each of the plurality of zones is a contiguous logical area predefined in a zone providing storage device that provides the zone;
In the case where the storage controller configures the first chunk, which is at least one of the one or more chunks, using two or more zones provided by two or more zone providing storage devices, For each of the zones, an area aligned with two or more chunk pages based on the first chunk is a parcel that is a component of the chunk.
Storage system. For each of the two or more zones, if there is an area that is not aligned with two or more chunk pages based on the first chunk, the storage controller defines the unaligned area as an unused area that is not a component of the chunk. To
The storage system according to claim 1. Each of the one or more chunks is composed of a plurality of parcels constituting a plurality of stripe columns,
Each of the plurality of parcels is composed of a plurality of stripes,
Each of the plurality of stripe rows is composed of two or more stripes respectively included in two or more parcels in a chunk constituting the stripe row,
As a stripe, there is at least a data stripe among a data stripe that is a stripe in which data is stored and a parity stripe that is a stripe in which parity is stored.
Each of the plurality of chunk pages corresponds to a plurality of data stripes and does not correspond to any parity stripe;
The storage system according to claim 2. For the first chunk, the storage controller determines the first chunk based on the size of the zone, the size of the chunk page, and the number of data stripes included in one stripe column according to the RAID level for the first chunk. Determine the size of parcels in one chunk,
The storage system according to claim 3. The storage controller reports available capacity;
The usable capacity is a capacity based on a parcel size for each of the one or more chunks.
The storage system according to claim 1. The storage controller has a cache memory area;
The storage controller is an area corresponding to a stripe column including a write destination parity stripe, and after all the data corresponding to the stripe column is written to the area in the cache memory area, the storage controller Generating parity and storing the parity in the write destination parity stripe;
The zone including the parcel including the write destination parity stripe is a sequential zone that is a zone where random writing is impossible and sequential writing is possible.
The storage system according to claim 1. If the storage controller satisfies a predetermined parity generation condition before all data corresponding to a stripe column including the write destination parity stripe is written to all data stripes in the stripe column, an unwritten data stripe It is assumed that zero data is written, and parity is generated based on all data corresponding to the stripe column including the write destination parity stripe and the parity is stored in the write destination parity stripe.
The storage system according to claim 6. The storage controller generates parity for the stripe column before or after the data of all the data stripes constituting the stripe column including the write destination parity stripe is written, and converts the parity to the write destination parity stripe. Store and
The zone including the parcel including the write destination parity stripe is a conventional zone in which random writing is possible.
The storage system according to claim 1. The storage controller has a temporary storage area;
The storage controller is
Before the data of all the data stripes constituting the stripe column including the write destination parity stripe is written, the parity related to the stripe column is updated based on the parity in the temporary storage area, and the updated parity is updated to the temporary column. Store it in the storage area,
After data of all the data stripes constituting the stripe column including the write destination parity stripe is written, the parity related to the stripe column is stored in the write destination parity stripe,
The zone including the parcel including the write destination parity stripe is a sequential zone that is a zone where random writing is impossible and sequential writing is possible.
The storage system according to claim 1. Each of the two or more zones each including two or more parcels constituting the first chunk is a sequential zone that is a zone where random writing is impossible and sequential writing is possible.
The storage system according to claim 1. The storage controller manages virtual volumes under the logical volume;
The virtual volume is composed of a plurality of virtual pages to which a chunk page can be allocated,
Each of the plurality of virtual pages employs Log-Structured storage,
The storage controller assigns a virtual page whose position pointed to by the virtual page write pointer and the head match to the logical volume,
The storage system according to claim 1. The storage controller has a cache memory area composed of a plurality of cache slots;
As cache management executed by the storage controller, higher-level cache management that manages the correspondence between the area in the logical volume and the slot in the cache memory area, the area in the virtual volume, and the cache memory area There is a lower level cache management that manages the correspondence with the slot of
The storage controller executes data copy between a cache slot according to the higher-level cache management and a cache slot according to the lower-level cache management for data input / output with respect to the logical volume.
The storage system according to claim 11. Each of two or more chunk pages based on the first chunk employs Log-Structured storage,
The storage controller allocates, to the logical volume, a chunk page in which the position pointed to by the chunk page write pointer matches the beginning of the two or more chunk pages based on the first chunk.
The storage system according to claim 1. Each of the two or more zone providing storage devices is SMR (Shingled Magnetic Recording) -HDD (Hard Disk Drive).
The storage system according to claim 1. When the first chunk, which is at least one of the one or more chunks, is configured using two or more zones provided by two or more zone providing storage devices, for each of the two or more zones, The area aligned with two or more chunk pages based on the first chunk is a parcel that is a component of the chunk,
Each of the two or more zones is a contiguous logical region predefined in a zone providing storage device that provides the zone;
Allocating at least one of the two or more chunk pages based on the first chunk directly or indirectly to the logical volume;
Memory control method.

Images