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WO2018069069A1 - Procédé pour réaliser au moins un chemin de dissipation de chaleur pour un composant microélectronique et composant microélectronique correspondant - Google Patents

Procédé pour réaliser au moins un chemin de dissipation de chaleur pour un composant microélectronique et composant microélectronique correspondant Download PDF

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Publication number
WO2018069069A1
WO2018069069A1 PCT/EP2017/074834 EP2017074834W WO2018069069A1 WO 2018069069 A1 WO2018069069 A1 WO 2018069069A1 EP 2017074834 W EP2017074834 W EP 2017074834W WO 2018069069 A1 WO2018069069 A1 WO 2018069069A1
Authority
WO
WIPO (PCT)
Prior art keywords
microelectronic component
microelectronic
flexible circuit
contacting surfaces
circuit carrier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2017/074834
Other languages
German (de)
English (en)
Inventor
Andreas Kugler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Priority to EP17777576.4A priority Critical patent/EP3527050A1/fr
Publication of WO2018069069A1 publication Critical patent/WO2018069069A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0209—External configuration of printed circuit board adapted for heat dissipation, e.g. lay-out of conductors, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4871—Bases, plates or heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305—Moulding and encapsulation
    • H05K2203/1327—Moulding over PCB locally or completely
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components

Definitions

  • the present invention relates to a method of forming at least one heat dissipation path for a microelectronic device.
  • the invention relates to a corresponding microelectronic component.
  • injection molded plastic components are provided with specially applied to metallic circuit traces on particular thin circuit carriers, which serve as circuit carriers for microelectronic assemblies, provided in the
  • the document WO 03/005784 relates to printed conductor structures on an electrically nonconducting carrier material, which consist of metal nuclei and a subsequently applied to this metallization.
  • the microelectronic component can be designed in particular as a microelectronic package with the flexible circuit carrier.
  • Circuit carrier may for example be arranged between the integrated circuit and a ball grid arrangement of the microelectronic device.
  • the contacting surfaces of the microelectronic component are in particular electrically contacted, through-contacted or interconnected with the integrated circuit.
  • the flexible circuit carrier may in particular be designed as a foil with an integrated conductor pattern.
  • the microelectronic component can in particular be completely injection-molded by the at least one material.
  • the microelectronic component can be arranged in an injection molding tool and encapsulated or encapsulated by means of a thermoset. If the microelectronic component is a pressure sensor, a pressure-sensitive bending structure or membrane remains free of the at least one material.
  • the at least partially exposed at least two contacting surfaces of the flexible circuit carrier are metallized in such a way that the at least two contacting surfaces are connected to one another by the at least one heat dissipation path.
  • the heat dissipation path described here in this case connects the at least two contacting surfaces, whereby a dissipation of the heat arising during operation of the microelectronic device takes place. In this way, in particular a transmission of high electrical power to selected lines and other components can be realized. Further, low cost manufacturing of high performance packaging through the use of printed circuit board technologies in combination with power electronics and logic with the microelectronic device is possible.
  • the at least one heat conduction path further allows line crossovers by integrating one or more conduction planes in the at least partially injection molded with the at least one material
  • microelectronic component By an appropriate selection of the at least one material, use of the microelectronic component can be optimized or adapted as required in terms of its geometry or shape.
  • the at least partially exposing the contacting surfaces of the flexible circuit substrate is carried out by means of a laser.
  • the laser With the laser, the contacting surfaces of the flexible circuit substrate are exposed or opened.
  • the at least one material, in particular plastic in places where the
  • the metallization is carried out by means of a plasma process, jet process or galvanic deposition process.
  • metallizing by means of a plasma process, jet process or galvanic deposition process, the at least partially exposing the contacting surfaces is carried out by means of the laser prior to metallization.
  • the formation of the at least one heat conduction path for the microelectronic component can be cost-saving and simple.
  • the metallization is carried out by means of 2-component injection molding (2K injection molding) or hot stamping.
  • the laser process may vary depending on the application
  • Structuring technologies can only be applied after metallization.
  • the at least partially exposing of the at least two contacting surfaces and the metallization of the contacting surfaces to corresponding printed conductors are produced simultaneously by jetting or metering conductive pastes.
  • the formation of the at least one heat conduction path for the microelectronic component can be cost-saving and simple.
  • the injection-molded microelectronic component is further
  • microelectronic components This makes it easy to provide complex integrated circuit systems.
  • the arrangement of the further microelectronic components is carried out by conductive bonding, soldering, flip chip or wire bonding. So can be based on cost-saving
  • Connecting method further microelectronic components on the at least partially injection-molded microelectronic component, in particular to arrange in the vertical direction.
  • Circuit carrier a film with an integrated circuit pattern structure.
  • the microelectronic component simply leaves in and / or on the flexible
  • the contact areas which are exposed at least in some areas comprise a noble metal or a semi-precious metal or an alloy thereof.
  • the contacting surfaces that are at least partially exposed can be contacted in particular with noble metal conductive pastes, in particular silver conductive pastes. This makes it possible to provide a stable connection between the contacting surfaces and the heat conduction path.
  • Thermosets are suitable for use in injection molds because of their material-specific properties.
  • the features described herein for the method of forming the at least one heat sink path for the microelectronic device are disclosed for the corresponding microelectronic device and vice versa.
  • Fig. 1 is a schematic plan to explain a
  • microelectronic device having a heat conduction path according to an embodiment of the invention
  • Fig. 2 is a schematic cross-sectional view of a
  • 3a and 3b are schematic cross-sectional views for explaining a
  • FIG. 1 is a schematic plan view for explaining a microelectronic device having a heat conduction path according to an embodiment of the invention.
  • reference numeral 10 denotes a microelectronic device.
  • the microelectronic component 10 comprises a chip Cl, which via
  • Conduits LI is connected to at least two contacting surfaces 15 of a flexible circuit substrate II.
  • the contacting surfaces 15 penetrate the flexible circuit substrate II at least in some areas. In other words, the contacting surfaces 15 on a chip Cl
  • the chip Cl, the conductor tracks LI and the contacting surfaces 15 can be arranged on the flexible circuit carrier II.
  • Circuit carrier II may be formed as a film with an integrated circuit pattern.
  • the microelectronic component 10 is at least partially injection-molded with at least one material 30 such that the at least two
  • the exposed at least two contacting surfaces 15 are connected to each other by at least one heat dissipation path 20.
  • the microelectronic component 10 comprising, in particular, the flexible circuit carrier II and the chip C1 is completely encapsulated or encapsulated by the at least one material 30, for example a thermosetting plastic.
  • FIG. 3 a is based on the microelectronic component shown in FIG. 2, with the difference that the at least two by means of a laser 40
  • Contact surfaces 15 are at least partially exposed.
  • Contact surfaces 15 can be made on a chip Cl opposite side of the flexible circuit substrate II.
  • FIG. 3 b is based on the microelectronic component 10 shown in FIG. 3 a, wherein the contacting surfaces 15 of the flexible circuit carrier II exposed at least in some areas are metallized in such a way that the
  • Heat dissipation path 20 are connected to each other.
  • the metallizing Ml can be done by a jet process.
  • the metallization Ml can take place such that the heat dissipation path 20 is at least partially exposed to the outside.
  • the heat dissipation path 20 may in particular at least partially the at least one material 30 - so a
  • Injection molded housing - cover Injection molded housing - cover.
  • step B of the method the at least two contacting surfaces 15 of the flexible circuit substrate II are at least partially exposed, wherein the microelectronic component 10 is at least partially injection-molded with at least the material 30 such that the at least two
  • step C of the method the at least partially exposed contacting surfaces 15 of the flexible circuit substrate II are metallized in such a way that the at least two contacting surfaces 15 are connected to one another by the at least one heat dissipation path 20.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

L'invention concerne un procédé pour réaliser au moins un chemin de dissipation de chaleur pour un composant microélectronique et un composant microélectronique correspondant. À l'étape A du procédé, le composant micro-électronique est disposé fixement dans et/ou sur un support de circuit flexible. À l'étape B du procédé, au moins deux surfaces de contact du support de circuit flexible sont exposées au moins en partie, le composant microélectronique étant surmoulé par injection au moins en partie avec au moins un matériau de telle sorte que les au moins deux surfaces de contact et le support de circuit flexible soient recouverts avec l'au moins un matériau. À l'étape C du procédé, les au moins deux surfaces de contact du support de circuit flexible exposées au moins en partie sont métallisées de telle sorte que les au moins deux surfaces de contact soient connectées l'une à l'autre par l'au moins un chemin de dissipation de chaleur.
PCT/EP2017/074834 2016-10-14 2017-09-29 Procédé pour réaliser au moins un chemin de dissipation de chaleur pour un composant microélectronique et composant microélectronique correspondant Ceased WO2018069069A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP17777576.4A EP3527050A1 (fr) 2016-10-14 2017-09-29 Procédé pour réaliser au moins un chemin de dissipation de chaleur pour un composant microélectronique et composant microélectronique correspondant

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102016220065.8A DE102016220065A1 (de) 2016-10-14 2016-10-14 Verfahren zum Ausbilden mindestens eines Wärmeableitpfades für ein mikroelektronisches Bauteil und entsprechendes mikroelektronisches Bauteil
DE102016220065.8 2016-10-14

Publications (1)

Publication Number Publication Date
WO2018069069A1 true WO2018069069A1 (fr) 2018-04-19

Family

ID=59997365

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2017/074834 Ceased WO2018069069A1 (fr) 2016-10-14 2017-09-29 Procédé pour réaliser au moins un chemin de dissipation de chaleur pour un composant microélectronique et composant microélectronique correspondant

Country Status (3)

Country Link
EP (1) EP3527050A1 (fr)
DE (1) DE102016220065A1 (fr)
WO (1) WO2018069069A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102019201035A1 (de) * 2019-01-28 2020-07-30 Robert Bosch Gmbh Verfahren zur Behandlung metallischer Einlegeteile

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003005784A2 (fr) 2001-07-05 2003-01-16 Lpkf Laser & Electronics Ag Structures de traces conducteurs et procede permettant de les produire
DE102013212254A1 (de) * 2013-06-26 2014-12-31 Robert Bosch Gmbh MID-Bauteil, Verfahren zur Herstellung

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040007376A1 (en) * 2002-07-09 2004-01-15 Eric Urdahl Integrated thermal vias
JP4014591B2 (ja) * 2004-10-05 2007-11-28 シャープ株式会社 半導体装置および電子機器

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003005784A2 (fr) 2001-07-05 2003-01-16 Lpkf Laser & Electronics Ag Structures de traces conducteurs et procede permettant de les produire
DE102013212254A1 (de) * 2013-06-26 2014-12-31 Robert Bosch Gmbh MID-Bauteil, Verfahren zur Herstellung

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102019201035A1 (de) * 2019-01-28 2020-07-30 Robert Bosch Gmbh Verfahren zur Behandlung metallischer Einlegeteile

Also Published As

Publication number Publication date
EP3527050A1 (fr) 2019-08-21
DE102016220065A1 (de) 2018-04-19

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