WO2017043899A1 - Method for crystallizing amorphous silicon by means of plasma - Google Patents
Method for crystallizing amorphous silicon by means of plasma Download PDFInfo
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- WO2017043899A1 WO2017043899A1 PCT/KR2016/010121 KR2016010121W WO2017043899A1 WO 2017043899 A1 WO2017043899 A1 WO 2017043899A1 KR 2016010121 W KR2016010121 W KR 2016010121W WO 2017043899 A1 WO2017043899 A1 WO 2017043899A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- H05H1/24—Generating plasma
- H05H1/46—Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy
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- the present invention relates to a method for producing polycrystalline silicon by crystallizing amorphous silicon using plasma.
- Transistor devices using polycrystalline silicon are mostly used in active devices of active matrix liquid crystal displays (AMLCDs) and switching devices and peripheral circuits of electro-luminescence devices.
- the polycrystalline silicon used as the semiconductor active layer can be roughly divided into a method of obtaining direct polycrystalline silicon by plasma chemical vapor deposition and a method of obtaining polycrystalline silicon by heat treatment after deposition of amorphous silicon.
- direct deposition there is an advantage in that the polycrystalline silicon thin film can be obtained at a relatively low temperature, but there is a disadvantage in that the characteristics of the thin film are not good. Therefore, a widely used method is a method of obtaining an amorphous silicon thin film on a substrate and then crystallizing through heat treatment to obtain a high quality polycrystalline silicon thin film.
- Crystallization of the amorphous silicon thin film includes a laser method (Excimer Laser Annealing (ELA)) and a solid phase crystallization method (Solid Phase Crystallization (SPC)).
- ELA Excimer Laser Annealing
- SPC Solid Phase Crystallization
- the crystallization method using a laser is a method of recrystallizing an amorphous silicon thin film by laser beam irradiation, so that a polycrystalline silicon thin film having excellent characteristics can be manufactured. There are many problems in production.
- a solid crystallization method for producing a polycrystalline silicon thin film by heat-treating the amorphous silicon thin film for a long time ( ⁇ 20 hours) at a high temperature of 600 °C or more requires a relatively simple crystallization method, high crystallization temperature and long heat treatment time.
- there are many defects in the crystallized grain which makes it difficult to manufacture the device.
- the present invention provides a novel crystallization method that can overcome the above problems of the prior art.
- the present invention is a method of crystallizing amorphous silicon by injecting electrons in a plasma into an amorphous silicon layer to raise the substrate to a temperature required for crystallization within a few tens of seconds, and has not been used in the past without expensive equipment such as a laser. It's a whole new technology.
- the present invention provides an amorphous silicon layer on a substrate in a chamber capable of generating a plasma, and generates a plasma to expose the amorphous silicon layer to the plasma while applying a positive pulse voltage to the substrate. It relates to a method of crystallizing amorphous silicon, including.
- the plasma may preferably be hydrogen, helium or a mixed gas thereof, but the scope of the present invention is not limited to a specific gas.
- the current density to the substrate is characterized in that more than 0.15 A / cm 2 .
- the plasma is helium is characterized in that the current density to the substrate is 0.11 A / cm 2 or more. Under conditions of current density below that, it is predicted that there is not enough energy delivered for crystallization.
- a chamber comprising means for generating a plasma; A substrate located in the chamber and exposed to plasma by the plasma generating means, wherein the substrate is deposited by an amorphous silicon substrate; And pulse applying means configured to apply a pulse positive voltage to one surface of the substrate.
- the chamber is characterized in that it further comprises amorphous silicon deposition means.
- the present invention is a method of crystallizing amorphous silicon, and can form a very uniform large area polycrystalline silicon layer at a low price.
- the present invention is characterized in that amorphous silicon deposition and crystallization of deposited amorphous silicon can be achieved in the same chamber.
- FIG. 1 is a flowchart illustrating a method of crystallizing amorphous silicon according to an embodiment of the present invention.
- FIG. 2 is a schematic diagram of a crystallization apparatus according to an embodiment of the present invention.
- Example 3 shows Raman results of an amorphous silicon layer before crystallization and a polycrystalline silicon layer according to Example 1 of the present invention.
- FIG. 6 is a TEM result of a silicon layer crystallized according to Example 1.
- FIG. 1 is a flowchart illustrating a method of crystallizing amorphous silicon according to an embodiment of the present invention.
- the method of the present invention comprises the steps of placing the substrate in a chamber (S1); Depositing an amorphous silicon layer (S2); Generating a plasma on the amorphous silicon layer (S3); And applying a pulse positive voltage to the substrate (S4).
- FIG. 2 is a schematic diagram of a crystallization apparatus according to an embodiment of the present invention.
- a substantially flat substrate 120 is prepared.
- the substrate 120 may be, for example, any one selected from glass, ceramic, polymer, metal, and equivalents thereof, but the present invention is not limited thereto, but the pulse positive voltage is not limited thereto. It can be used as long as it is a substrate that can be applied to attract electrons in the plasma.
- an amorphous silicon layer 130 is deposited on the substrate. That is, an amorphous silicon layer is deposited on the substrate in a vertical direction by, for example, plasma enhanced chemical vapor deposition (PECVD).
- PECVD plasma enhanced chemical vapor deposition
- the amorphous silicon layer may be deposited by a sputter or an evaporator in addition to PECVD, and the present invention is not limited to this deposition method.
- a plasma is generated in the chamber and the amorphous silicon layer is exposed to the plasma.
- the generation source of the plasma may be, for example, RF plasma, DC plasma, or electromagnetic plasma, but is not particularly limited thereto.
- a positive voltage is applied to the chamber in a pulsed manner to inject electrons in the plasma into the amorphous silicon layer to crystallize the amorphous silicon layer.
- Pulse positive voltage application and plasma generation may be simultaneously generated, and pulse positive voltage application may be prioritized or plasma generation may be prioritized.
- a substrate on which amorphous silicon is deposited is placed in a chamber as illustrated in FIG. 2, and a pulse voltage is applied to the substrate under a pulse voltage condition as described below while generating a plasma in the chamber using a plasma generation condition as follows.
- a pulse voltage is applied to the substrate under a pulse voltage condition as described below while generating a plasma in the chamber using a plasma generation condition as follows.
- 3 shows Raman results of an amorphous silicon layer before crystallization and a polycrystalline silicon layer according to Example 1 of the present invention.
- 3 is a Raman result of an amorphous silicon layer before crystallization
- a graph corresponding to 'post annealing' is a Raman result of a crystallized polycrystalline silicon layer according to the present invention, 'Is the Raman result of polycrystalline silicon as a reference graph.
- the crystallization method according to the present invention can provide polycrystalline silicon.
- a substrate in which amorphous silicon is deposited is placed in a chamber as illustrated in FIG. 2, and plasma is generated in the chamber using a plasma generation condition as described below, and the current density of the substrate is changed. As a result, it is shown in FIG.
- Figure 4a is a Raman result showing the degree of crystallization according to the pulse voltage.
- 4b is an XRD result showing the degree of crystallization according to the pulse voltage.
- crystallization was not performed when the substrate current density was 0.117 A / cm 2 , but crystallization was performed when the substrate current density was 0.156 A / cm 2 .
- FIG. 4B when the substrate current density is 0.156 A / cm 2 , it can be seen that various peaks exist depending on the direction of the silicon crystal, and thus crystallization is performed.
- a substrate in which amorphous silicon is deposited is placed in a chamber as illustrated in FIG. 2, and plasma is generated in the chamber using a plasma generation condition as described below, and the current density of the substrate is changed. As a result, it is shown in FIG.
- 5A is a Raman result showing the degree of crystallization according to the pulse voltage.
- 5b is an XRD result showing the degree of crystallization according to the pulse voltage.
- crystallization was not performed when the substrate current density was 0.078 A / cm 2 , but crystallization was performed when the substrate current density was 0.117 A / cm 2 .
- FIG. 4B when the substrate current density is 0.117 A / cm 2 , it can be seen that various peaks exist depending on the direction of the silicon crystal, and thus crystallization is performed.
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Abstract
Description
본 발명은 플라즈마를 이용하여 비정질 실리콘을 결정화하여 다결정 실리콘(polycrystalline silicon)을 제조하는 방법에 관한 것이다.The present invention relates to a method for producing polycrystalline silicon by crystallizing amorphous silicon using plasma.
다결정 실리콘을 이용한 트랜지스터 소자는 대부분 능동행렬 액정디스플레이(AMLCD: Active Matrix Liquid Crystal Display)의 능동소자와 전기발광(electro-luminescence)소자의 스위칭 소자 및 주변회로에 사용된다. 이때, 반도체 활성층으로 사용되는 다결정 실리콘은 플라즈마 화학 기상 증착에 의한 직접 다결정 실리콘을 얻는 방법과 비정질 실리콘을 증착한 후에 열처리를 하여 다결정 실리콘을 얻는 방법으로 크게 나눌 수 있다. 직접 증착인 경우 비교적 낮은 온도에서 다결정 실리콘 박막을 얻을 수 있다는 장점이 있으나, 박막의 특성이 좋지 못하다는 단점이 있다. 따라서 현재 널리 이용되는 방법은 기판 위에 비정질 실리콘 박막을 형성한 후 열처리를 통해 결정화시켜 양질의 다결정 실리콘 박막을 얻는 방법이 널리 사용되고 있다. Transistor devices using polycrystalline silicon are mostly used in active devices of active matrix liquid crystal displays (AMLCDs) and switching devices and peripheral circuits of electro-luminescence devices. In this case, the polycrystalline silicon used as the semiconductor active layer can be roughly divided into a method of obtaining direct polycrystalline silicon by plasma chemical vapor deposition and a method of obtaining polycrystalline silicon by heat treatment after deposition of amorphous silicon. In the case of direct deposition, there is an advantage in that the polycrystalline silicon thin film can be obtained at a relatively low temperature, but there is a disadvantage in that the characteristics of the thin film are not good. Therefore, a widely used method is a method of obtaining an amorphous silicon thin film on a substrate and then crystallizing through heat treatment to obtain a high quality polycrystalline silicon thin film.
비정질 실리콘 박막의 결정화법은 레이저를 이용한 방법(Excimer Laser Annealing: ELA)과 열처리에 의한 고상결정화 방법(Solid Phase Crystallization: SPC)이 있다. Crystallization of the amorphous silicon thin film includes a laser method (Excimer Laser Annealing (ELA)) and a solid phase crystallization method (Solid Phase Crystallization (SPC)).
레이저를 이용한 결정화 방법은 레이저 빔 조사에 의해 비정질 실리콘 박막을 재결정화시키는 방법으로 우수한 특성의 다결정 실리콘 박막을 제작할 수 있으나, 대면적 시료의 경우에 시료의 균일도에 어려움이 있고, 결정화 장비가 고가이므로 대량 생산에 많은 문제가 있다. The crystallization method using a laser is a method of recrystallizing an amorphous silicon thin film by laser beam irradiation, so that a polycrystalline silicon thin film having excellent characteristics can be manufactured. There are many problems in production.
한편, 비정질 실리콘 박막을 600℃ 이상의 고온에서 장시간(~20시간) 열처리하여 다결정 실리콘 박막을 제조하는 고상 결정화 방법은 비교적 간단한 결정화 방법이나 높은 결정화 온도와 긴 열처리 시간이 필수적이다. 또한 결정화된 그레인(grain) 내부에 많은 결함(defect)이 있어 소자 제작에 어려움이 있다.On the other hand, a solid crystallization method for producing a polycrystalline silicon thin film by heat-treating the amorphous silicon thin film for a long time (~ 20 hours) at a high temperature of 600 ℃ or more requires a relatively simple crystallization method, high crystallization temperature and long heat treatment time. In addition, there are many defects in the crystallized grain, which makes it difficult to manufacture the device.
이 밖에 게르마늄(Ge) 등의 불순물을 넣어 결정화를 유도하는 방법, 마이크로파(microwave)를 이용하여 박막을 결정화시키는 방법 등이 제안되고 있으나 아직까지는 우수한 소자특성이 나오지 않고 있다.In addition, a method of inducing crystallization by adding an impurity such as germanium (Ge), a method of crystallizing a thin film by using microwave (microwave), etc. have been proposed, but excellent device characteristics have not yet come out.
본 발명은 상기한 종래 기술의 문제점을 극복할 수 있는 새로운 결정화 방법을 제공한다.The present invention provides a novel crystallization method that can overcome the above problems of the prior art.
본 발명의 목적은, 상기한 종래 기술의 문제점을 극복할 수 있는 새로운 결정화 방법을 제공하는 것이다. 본 발명은 플라즈마 내의 전자를 비정질 실리콘 층에 입사시켜 기판을 수 십초 이내에 결정화에 필요한 온도로 상승시켜서 비정질 실리콘을 결정화하는 방법으로서, 레이저와 같은 고가의 장비가 필요하지 않은, 종래에서 사용된 적이 없는 완전히 새로운 기술이다.It is an object of the present invention to provide a novel crystallization method which can overcome the above problems of the prior art. The present invention is a method of crystallizing amorphous silicon by injecting electrons in a plasma into an amorphous silicon layer to raise the substrate to a temperature required for crystallization within a few tens of seconds, and has not been used in the past without expensive equipment such as a laser. It's a whole new technology.
일 측면으로서, 본 발명은, 플라즈마를 발생시킬 수 있는 챔버 내의 기판 상에 비정질 실리콘 층을 준비하고, 상기 기판에 펄스 양전압을 인가하면서, 플라즈마를 발생시켜 상기 플라즈마에 상기 비정질 실리콘 층이 노출시킴을 포함하는, 비정질 실리콘의 결정화 방법에 관한 것이다.In one aspect, the present invention provides an amorphous silicon layer on a substrate in a chamber capable of generating a plasma, and generates a plasma to expose the amorphous silicon layer to the plasma while applying a positive pulse voltage to the substrate. It relates to a method of crystallizing amorphous silicon, including.
상기 플라즈마는 바람직하게는 수소, 헬륨 또는 이의 혼합 가스일 수 있으나, 특정 가스에 본 발명의 범위가 한정되는 것은 아니다.The plasma may preferably be hydrogen, helium or a mixed gas thereof, but the scope of the present invention is not limited to a specific gas.
상기 기판에의 전류 밀도는 0.15 A/cm2 이상임을 특징으로 한다. 한편, 상기 플라즈마가 헬륨인 경우 상기 기판에의 전류 밀도는 0.11 A/cm2 이상임을 특징으로 한다. 그 이하의 전류 밀도의 조건에서는 결정화가 이뤄질 충분한 에너지가 전달되지 않은 상태로 예측된다.The current density to the substrate is characterized in that more than 0.15 A / cm 2 . On the other hand, when the plasma is helium is characterized in that the current density to the substrate is 0.11 A / cm 2 or more. Under conditions of current density below that, it is predicted that there is not enough energy delivered for crystallization.
다른 측면으로서, 플라즈마를 발생 수단을 구비한 챔버; 상기 챔버 내에 위치하고, 상기 플라즈마 발생 수단에 의한 플라즈마에 노출될 수 있으며, 비정질 실리콘 기판이 증착하는 기판; 및 상기 기판의 일면에 펄스 양전압을 인가하도록 구성된 펄스인가수단을 포함하는, 비정질 실리콘의 결정화 장치에 관한 것이다.In another aspect, a chamber comprising means for generating a plasma; A substrate located in the chamber and exposed to plasma by the plasma generating means, wherein the substrate is deposited by an amorphous silicon substrate; And pulse applying means configured to apply a pulse positive voltage to one surface of the substrate.
상기 챔버는 비정질 실리콘 증착 수단을 추가로 포함함을 특징으로 한다.The chamber is characterized in that it further comprises amorphous silicon deposition means.
본 발명은 비정질 실리콘의 결정화 방법으로, 저렴한 가격에 매우 균일한 대면적 다결정 실리콘 층을 형성할 수 있다.The present invention is a method of crystallizing amorphous silicon, and can form a very uniform large area polycrystalline silicon layer at a low price.
특히, 본 발명은 동일 챔버 내에서 비정질 실리콘 증착과 증착된 비정질 실리콘의 결정화를 이룰 수 있음을 특징으로 한다.In particular, the present invention is characterized in that amorphous silicon deposition and crystallization of deposited amorphous silicon can be achieved in the same chamber.
도 1은 본 발명의 일 실시예에 따른 비정질 실리콘의 결정화 방법을 도시한 순서도이다.1 is a flowchart illustrating a method of crystallizing amorphous silicon according to an embodiment of the present invention.
도 2는 본 발명의 일 실시예에 따른 결정화 장치의 개략도이다. 2 is a schematic diagram of a crystallization apparatus according to an embodiment of the present invention.
도 3은 결정화전의 비정질 실리콘 층과 본 발명의 실시예1에 의한 다결정 실리콘 층의 라만 결과이다.3 shows Raman results of an amorphous silicon layer before crystallization and a polycrystalline silicon layer according to Example 1 of the present invention.
도 4는 수소 플라즈마에서 펄스 전압에 따른 결정화 정도를 보여주는 라만과 XRD 결과이다.4 is Raman and XRD results showing the degree of crystallization according to the pulse voltage in the hydrogen plasma.
도 5는 헬륨 플라즈마에서 펄스 전압에 따른 결정화 정도를 보여주는 라만과 XRD 결과이다.5 is Raman and XRD results showing the degree of crystallization according to the pulse voltage in helium plasma.
도 6은 실시예1에 따라 결정화된 실리콘 층의 TEM 결과이다.6 is a TEM result of a silicon layer crystallized according to Example 1. FIG.
이하, 첨부한 도면을 참조하여 본 발명의 실시예에 대해 상세히 설명한다. 본 발명은 다양한 변경을 가할 수 있고 여러 가지 형태를 가질 수 있는바, 특정 실시예들을 도면에 예시하고 본문에 상세하게 설명하고자 한다. 그러나 이는 본 발명을 특정한 개시 형태에 대해 한정하려는 것이 아니며, 본 발명의 사상 및 기술 범위에 포함되는 모든 변경, 균등물 내지 대체물을 포함하는 것으로 이해되어야 한다. 각 도면을 설명하면서 유사한 참조부호를 유사한 구성요소에 대해 사용하였다. Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention. As the inventive concept allows for various changes and numerous modifications, particular embodiments will be illustrated in the drawings and described in detail in the text. However, this is not intended to limit the present invention to a specific disclosed form, it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention. In describing the drawings, similar reference numerals are used for similar elements.
본 출원에서 사용한 용어는 단지 특정한 실시 예를 설명하기 위해 사용된 것으로서 본 발명을 한정하려는 의도가 아니다. 단수의 표현은 문맥상 명백하게 다르게 뜻하지 않는 한, 복수의 표현을 포함한다. 본 출원에서, "포함하다" 또는 "가지다" 등의 용어는 명세서 상에 기재된 특징, 단계, 동작, 구성요소, 부분품 또는 이들을 조합한 것이 존재함을 지정하려는 것이지, 하나 또는 그 이상의 다른 특징들이나 단계, 동작, 구성요소, 부분품 또는 이들을 조합한 것들의 존재 또는 부가 가능성을 미리 배제하지 않는 것으로 이해되어야 한다.The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprises" or "having" are intended to indicate that there is a feature, step, operation, component, part, or combination thereof described on the specification, and one or more other features or steps. It is to be understood that the present invention does not exclude, in advance, the possibility of the presence or the addition of an operation, a component, a part, or a combination thereof.
다르게 정의되지 않는 한, 기술적이거나 과학적인 용어를 포함해서 여기서 사용되는 모든 용어들은 본 발명이 속하는 기술 분야에서 통상의 지식을 가진 자에 의해 일반적으로 이해되는 것과 동일한 의미를 가지고 있다. 일반적으로 사용되는 사전에 정의되어 있는 것과 같은 용어들은 관련 기술의 문맥 상 가지는 의미와 일치하는 의미를 가지는 것으로 해석되어야 하며, 본 출원에서 명백하게 정의하지 않는 한, 이상적이거나 과도하게 형식적인 의미로 해석되지 않는다.Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art and shall not be construed in ideal or excessively formal meanings unless expressly defined in this application. Do not.
도 1은 본 발명의 일 실시예에 따른 비정질 실리콘의 결정화 방법을 도시한 순서도이다.1 is a flowchart illustrating a method of crystallizing amorphous silicon according to an embodiment of the present invention.
도 1에 도시된 바와 같이, 본 발명의 방법은 기판을 챔버 내에 위치시키는 단계(S1); 비정질 실리콘층 증착 단계(S2); 상기 비정질 실리콘 층 상에 플라즈마를 발생시키는 단계(S3); 상기 기판에 펄스 양전압을 인가하는 단계(S4)를 포함한다.As shown in Fig. 1, the method of the present invention comprises the steps of placing the substrate in a chamber (S1); Depositing an amorphous silicon layer (S2); Generating a plasma on the amorphous silicon layer (S3); And applying a pulse positive voltage to the substrate (S4).
도 2는 본 발명의 일 실시예에 따른 결정화 장치의 개략도이다. 2 is a schematic diagram of a crystallization apparatus according to an embodiment of the present invention.
기판 준비 단계(S1)에서는, 도 2에서 참조되는 바와 같이, 대략 평평한 기판(120)을 준비한다. 이러한 기판(120)은 예를 들면, 글래스(glass), 세라믹(ceramic), 폴리머(polymer), 금속 및 이의 등가물 중에서 선택된 어느 하나일 수 있으나, 본 발명에서 그 재질을 한정하는 것은 아니나 펄스 양전압이 인가되어 플라즈마 내의 전자를 당길 수 있는 기판이면 사용될 수 있다.In the substrate preparation step S1, as shown in FIG. 2, a substantially
비정질 실리콘층 증착 단계(S2)에서는, 상기 기판에 비정질 실리콘층(130)을 증착한다. 즉, 상기 기판 위에 예를 들면 PECVD(Plasma Enhanced Chemical Vapor Deposition)에 의해 비정질 실리콘층을 수직 방향으로 증착한다. 여기서, 상기 비정질 실리콘층은 PECVD 이외에도 스퍼터(sputter) 또는 이베퍼레이터(evaporator)에 의해 증착될 수 있으며, 본 발명에서 이러한 증착 방법을 한정하는 것은 아니다.In the amorphous silicon layer deposition step (S2), an
비정질 실리콘 층 상에 플라즈마를 발생시키는 단계(S3)에서는, 챔버 내에 플라즈마를 발생시키고 상기 비정질 실리콘층이 상기 플라즈마에 노출된다. 상기 플라즈마의 발생 소스는 예를 들어, RF 플라즈마, DC 플라즈마, 전자파 플라즈마일 수 있으나, 특별히 이에 한정되는 것은 아니다.In the step S3 of generating a plasma on an amorphous silicon layer, a plasma is generated in the chamber and the amorphous silicon layer is exposed to the plasma. The generation source of the plasma may be, for example, RF plasma, DC plasma, or electromagnetic plasma, but is not particularly limited thereto.
기판에 펄스 양전압을 인가하는 단계(S4)에서는, 챔버에 양전압이 펄스 방식으로 인가되어 플라즈마 내의 전자가 비정질 실리콘 층에 주입되어 비정질 실리콘 층의 결정화를 이룬다. 펄스 양전압 인가과 플라즈마 발생은 동시에 발생될 수 있고, 펄스 양전압 인가가 우선되거나 플라즈마 발생이 우선될 수 있다.In the step S4 of applying a pulsed positive voltage to the substrate, a positive voltage is applied to the chamber in a pulsed manner to inject electrons in the plasma into the amorphous silicon layer to crystallize the amorphous silicon layer. Pulse positive voltage application and plasma generation may be simultaneously generated, and pulse positive voltage application may be prioritized or plasma generation may be prioritized.
[실시예 1]Example 1
도 2에서 예시된 바와 같은 챔버 내에 비정질 실리콘이 증착된 기판을 위치시키고, 아래와 같은 플라즈마 발생 조건을 이용하여 챔버 내에 플라즈마를 발생시키면서 아래와 같은 펄스 전압 조건으로 기판에 펄스 전압을 인가하였다. 그 결과 도 6에서 보는 바와 같은 다결정 실리콘을 얻을 수 있었다.A substrate on which amorphous silicon is deposited is placed in a chamber as illustrated in FIG. 2, and a pulse voltage is applied to the substrate under a pulse voltage condition as described below while generating a plasma in the chamber using a plasma generation condition as follows. As a result, polycrystalline silicon as shown in FIG. 6 was obtained.
1. 플라즈마 발생 조건1. Plasma Generation Conditions
RF Power : 200 WRF Power: 200 W
Operation pressure : ~5 mTorrOperation pressure: ~ 5 mTorr
Operation gas : H2 Operation gas: H 2
2. 기판 전압 인가 조건2. Substrate voltage application condition
펄스 파워: ~ 1000 V Pulse power: ~ 1000 V
기판 전류 밀도: 0.277 A/cm2 (Frequency : ~ 10 KHz, Duty : ~ 40 %)Board Current Density: 0.277 A / cm 2 (Frequency: ~ 10 KHz, Duty: ~ 40%)
3. 결정화 결과3. Crystallization Result
도 3은 결정화전의 비정질 실리콘 층과 본 발명의 실시예1에 의한 다결정 실리콘 층의 라만 결과이다. 도 3에 'a-Si'에 해당하는 그래프는 결정화전 비정질 실리콘 층의 라만 결과이며, 'post annealing'에 해당하는 그래프는 본 발명에 의한 결정화된 다결정 실리콘 층의 라만 결과이며, 'Poly-Si'는 레퍼런스 그래프로서 다결정 실리콘의 라만 결과이다. 3 shows Raman results of an amorphous silicon layer before crystallization and a polycrystalline silicon layer according to Example 1 of the present invention. 3 is a Raman result of an amorphous silicon layer before crystallization, and a graph corresponding to 'post annealing' is a Raman result of a crystallized polycrystalline silicon layer according to the present invention, 'Is the Raman result of polycrystalline silicon as a reference graph.
확인되는 바와 같이, 본 발명에 의한 결정화 방법은 다결정 실리콘을 제공할 수 있음을 확인할 수 있다.As can be seen, it can be seen that the crystallization method according to the present invention can provide polycrystalline silicon.
[실시예 2]Example 2
도 2에서 예시된 바와 같은 챔버 내에 비정질 실리콘이 증착된 기판을 위치시키고, 아래와 같은 플라즈마 발생 조건을 이용하여 챔버 내에 플라즈마를 발생시키면서 아래와 같은 기판의 전류 밀도를 달리하였다. 그 결과 도 4에 도시하였다.A substrate in which amorphous silicon is deposited is placed in a chamber as illustrated in FIG. 2, and plasma is generated in the chamber using a plasma generation condition as described below, and the current density of the substrate is changed. As a result, it is shown in FIG.
1. 플라즈마 발생 조건1. Plasma Generation Conditions
RF Power : 200 WRF Power: 200 W
Operation pressure : ~5 mTorrOperation pressure: ~ 5 mTorr
Operation gas : H2 Operation gas: H 2
2. 기판 전류 밀도2. Substrate Current Density
0.117 A/cm2, 0.156 A/cm2, (Frequency : 10 KHz, Duty : 40 %)0.117 A / cm 2 , 0.156 A / cm 2 , (Frequency: 10 KHz, Duty: 40%)
도 4a는 펄스 전압에 따른 결정화 정도를 보여주는 라만 결과이다. 도 4b는 펄스 전압에 따른 결정화 정도를 보여주는 XRD 결과이다. 수소 플라즈마의 경우 기판 전류 밀도가 0.117 A/cm2 인 경우 결정화가 이뤄지지 않았지만, 기판 전류 밀도가 0.156 A/cm2 인 경우 결정화가 이뤄졌음을 확인할 수 있다. 도 4b에서 볼 수 있듯이, 기판 전류 밀도가 0.156 A/cm2 인 경우 실리콘 결정 방향에 따라 다양한 피크가 존재함을 확인할 수 있어 결정화가 이뤄짐을 확인할 수 있다.Figure 4a is a Raman result showing the degree of crystallization according to the pulse voltage. 4b is an XRD result showing the degree of crystallization according to the pulse voltage. In the case of hydrogen plasma, crystallization was not performed when the substrate current density was 0.117 A / cm 2 , but crystallization was performed when the substrate current density was 0.156 A / cm 2 . As shown in FIG. 4B, when the substrate current density is 0.156 A / cm 2 , it can be seen that various peaks exist depending on the direction of the silicon crystal, and thus crystallization is performed.
[실시예 3]Example 3
도 2에서 예시된 바와 같은 챔버 내에 비정질 실리콘이 증착된 기판을 위치시키고, 아래와 같은 플라즈마 발생 조건을 이용하여 챔버 내에 플라즈마를 발생시키면서 아래와 같은 기판의 전류 밀도를 달리하였다. 그 결과 도 5에 도시하였다.A substrate in which amorphous silicon is deposited is placed in a chamber as illustrated in FIG. 2, and plasma is generated in the chamber using a plasma generation condition as described below, and the current density of the substrate is changed. As a result, it is shown in FIG.
1. 플라즈마 발생 조건1. Plasma Generation Conditions
RF Power : 200 WRF Power: 200 W
Operation pressure : ~5 mTorrOperation pressure: ~ 5 mTorr
Operation gas : HeOperation gas: He
2. 기판 전류 밀도2. Substrate Current Density
0.078 A/cm2, 0.117 A/cm2, (Frequency : 10 KHz, Duty : 40 %)0.078 A / cm 2 , 0.117 A / cm 2 , (Frequency: 10 KHz, Duty: 40%)
도 5a는 펄스 전압에 따른 결정화 정도를 보여주는 라만 결과이다. 도 5b는 펄스 전압에 따른 결정화 정도를 보여주는 XRD 결과이다. 수소 플라즈마의 경우 기판 전류 밀도가 0.078 A/cm2 인 경우 결정화가 이뤄지지 않았지만, 기판 전류 밀도가 0.117 A/cm2 인 경우 결정화가 이뤄졌음을 확인할 수 있다. 도 4b에서 볼 수 있듯이, 기판 전류 밀도가 0.117 A/cm2 인 경우 실리콘 결정 방향에 따라 다양한 피크가 존재함을 확인할 수 있어 결정화가 이뤄짐을 확인할 수 있다.5A is a Raman result showing the degree of crystallization according to the pulse voltage. 5b is an XRD result showing the degree of crystallization according to the pulse voltage. In the case of hydrogen plasma, crystallization was not performed when the substrate current density was 0.078 A / cm 2 , but crystallization was performed when the substrate current density was 0.117 A / cm 2 . As shown in FIG. 4B, when the substrate current density is 0.117 A / cm 2 , it can be seen that various peaks exist depending on the direction of the silicon crystal, and thus crystallization is performed.
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| US20110039034A1 (en) * | 2009-08-11 | 2011-02-17 | Helen Maynard | Pulsed deposition and recrystallization and tandem solar cell design utilizing crystallized/amorphous material |
| KR20130125095A (en) * | 2012-05-08 | 2013-11-18 | 한국과학기술연구원 | Apprartus for crystallizing amorphous semiconductor thin films and method for crystallizing the same |
| KR20140058700A (en) * | 2012-10-30 | 2014-05-15 | 한국생산기술연구원 | Method of crystallizing hydrid amorphous silicon thin film formed by plasma enhanced chemical vapor deposition using electron beam, method of manufacturing polycrystalline silicon thin film and polycrystalline silicon thin film manufactured using the same |
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| US6335535B1 (en) * | 1998-06-26 | 2002-01-01 | Nissin Electric Co., Ltd | Method for implanting negative hydrogen ion and implanting apparatus |
| US20110039034A1 (en) * | 2009-08-11 | 2011-02-17 | Helen Maynard | Pulsed deposition and recrystallization and tandem solar cell design utilizing crystallized/amorphous material |
| KR20130125095A (en) * | 2012-05-08 | 2013-11-18 | 한국과학기술연구원 | Apprartus for crystallizing amorphous semiconductor thin films and method for crystallizing the same |
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