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WO2016125615A1 - Élément de conversion photoélectrique et procédé de fabrication d'élément de conversion photoélectrique - Google Patents

Élément de conversion photoélectrique et procédé de fabrication d'élément de conversion photoélectrique Download PDF

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Publication number
WO2016125615A1
WO2016125615A1 PCT/JP2016/052014 JP2016052014W WO2016125615A1 WO 2016125615 A1 WO2016125615 A1 WO 2016125615A1 JP 2016052014 W JP2016052014 W JP 2016052014W WO 2016125615 A1 WO2016125615 A1 WO 2016125615A1
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Prior art keywords
film
amorphous semiconductor
type amorphous
semiconductor substrate
conversion element
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Japanese (ja)
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親扶 岡本
潤 斉藤
真人 石井
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Sharp Corp
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Sharp Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/16—Photovoltaic cells having only PN heterojunction potential barriers
    • H10F10/164—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells
    • H10F10/165—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells
    • H10F10/166—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells the Group IV-IV heterojunctions being heterojunctions of crystalline and amorphous materials, e.g. silicon heterojunction [SHJ] photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/30—Coatings
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to a photoelectric conversion element and a method for manufacturing the photoelectric conversion element.
  • the most manufactured and sold solar cells have a structure in which electrodes are formed on the light receiving surface on the side where sunlight enters and the back surface on the opposite side of the light receiving surface, respectively. is there.
  • FIG. 23 shows a schematic cross-sectional view of the back junction solar cell described in Patent Document 1.
  • the back junction solar cell shown in FIG. 23 has a configuration in which an i-type amorphous semiconductor layer 119, an n-type amorphous semiconductor layer 120, and an insulating layer 124 are sequentially stacked on the light-receiving surface of a semiconductor substrate 111. Have.
  • the i-type amorphous semiconductor layer 112 In a region corresponding to the n-side electrode 116 on the back surface of the semiconductor substrate 111, the i-type amorphous semiconductor layer 112, the n-type amorphous semiconductor layer 114, the insulating layer 121, and the n-side electrode 116 are formed on the semiconductor substrate 111. Are sequentially stacked. Further, an IN stacked body 122 is formed by a stacked body of the i-type amorphous semiconductor layer 112 and the n-type amorphous semiconductor layer 114, and the n-type amorphous semiconductor layer 114 is passed through a hole penetrating the insulating layer 121. And the n-side electrode 116 are connected.
  • the i-type amorphous semiconductor layer 113, the p-type amorphous semiconductor layer 115, and the p-side electrode 117 are sequentially stacked on the semiconductor substrate 111.
  • the IP stacked body 123 is formed of a stacked body of the i-type amorphous semiconductor layer 113 and the p-type amorphous semiconductor layer 115.
  • the first conductive layers 116a and 117a and the second conductive layers 116b and 117b are sequentially stacked by sputtering or the like, respectively, and then the third conductive layers 116c and 117c and the fourth conductive layer are stacked.
  • the layers 116d and 117d are formed by sequentially stacking.
  • FIG. 24 shows a flowchart of the manufacturing method of the back junction solar cell shown in FIG.
  • the manufacturing method of the back junction type solar cell shown by FIG. 23 is demonstrated.
  • step S1a the light receiving surface and the back surface of the semiconductor substrate 111 are each cleaned.
  • step S ⁇ b> 2 a the i-type amorphous semiconductor layer 119 and the n-type amorphous semiconductor layer 120 are formed on the light receiving surface of the semiconductor substrate 111 and the i-type amorphous semiconductor is formed on the back surface of the semiconductor substrate 111.
  • step S3a an insulating layer 124 made of silicon oxide, silicon nitride, or silicon oxynitride is formed on the n-type amorphous semiconductor layer 120, and silicon oxide, nitride is formed on the n-type amorphous semiconductor layer 114.
  • step S4a the insulating layer 121 is etched using an acidic etching solution to remove a part of the insulating layer 121.
  • step S5a using the insulating layer 121 patterned in step S4a as a mask, the i-type amorphous semiconductor layer 112 and the n-type amorphous semiconductor layer 114 are etched using an alkaline etchant. Thus, portions other than the portions covered by the insulating layer 121 of the i-type amorphous semiconductor layer 112 and the n-type amorphous semiconductor layer 114 are removed.
  • step S6a an i-type amorphous semiconductor layer 113 and a p-type amorphous semiconductor layer 115 are formed in this order so as to cover the back surface of the semiconductor substrate 111.
  • step S7a portions of the i-type amorphous semiconductor layer 113 and the p-type amorphous semiconductor layer 115 located on the insulating layer 121 are etched using an alkaline etchant.
  • step S8a the insulating layer 121 is etched by etching using buffered hydrofluoric acid as an etchant.
  • step S9a the n-side electrode 116 is formed on the IN stacked body 122 and the p-side electrode 117 is formed on the IP stacked body 123, whereby the back junction solar cell shown in FIG. 23 is manufactured.
  • step S3a the insulating layer 124 made of silicon oxide, silicon nitride, or silicon oxynitride is formed at a low temperature of the semiconductor substrate 111 of less than 200 ° C.
  • the amorphous semiconductor layer i-type amorphous semiconductor layer 112, n-type amorphous semiconductor layer formed in step S2a
  • the insulating layer 124 is formed at a high temperature of 200 ° C. or higher.
  • the crystalline semiconductor layer 114, the i-type amorphous semiconductor layer 119, and the n-type amorphous semiconductor layer 120) are crystallized when the insulating layer 124 is formed, and the characteristics of the back junction solar cell are deteriorated.
  • the insulating layer 124 when the insulating layer 124 is formed at a low temperature of less than 200 ° C. of the semiconductor substrate 111, the insulating layer 124 does not have process resistance. Therefore, in each step of steps S4a, S5a, S7a, and S8a It was necessary to perform etching after forming a protective film having etching resistance on 124. Therefore, in this case, the number of man-hours for the manufacturing process of the back junction solar cell increases.
  • a semiconductor substrate of a first conductivity type or a second conductivity type a dielectric film containing carbon and silicon on the first surface side of the semiconductor substrate, and a first surface of the semiconductor substrate First conductive type amorphous semiconductor film and second conductive type amorphous semiconductor film on the second surface side opposite to the first conductive type amorphous semiconductor film, the first electrode on the first conductive type amorphous semiconductor film, and the second conductive type
  • a dielectric film comprising SiC x N y O z F w H v (0 ⁇ x, 0 ⁇ y ⁇ x, 0 ⁇ z ⁇ x, 0 ⁇ w ⁇ x and 0 ⁇ v)
  • the dielectric film is a photoelectric conversion element that is the outermost film.
  • a step of forming a dielectric film containing carbon and silicon on the first surface side of a semiconductor substrate of the first conductivity type or the second conductivity type, and a step of forming the dielectric film A step of forming a first conductivity type amorphous semiconductor film on a second surface side opposite to the first surface of the semiconductor substrate, and a second conductivity type amorphous on the second surface side of the semiconductor substrate. Forming a porous semiconductor film, forming a first electrode on the first conductive amorphous semiconductor film, and forming a second electrode on the second conductive amorphous semiconductor film.
  • the dielectric film has a composition represented by the formula of SiC x N y O z F w H v (0 ⁇ x, 0 ⁇ y ⁇ x, 0 ⁇ z ⁇ x, 0 ⁇ w ⁇ x and 0 ⁇ v).
  • the dielectric film is a method for manufacturing a photoelectric conversion element that is the outermost film.
  • a photoelectric conversion element and a method for manufacturing the photoelectric conversion element can be provided.
  • FIG. 3 is a schematic cross-sectional view of the heterojunction back contact cell of Embodiment 1.
  • 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view of a heterojunction back contact cell of Embodiment 2.
  • FIG. 6 is a schematic cross-sectional view of a heterojunction back contact cell according to Embodiment 3.
  • FIG. 6 is a schematic cross-sectional view of a heterojunction back contact cell of Embodiment 4.
  • FIG. 6 is a schematic cross-sectional view of a heterojunction back contact cell of Embodiment 5.
  • FIG. FIG. 6 is a diagram showing the relationship between the refractive index of light having a wavelength of 630 nm and the optical band gap [eV] of the SiC dielectric films of Experimental Examples 1 to 6 and the SiN films of Experimental Examples 7 to 12.
  • Short-circuit current density [mA / cm 2 ] and film thickness [nm] of the heterojunction back contact cell assumed when the SiC dielectric films of Experimental Examples 1 to 6 are formed on the light receiving surface with film thicknesses of 5 nm, 10 nm, and 15 nm.
  • FIG. 6 is a diagram showing the relationship between the wavelength [nm] of light incident on the SiC dielectric films of Experimental Examples 1 to 6 and the transmittance ⁇ [nm ⁇ 1 ].
  • FIG. 6 is a diagram showing etching resistance to hydrofluoric acid aqueous solutions having a hydrofluoric acid concentration of 5 mass% for the SiC dielectric films of Experimental Examples 1 to 6.
  • FIG. 6 is a diagram showing etching resistance of SiC dielectric films of Experimental Examples 1 to 6 to a hydrofluoric acid aqueous solution.
  • FIG. 6 is a diagram showing etching resistance to an aqueous potassium hydroxide solution having a potassium hydroxide concentration of 5 mass% in the SiC dielectric films of Experimental Examples 1 to 6.
  • 2 is a schematic cross-sectional view of a back junction solar cell described in Patent Document 1.
  • FIG. It is a flowchart of the manufacturing method of the back junction type solar cell shown by FIG.
  • FIG. 1 is a schematic cross-sectional view of the heterojunction back contact cell of the first embodiment.
  • the heterojunction back contact cell of Embodiment 1 includes a semiconductor substrate 1. An uneven shape is formed on the first surface 1 a (light receiving surface) of the semiconductor substrate 1.
  • An i-type amorphous semiconductor film 9 is provided on the first surface 1 a of the semiconductor substrate 1, and a dielectric containing carbon (C) and silicon (Si) is formed on the i-type amorphous semiconductor film 9.
  • a body film 6 (hereinafter referred to as “SiC dielectric film 6”) is provided as an outermost film.
  • the semiconductor substrate 1 is an n-type single crystal silicon substrate
  • the i-type amorphous semiconductor film 9 is an i-type amorphous silicon film.
  • the SiC dielectric film 6 is composed of SiC x N y O z F w H v (0 ⁇ x, 0 ⁇ y ⁇ x, 0 ⁇ z ⁇ x, 0 ⁇ w ⁇ x and 0 ⁇ v).
  • the dielectric film represented is used. That is, the SiC dielectric film 6 may be composed only of Si and C. In addition to Si and C, components other than Si and C (for example, nitrogen (N), oxygen (O), fluorine (F) And one or more components selected from the group consisting of hydrogen (H).
  • the composition of SiC dielectric film 6 can be determined by measuring the content of each atom contained in SiC dielectric film 6 by secondary ion mass spectrometry (SIMS).
  • a first i-type amorphous semiconductor film 2 and a second i-type amorphous semiconductor film 4 are provided on a second surface 1 b (back surface) opposite to the first surface 1 a of the semiconductor substrate 1. It has been.
  • each of the first i-type amorphous semiconductor film 2 and the second i-type amorphous semiconductor film 4 is an i-type amorphous silicon film.
  • a first conductivity type amorphous semiconductor film 3 is provided on the first i-type amorphous semiconductor film 2.
  • a second conductivity type amorphous semiconductor film 5 is provided on the second i-type amorphous semiconductor film 4.
  • the first conductive amorphous semiconductor film 3 is a p-type amorphous silicon film
  • the second conductive amorphous semiconductor film 5 is an n-type amorphous silicon film.
  • the second i-type amorphous semiconductor film 4 and the first On the edge of the first stacked body 51 of the first i-type amorphous semiconductor film 2 and the first conductive amorphous semiconductor film 3, the second i-type amorphous semiconductor film 4 and the first The edge part of the 2nd laminated body 52 with the 2 conductivity type amorphous semiconductor film 5 is located. Therefore, there is a second gap between the end of the first conductive amorphous semiconductor film 3 of the first stacked body 51 and the end of the second conductive amorphous semiconductor film 5 of the second stacked body 52. There is a region where the end of the i-type amorphous semiconductor film 4 is located.
  • the end of the second i-type amorphous semiconductor film 4 is in contact with both the first conductive type amorphous semiconductor film 3 and the second conductive type amorphous semiconductor film 5.
  • the first conductive amorphous semiconductor film 3 and the second conductive amorphous semiconductor film 5 are separated by the second i-type amorphous semiconductor film 4.
  • first electrode 7 in contact with the first conductive type amorphous semiconductor film 3 is provided on the first conductive type amorphous semiconductor film 3.
  • a second electrode 8 that is in contact with the second conductive type amorphous semiconductor film 5 is provided on the second conductive type amorphous semiconductor film 5.
  • the first electrode 7 and the second electrode 8 aluminum, silver, or the like can be used.
  • i-type is not only a completely intrinsic state but also a sufficiently low concentration (n-type impurity concentration is less than 1 ⁇ 10 15 / cm 3 and p-type impurity concentration is 1 ⁇ (Less than 10 15 / cm 3 ) is meant to include n-type or p-type impurities.
  • n-type means a state where the n-type impurity concentration is 1 ⁇ 10 15 / cm 3 or more
  • p-type means that the p-type impurity concentration is 1 ⁇ 10 15 / cm 3. It means a state of cm 3 or more.
  • the n-type impurity concentration and the p-type impurity concentration can be measured by SIMS, for example.
  • amorphous silicon includes not only amorphous silicon in which the dangling bonds of silicon atoms are not terminated with hydrogen, but also dangling of silicon atoms such as hydrogenated amorphous silicon. It also includes those whose hands are terminated with hydrogen or the like.
  • an uneven shape is formed on the first surface 1 a serving as the light receiving surface of the semiconductor substrate 1.
  • the uneven shape of the first surface 1a can be formed, for example, by subjecting the first surface 1a of the semiconductor substrate 1 to texture etching.
  • an i-type amorphous semiconductor film 9 is formed so as to be in contact with the entire surface of the first surface 1 a of the semiconductor substrate 1, and then the entire surface of the i-type amorphous semiconductor film 9 is formed.
  • An SiC dielectric film 6 is formed so as to be in contact therewith.
  • i-type amorphous semiconductor film 9 and SiC dielectric film 6 can be formed by, for example, a plasma CVD (Chemical Vapor Deposition) method.
  • the temperature of the second surface 1b of the semiconductor substrate 1 is less than 200 ° C. from the viewpoint of suppressing crystallization of the i-type amorphous semiconductor film 9.
  • SiH 4 can be used as the Si source gas
  • methane (CH 4 ) can be used as the C source gas.
  • the components other than Si and C of the SiC dielectric film 6 may be intentionally introduced by using a source gas containing atoms of the component, and are unavoidable without using a source gas containing atoms of the component. It may be introduced as an impurity.
  • a first i-type amorphous semiconductor film 2 is formed on the entire second surface 1 b of the semiconductor substrate 1.
  • the method for forming the first i-type amorphous semiconductor film 2 is not particularly limited, and for example, a plasma CVD method can be used.
  • a first conductivity type amorphous semiconductor film 3 is formed on the first i-type amorphous semiconductor film 2.
  • the formation method of the 1st conductivity type amorphous semiconductor film 3 is not specifically limited, For example, plasma CVD method can be used.
  • a stacked body of the first i-type amorphous semiconductor film 2 and the first conductive-type amorphous semiconductor film 3 is formed on the first conductive-type amorphous semiconductor film 3.
  • a photoresist mask 31 having an opening at a location where a certain first stacked body 51 is etched in the thickness direction is formed.
  • the photoresist mask 31 is formed by patterning using a potassium hydroxide aqueous solution as a developer after applying a photoresist on the entire surface of the first conductive type amorphous semiconductor film 3.
  • a part of the second surface 1b of the semiconductor substrate 1 is exposed by etching the first stacked body 51 in the thickness direction using the photoresist mask 31 as a mask.
  • Etching of the first laminate 51 is performed by wet etching using an aqueous hydrofluoric acid solution, which is a mixed acid of an aqueous hydrofluoric acid solution and an aqueous nitric acid solution, or an alkaline aqueous solution such as an aqueous potassium hydroxide solution or an aqueous sodium hydroxide solution. .
  • the second i-type amorphous semiconductor film 4 is formed so as to cover the exposed surface of the semiconductor substrate 1 and the first stacked body 51.
  • the method for forming the second i-type amorphous semiconductor film 4 is not particularly limited, and for example, a plasma CVD method can be used.
  • a second conductivity type amorphous semiconductor film 5 is formed on the second i-type amorphous semiconductor film 4.
  • the formation method of the 2nd conductivity type amorphous semiconductor film 5 is not specifically limited, For example, plasma CVD method can be used.
  • the second i-type amorphous semiconductor film 4 and the second conductive type amorphous semiconductor film 5 are stacked on the second surface 1 b of the semiconductor substrate 1.
  • the photoresist mask 32 is formed only in the portion where the two stacked bodies 52 are left.
  • the photoresist mask 32 is formed by patterning using a potassium hydroxide aqueous solution as a developer after applying a photoresist to the entire surface of the second conductive type amorphous semiconductor film 5.
  • Etching of the second stacked body 52 is performed by wet etching using a hydrofluoric acid aqueous solution, which is a mixed acid of a hydrofluoric acid aqueous solution and a nitric acid aqueous solution, or an alkaline aqueous solution such as a potassium hydroxide aqueous solution or a sodium hydroxide aqueous solution as an etchant. . Thereafter, as shown in FIG. 12, the photoresist mask 32 is completely removed.
  • the first electrode 7 is formed so as to be in contact with the first conductive amorphous semiconductor film 3, and the second electrode is in contact with the second conductive amorphous semiconductor film 5. 8 is formed.
  • the formation method of the 1st electrode 7 and the 2nd electrode 8 is not specifically limited, For example, a vapor deposition method etc. can be used.
  • the heterojunction back contact cell according to the first embodiment includes an SiC x N y O z F w H as an outermost film on the i-type amorphous semiconductor film 9 on the first surface 1 a serving as the light receiving surface of the semiconductor substrate 1. It is manufactured by forming a SiC dielectric film 6 whose composition is represented by the formulas v (0 ⁇ x, 0 ⁇ y ⁇ x, 0 ⁇ z ⁇ x, 0 ⁇ w ⁇ x and 0 ⁇ v). Therefore, even if the SiC dielectric film 6 is formed at a low temperature of less than 200 ° C.
  • the SiC dielectric film 6 is disclosed in the patent document. Since the etching resistance is higher than that of the insulating layer 124 made of silicon oxide, silicon nitride, or silicon oxynitride described in 1, the patterning of the photoresist mask 31 and the photoresist mask 32, and the first stacked body 51 and the second stacked body 51 It is not necessary to form a protective film having etching resistance on the SiC dielectric film 6 when the stacked body 52 is etched. Therefore, the heterojunction back contact cell of Embodiment 1 can reduce the number of steps by the step of forming the protective film as compared with the back junction solar cell described in Patent Document 1.
  • the SiC dielectric film 6 is lower than the semiconductor substrate 1 made of an n-type single crystal silicon substrate and the i-type amorphous semiconductor film 9 made of an i-type amorphous silicon film, and the SiC dielectric film. It is possible to adjust the refractive index higher than a sealing material such as ethylene vinyl acetate (EVA) that can be disposed outside the body film 6. Therefore, the SiC dielectric film 6 can have an antireflection function for incident light, like the insulating layer 124 made of silicon oxide, silicon nitride, or silicon oxynitride described in Patent Document 1.
  • the passivation of the first surface 1 a of the semiconductor substrate 1 can be performed by the i-type amorphous semiconductor film 9. Therefore, it is considered that the characteristics of the heterojunction back contact cell of Embodiment 1 can be equal to or higher than the characteristics of the back junction solar cell described in Patent Document 1.
  • the heterojunction back contact cell of Embodiment 1 can also suppress an increase in man-hours while suppressing a decrease in characteristics.
  • the conductivity type of the semiconductor substrate 1 is n-type has been described.
  • the conductivity type of the semiconductor substrate 1 may be p-type.
  • the first conductivity type is p-type and the second conductivity type is n-type.
  • the first conductivity type is n-type and the second conductivity type is p-type. May be.
  • the SiC dielectric film 6 is formed on the first surface 1 a of the semiconductor substrate 1, the first stacked body 51 and the second stacked body 52 are formed on the second surface 1 b of the semiconductor substrate 1.
  • the SiC dielectric is formed on the first surface 1a of the semiconductor substrate 1.
  • the body film 6 may be formed.
  • FIG. 13 is a schematic cross-sectional view of the heterojunction back contact cell of the second embodiment.
  • the heterojunction back contact cell of Embodiment 2 is characterized in that an SiC dielectric film 6 is provided so as to be in direct contact with the first surface 1 a of the semiconductor substrate 1. Since the SiC dielectric film 6 also contains Si, the SiC dielectric film 6 can also passivate the first surface 1a of the semiconductor substrate 1 made of an n-type or p-type silicon substrate. Conceivable.
  • FIG. 14 is a schematic cross-sectional view of the heterojunction back contact cell according to the third embodiment.
  • the heterojunction back contact cell of Embodiment 3 includes a silicon nitride film 16 (hereinafter referred to as “SiN film 16”) between the first surface 1a of the semiconductor substrate 1 and the SiC dielectric film 6.
  • the refractive index of the semiconductor substrate 1, the SiN film 16 and the SiC dielectric film 6 is such that the refractive index of the semiconductor substrate 1> the refractive index of the SiN film 16> the refractive index of the SiC dielectric film 6. It is characterized by satisfying the relationship.
  • the first surface 1a of the semiconductor substrate 1 can be passivated by the SiN film, and the reflection of incident light can be suppressed by the laminated structure of the SiN film 16 and the SiC dielectric film 6.
  • the composition of the SiN film 16 is SiC x1 N y1 O z1 F w1 H v1 (0 ⁇ y1, 0 ⁇ x1 ⁇ y1, 0 ⁇ z1 ⁇ y1, 0 ⁇ w1 ⁇ y1 and 0 ⁇ v1).
  • the dielectric film represented is used.
  • the composition of the SiN film 16 can be obtained by measuring the content of each atom contained in the SiN film 16 by SIMS.
  • FIG. 15 is a schematic cross-sectional view of the heterojunction back contact cell of the fourth embodiment.
  • the SiN film 16 includes a first SiN film 16a on the semiconductor substrate 1 side and a second SiN film 16b on the SiC dielectric film 6 side.
  • the refractive index of the semiconductor substrate 1, the first SiN film 16a, the second SiN film 16b, and the SiC dielectric film 6 is such that the refractive index of the semiconductor substrate 1> the refractive index of the first SiN film 16a> the first.
  • the refractive index of the second SiN film 16b> the refractive index of the SiC dielectric film 6 is satisfied.
  • the first surface 1a of the semiconductor substrate 1 can be passivated by the first SiN film 16a, and the first SiN film 16a, the second SiN film 16b, and the SiC dielectric film 6 are stacked. Reflection of incident light can be suppressed by the structure.
  • FIG. 16 is a schematic cross-sectional view of the heterojunction back contact cell of the fifth embodiment.
  • the heterojunction back contact cell of Embodiment 5 is characterized in that an i-type amorphous semiconductor film 9 is provided between the semiconductor substrate 1 and the first SiN film 16a. .
  • the i-type amorphous semiconductor film 9 can passivate the first surface 1 a of the semiconductor substrate 1.
  • the SiC dielectric films of Experimental Examples 1 to 6 were respectively formed on the semiconductor substrate by plasma CVD using the flow rate [sccm] and the flow rate ratio shown in Table 1 and the film formation conditions shown in Table 2. .
  • the substrate temperature in Table 2 indicates the surface temperature [° C.] of the semiconductor substrate on which the SiC dielectric film is formed, the pressure indicates the atmospheric pressure [Pa], and the interelectrode gap is the distance between the positive electrode and the negative electrode [Mm] is shown, and the output density is the plasma output density [mW / cm 2 ].
  • the frequency in Table 2 indicates the frequency [MHz] of the power applied between the electrodes, and the plasma excitation method indicates that plasma is continuously generated.
  • Table 3 shows the refractive index of the light having a wavelength of 630 nm and the optical band gap of the SiC dielectric films of Experimental Examples 1 to 6 manufactured as described above.
  • Table 4 shows the refractive index of light having a wavelength of 630 nm and the optical band gap in the SiN films of Experimental Examples 7 to 12 produced by appropriately changing the film formation conditions.
  • the refractive indexes of light having a wavelength of 630 nm of the SiC dielectric films of Experimental Examples 1 to 6 and the SiN films of Experimental Examples 7 to 12 are values measured by ellipsometry, and the SiC dielectric films of Experimental Examples 1 to 6 are used.
  • the optical band gaps of the SiN films of Experimental Examples 7 to 12 were measured using the transmittance of the SiC dielectric film of Experimental Examples 1 to 6 and the SiN film of Experimental Examples 7 to 12 using an ultraviolet-visible-near infrared spectrophotometer.
  • the reflectance is measured, and is a value calculated by the Tautz plot method from the measured values of transmittance and reflectance with an ultraviolet-visible near-infrared spectrophotometer.
  • FIG. 17 shows the relationship between the refractive index of light having a wavelength of 630 nm and the optical band gap [eV] of the SiC dielectric films of Experimental Examples 1 to 6 and the SiN films of Experimental Examples 7 to 12.
  • the horizontal axis represents the optical band gap
  • the vertical axis represents the refractive index.
  • FIG. 17 also shows, for reference, the refractive index of light having a wavelength of 500 nm of a SiC dielectric film manufactured separately from the above.
  • the refractive index of each of the SiC dielectric films of Experimental Examples 1 to 6 and the SiN films of Experimental Examples 7 to 12 decreases as the optical band gap increases. . Therefore, the SiC dielectric films of Experimental Examples 1 to 6 and the SiN films of Experimental Examples 7 to 12 can be adjusted in refractive index by adjusting the optical band gap. It was confirmed that the optical band gap of the SiC dielectric film can be basically increased by increasing the ratio of the flow rate of CH 4 to the flow rate of SiH 4 .
  • FIG. 18 shows the short-circuit current density [mA / cm 2 ] and film of the heterojunction back contact cell that is assumed when the SiC dielectric films of Experimental Examples 1 to 6 are formed on the light receiving surface with film thicknesses of 5 nm, 10 nm, and 15 nm. The relationship with the thickness [nm] is shown.
  • the horizontal axis indicates the film thickness
  • the vertical axis indicates the short circuit current density.
  • the short-circuit current density and film thickness of the heterojunction back contact cell assumed when the SiN film A and the SiN film B are formed on the light receiving surface with a film thickness of 5 nm, 10 nm, and 15 nm, respectively.
  • the relationship is also shown.
  • the SiN film A and the SiN film B are produced under different film formation conditions.
  • FIG. 19 shows the relationship between the wavelength [nm] of light incident on the SiC dielectric films of Experimental Examples 1 to 6 and the transmittance ⁇ [nm ⁇ 1 ].
  • FIG. 19 also shows the relationship between the wavelength [nm] of light incident on the SiN film A and the SiN film B and the transmittance ⁇ [nm ⁇ 1 ] for reference.
  • the transmittance ⁇ [nm ⁇ 1 ] of the SiC dielectric films of Experimental Examples 1 to 6 is a value measured with an ultraviolet-visible near-infrared spectrophotometer.
  • FIG. 20 shows the etching resistance of the SiC dielectric films of Experimental Examples 1 to 6 to a hydrofluoric acid aqueous solution having a hydrofluoric acid concentration of 5 mass%.
  • the horizontal axis indicates the etching time [second]
  • the vertical axis indicates the film thickness [nm].
  • FIG. 21 shows the etching resistance of the SiC dielectric films of Experimental Examples 1 to 6 to a hydrofluoric acid aqueous solution.
  • the horizontal axis indicates the etching time [second]
  • the vertical axis indicates the film thickness [nm].
  • the hydrofluoric acid aqueous solution is a mixed acid having a volume ratio of 1: 100: 50 hydrofluoric acid aqueous solution, nitric acid aqueous solution, and water.
  • the hydrofluoric acid aqueous solution is a hydrofluoric acid aqueous solution having a hydrofluoric acid concentration of 5% by mass.
  • FIG. 22 shows the etching resistance of the SiC dielectric films of Experimental Examples 1 to 6 to a potassium hydroxide aqueous solution having a potassium hydroxide concentration of 5 mass%.
  • the horizontal axis indicates the etching time [second]
  • the vertical axis indicates the film thickness [nm].
  • the SiC dielectric films of Experimental Examples 1 to 6 have optical characteristics equivalent to or better than those of the SiN film, and are etched with an aqueous hydrofluoric acid solution, an aqueous hydrofluoric acid solution, and an alkaline aqueous solution of a potassium hydroxide solution. It was also confirmed that it has resistance.
  • An embodiment disclosed herein includes a semiconductor substrate of a first conductivity type or a second conductivity type, a dielectric film containing carbon and silicon on the first surface side of the semiconductor substrate, A first conductivity type amorphous semiconductor film and a second conductivity type amorphous semiconductor film on the second surface side opposite to the first surface, a first electrode on the first conductivity type amorphous semiconductor film, A dielectric film is formed of SiC x N y O z F w H v (0 ⁇ x, 0 ⁇ y ⁇ x, 0 ⁇ z ⁇ x). , 0 ⁇ w ⁇ x and 0 ⁇ v), and the dielectric film is a photoelectric conversion element that is the outermost film. In this case, an increase in the number of man-hours can be suppressed while suppressing a decrease in characteristics.
  • the semiconductor substrate and the dielectric film may be in contact with each other. Also in this case, an increase in the number of man-hours can be suppressed while suppressing a deterioration in characteristics.
  • the photoelectric conversion element of the embodiment disclosed herein may further include an amorphous semiconductor film between the semiconductor substrate and the dielectric film. Also in this case, an increase in the number of man-hours can be suppressed while suppressing a deterioration in characteristics.
  • the amorphous semiconductor film may be in contact with each of the semiconductor substrate and the dielectric film. Also in this case, an increase in the number of man-hours can be suppressed while suppressing a deterioration in characteristics.
  • the photoelectric conversion element of the embodiment disclosed herein may further include a silicon nitride film between the semiconductor substrate and the dielectric film. Also in this case, an increase in the number of man-hours can be suppressed while suppressing a deterioration in characteristics.
  • the silicon nitride film may be in contact with each of the semiconductor substrate and the dielectric film. Also in this case, an increase in the number of man-hours can be suppressed while suppressing a deterioration in characteristics.
  • the semiconductor substrate includes silicon
  • the silicon nitride film includes a first silicon nitride film on the semiconductor substrate side and a second silicon nitride film on the dielectric film side.
  • the refractive index of the first silicon nitride film may be higher than the refractive index of the second silicon nitride film. Also in this case, an increase in the number of man-hours can be suppressed while suppressing a deterioration in characteristics.
  • the photoelectric conversion element of the embodiment disclosed herein may further include an amorphous semiconductor film between the semiconductor substrate and the first silicon nitride film. Also in this case, an increase in the number of man-hours can be suppressed while suppressing a deterioration in characteristics.
  • the amorphous semiconductor film may be in contact with each of the semiconductor substrate and the first silicon nitride film. Also in this case, an increase in the number of man-hours can be suppressed while suppressing a deterioration in characteristics.
  • the first i-type amorphous semiconductor film may be located between the semiconductor substrate and the first conductive amorphous semiconductor film. Also in this case, an increase in the number of man-hours can be suppressed while suppressing a deterioration in characteristics.
  • the first i-type amorphous semiconductor film may be in contact with each of the semiconductor substrate and the first conductive type amorphous semiconductor film. Also in this case, an increase in the number of man-hours can be suppressed while suppressing a deterioration in characteristics.
  • the second i-type amorphous semiconductor film may be located between the semiconductor substrate and the second conductive amorphous semiconductor film. Also in this case, an increase in the number of man-hours can be suppressed while suppressing a deterioration in characteristics.
  • the second i-type amorphous semiconductor film may be in contact with each of the semiconductor substrate and the second conductivity-type amorphous semiconductor film. Also in this case, an increase in the number of man-hours can be suppressed while suppressing a deterioration in characteristics.
  • the end portion of the second conductive type amorphous semiconductor film may be positioned on the end portion of the first conductive type amorphous semiconductor film. Also in this case, an increase in the number of man-hours can be suppressed while suppressing a deterioration in characteristics.
  • An embodiment disclosed herein includes a step of forming a dielectric film containing carbon and silicon on a first surface side of a semiconductor substrate of a first conductivity type or a second conductivity type, After the step of forming, a step of forming a first conductivity type amorphous semiconductor film on the second surface side opposite to the first surface of the semiconductor substrate, and a second conductivity on the second surface side of the semiconductor substrate.
  • a dielectric film is represented by the formula of SiC x N y O z F w H v (0 ⁇ x, 0 ⁇ y ⁇ x, 0 ⁇ z ⁇ x, 0 ⁇ w ⁇ x and 0 ⁇ v)
  • a dielectric film is an outermost film of the photoelectric conversion element manufacturing method.
  • the photoelectric conversion element can be manufactured while suppressing a decrease in characteristics and suppressing an increase in man-hours.
  • the step of forming the dielectric film may include a step of forming the dielectric film by a plasma CVD method. Also in this case, the photoelectric conversion element can be manufactured while suppressing a decrease in characteristics and suppressing an increase in man-hours.
  • the plasma CVD method may be performed using a gas containing silane and methane. Also in this case, the photoelectric conversion element can be manufactured while suppressing a decrease in characteristics and suppressing an increase in man-hours.
  • a step of forming a dielectric film containing carbon and silicon on the first surface side of a semiconductor substrate of the first conductivity type or the second conductivity type Before the step of forming, a step of forming a first conductivity type amorphous semiconductor film on the second surface side opposite to the first surface of the semiconductor substrate, and a second surface side of the semiconductor substrate.
  • the dielectric film has a formula of SiC x N y O z F w H v (0 ⁇ x, 0 ⁇ y ⁇ x, 0 ⁇ z ⁇ x, 0 ⁇ w ⁇ x and 0 ⁇ v) It is a manufacturing method of the photoelectric conversion element which has the composition represented and a dielectric material film is an outermost film. In this case, the photoelectric conversion element can be manufactured while suppressing a decrease in characteristics and suppressing an increase in man-hours.
  • the step of forming the dielectric film may include a step of forming the dielectric film by a plasma CVD method. Also in this case, the photoelectric conversion element can be manufactured while suppressing a decrease in characteristics and suppressing an increase in man-hours.
  • the plasma CVD method may be performed using a gas containing silane and methane. Also in this case, the photoelectric conversion element can be manufactured while suppressing a decrease in characteristics and suppressing an increase in man-hours.
  • Embodiment disclosed here can be utilized for the manufacturing method of a photoelectric conversion element and a photoelectric conversion element, and may be suitably used for the manufacturing method of a solar cell and a solar cell, Especially preferably, it is hetero. There is a possibility that it can be used for a junction type back contact cell and a hetero junction type back contact cell.

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  • Photovoltaic Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

La présente invention concerne un élément de conversion photoélectrique comprenant : un film diélectrique (6) qui contient du carbone et du silicium et est situé du côté d'une première surface (1a) d'un substrat semi-conducteur d'un premier type de conductivité ou d'un second type de conductivité (1); un film semi-conducteur amorphe du premier type de conductivité (3) et un film semi-conducteur amorphe du second type de conductivité (5) situés du côté d'une seconde surface (1b) à l'opposé de la première surface (1a); une première électrode (7) sur le film semi-conducteur amorphe du premier type de conductivité (3); et une seconde électrode (8) sur le film semi-conducteur amorphe du second type de conductivité (5). Le film diélectrique (6) a une composition représentée par la formule SiCxNyOzFwHv (dans laquelle 0 < x, 0 ≤ y < x, 0 ≤ z < x, 0 ≤ w < x, et 0 ≤ v). Le film diélectrique (6) est le film le plus à l'extérieur.
PCT/JP2016/052014 2015-02-05 2016-01-25 Élément de conversion photoélectrique et procédé de fabrication d'élément de conversion photoélectrique Ceased WO2016125615A1 (fr)

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JP2012519375A (ja) * 2009-09-14 2012-08-23 エルジー エレクトロニクス インコーポレイティド 太陽電池
US20120291860A1 (en) * 2011-05-19 2012-11-22 Min Park Solar cell and method of manufacturing the same
JP2013500591A (ja) * 2009-07-29 2013-01-07 シリアム・テクノロジーズ・インコーポレーテッド 太陽電池及びその製造方法
JP2014041983A (ja) * 2012-08-23 2014-03-06 Sharp Corp 界面パッシベーション構造の製造方法および光電変換素子
JP2014239150A (ja) * 2013-06-07 2014-12-18 信越化学工業株式会社 太陽電池および太陽電池モジュール

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JP3998619B2 (ja) * 2003-09-24 2007-10-31 三洋電機株式会社 光起電力素子およびその製造方法
WO2009096539A1 (fr) * 2008-01-30 2009-08-06 Kyocera Corporation Élément de batterie solaire et procédé de fabrication d'élément de batterie solaire
JP2012507165A (ja) * 2008-10-31 2012-03-22 ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング 太陽電池セルおよび太陽電池セルの製造方法
JP2010171263A (ja) * 2009-01-23 2010-08-05 Mitsubishi Electric Corp 光起電力装置の製造方法
JP2013500591A (ja) * 2009-07-29 2013-01-07 シリアム・テクノロジーズ・インコーポレーテッド 太陽電池及びその製造方法
JP2012519375A (ja) * 2009-09-14 2012-08-23 エルジー エレクトロニクス インコーポレイティド 太陽電池
US20120291860A1 (en) * 2011-05-19 2012-11-22 Min Park Solar cell and method of manufacturing the same
JP2014041983A (ja) * 2012-08-23 2014-03-06 Sharp Corp 界面パッシベーション構造の製造方法および光電変換素子
JP2014239150A (ja) * 2013-06-07 2014-12-18 信越化学工業株式会社 太陽電池および太陽電池モジュール

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