WO2016198577A1 - Composant semi-conducteur optoélectronique et son procédé de fabrication - Google Patents
Composant semi-conducteur optoélectronique et son procédé de fabrication Download PDFInfo
- Publication number
- WO2016198577A1 WO2016198577A1 PCT/EP2016/063263 EP2016063263W WO2016198577A1 WO 2016198577 A1 WO2016198577 A1 WO 2016198577A1 EP 2016063263 W EP2016063263 W EP 2016063263W WO 2016198577 A1 WO2016198577 A1 WO 2016198577A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- scattering particles
- carrier
- optoelectronic semiconductor
- arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/852—Encapsulations
- H10H20/854—Encapsulations characterised by their material, e.g. epoxy or silicone resins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/16—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/882—Scattering means
Definitions
- the invention relates to a method according to claim 1 and an arrangement according to claim 10.
- the semiconductor device is provided with a layer
- An improved method of fabricating an array is provided by providing an optoelectronic semiconductor device on a substrate, applying a first layer of matrix material, and scattering particles to an upper surface of the substrate.
- a centrifugal force or gravity of the ⁇ art is applied to the at ⁇ order that the scattering particles are moved in the first layer at least partially in the direction of the carrier and increasing the concentration of the scattering particles is achieved in the first layer in the vicinity of the wearer.
- a loss of light is reduced at a side-emission from the optoelectronic semiconductor component on soflä ⁇ surfaces of the optoelectronic semiconductor component in Wesent ⁇ union or avoided so that the optical elec- tronic semiconductor device can be particularly good to emit light and hence the arrangement is particularly light and a high color homogeneity having. Furthermore, an influence on an age-related degeneration of the wearer on a performance of the arrangement, for. As a browning, reduced or avoided.
- the centrifugal force or gravity is applied in such a way that, starting from the region of increased concentration, the concentration of the scattering particles decreases with increasing distance to the carrier.
- a concentration gradient is made between see a region adjacent to the support first concentration range of scattering particles in the first layer and spaced from the support disposed second Konzentrationsbe ⁇ rich generated by scattering particles in the first layer by means of the centrifugal force or gravity.
- the first layer is to a top surface of the optoelectronic Halbleiterbauele ⁇ ments filled, the top of the optoelectronic semiconductor device is kept free. This will si ⁇ cherego that the scattering particles do not cover the top of the optoelectronic semiconductor device and thus emission of light from the optoelectronic semiconductor component by the scattering particles upper side verhin ⁇ is changed.
- a second layer with a second matrix material is applied to the first layer on a side facing away from the carrier.
- the second layer is filled up to a housing upper side of a housing in which the carrier is arranged. Thereby, a uniform appearance of the arrangement can be achieved.
- the second layer is applied to the first layer in time after the action of centrifugal force or gravity on the device. This avoids that the second layer can emerge from the housing interior when starting a centrifuge to provide the centrifugal force. Furthermore, the first layer and the second layer are prevented from mixing.
- the first layer when applied to the support a mass concentration of scattering particles having a value, where the value Be ⁇ ranging from 10 to 40 percent, more preferably in a range of 15 to 25 percent, is in a.
- the centrifugal force or gravity acts on the scattering particles for a period of 5 to 15 minutes, preferably for 10 minutes.
- the first layer has a thickness which is less than or equal to a thickness of the opto-electronic semiconductor component.
- the concentration of the scattering particles on the first layer in the direction from the carrier takes away at least 5 percent, preferably 10 percent to 15 percent ⁇ particular, from.
- the optoelectronic semiconductor component has at least one side surface. The side surface is substantially perpendicular or oblique to the top of the carrier. The side surface is covered by the first layer.
- the scattering particles are formed from at least one of the following materials: aluminum oxide (Al 2 O 3), titanium oxide (T 2 O 2), zirconium oxide (ZrC> 2), Printex, carbon black having a particle size (d 50) of 20 nm to 20 ⁇ m.
- the arrangement has a second layer.
- the second layer has another matrix material.
- the second layer covers the first layer on a side facing away from the carrier.
- the matrix material of the first layer and / or the white ⁇ ter matrix material of the second layer as a material silicone.
- the second layer is substantially free of scattering particles. As a result, an abstraction of light is not hindered by the optoelectronic semiconductor component upwards.
- the optoelectronic semiconductor component is covered on the upper side by the second layer.
- the optoelectronic semiconductor component is designed as an LED chip.
- the optical elec- tronic semiconductor device is preferably designed as Volu ⁇ menem itter.
- FIG. 2 shows a detail of the arrangement shown in FIG. 1;
- FIG. 3 shows a diagram of the distance a plotted against the mass concentration ⁇
- FIG. 4 is a flowchart of a method for producing the arrangement shown in FIGS. 1 and 2;
- FIG. 5 shows a sectional view of the arrangement according to a fourth method step
- FIG. 6 shows a sectional view of the arrangement according to a fifth method step
- FIG. 7 shows a sectional view of the arrangement according to a sixth method step.
- Figure 8 shows a sectional view through a development of the arrangement shown in Figures 1 and 2 show.
- FIG. 1 shows a sectional view through an arrangement 10.
- the arrangement 10 has a housing 15.
- the housing 15 may be transparent, semi-transparent or opaque. In this case, in particular as a material for the housing 15 is a plastic.
- the housing 15 has a first side wall 20, arranged against ⁇ opposite to the first side wall 20 second Be ⁇ tenwand 25 and a housing bottom 30.
- the housing bottom 30 connects the first side wall 20 with the second side wall 25.
- the side walls 20, 25 extend in the same direction away from the housing bottom 30.
- the first side wall 20 has a first side wall inner surface 31 and the second side tenwand one of the first side wall inner surface 32.
- the first and the second side wall inner surface 31, 32 are arranged obliquely to the housing bottom 30.
- the Be ⁇ tenwandinnen vom 31, 32 extend such that the sowandinnen- surfaces 31, 32 are spaced at an increasing distance a from the housing bottom 30 next to each other.
- the side wall inner surfaces 31, 32 together with the housing bottom 30 delimit a housing interior 35.
- the side walls 20, 25 have a housing top side 33 on the top side.
- the housing top 33 is flat and directed parallel to the housing bottom 30 from ⁇ .
- the arrangement 10 comprises a carrier 40 with a first carrier section 45 and a second carrier section 50.
- the first carrier section 45 is arranged at a distance from the second carrier section 50.
- the first support portion 45 and the second support portion 50 are inserted ⁇ blank in the housing base 30 and connected to the housing bottom 30th
- the housing bottom 30 electrically insulates the first support portion 45 from the second support portion 50.
- the support portion 45, 50 may be stepped.
- the assembly 10 comprises an optoelectronic semiconductor ⁇ device 55 and a protection diode 60.
- the optoelectronic semiconductor device 55 has, for example a rechteckför--shaped cross-section.
- the optoelectronic semiconductor component 55 has an upper side 65 and a lower side 70.
- the bottom surface 70 is on a first Anlagenab cut ⁇ 45 facing side of the optoelectronic semiconductor terbauelements 55 is arranged.
- the upper side 65 is arranged on a side facing away from the first support portion 45 side of the opto ⁇ electronic semiconductor device 55.
- the optoelectronic Halbleiterbau ⁇ element 55 is mechanically and optionally electrically connected to an upper side 75 of the first support portion 45 via the bottom 70.
- the optoelectronic semiconductor component 55 comprises a first side surface 80 and a second side surface 80. 85.
- the first side surface 80 is arranged opposite the second side surface 85 of the optoelectronic semiconductor component 55.
- the first side surface 80 and the second side surface 85 connect the underside 70 of the optoelectronic semiconductor component 55 with the
- the side surface 80, 85 of the optoelectronic semiconductor component 55 is arranged perpendicular to the upper side 65 and lower side 70 of the optoelectronic semiconductor component 55 and to the upper side 75 of the first carrier section 45.
- the Side surface 80, 85 obliquely to the top 65 and / or the bottom 70 of the optoelectronic semiconductor device 55 and / or the top 75 of the first Suab- section 45 is arranged.
- the optoelectronic semiconductor component 55 has a first electrical connection 90 and a second electrical connection 95 on the upper side 65.
- the first electrical connector 90 is disposed at a distance from the second electrical circuit at ⁇ 95th
- the first electrical connection 90 of the optoelectronic semiconductor component 55 is connected to the first carrier section 45 via a first electrical connection 125.
- the second electrical terminal 95 of the optoelectronic semiconductor ⁇ circuit device 55 is connected via a second electrical Verbin ⁇ extension 125 with the first carrier section 45th Even ⁇ course can be dispensed with 125 also bonds to one of the two electrical encryption 120.
- the electrical connec ⁇ tion 120, 125 may be formed as a bonding wire.
- the first carrier section 45 may, for example, be electrically connected to a first pole of a current source and the second carrier section 50 may be electrically connected to a second pole of the current source.
- the optoelectronic semiconductor device 55 is in the off ⁇ guide die formed as an LED chip, for example as SiC LED, sapphire LED or flip-chip.
- the opto electronic semiconductor device 55 may be formed as a volume emitter ⁇ .
- ESD electrostatic discharge
- the protective diode 60 is electrically and mechanically connected to a lower side 100 with an upper side 105 of the second carrier section 50.
- the Schutzdio ⁇ de 60 can be electrically connected to the optoelectronic semiconductor component 55th
- a first layer 130 is provided adjacent to the Sparab ⁇ sections 45, 50 and the housing bottom 30.
- the first layer 130 extends transversely between the first housing inner wall surface 31 and the second housing inner wall surface 32.
- the first layer 130 covers the optical system adjacent to the optoelectronic semiconductor component
- the first layer 130 also covers the housing bottom 30 on a side facing the housing interior 35 side.
- the first layer 130 has a thickness di which essentially corresponds to a thickness d of the optoelectronic semiconductor component 55.
- the thickness di of the first layer 130 may be smaller than the thickness d of the optoelectronic semiconductor device 55.
- the first layer 130 adjacent to the side surfaces 80, 85 of the optoelectronic semiconductor device 55 and covers these substantially fully ⁇ constantly.
- the upper side 65 of the optoelectronic semiconductor component 55 is free.
- the thickness di can for example have ei ⁇ NEN value ym in a range of 100 to 200 ym, preferably in a range of 130 ym to 150 ym, is located.
- the first layer 130 completely covers the protection diode 60 because it has a smaller thickness d 2 than the first layer 130 and the optoelectronic semiconductor device 55.
- the first layer 130 comprises a first matrix material 135 and scattering particles 140.
- the first matrix material 135 may comprise silicon as the material.
- the scattering particles 140 are formed from at least one of the following materials: alumina (Al 2 O 3), titania (T 1 O 2), zirconia (ZrC> 2),
- Printex carbon black with a particle size (d50) of 20 nm to 20 ⁇ .
- a second layer 145 is disposed on the first layer 130th
- the second layer 145 extends transversely between the first housing wall inner surface 31 and the second housing wall inner surface 32.
- the second layer 145 is thicker than the first layer 130 in the embodiment.
- the second layer 145 may also be thinner or equal in thickness compared to the first layer 130.
- the second layer 145 extends substantially Zvi ⁇ rule the upper surface 65 of the optoelectronic semiconductor assembly ⁇ elements 55 to the height of the housing top 33 of the sides ⁇ wall 20, 25 of the housing 15 inside the housing 35.
- the second layer 145 has, for example, a thickness d 3 with a value, the value lying in a range of 100 ⁇ m to 300 ⁇ m, in particular in a range of 180 ⁇ m to 220 ⁇ m.
- the second layer 145 has a second matrix material 146.
- the second matrix material 146 has silicon as the material.
- the second matrix material 146 may correspond to the first Mat ⁇ rixmaterial 135 of the first layer 130th
- the two ⁇ te matrix material 146 may also be different from the first matrix material 135th
- the second layer 145 is in the Essentially free of scattering particles.
- the second layer serves to pass and the light and emitted through the top surface 65 of the optoelectronic semiconductor ⁇ circuit device 55, the coming out of the first layer 130 of light radiating toward the top.
- the second layer 145 covers the upper case ⁇ page 65 of the optoelectronic semiconductor component 55th
- FIG. 2 shows a detail of the arrangement 10 shown in FIG.
- the first layer 130 will carry with a uniform distribution of the scattering particles 140 in the first matrix material 135 positioned ⁇ .
- the scattering particles 140 have a different mass concentration ⁇ as a function of the distance a via the first layer 130.
- the mass concentration ⁇ is a mass of scattering particles 140 in a predefined volume segment.
- the first layer 130 has a first Konzentrationsbe rich ⁇ 150, a second concentration range of 155, and optionally a transition area 156.
- the first concentration region 150 is disposed adjacent to the upper surface 75 of the first support portion 45 and formed in a layered manner.
- the second concentration region 155 is arranged at a distance from the upper side 75 of the first carrier section 45. Zvi ⁇ rule the first concentration range 150 and the second concentration region 155 is arranged a transition region 156th
- FIG. 3 shows a diagram of the distance a plotted against the mass concentration ⁇ .
- the mass concentration ⁇ is substantially constant over the distance a and greater than a first limit value j ⁇ .
- the mass concentration ration ⁇ concentration in the first region 150 with increasing distance a from the top 75 of the first Sub ⁇ section 45 decreases.
- the mass concentration ⁇ drops from the first limit value j ⁇ as the distance a from the top side of the first carrier section 45 increases towards a second limit value j2.
- the second concentration range 155 which is disposed adjacent to the second layer 145, is the Massenkonzentrati ⁇ on ⁇ of the scattering particles 140 substantially over the distance a constant and smaller than the second threshold J2
- the second limit j2 is less than the first threshold ⁇ , It is particularly advantageous if the second limit j2 a
- the mass concentration ⁇ in the second concentration range 155 decreases with increasing distance a from the upper side 75 of the first carrier section 45.
- FIG. 4 shows a flowchart of a method for producing the arrangement 10 shown in FIGS. 1 and 2.
- FIG. 5 shows a sectional view of the arrangement 10 to be produced after a fourth method step 215.
- FIG. 6 shows a sectional view of the arrangement 10 after a fifth method step 220 .
- Figure 7 shows a sectional view of the assembly 10 according to a sixth method step 225.
- the first step 200 is the first Susb ⁇ section 45 and the second support portion 50 of the support 40 introduced in the housing floor 30. This can be done, for example, by using the injection molding process of the first te support portion 45 and the second support portion 50 are coated with material for the production of the housing 15.
- the optoelectronic semiconductor component ⁇ half 55 is arranged on the first support portion 45 attached ⁇ and mechanically ver ⁇ connected to the first support portion 45th It is additionally conceivable that the underside 70 of the optoelectronic semiconductor component 55 also
- a third method step 210 which follows the second method step 205, the protective diode 60 is arranged on the second carrier section 50 and the protective diode 60 is electrically and mechanically connected to its underside 100 with the upper side 105 of the second carrier section 50.
- a fourth method step 215 the first elekt ⁇ generic terminal 90 of the optoelectronic Halbleiterbauele ⁇ ment 55 is electrically connected by the first electrical connection 120 to the upper surface 75 of the first support portion 45th
- the second electrical connection 95 is electrically connected to the upper side 75 of the first carrier section 45 by means of the second electrical connection 125.
- a fifth method step 220 following the fourth method step 215, the first layer 130 is in the housing interior 35 to at least the upper surface 75 of the first support portion 45, advantageously on the housing bottom 30 and the upper ⁇ page 105 of the second support portion 50, is applied .
- the first layer 130 has a constant mass concentration ⁇ of scattering particles 140 in the first matrix material 135 over the entire thickness di of the first layer 130.
- the mass concentration ⁇ of scattering particles 140 has a value, wherein the value is in a range of 10 to 40 percent, in particular in a range of 15 to 25 percent.
- the first layer 130 is applied in such a way that the upper side 65 of the optoelectronic semiconductor component 55 remains free.
- the upper side 110 of the protective diode 60 may be covered by the first layer 130.
- the upper side 110 of the protective diode 60 as well as the upper side 65 of the opto ⁇ electronic semiconductor device 55 may be free and not covered by the first layer 130.
- the assembly 10 is centrifuged before and / or during the curing of the first matrix material 135 in a centrifuge, so that on the Anord ⁇ tion 10 and in particular on the first layer 130 a Zent - Rifugal force F z acts.
- the centrifugal force F z is perpendicular to the top surface 75 of the first support portion 45 in Rich ⁇ of the upper face 75 of the first support portion 45 court ⁇ tet.
- a gravitational force F G acts on the first layer 130.
- the gravitational force F G is directed perpendicular to the top side 75 of the first carrier section 45 in the direction of the top side 75 of the first carrier section 45.
- the centrifugal force F z or gravity F G causes at least a portion of the scattering particles 140 in the first matrix material 135 to move in the direction of the top side 75 of the first carrier section 45 before and / or during the curing of the first matrix material 135 of the first layer 130.
- the centrifugal force F z or gravity F G decreases the mass concentration of the scattering particles 140 via the first layer 130 in the direction away from the carrier 40 from.
- the centrifugal force F z which acts on the scattering article 140 corresponds to a product of 1 to 4000 times the gravitational acceleration g and a mass of the scattering article 140.
- the centrifugal force F z or the gravity F G acts on the arrangement 10 and here in particular on the scattering particles 140 for 5 to 15 minutes, in particular 10 minutes.
- a seventh method step 230 following the sixth step 225 the second layer is applied on the side opposite to the top side 75, 105 of the side Suab ⁇ section 45, 50 145th
- the second layer 145 is filled to the housing top 33, so that the upper ⁇ side 147 of the second layer 145 and the housing top 33 extend in a common plane.
- the above-described method steps 200, 205, 210, 215, 220, 225, 230 also take place in a ner other order can be executed.
- the fifth method step 220 takes place with the application of the first layer 130 prior to the provision of the centrifugal force F z or the gravitational force F G in the sixth method step 225.
- the seventh method step 230 such or gravity F G he follows ⁇ with the application of the second layer 145 on the first layer 130 by providing ⁇ position of the centrifugal force F, so a possible confusion of the first layer 130 and the second layer 135 when starting the centrifuge or leakage of the second layer 145 from the housing interior 35 to avoid.
- the side surfaces 80, 85 may be covered by the first layer 130 and so good light leakage from the optoelectronic semiconductor device 55 via the transition region 156 and the second concentration range 155 is ensured.
- the formation of the first concentration region 150 adjacent to the upper side 75, 105 and to the housing bottom 30 ensures a reliable radiation of light from the optoelectronic semiconductor component 55 via the side surfaces 80, 85. Furthermore, it is ensured by the first concentration region 150 that the light can be emitted from the housing bottom 30 and from the carrier 40 at the top out of the arrangement 10.
- the scattering particles 140 of titanium oxide (Ti0 2) have ⁇
- the first concentration range 150 to a substantially uniform color white embodiment.
- the optical appearance of the arrangement 10 can be improved, in particular in one embodiment of the housing 15 with a transparent and / or semitransparent material.
- a loss of light via the side surfaces 80, 85 of the optoelectronic semiconductor component 15 can be avoided so that the arrangement 10 has a particularly high light emission.
- age-related discoloration of the carrier 25 is covered by the first concentration area 150.
- FIG. 8 shows a sectional view through a development of the arrangement 10 shown in FIGS. 1 and 2, which is produced by means of the method described in FIG.
- the assembly 10 differs from the effect to the embodiment shown in Figu ⁇ ren 1 and 2, assembly 10, the housing 15 comprises a material which is designed to be opaque and black.
- the scattering particles 140 have a black color. This is achieved in particular in that the scattering particles 140 made of carbon black are formed as material.
- the centrifugal force F z or the gravitational force F G to the scattering particles 140, a layer-like configuration of the first concentration region 150 on the upper side 75, 105 of the carrier 40 is ensured.
- a radiation of light is ensured via the side surfaces 80, 85 of the optoelectronic semiconductor component 55.
- an increase in contrast of the arrangement 10 is achieved.
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Abstract
L'invention concerne un procédé et un dispositif. Un composant semi-conducteur optoélectronique est fourni sur un support. Une première couche composée d'un matériau de matrice et de particules de diffraction est appliquée sur une face supérieure du support. Une force centrifuge ou une gravité est exercée sur le dispositif de telle sorte que les particules de diffraction dans la première couche sont au moins partiellement déplacées en direction du support et une augmentation de la concentration des particules de diffraction est obtenue dans la première couche à proximité du support.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102015109324.3 | 2015-06-11 | ||
| DE102015109324.3A DE102015109324A1 (de) | 2015-06-11 | 2015-06-11 | Verfahren und Anordnung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2016198577A1 true WO2016198577A1 (fr) | 2016-12-15 |
Family
ID=56119491
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/EP2016/063263 Ceased WO2016198577A1 (fr) | 2015-06-11 | 2016-06-10 | Composant semi-conducteur optoélectronique et son procédé de fabrication |
Country Status (2)
| Country | Link |
|---|---|
| DE (1) | DE102015109324A1 (fr) |
| WO (1) | WO2016198577A1 (fr) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE202016104778U1 (de) | 2016-08-31 | 2017-12-04 | Tridonic Jennersdorf Gmbh | LED Leuchteinheit mit mehrphasiger Schutzschicht |
| DE112018004215B4 (de) * | 2017-08-18 | 2024-11-21 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Herstellung einer Halbleitervorrichtung und Halbleitervorrichtung |
| DE102017130476A1 (de) * | 2017-12-19 | 2019-06-19 | Osram Opto Semiconductors Gmbh | Optoelektronisches bauelement und verfahren zum herstellen eines optoelektronischen bauelements |
| JP7534210B2 (ja) * | 2020-12-22 | 2024-08-14 | サンコール株式会社 | 紫外線ledユニット |
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| WO2009031084A1 (fr) * | 2007-09-04 | 2009-03-12 | Koninklijke Philips Electronics N.V. | Dispositif d'émission de lumière |
| DE102010027253A1 (de) * | 2010-07-15 | 2012-01-19 | Osram Opto Semiconductors Gmbh | Optoelektronisches Halbleiterbauteil |
| DE102012206646A1 (de) * | 2012-04-23 | 2013-10-24 | Osram Gmbh | Leuchtvorrichtung mit LED-Chip und Vergussmasse |
| DE102013207579A1 (de) * | 2012-04-30 | 2013-10-31 | Tridonic Jennersdorf Gmbh | LED-Modul mit hoher Lichtstromdichte |
| US20130329429A1 (en) * | 2012-06-11 | 2013-12-12 | Cree, Inc. | Emitter package with integrated mixing chamber |
| DE102013222702A1 (de) * | 2013-11-08 | 2015-05-13 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement, optoelektronische Anordnung, Verfahren zum Herstellen eines optischen Elements und Verfahren zum Herstellen eines optoelektronischen Bauelements |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002043625A (ja) * | 2000-07-19 | 2002-02-08 | Koha Co Ltd | Led装置 |
| DE10229067B4 (de) * | 2002-06-28 | 2007-08-16 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement und Verfahren zu dessen Herstellung |
| DE102006059994A1 (de) * | 2006-12-19 | 2008-06-26 | Osram Opto Semiconductors Gmbh | Optoelektronisches Halbleiterbauelement |
| DE102010003321A1 (de) * | 2010-03-26 | 2011-09-29 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement |
| EP3716331B1 (fr) * | 2010-12-28 | 2023-06-28 | Nichia Corporation | Dispositif électroluminescent |
| DE102012203180A1 (de) * | 2012-03-01 | 2013-09-05 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement und Verfahren zum Herstellen eines optoelektronischen Bauelements |
| DE102014108377A1 (de) * | 2014-06-13 | 2015-12-17 | Osram Opto Semiconductors Gmbh | Verfahren zum Herstellen eines optoelektronischen Bauelements und optoelektronisches Bauelement |
| DE102014114914A1 (de) * | 2014-10-14 | 2016-04-14 | Osram Opto Semiconductors Gmbh | Herstellung eines optoelektronischen Bauelements |
-
2015
- 2015-06-11 DE DE102015109324.3A patent/DE102015109324A1/de not_active Withdrawn
-
2016
- 2016-06-10 WO PCT/EP2016/063263 patent/WO2016198577A1/fr not_active Ceased
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009031084A1 (fr) * | 2007-09-04 | 2009-03-12 | Koninklijke Philips Electronics N.V. | Dispositif d'émission de lumière |
| DE102010027253A1 (de) * | 2010-07-15 | 2012-01-19 | Osram Opto Semiconductors Gmbh | Optoelektronisches Halbleiterbauteil |
| DE102012206646A1 (de) * | 2012-04-23 | 2013-10-24 | Osram Gmbh | Leuchtvorrichtung mit LED-Chip und Vergussmasse |
| DE102013207579A1 (de) * | 2012-04-30 | 2013-10-31 | Tridonic Jennersdorf Gmbh | LED-Modul mit hoher Lichtstromdichte |
| US20130329429A1 (en) * | 2012-06-11 | 2013-12-12 | Cree, Inc. | Emitter package with integrated mixing chamber |
| DE102013222702A1 (de) * | 2013-11-08 | 2015-05-13 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement, optoelektronische Anordnung, Verfahren zum Herstellen eines optischen Elements und Verfahren zum Herstellen eines optoelektronischen Bauelements |
Also Published As
| Publication number | Publication date |
|---|---|
| DE102015109324A1 (de) | 2016-12-15 |
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