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WO2016185559A1 - Carte de circuit imprimé - Google Patents

Carte de circuit imprimé Download PDF

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Publication number
WO2016185559A1
WO2016185559A1 PCT/JP2015/064316 JP2015064316W WO2016185559A1 WO 2016185559 A1 WO2016185559 A1 WO 2016185559A1 JP 2015064316 W JP2015064316 W JP 2015064316W WO 2016185559 A1 WO2016185559 A1 WO 2016185559A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrode lands
board
electrode
land
parent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2015/064316
Other languages
English (en)
Japanese (ja)
Inventor
佳郎 西中
亮平 川端
裕一郎 財部
佐々木　俊介
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to PCT/JP2015/064316 priority Critical patent/WO2016185559A1/fr
Publication of WO2016185559A1 publication Critical patent/WO2016185559A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits

Definitions

  • the present invention relates to a printed wiring board formed by joining at least two substrates with solder.
  • a conventional printed wiring board in which a slit-shaped slit hole is provided in a parent board, and an insertion end portion of a child board is inserted into the slit hole from one surface side of the parent board and combined.
  • electrode lands On the above-described parent substrate, electrode lands whose one ends are opposed to each other on the other side of the slit hole in the longitudinal direction are arranged.
  • electrode lands facing each other with the insertion end portion interposed are arranged.
  • the slit holes provided in the parent substrate for example, a first slit width portion for electrically connecting to the child substrate and a second slit width for holding the child substrate substantially perpendicular to the parent substrate.
  • the first slit width is larger than the second slit width (for example, see Patent Document 1).
  • electrode lands are arranged in a horizontal row at predetermined intervals on both surfaces of the insertion end portion of the sub board, and the electrodes of the main board that are solder-connected to the electrode lands of the sub board that require solder connection It is proposed that lands are arranged on both side edges of the slit hole on the main board, and solder relief parts are formed on both side edges of the slit hole corresponding to electrode lands that do not require solder connection among the electrode lands on the sub board. (For example, refer to Patent Document 2).
  • the pitch between adjacent electrode lands should be minimized and the land width of the electrode lands should be minimized. It is required to make it smaller.
  • soldering the electrode land of the parent board and the electrode land of the opposite child board with the electrode lands having a narrow pitch that is, when the board is automatically conveyed by the automatic solder flow device and dipped in the molten solder, it is adjacent A so-called solder bridge is generated in which the electrode lands to be short-circuited with each other by solder.
  • the land width of the electrode land is reduced, the amount of solder to be bonded to the electrode land is reduced, so that the solder of the electrode land on the parent board side and the solder of the electrode land on the child board side are separated, so-called solder unattached There is a problem that occurs.
  • Patent Document 1 a first slit width part for electrical connection with the sub board and a second slit width part for holding the sub board substantially perpendicular to the parent board are provided. Therefore, in Patent Document 2, solder relief parts for preventing solder bridges are provided at both side edges of the slit holes corresponding to electrode lands that do not require solder connection among the electrode lands on the child board side. Therefore, in any case, there is a restriction on the number of electrode lands that require electrical connection, which is an obstacle to maximizing the number of electrode lands.
  • the present invention has been made in order to solve the above-described problems, and can prevent the occurrence of solder bridges and solder unattachment, and can prevent an electrode on a child board facing an electrode land on a parent board that requires electrical bonding.
  • the purpose is to obtain a printed wiring board that can arrange the land as much as possible.
  • the printed wiring board according to the present invention has a master board having a slit hole and an insertion part on one side, and the insertion part is inserted into the slit hole from one side of both surfaces of the parent board and combined with the parent board.
  • a plurality of first electrode lands arranged at equal intervals along both side edges in the longitudinal direction of the slit hole, and the other substrate side of the parent substrate,
  • a plurality of second electrode lands disposed on both sides at the same interval as the plurality of first electrode lands, and a plurality of first electrode lands, and a plurality of second electrode lands and gaps between adjacent first electrode lands.
  • the gap between the second electrode lands adjacent to each other is set to a minimum of 0.5 mm, and the land length in the direction perpendicular to the slit holes of the plurality of first electrode lands and the insertion portion of the sub board are inserted into the slit holes of the parent board.
  • the gap between the first electrode lands adjacent to each other in the plurality of first electrode lands and the gap between the second electrode lands adjacent to each other in the plurality of second electrode lands are set to 0.5 mm.
  • the land length of the land and the protruding land length of the second electrode land are set so that the dimensional ratio is 0.8 to 1.0.
  • the gap between the first electrode lands and the gap between the second electrode lands are initially set to 0.5 mm. Therefore, even in the soldering by the automatic soldering dipping device, the gap between the first electrode lands and the second electrode lands. It is possible to prevent solder bridges that are likely to occur.
  • the land length of the first electrode land and the protruding land length of the second electrode land are set so as to have a dimensional ratio of 0.8 to 1.0, it is possible to prevent solder non-adhesion. Furthermore, since the solder bridge and the solder non-attachment can be prevented, the first electrode land and the second electrode land can be formed on the parent substrate and the child substrate without being restricted by the number of the first electrode lands and the second electrode lands. It can be arranged to the maximum.
  • FIG. 4 is a data diagram showing solder jointability between the parent substrate and the child substrate in FIG. 3.
  • the fragmentary sectional view which shows the protrusion insertion length of the sub-board
  • FIG. 1 is a plan view showing an arrangement example of electrode lands at wiring pattern end portions of a mother board and a child board in the printed wiring board according to the embodiment of the present invention
  • FIG. FIG. 3 is an enlarged partial cross-sectional view showing soldering of the electrode lands of the mother board and the child board in FIG.
  • the printed wiring board according to the present embodiment is used for, for example, an outdoor unit and an indoor unit of an air conditioner, and includes a parent substrate 1 and a child substrate 2 that is inserted into the parent substrate 1 and combined.
  • the sub board 2 is, for example, a two-layer board in which wiring patterns are provided on both sides of the board.
  • the sub-board 2 is a two-layer board, but may be a multi-layer board in which a plurality of boards are stacked.
  • the parent substrate 1 is a substrate having a thickness of 1.6 mm, for example, and has slit-shaped slit holes 3 into which the child substrate 2 is inserted from one side as shown in FIGS. 1 and 2.
  • a plurality of first electrode lands 5 are arranged on the parent substrate 1 at equal intervals along both side edges in the longitudinal direction of the slit hole 3 on the other surface side of the parent substrate 1.
  • one slit hole 3 is provided in the parent substrate 1
  • two or more slit holes 3 may be provided.
  • the sub board 2 is prepared according to the number of the slit holes 3.
  • the plurality of first electrode lands 5 are provided at the end of the wiring pattern of the parent substrate 1. As shown in FIG. 1, the land width of the first electrode land 5 is A, and the slit holes 3 of the first electrode land 5 It is formed in a quadrilateral with C as the land length in the orthogonal direction.
  • the plurality of first electrode lands 5 are arranged at an arrangement interval B longer than the land width A.
  • one surface of the parent substrate 1 is referred to as a front surface, and the other surface is referred to as a back surface.
  • the arrangement interval B is referred to as pitch B.
  • the child board 2 is a board having a thickness of 1.6 mm, similar to the parent board 1, and is provided with an insertion portion 2a that protrudes from one of the long sides.
  • the back surface of the plurality of second electrode lands 4 is arranged on both surfaces of the insertion portion 2a so as to face each other.
  • Each 2nd electrode land 4 is provided in the edge part of the wiring pattern of the sub-substrate 2, and is formed long in the protrusion direction of the insertion part 2a.
  • the insertion part 2a protruded from one side of the long side among the four sides of the child substrate 2, one side of the long side itself was inserted into the insertion part 2a. It is good.
  • the land widths of the second electrode lands 4 are the same as the land width A of the first electrode lands 5 of the parent substrate 1, and are arranged at equal intervals with the same pitch B as the first electrode lands 5. With this pitch B, when the insertion portion 2a is inserted into the slit hole 3, the second electrode lands 4 arranged on both sides of the insertion portion 2a are respectively arranged on both side edges of the slit hole 3. It is interposed between one electrode land 5.
  • FIG. 3 is a partial cross-sectional view showing enlarged soldering of the electrode lands of the mother board and the child board in FIG. 2
  • FIG. 4 is a data diagram showing solderability between the mother board and the child board in FIG.
  • the numerical values shown in FIG. 4 are based on the experimental results, and are the land width A, the pitch B of the first and second electrode lands 5, 4, and the land length of the first and second electrode lands 5, 4. It is a confirmation result of the solderability by the dimensional ratio of C and protruding land length D.
  • the protruding land length D is the length of the second electrode land 4 protruding from the back surface of the parent substrate 1 when the insertion portion 2a of the child substrate 2 is inserted into the slit hole 3 of the parent substrate 1.
  • each of the second electrode lands 4 disposed opposite to both surfaces of the insertion portion 2 a is in a state of being interposed between the first electrode lands 5 disposed on both side edges of the slit hole 3.
  • the back surface of the mother board 1 is dipped in molten solder, and the second electrode lands 4 arranged on both surfaces of the insertion part 2a of the child board 2 and the first electrodes arranged on both side edges of the slit hole 3 are used.
  • the electrode land 5 is joined to the solder 6.
  • solder 6 used for the printed wiring board By the way, in recent years, lead-free solder containing no lead has become mainstream as the solder 6 used for the printed wiring board.
  • the melting point is generally as high as about 217 ° C.
  • the working temperature during solder dipping is generally about 250 ° C., due to the heat-resistant temperature characteristics of the electronic components mounted on the printed wiring board. It has become. That is, the working temperature and the solidification temperature of the solder are close.
  • solder bridge is likely to occur between the adjacent second electrode lands 4 (or the first electrode lands 5).
  • solder 6 is generally poorly spread on the first electrode land 5 and the second electrode land 4 using a copper material. For this reason, solder is not easily attached to the first electrode land 5 and the second electrode land 4.
  • the land width A of the first electrode land 5 and the second electrode land 4 is set to a minimum of 1.5 mm, and the adjacent first electrode lands 5 and the second electrode Each pitch B between the lands 4 is set to a minimum of 2.0 mm.
  • the projecting land length D of the land 4 is set so that its dimensional ratio is 0.8 to 1.0.
  • the gap between the first electrode lands adjacent to each other of the first electrode lands 5 and the second electrode lands adjacent to each other of the second electrode lands 4 can be obtained.
  • the gap between them is 0.5 mm.
  • the land width A of the first electrode land 5 and the second electrode land 4 is 2.04 mm
  • the pitch B between the adjacent first electrode lands 5 and the second electrode lands 4 is
  • the land length C of the first electrode land 5 of the parent substrate 1 and the protruding land length D of the second electrode land 4 of the child substrate 2 protruding from the slit hole 3 of the parent substrate 1 are 2.54 mm, respectively.
  • the dimensional ratio is set to 0.8.
  • each land width A of the plurality of first electrode lands 5 and the plurality of second electrode lands 4 is set to a minimum of 1.5 mm, and the pitch B (arrangement) of the plurality of first electrode lands 5 is arranged.
  • the pitch B (arrangement interval) of the plurality of second electrode lands 4 are set to a minimum of 2.0 mm, and the land length C of the plurality of first electrode lands 5 and the protrusion of the plurality of second electrode lands 4 are both set.
  • the land length C is set such that the dimensional ratio is 0.8 to 1.0.
  • the first electrode land 5 and the second electrode land 5 are not restricted by the number of the first electrode lands 5 and the second electrode lands 4 on the parent substrate 1 and the child substrate 2, respectively.
  • the 2nd electrode land 4 can be arrange
  • the land length C of the first electrode land 5 and the protruding land length C of the second electrode land 4 are set so that the dimensional ratio is 0.8 to 1.0.
  • the protrusion insertion length E of the insertion portion 2a may be set to 3.0 mm or less.
  • FIG. 5 is a partial cross-sectional view showing the protrusion insertion length of the sub board protruding from the main board in FIG. As shown in the drawing, by setting the protrusion insertion length E of the insertion portion 2a protruding from the slit hole 3 on the back surface of the mother board 1 to 3.0 mm or less, the first electrode land 5 of the mother board 1 is reached. It is possible to further prevent solder from being attached.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

La présente invention comprend : une carte parent (1) qui comporte un trou en fente (3) ; une carte enfant (2) qui comporte une section d'insertion (2a) sur un de ses bords et qui est combinée à la carte parent (1) en insérant la partie d'insertion (2a) dans le trou en fente (3) depuis une surface avant de la carte parent (1) ; une pluralité de premières pastilles d'électrodes (5) qui sont disposées, avec un espacement uniforme entre elles, sur une surface arrière de la carte parent (1) le long de deux bords latéraux du trou en fente (3) dans sa direction longitudinale ; et une pluralité de deuxièmes pastilles d'électrodes (4) qui sont disposées, avec le même espacement entre elles que la pluralité de premières pastilles d'électrodes (5), sur les deux surfaces de la seconde d'insertion (2a) de la carte enfant (2). Une largeur de pastille de la pluralité de premières pastilles d'électrodes (5) et de la pluralité de deuxièmes pastilles d'électrodes (4) est définie à 1,5 mm au minimum. L'espacement de disposition de la pluralité de premières pastilles d'électrodes (5) et l'espacement de disposition de la pluralité de deuxièmes pastilles d'électrodes (4) sont tous deux définis à 2,0 mm au minimum. Un ratio dimensionnel entre une longueur de pastille de la pluralité de premières pastilles d'électrodes (5) et une longueur de pastille en saillie de la pluralité de deuxièmes pastilles d'électrodes (4) est compris entre 0,8 et 1,0.
PCT/JP2015/064316 2015-05-19 2015-05-19 Carte de circuit imprimé Ceased WO2016185559A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2015/064316 WO2016185559A1 (fr) 2015-05-19 2015-05-19 Carte de circuit imprimé

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2015/064316 WO2016185559A1 (fr) 2015-05-19 2015-05-19 Carte de circuit imprimé

Publications (1)

Publication Number Publication Date
WO2016185559A1 true WO2016185559A1 (fr) 2016-11-24

Family

ID=57319714

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2015/064316 Ceased WO2016185559A1 (fr) 2015-05-19 2015-05-19 Carte de circuit imprimé

Country Status (1)

Country Link
WO (1) WO2016185559A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018159004A1 (fr) * 2017-03-02 2018-09-07 三菱電機株式会社 Carte de circuit imprimé
JP7110610B2 (ja) 2018-02-06 2022-08-02 三菱電機株式会社 プリント回路板

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3110160U (ja) * 2005-02-02 2005-06-16 船井電機株式会社 プリント基板の接続構造
JP3111232U (ja) * 2005-03-14 2005-07-14 船井電機株式会社 基板実装構造
JP2011003621A (ja) * 2009-06-17 2011-01-06 Sanyo Electric Co Ltd 基板の組付け構造およびそれを備えるピックアップ装置ならびにディスク装置
JP2011103378A (ja) * 2009-11-11 2011-05-26 Sharp Corp 基板接続構造

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3110160U (ja) * 2005-02-02 2005-06-16 船井電機株式会社 プリント基板の接続構造
JP3111232U (ja) * 2005-03-14 2005-07-14 船井電機株式会社 基板実装構造
JP2011003621A (ja) * 2009-06-17 2011-01-06 Sanyo Electric Co Ltd 基板の組付け構造およびそれを備えるピックアップ装置ならびにディスク装置
JP2011103378A (ja) * 2009-11-11 2011-05-26 Sharp Corp 基板接続構造

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018159004A1 (fr) * 2017-03-02 2018-09-07 三菱電機株式会社 Carte de circuit imprimé
CN110326371A (zh) * 2017-03-02 2019-10-11 三菱电机株式会社 印刷布线板
JPWO2018159004A1 (ja) * 2017-03-02 2019-11-07 三菱電機株式会社 プリント配線板
EP3592120A4 (fr) * 2017-03-02 2020-03-11 Mitsubishi Electric Corporation Carte de circuit imprimé
US10757807B2 (en) 2017-03-02 2020-08-25 Mitsubishi Electric Corporation Printed wiring board and method for manufacturing printed wiring board
US11089679B2 (en) 2017-03-02 2021-08-10 Mitsubishi Electric Corporation Printed wiring board and method for manufacturing printed wiring board
CN110326371B (zh) * 2017-03-02 2022-12-06 三菱电机株式会社 印刷布线板以及印刷布线板的制造方法
JP7110610B2 (ja) 2018-02-06 2022-08-02 三菱電機株式会社 プリント回路板

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