WO2016030571A1

WO2016030571A1 - Wirelessly determining an orientation of a device

Info

Publication number: WO2016030571A1
Application number: PCT/FI2014/050662
Authority: WO
Inventors: Jukka Pekka Reunamäki; Juha Salokannel; Arto Tapio Palin
Original assignee: Nokia Technologies Oy
Current assignee: Nokia Technologies Oy
Priority date: 2014-08-29
Filing date: 2014-08-29
Publication date: 2016-03-03
Anticipated expiration: 2017-02-28

Abstract

Wireless communication between first and second devices (1, 2) is performed using Bluetooth packets for example, in which the repetition of bits for forward error correction in the Bluetooth packet is utilised to estimate the orientation of the devices relative to one another. One of the devices (1) is provided with an antenna (6) including an array of antenna elements (7), together with a receiver arrangement with an angle of arrival (AoA) processor (10) to determine the orientation of the first device relative to the second device.

Description

Wirelessly determining an orientation of a device Field

This specification relates generally to wirelessly determining an orientation of a device. Background

Various systems are known for wirelessly communicating between electronic devices, for example to provide a local, direct, ad-hoc connection between devices.

Summary

From one aspect, a method is described that comprises: transmitting at least one radio frequency packet wirelessly from a first device to second device using antennas on each of the devices, at least one of the antennas including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device, and processing at the second device, samples of said portion either transmitted from or received by the plurality of antenna elements to determine the orientation of the first device relative to the second device.

From another aspect the method comprises receiving at a second device at least one radio frequency packet transmitted wirelessly thereto a first device using an antenna on the second device including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device; and processing at the second device a sequence of samples received by the plurality antenna elements of said portion of the packet to determine the orientation of the first device relative to the second device.

From a further aspect the method provides receiving at a second device at least one radio frequency packet transmitted wirelessly thereto a by first device using an antenna on the first device including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device, which is switched sequentially between the antenna elements, and processing at the second device samples of the said portion transmitted by the plurality antenna elements to determine the orientation of the first device relative to the second device. The portion with the repeated bit pattern may comprise a header.

Also, the repeated bit pattern may comprise a packet for conveying voice data, for example a SCO packet with a HVi slot with forward error correction bit repetition.

The portion of the bit pattern that is repeated may provide 1/3 rate forward error correction.

The packet may comprise a Bluetooth packet, such as a basic rate Bluetooth packet or an enhanced rate data Bluetooth packet.

Also described herein is a computer-readable code which when executed by a processor, causes the processor to perform the aforesaid method.

Also described is an apparatus comprising: a transmitter arrangement configured to transmit at least one radio frequency packet wirelessly from a first device to second device using antennas on each of the devices, at least one of the antennas including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device, and a processor to process at the second device, samples of said portion either transmitted from or received by the plurality antenna elements to determine the orientation of the first device relative to the second device. The processor may perform angle of arrival processing or angle of departure processing.

From another aspect the apparatus may comprise: a receiver to receive at a second device least one radio frequency packet transmitted wirelessly thereto a first device using an antenna on the second device including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device; and a processor to process at the second device a sequence of samples received by the plurality antenna elements of said portion of the packet to determine the orientation of the first device relative to the second device.

From another aspect the apparatus may comprise: a receiver to receive at a second device least one radio frequency packet transmitted wirelessly thereto a by first device using an antenna on the first device including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device, which is switched between the antenna elements; and a processor to process at the second device samples of the said portion transmitted by the plurality antenna elements to determine the orientation of the first device relative to the second device. Brief description of the drawings

For a more complete understanding of example embodiments of the present invention, reference is now made to the following description taken in connection with the accompanying drawings in which:

Figure l is a schematic illustration of devices in a wireless network:

Figure 2 is schematic diagram illustrating wireless communication between two of the devices, in which their relative orientation is computed using an AoA estimator;

Figure 3 shows the AoA estimator of Figure 2 in more detail;

Figure 4 illustrates the bit configuration of a basic rate Bluetooth packet;

Figure 5 shows the fields in the header of the packet shown in Figure 3;

Figure 6 illustrates the 1/3 FEC bit pattern in portions of the Bluetooth packet;

Figure 7 is a schematic illustration of a signal switching process to be used in the device shown in Figure 2;

Figure 8 illustrates the fields of an enhanced data rate Bluetooth packet;

Figure 9 is schematic diagram illustrating wireless communication between two of the devices, in which their relative orientation is computed using an AoD estimator; and

Figure 10 shows a practical example of use of the system of Figure 1 for controlling wireless stereo speakers.

Detailed description of example embodiments

Referring to Figure 1, electronic devices 1, 2 and 3 are configured to communicate with one another wirelessly over short-range radio links 4, 5 of typically less than loom, typically of the order of io-20m. Conveniently, one of the devices may act as a master and the other devices may act as slaves, configured for example in a so-called piconet to share the same radio channel, or for broadcasting data from one of the devices to at least one of the others. In the example shown in Figure 1, the device 1 acts as a master and the devices 2 and 3 act as slaves. The devices 1, 2, 3 may comprise many different devices such as a mobile telephone, TV., wireless speakers or a locking system, in which the master device 1 can control the slaves 2, 3 individually. Conveniently, the radio links 4, 5 are provided by Bluetooth, which is a communication protocol intended to replace cables connecting portables and/or fixed electronic devices. Bluetooth operates in an unlicensed ISM band at 2.4GHz. A frequency hop transceiver is used to combat interference and fading. The links 4, 5 may be provided by Bluetooth Basic Rate / Enhanced Data Rate (BR/EDR) and Bluetooth LE (Low Energy). Bluetooth LE is a new wireless communication technology published by the Bluetooth SIG as a component of Bluetooth Core Specification Version 4.0. Bluetooth LE is a lower power, lower complexity, and lower cost wireless communication protocol, designed for lower data rate applications and shorter duty cycles. Inheriting the protocol stack and star topology of classical Bluetooth, Bluetooth LE redefines the physical layer specification, and involves many new features such as a very-low power idle mode, a simple device discovery, and short data packets. The use of Bluetooth LE may be particularly useful due to its relatively low energy consumption and because many mobile phones and other portable electronic devices are or will be capable of communicating using Bluetooth LE technology.

As will be described in more detail hereinafter, it can be desirable to determine the relative orientation of the devices 1, 2, 3 in the piconet in order to optimise communication between them. Referring to Figure 2, the device 1 may include an antenna 6 with an array of spaced antenna elements 7 that are sequentially connected by a RF, processor controlled switch 8 to a Bluetooth transceiver 9 so that signals from the antenna elements 7 are sequentially detected and fed to an angle of arrival (AoA) estimator 10 which may comprise a processor that compares the relative phase and amplitude of the signals received from the antenna elements so as to provide an estimate of the orientation direction of device 2 that transmitted an RF signal 11 to the device 1. The AoA estimator 10 can compute the angle Θ corresponding to the orientation of device 2 relative to device 1. By using a non-linear array of antenna elements, the orientation may be computed in terms of an azimuth and elevation angle. In order for the AoA estimator 10 to operate, the incoming transmission 11 should include a predetermined sequence of bits that is known to the estimator 10 so that it can compare the phase of signals received from the individual antenna elements 7 sequentially in order to determine the orientation. Referring to Figure 3, which shows the components of the device 1 in more detail, the antenna elements 7 are connected to switch 8, which is controllable by a controller 20 as described below. The switch 8 is controlled so that only one of the antenna elements 7 is connected to an amplifier 13 at a given time. The output of the amplifier 13 is received at a mixer arrangement 14. This is provided with in-phase (I) and quadrature (Q) signals by an arrangement of a local oscillator 15, which may be analogue or digital, and a 90⁰ phase shifter 16. A sampler 17 is configured to receive I and Q output signals from the mixer arrangement 14 and take digital samples of them. The sampler 17 may take any suitable form, for instance including two digital to analogue converter (DAC) channels, one for the I channel and one for the Q channel. The effect of the mixer arrangement 14 and the sampler 17 is to downconvert the received signals and to provide digital I and Q samples of the downmixed signals.

An output of the sampler 17 is provided to a signal strength measurement module 18 and an output former 19.

The controller 20 is configured to control the other components of the device 1 shown in Figure 3. The controller may take any suitable form. For instance, it may comprise processing circuitry 21, including one or more processors, and a storage device 22, comprising a single memory unit or a plurality of memory units. The storage device 22 may store computer program instructions 23 that, when loaded into processing circuitry 22, control the operation of device 1. The computer program instructions 23 may provide the logic and routines that enable the apparatus to perform the functionality described herein. The output former 19 may be comprised solely of the controller 21. The computer program instructions 23 may arrive at the device 1 via an electromagnetic carrier signal or be copied from a physical entity such as a computer program product, a memory device or a record medium such as a CD-ROM or DVD.

The processing circuitry 21 may be any type of processing circuitry. For example, the processing circuitry 21 may be a programmable processor that interprets computer program instructions 23 and processes data. The processing circuitry 21 may include plural programmable processors. Alternatively, the processing circuitry 21 may be, for example, programmable hardware with embedded firmware. The processing circuitry 21 may be a single integrated circuit or a set of integrated circuits (i.e. a chipset). The processing circuitry 21 may also be a hardwired, application-specific integrated circuit (ASIC). The processing circuitry may be termed processing means. The controller 20 controls the switch 8 to connect different one of the antenna elements 7 to the amplifier 13 in a sequence described in more detail hereinafter with reference to Figure 7 and the controller 20 receives the samples produced by the sampler 17, supplied thereto by the output former 19 together with the power measurement signals provided by the sampler 17. The program instructions 23 include an AoA algorithm and the processor 21 estimates the AoA angle Θ corresponding to the orientation of device 2 relative to device 1.

Referring to Figure 4, an example of the general format of a Bluetooth packet will now be described. Each packet starts with an access code 24, followed by a header 25, followed by a payload 26.

The access code 24 is typically 72 bits long and is used for synchronisation, DC offset compensation and identification. The access code typically consists of preamble, a sync word and a trailer. The access code 24 identifies all packets exchanged on the channel of the piconet, so that all packets sent in the same piconet are preceded by the same access code.

The header 25 is shown in more detail in Figure 5. The header 25 contains link control information and consists of six fields which will now be briefly described.

LT_ADDR 25-1 represents a member address and is used to distinguish between active members participating in the piconet i.e. devices 2, 3 shown in Figure 1. As previously mentioned, the devices 2, 3 are slaves connected to the master device 1, and to identify each slave separately, each slave is assigned a temporary 3-bit address to be used when it is active. Packets exchanged between the master and the slave all carry the LT_ADDR of the slave so that their respective LT_ADDR is used both for master-to-slave packets and slave-to-master packets. Any slaves that are disconnected will parked up give up their LT_ADDR and a new LT_ADDR is assigned when they re-enter the piconet.

Sixteen different types of packets can be distinguished by means of a 4-bit TYPE code 25- 2. The TYPE code 25-2 indicates whether the packet is being sent on a synchronous connection orientation (SCO) link or an asynchronous connection less (ACL) link between the devices. Typically, voice data is sent on a SCO link and data is usually sent on a ACL link. The TYPE code 25-2 also indicates how many slots the current packet will occupy, which allows non-addressed devices from refraining to listen to the channel for the duration of the remaining slots.

The type bits 25-2 are followed by a FLOW bit 25-3 which is used for control of the flow of packets over the ACL link. When the receiver buffer for an ACL link in the recipient device is full and not emptied, a stop indication (FLOW = o) is returned to stop the transmission of data temporarily. The stop signal is only used for ACL packets.

A one bit acknowledgement indication ARQN 25-4 is used to inform the transmitter e.g. master device 1, of a successful transfer of payload data 26. As described later, the payload data has an associated cyclic redundancy code (CRC) and on reception of the payload data, if the CRC validates the data, then ARNQ is set to a value ARNQ=i but otherwise is set so that ARNQ=o. The ARQN bit 25-4 is followed by a SEQN bit 25-5 that provides a sequential numbering scheme to order the data packet stream. For each new transmitted packet that contains data with an acceptable CRC, the SEQN bit 25-5 is inverted. This allows re-transmissions of data to be filtered out at the receiving devices e.g. devices 2 and 3 shown in Figure 1. By comparing the SEQN of consecutive packets, correctly received re-transmissions can be discarded.

The SEQN 25-5 is followed by a header-error-check (HEC) 25-6 to check the header integrity. The HEC consists of an 8-bit word generated by a polynomial. Overall, the header 25 shown in Figure 5 comprises 18 bits, which can be summarised as:

LT_ADDR: 3-bit logical transport address

TYPE: 4-bit type code

FLOW: l-bit flow control

ARQN: l-bit acknowledge indication

SEQN: l-bit sequence number

HEC: 8-bit header error check

The header 25 is encoded with a rate 1/3 forward error correction code (FEC), resulting in a 54-bit header bit sequence.

Referring again to Figure 4, the payload 26 may comprise synchronous voice data or asynchronous data for transmission on a SCO link or an ACL link. The SCO packets can include amongst other fields, a high quality voice field HVi which may comprise 10 bytes with a 1/3 rate FEC. The FEC repetition of individual bits bo-b2 of the header 25 is illustrated schematically in Figure 6, in which each of the bits bo, bi, b2 are transmitted three times in a respective sequence, to be followed by the next bit in the sequence. In accordance with a feature of the embodiments described herein, it has been appreciated that the sequence of bits which comprises the header 25 does not usually vary significantly and so can be used as a bit sequence for the AoA estimator 10 shown in Figure 2. For example, under conditions of good radio transmission and reception, for SCO packet headers, the only unknowns are AQRN (1 bit) and HEC (8 bits) which in turn depends on the value of AQRN. Thus, only 9 bits in the 54 bit header have uncertain values for successive packet headers and the likelihood of change from packet to packet has a low probability for synchronous SCO voice packets under good transmission conditions.

As previously explained, the output of the antenna elements 7 is switched cyclically by RF switch 8 and after detection by Bluetooth transceiver 9, the AoA estimator 10 takes I and Q samples to detect phase and amplitude values for the outputs from the antenna elements 7, which are used to produce an estimation of the angle of arrival (Θ). The cyclic switching may comprise a constant switching pattern from antenna element to antenna element or the switching pattern may be changed from time to time, even packet by packet.

Referring to Figure 7, which shows the bit repetition pattern for bits bo-b3 in the FEC bit sequence, each bit is repeated 3 times. A period corresponding to two of the repeated bits may be used by the RF switch 8 shown in Figure 2, for switching between the antenna elements 7 and the third bit of the repeated sequence may be used by the Bluetooth transceiver 9 and AoA estimator 10 for providing the I and Q samples of the received signal for use by the AoA algorithm run by the estimator 10.

In more detail, in period ti, the initial bit of the header is detected and in period t₂, the RF switch 8 is switched to the next antenna element 7 so that during period t₃, the next bit of the sequence bi can be detected and processed by the AoA estimator 10. The process repeats with the antenna elements being switched during period t₄ so that during period t₅, the next occurrence of b2 can be processed by the AoA estimator 10. During period te and t₇, the antenna element 7 is switched and the AoA estimator 10 obtains data for bit b3. The estimator 10 can then compute the angle of arrival Θ using the AoA estimation algorithm. The described arrangement has the advantage that conventional or legacy Bluetooth packets can be used by the AoA estimator 10 so that the device 2 shown in Figure 2 can be a legacy device that includes a conventional Bluetooth transceiver capable of transmitting conventional Bluetooth packets, which enables the orientation of the device 2 relative to device 1 to be computed without the requirement of special, new equipment to be installed in the device 2. The same is true for device 3.

The described approach can also be used with other parts of a Bluetooth packet which includes FEC coding. The payload 26 shown in Figure 4 may include SCO packets when voice data is being transmitted and, for example the high quality voice slot HVi is provided with 1/3 rate FEC, with 10 data bytes. Thus, the device 1 shown in Figure 2 may be operated so that the RF switch 8 switches according to the methodology described with reference to Figure 7, for the FEC coding of the HVi slot of SCO packets in the payload 26. Also, it will be appreciated that the approach described with reference to Figure 7 may be used on other portions of the Bluetooth packet stream for which FEC is provided.

Also the described approach can be used with wireless communication protocols other than Bluetooth, which use FEC in at least part of their bit patterns. The description given so far is in relation to a basic data rate Bluetooth packet but this approach can also be used for Bluetooth enhanced data rate packets, for example as shown in Figure 8. The enhanced data rate packet includes an access code 24, header 25 and payload 26 in a similar manner to the basic rate packet shown in Figure 3, and

additionally includes guard field 27, sync field 28 and trailer 29. The structure of the header 25 and payload 26 is generally similar to the bit structure of the basic Bluetooth packet described with reference to Figure 4 and so described system can be used for enhanced rate Bluetooth packets as well.

The angle of orientation of the devices in the piconet can also be determined by using angle of departure (AoD) techniques as shown in Figure 9. In this example, the slave device 2 is provided with the multiple element antenna 6 and RF switch 8, so that individual antenna elements 7 are switched sequentially as described previously, making use of the FEC coding as previously described, but for the transmission of the signals rather than their reception as shown in Figure 2. To this end, the device 2 is provided with a controller 30 with a processor 31, control programs 32 and storage 33 to control the device 2, including the switching of the antenna elements 7. Also the device 1 is provided with a controller 34 with associated control programs 35 and storage 36 which controls operation of the device 2 and runs an AoD program in a similar fashion to the running of the AoA program described with reference to Figure 3, so as to estimate the orientation angle Θ. Figure 10 illustrates a schematic example of use of the system, in which a mobile phone or tablet or like device 38 wirelessly transmits information in SCO packets to stereo speakers 39, 40 through left (L) and right (R) channels. For example, the device 38 may stream music from a remote source or music stored in its internal memory. The speaker 39 is provided with a master device 1 as previously described with reference to Figure 2, whereas speaker 40 is provided with a slave device 2 as previously described. Also, the phone or tablet 38 acts as slave 3.

As previously described, the master 1 determines the relative orientation of the slaves 2, 3 so that the positioning information can be conveyed to the phone or tablet 38 over the Bluetooth link 5.

The music can then be streamed wirelessly from the phone or tablet 38 over Bluetooth links 5, 41, in which the amplitude/L, R channel balance can be optimised, taking into account the location of the L and R speakers 39,40 relative to the phone or tablet 38.

The packets used for AoA estimation do not impact upon the quality of the music provided by the speakers 39,40.

In the foregoing, it will be understood that the described processors may be any suitable type of processing circuitry. For example, the processing circuitry may be a

programmable processor that interprets computer program instructions and processes data. The processing circuitry may include plural programmable processors.

Alternatively, the processing circuitry may be, for example, programmable hardware with embedded firmware. The or each processing circuitry or processor may be termed processing means.

The term 'memory' when used in this specification is intended to relate primarily to memory comprising both non-volatile memory and volatile memory unless the context implies otherwise, although the term may also cover one or more volatile memories only, one or more non-volatile memories only, or one or more volatile memories and one or more non-volatile memories. Examples of volatile memory include RAM, DRAM, SDRAM etc. Examples of non-volatile memory include ROM, PROM, EEPROM, flash memory, optical storage, magnetic storage, etc.

Reference to "computer-readable storage medium", "computer program product", "tangibly embodied computer program" etc, or a "processor" or "processing circuit" etc. should be understood to encompass not only computers having differing architectures such as single/multi processor architectures and sequencers/parallel architectures, but also specialised circuits such as field programmable gate arrays FPGA, application specify circuits ASIC, signal processing devices and other devices. References to computer program, instructions, code etc. should be understood to express software for a programmable processor firmware such as the programmable content of a hardware device as instructions for a processor or configured or configuration settings for a fixed function device, gate array, programmable logic device, etc.

It should be realised that the foregoing embodiments are not to be construed as limiting and that other variations and modifications will be evident to those skilled in the art. Moreover, the disclosure of the present application should be understood to include any novel features or any novel combination of features either explicitly or implicitly disclosed herein or in any generalisation thereof and during prosecution of the present application or of any application derived therefrom, new claims may be formulated to cover any such features and/or combination of such features.

Claims

1. A method comprising:

transmitting at least one radio frequency packet wirelessly from a first device to second device using antennas on each of the devices, at least one of the antennas including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device, and

processing at the second device, samples of said portion either transmitted from or received by the plurality antenna elements to determine the orientation of the first device relative to the second device.

2. A method comprising:

receiving at a second device least one radio frequency packet transmitted wirelessly thereto a first device using an antenna on the second device including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device; and

processing at the second device a sequence of samples received by the plurality antenna elements of said portion of the packet to determine the orientation of the first device relative to the second device.

3. A method comprising:

receiving at a second device least one radio frequency packet transmitted wirelessly thereto a by first device using an antenna on the first device including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device, which is switched between the antenna elements, and

processing at the second device samples of the said portion transmitted by the plurality antenna elements to determine the orientation of the first device relative to the second device.

4. The method of claim 1, 2 or 3 wherein said portion comprises a header.

5. The method of claim 1, 2 or 3 wherein said portion comprises a packet for conveying voice data.

6. The method of claim 5 wherein the packet comprises a SCO packet with a HVi slot with FEC bit repetition.

7. The method of any preceding claim wherein the portion of the bit pattern that is repeated provides 1/3 rate FEC.

8. The method of claim 7 wherein for a repetition of a bit in the sequence, a period corresponding to two of the repetitions of the bit is used for switching between individual ones of the antenna elements, and a period corresponding to one of the repetitions used for providing the sample from an individual one of the antenna elements.

9. The method of any preceding claim wherein the packet comprises a Bluetooth packet.

10. The method of claim 8 wherein the packet comprises a basic Bluetooth packet or an enhanced data rate Bluetooth packet.

11. Computer-readable code which when executed by a processor, causes the processor to perform the method claimed in ay one of claims 1 to 9.

12. At least one non-transitory computer readable memory medium having computer readable code stored therein, the computer readable code being configured to cause a processor to:

transmit at least one radio frequency packet wirelessly from a first device to second device using antennas on each of the devices, at least one of the antennas including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device, and

process at the second device, samples of said portion either transmitted from or received by the plurality antenna elements to determine the orientation of the first device relative to the second device.

13. At least one non-transitory computer readable memory medium having computer readable code stored therein, the computer readable code being configured to cause a processor to:

receive at a second device least one radio frequency packet transmitted wirelessly thereto a first device using an antenna on the second device including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device; and

process at the second device a sequence of samples received by the plurality antenna elements of said portion of the packet to determine the orientation of the first device relative to the second device.

14. At least one non-transitory computer readable memory medium having computer readable code stored therein, the computer readable code being configured to cause a processor to:

receive at a second device least one radio frequency packet transmitted wirelessly thereto a by first device using an antenna on the first device including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device, which is switched between the antenna elements, and

process at the second device samples of the said portion transmitted by the plurality antenna elements to determine the orientation of the first device relative to the second device.

15. Apparatus comprising:

a transmitter arrangement configured to transmit at least one radio frequency packet wirelessly from a first device to second device using antennas on each of the devices, at least one of the antennas including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device, and

a processor to process at the second device, samples of said portion either transmitted from or received by the plurality antenna elements to determine the orientation of the first device relative to the second device.

16. The apparatus of claim 14 wherein the processor is configured to perform AoA or AoD processing.

17. Apparatus comprising:

a receiver to receive at a second device least one radio frequency packet transmitted wirelessly thereto a first device using an antenna on the second device including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device; and

a processor to process at the second device a sequence of samples received by the plurality antenna elements of said portion of the packet to determine the orientation of the first device relative to the second device.

18. Apparatus comprising: a receiver to receive at a second device least one radio frequency packet

transmitted wirelessly thereto a by first device using an antenna on the first device including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device, which is switched sequentially between the antenna elements; and

a processor to process at the second device samples of the said portion transmitted by the plurality antenna elements to determine the orientation of the first device relative to the second device.

19. The apparatus of any one of claims 15 to 19 wherein said portion comprises a header.

20. The apparatus of any one of claims 15 to 19 wherein said portion comprises a packet for conveying voice data.

21. The apparatus of claim 20 wherein the packet comprises a SCO packet with a HVi slot with FEC bit repetition.

22. The apparatus of any one of claims 15 to 21 wherein the portion of the bit pattern that is repeated provides 1/3 rate FEC.

23. The apparatus of claim 22 wherein for a repetition of a bit in the sequence, a period corresponding to two of the repetitions of each bit is used for switching between individual ones of the antenna elements, and a period corresponding to one of the repetitions used for providing the sample from an individual one of the antenna elements.

24. The apparatus of any one of claims 15 to 23 wherein the packet comprises a Bluetooth packet.

25. The apparatus of claim 24 wherein the packet comprises a basic Bluetooth packet or an enhanced data rate Bluetooth packet.

26. Apparatus comprising:

means for transmitting at least one radio frequency packet wirelessly from a first device to second device using antennas on each of the devices, at least one of the antennas including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device, and means for processing at the second device, samples of said portion either transmitted from or received by the plurality antenna elements to determine the orientation of the first device relative to the second device.

27. Apparatus comprising:

means for receiving at a second device least one radio frequency packet

transmitted wirelessly thereto a first device using an antenna on the second device including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device; and

means for processing at the second device a sequence of samples received by the plurality antenna elements of said portion of the packet to determine the orientation of the first device relative to the second device.

28. Apparatus comprising:

means for receiving at a second device least one radio frequency packet

transmitted wirelessly thereto a by first device using an antenna on the first device including an array of antenna elements, wherein the packet includes at least a portion with a bit pattern that is repeated to provide for forward error correction on reception by the second device, which is switched between the antenna elements, and

means for processing at the second device samples of the said portion transmitted by the plurality antenna elements to determine the orientation of the first device relative to the second device.