WO2015139206A1

WO2015139206A1 - Methods for 3d video coding

Info

Publication number: WO2015139206A1
Application number: PCT/CN2014/073617
Authority: WO
Inventors: Han HUANG; Kai Zhang; Jicheng An; Xianguo Zhang; Jian-Liang Lin
Original assignee: MediaTek Singapore Pte Ltd
Current assignee: MediaTek Singapore Pte Ltd
Priority date: 2014-03-18
Filing date: 2014-03-18
Publication date: 2015-09-24
Anticipated expiration: 2016-09-18

Abstract

Methods for motion parameter inheritance merging candidate in 3D video coding are disclosed. With the proposed method, the MCP block sizes in 3D-HEVC are aligned with HEVC specification and computational complexity of the merging candidate list construction is reduced.

Description

METHODS FOR 3D VIDEO CODING

FIELD OF INVENTION

The invention relates generally to video processing. In particular, the present invention relates to methods for 3D video coding.

BACKGROUND OF THE INVENTION

3D video coding (3DVC) is developed for encoding or decoding video data of multiple views simultaneously captured by several cameras. Since all cameras capture the same scene from different viewpoints, multi-view video data contains a large amount of inter-view redundancy. To exploit the inter-view redundancy, additional tools such as inter-view motion parameter prediction (IvMC), inter-view disparity compensation (IvDC), view synthesis prediction (VSP), and advanced residual prediction (ARP) [1] have been integrated to conventional 3D-HEVC (High Efficiency Video Coding) , MV-HEVC or 3D-AVC (Advanced Video Coding) codec. IvMC, IvDC, VSP and their variations are used to construct merging candidates in addition to the HEVC merging candidate list. To exploit the correlation between texture video and corresponding depth map, when coding the depth map in 3D-HEVC, motion parameter inheritance (MPI), also termed as texture merging candidate, is used to construct additional merging candidate.

For a current prediction unit (PU), a disparity vector (DV), such as the well-known neighboring block disparity vector (NBDV) or the depth-oriented NBDV (DoNBDV) is derived.

The basic concept of the inter-view motion parameter prediction (IvMC) in current 3D- HEVC is illustrated in Fig. 1.

First, a reference block determined by the derived DV is fetched from the already coded picture in the reference view.

Second, if this reference block is coded using motion compensated prediction (MCP), the associated motion parameters are used as candidate motion parameters for the current PU.

Finally, these motion parameters, either at sub-PU level or PU level, are added as an additional merging candidate of the current PU.

The basic concept of the VSP in current 3D-HEVC is illustrated in Fig. 2.

First, given the derived DV, a depth block is fetched from a reference view depth image and used as an estimator for the depth information of the current PU.

Second, the current processed PU is divided into multiple sub-PUs. The size of sub-PU can be 8x4 or 4x8, and is determined by the size of PU or the depth values in the 4 corners of the current processed PU's corresponding depth block.

Finally, for each sub-PU, its corresponding depth sub-block is used to derive a new DV for disparity compensation.

The VSP method can also be used as an additional merging candidate in current 3D-HEVC.

The basic concept of the MPI for depth coding in current 3D-HEVC is illustrated in Fig. 3. First, the collocated texture block is fetched from the corresponding texture picture.

Second, if the texture block is coded using MCP, the associated motion parameters are used as candidate motion parameters for the current depth block.

When coding the depth map, the MPI method is used as an additional merging candidate in current 3D-HEVC.

The PU partition modes are shown in Fig. 4.

When the PU partition mode PartMode is equal to PART_2Nx2N, IvMP is applied at sub- PU level. However, when the PU partition mode PartMode is not equal to PART_2Nx2N IvMP is applied at PU level. In this way, the irregular 8x12/12x8 MCP blocks are avoided.

The MPI is always performed at sub-PU level. That is, a PU is first divided into non- overlapping sub-PUs, and then MPI is applied on each sub-PU.

The sub-PU level MPI could still generate irregular 8x12/12x8 and bi-predicted 4x8/8x4 MCP blocks that are not in HEVC specification.

The DV used in IvMP and VSP is derived from neighboring coded blocks. The assumption is that the DV of current block is the same with that of neighboring blocks. However, such assumption is not always true.

SUMMARY OF THE INVENTION

In light of the previously described problems, the restriction methods for MPI are proposed and generalized IvMP and VSP are proposed.

Other aspects and features of the invention will become apparent to those with ordinary skill in the art upon review of the following descriptions of specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:

Fig. 1 is a diagram illustrating the concept of IvMC.

Fig. 2 is a diagram illustrating the concept of VSP. Fig. 3 is a diagram illustrating the concept of MPI.

Fig. 4 is a diagram showing the PU partition modes in current 3D-HEVC.

DETAILED DESCRIPTION

The following description is of the best-contemplated mode of carrying out the invention.

This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.

Proposed method 1 :

It is proposed to use PU level MPI when the PU partition mode PartMode is not equal to

PART_2Nx2N, and use sub-PU level MPI when PartMode is equal to PART_2Nx2N. Therefore, when MPI is applied and PartMode is not PART_2Nx2N, current PU is not divided into sub-PUs.

Proposed method 2:

It is proposed to disable MPI, both PU and sub-PU level, when the PU partition mode

PartMode is not equal to PART_2Nx2N.

Proposed method 3 :

It is proposed to explicit signaling a DV for IvMP. The DV can be directly coded or differentially coded. In the following, the proposed method is referred to as generalized IvMP (GIvMP).

Proposed method 4:

It is proposed to explicit signaling a DV for VSP. The DV can be directly coded or differentially coded. In the following, the proposed method is referred to as generalized VSP (GVSP).

The proposed methods described above can be used in a video encoder as well as in a video decoder. Embodiments of the proposed method according to the present invention as described above may be implemented in various hardware, software codes, or a combination of both. For example, an embodiment of the present invention can be a circuit integrated into a video compression chip or program codes integrated into video compression software to perform the processing described herein. An embodiment of the present invention may also be program codes to be executed on a Digital Signal Processor (DSP) to perform the processing described herein. The invention may also involve a number of functions to be performed by a computer processor, a digital signal processor, a microprocessor, or field programmable gate array (FPGA). These processors can be configured to perform particular tasks according to the invention, by executing machine-readable software code or firmware code that defines the particular methods embodied by the invention. The software code or firmware codes may be developed in different programming languages and different format or style. The software code may also be compiled for different target platform. However, different code formats, styles and languages of software codes and other means of configuring code to perform the tasks in accordance with the invention will not depart from the spirit and scope of the invention.

The invention may be embodied in other specific forms without departing from its spirit or essential characteristics. The described examples are to be considered in all respects only as illustrative and not restrictive. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.

Claims

I . A method of restriction for MPI merge candidate in 3D video coding, comprising determining whether to use MPI merge candidate according to a condition.

2. The method as claimed in claim 1, wherein use of MPI merge candidate depends on PU partition mode.

3. The method as claimed in claim 2, wherein sub-PU level MPI is used when the PU partition mode is equal to SIZE_2Nx2N and PU level MPI is used when the PU partition mode is not equal to SIZE_2Nx2N.

4. The method as claimed in claim 3, when the PU partition mode PartMode is equal to

SIZE_2NxN, SIZE_Nx2N, SIZE_2NxnU, SIZE_2NxnD, SIZE_nLx2N or SIZE_nRx2N, the

MPI merge candidate is applied at PU level instead of sub-PU level.

5. The method as claimed in claim 4, wherein sub-PU level MPI is disabled and PU level

MPI candidate is used when the PU partition mode PartMode is not equal to PART_2Nx2N.

6. The method as claimed in claim 2, wherein both PU level and sub-PU level MPI are disabled when the PU partition mode PartMode is not equal to SIZE_2Nx2N.

7. The method as claimed in claim 6, wherein both PU level and sub-PU level MPI are disabled when the PU partition mode PartMode is equal to SIZE_2NxN, SIZE_Nx2N,

SIZE_2NxnU, SIZE_2NxnD, SIZE_nLx2N or SIZE_nRx2N.

8. The method of explicit signaling a DV for IvMP, instead of deriving from neighboring blocks.

9. The method as claimed in claim 8, IvMP is added as an additional mode (GIvMP) for 3D video coding instead of added as a merging candidate; and the DV for IvMP is signaled by differential coding.

10. The method as claimed in claim 9, the DV in GIvMP mode is predicted by neighboring blocks and then the prediction error Disparity Vector Difference (DVD) is coded; at the decoder, DV is reconstructed by adding DVD to the predictor.

I I . The method as claimed in claim 9, the DV in GIvMP mode is coded at integer pixel accuracy instead of quarter pixel accuracy.

12. The method of explicit signaling a DV for VSP, instead of deriving from neighboring blocks.

13. The method as claimed in claim 12, wherein VSP is added as an additional mode (GVSP) for 3D video coding instead of added as a merging candidate; the DV for VSP is signaled by differential coding.

14. The method as claimed in claim 13, wherein the DV in GVSP mode is predicted by neighboring blocks and then the prediction error Disparity Vector Difference (DVD) is coded; at the decoder, DV is reconstructed by adding DVD to the predictor.

15. The method as claimed in claim 13, wherein the DV in GVSP mode is coded at integer pixel accuracy instead of quarter pixel accuracy.