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WO2015188332A1 - Procédé de sélection d'un vecteur par défaut pour la prédiction de vecteur de copie de bloc dans la compression vidéo - Google Patents

Procédé de sélection d'un vecteur par défaut pour la prédiction de vecteur de copie de bloc dans la compression vidéo Download PDF

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Publication number
WO2015188332A1
WO2015188332A1 PCT/CN2014/079672 CN2014079672W WO2015188332A1 WO 2015188332 A1 WO2015188332 A1 WO 2015188332A1 CN 2014079672 W CN2014079672 W CN 2014079672W WO 2015188332 A1 WO2015188332 A1 WO 2015188332A1
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WO
WIPO (PCT)
Prior art keywords
default
bvs
amvp
ibc
utilized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2014/079672
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English (en)
Inventor
Xianguo Zhang
Kai Zhang
Jicheng An
Han HUANG
Xiaozhong Xu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MediaTek Singapore Pte Ltd
Original Assignee
MediaTek Singapore Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MediaTek Singapore Pte Ltd filed Critical MediaTek Singapore Pte Ltd
Priority to PCT/CN2014/079672 priority Critical patent/WO2015188332A1/fr
Publication of WO2015188332A1 publication Critical patent/WO2015188332A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/46—Embedding additional information in the video signal during the compression process
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
    • H04N19/51—Motion estimation or motion compensation
    • H04N19/513—Processing of motion vectors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/593—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving spatial prediction techniques

Definitions

  • the invention relates generally to video processing.
  • the presented invention relates to intra block copy.
  • Intra block copy is being considered to reduce redundancy by prediction from reduplicated content within a same picture.
  • a reference block in the current picture is copied to the current block as the prediction if IBC is applied.
  • the reference block is located by applying a block-copy vector (BV).
  • BV block-copy vector
  • the intraBC technique was first proposed by TI (Texas Instrument) and then adopted to the RExt draft standard with Qualcomm's modifications in the 14 th JCT-VC meeting, in July 2013 in Vienna, AT.
  • TI Texas Instrument
  • 2NxM IntraBC was proposed by NCTU (the National Chiao-Tung Univeristy, Taiwan).
  • NCTU National Chiao-Tung Univeristy, Taiwan.
  • the prediction unit (PU) based IntraBC technique was adopted to the HEVC RExt standard.
  • the above adopted proposals for IBC were removed from RExt but still in the HEVC-SCC platform to be further discussed and improved.
  • IBC AMVP adaptive motion vector prediction
  • IBC AMVP can select predicted IBC vector from a number of possible spatial block vector candidates in previously coded neighboring block positions. In Table I, these positions are described in details.
  • Table I List of neighboring positions for BV prediction
  • Two candidate lists are constructed. For List 0, position 0 is checked first. If this the block in this position is IBC coded, then its block vector is selected to fill List 0; otherwise, position 1 will be checked. If this the block in this position is IBC coded, then its block vector is selected to fill List 0. If none of the above two positions are IBC coded, positions 2, 3, 4 will be checked one by one, the BV of first IBC coded block will be filled in List 0; if List 0 has been filled by either position 0 or 1, positions 2, 3, 4 will be checked one by one, the BV of first IBC coded block will be filled in List 1. For each IBC coded block, there are two B V prediction candidates from the above two lists (List 0 and List 1).
  • a flag is used to indicate which of the two BV predictors is actually used for the prediction of the BV in the current block. Then the BV prediction difference is further entropy coded.
  • AMVP methods for IBC which selects different candidate neighbouring blocks, and utilities different list-filling orders.
  • IBC AMVP one common-used method used for IBC AMVP is to fill the unfilled AMVP list(s) with default vectors when there are no enough IBC coded blocks to fill the lists after checking the specified positions.
  • This invention focuses on selecting better default BVs for the AMVP list construction procedures of IBC.
  • this invention proposes kinds of default IBC vectors for its AMVP procedures.
  • Fig. 1 is a diagram illustrating the BV candidates utilized in the AMVP for Intra block copy
  • Figs. 2(a) - 2(d) are diagrams illustrating the proposed default BVs of (-2xpW-pX,0) and
  • the horizontal or vertical coordinates of the current prediction unit (PU) in the current coding unit (CU) is utilized in the derivation of the default BVs.
  • default BVs are selected among the sets of vertical BVs and horizontal BVs.
  • the horizontal set is defined as ⁇ (-j x cW-kxpW-txpX,0)
  • vertical set is defined as ⁇ (0,-jxcW-kxpW-txpY)
  • BVs belonging to different sets including horizontal set ⁇ (-jxcW-kxpW-txpX,0)
  • (-cW,0) and (0,-cH) are included in the set of default BVs utilized for the IBC AMVP, when there are no-less-than two AMVP lists.
  • (-2xcW,0) and (0,-2 xcH) are included in the set of default BVs utilized for the IBC AMVP, when there are no-less-than two AMVP lists.
  • (-2xcW,0) and (0,-cH) are included in the set of default BVs utilized for the IBC AMVP, when there are no-less-than 2 AMVP lists.
  • (-2xpW,0) and (0,-2 xpH) are included in the set of default BVs utilized for the IBC AMVP, when there are no-less-than two AMVP lists.
  • (-2xpW-pX,0) and (0,-2xpH-pY) are included in the set of default BVs utilized for the IBC AMVP, when there are no-less-than two AMVP lists.
  • any combination of the first to eighth embodiments is utilized.
  • the methods described above can be used in a video encoder as well as in a video decoder.
  • Embodiments of disparity vector derivation methods according to the present invention as described above may be implemented in various hardware, software codes, or a combination of both.
  • an embodiment of the present invention can be a circuit integrated into a video compression chip or program codes integrated into video compression software to perform the processing described herein.
  • An embodiment of the present invention may also be program codes to be executed on a Digital Signal Processor (DSP) to perform the processing described herein.
  • DSP Digital Signal Processor
  • the invention may also involve a number of functions to be performed by a computer processor, a digital signal processor, a microprocessor, or field programmable gate array (FPGA). These processors can be configured to perform particular tasks according to the invention, by executing machine-readable software code or firmware code that defines the particular methods embodied by the invention.
  • the software code or firmware codes may be developed in different programming languages and different format or style.
  • the software code may also be compiled for different target platform.
  • different code formats, styles and languages of software codes and other means of configuring code to perform the tasks in accordance with the invention will not depart from the spirit and scope of the invention.

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

L'invention concerne un procédé de sélection de vecteur de bloc (BV) par défaut pour des procédures de prédiction de vecteur de bloc d'un mode de copie intrabloc utilisé dans le codage de contenu d'écran. Dans ce procédé, les coordonnées horizontale ou verticale (pX, pY) de la PU courante dans la CU courante sont utilisées dans la déduction des BV par défaut à partir des ensembles de BV horizontaux et verticaux.
PCT/CN2014/079672 2014-06-11 2014-06-11 Procédé de sélection d'un vecteur par défaut pour la prédiction de vecteur de copie de bloc dans la compression vidéo Ceased WO2015188332A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2014/079672 WO2015188332A1 (fr) 2014-06-11 2014-06-11 Procédé de sélection d'un vecteur par défaut pour la prédiction de vecteur de copie de bloc dans la compression vidéo

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2014/079672 WO2015188332A1 (fr) 2014-06-11 2014-06-11 Procédé de sélection d'un vecteur par défaut pour la prédiction de vecteur de copie de bloc dans la compression vidéo

Publications (1)

Publication Number Publication Date
WO2015188332A1 true WO2015188332A1 (fr) 2015-12-17

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PCT/CN2014/079672 Ceased WO2015188332A1 (fr) 2014-06-11 2014-06-11 Procédé de sélection d'un vecteur par défaut pour la prédiction de vecteur de copie de bloc dans la compression vidéo

Country Status (1)

Country Link
WO (1) WO2015188332A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113396590A (zh) * 2019-02-06 2021-09-14 腾讯美国有限责任公司 视频编码中相邻块可用性的方法和装置
CN113950840A (zh) * 2019-05-25 2022-01-18 北京字节跳动网络技术有限公司 帧内块复制编解码的块的Merge候选的约束

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103339935A (zh) * 2011-01-21 2013-10-02 高通股份有限公司 运动向量预测

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103339935A (zh) * 2011-01-21 2013-10-02 高通股份有限公司 运动向量预测

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
KWON, DO-KYOUNG ET AL.: "Fast intra block copy(IntraBC) search for HEVC screen content coding", CIRCUITS AND SYSTEMS(ISCAS), 2014 IEEE INTERNATIONAL SYMPOSIUM, 5 June 2014 (2014-06-05), pages 9 - 10, XP032624581 *
ZHANG, XIANGUO ET AL.: "Block vector prediction for intra block copy", JOINT COLLABORATIVE TEAM ON VIDEO CODING(JCT-VC) OF ITU-T SG 16 WP 3 AND ISO/IEC JTC 1/SC 29/WG 11, JCTVC-Q0080, 4 April 2014 (2014-04-04) *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113396590A (zh) * 2019-02-06 2021-09-14 腾讯美国有限责任公司 视频编码中相邻块可用性的方法和装置
CN113950840A (zh) * 2019-05-25 2022-01-18 北京字节跳动网络技术有限公司 帧内块复制编解码的块的Merge候选的约束

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