WO2015178018A1 - 端末、パケット復号方法、および、プログラムが記憶された記憶媒体 - Google Patents
端末、パケット復号方法、および、プログラムが記憶された記憶媒体 Download PDFInfo
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- WO2015178018A1 WO2015178018A1 PCT/JP2015/002518 JP2015002518W WO2015178018A1 WO 2015178018 A1 WO2015178018 A1 WO 2015178018A1 JP 2015002518 W JP2015002518 W JP 2015002518W WO 2015178018 A1 WO2015178018 A1 WO 2015178018A1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/373—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with erasure correction and erasure determination, e.g. for packet loss recovery or setting of erasures for the decoding of Reed-Solomon codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/3761—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 using code combining, i.e. using combining of codeword portions which may have been transmitted separately, e.g. Digital Fountain codes, Raptor codes or Luby Transform [LT] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
- H04L1/0058—Block-coded modulation
Definitions
- the present invention relates to a terminal, a packet decoding method, and a storage medium storing a program, and in particular, a terminal that sequentially receives and decodes encoded packets from a transmission-side terminal, a packet decoding method by the terminal, and the The present invention relates to a storage medium storing a program that operates in a terminal.
- FEC Forward Error Correction
- a transmission terminal adds an encoded packet to a source packet and transmits it to a network on a transmission path where loss occurs. If there is an unreceived packet at the receiving terminal, the receiving terminal restores the lost packet based on the encoded packet.
- the FEC method includes a method called “rateless code” (also referred to as “fountain code”) in which redundant packets are created infinitely from source packets and the source packets are decoded from the redundant packets at the receiving terminal.
- rateless code also referred to as “fountain code”
- Non-Patent Document 1 Patent Document 1
- FIG. 8 is a block diagram illustrating a configuration of a communication system (encoded packet transmission / reception system) including terminals of related technology.
- the transmission terminal 10 and the reception terminal 20 are connected via a network 30.
- the transmission terminal 10 includes a source packet transmission unit 12, a packet encoding unit 14, and a packet transmission unit 16.
- the receiving terminal 20 includes a packet receiving unit 22, a packet decoding unit 24, and a source packet receiving unit 26.
- the source packet transmission unit 12 transmits the generated N source packets 38 to the packet encoding unit 14.
- the packet encoding unit 14 randomly selects a packet from the received N source packets 38, and generates an encoded packet 42 that is obtained by performing an exclusive OR (XOR) operation on the selected packet. .
- the packet encoding unit 14 adds an array (random matrix G shown in FIG. 10) indicating the source packet used when generating the encoded packet 42 to the encoded packet 42. Further, the packet encoding unit 14 transmits the generated encoded packet 42 to the packet transmission unit 16.
- the packet transmission unit 16 transmits the received encoded packet 42 to the network 30.
- the loss of the fourth packet among the six packets transmitted by the packet transmitter 16 occurs, and five packets that are equal to or greater than the number of source packets 38 are transmitted by the packet receiver 22. Has been received. Then, five simultaneous linear equations that are more than the number of the five source packets 38 can be generated by the received five packets. Then, five source packets 38 can be derived based on five simultaneous linear equations by Gaussian elimination.
- FIG. 11 is a flowchart showing an algorithm of decoding (Gaussian elimination method) in the receiving terminal 20 of the related art.
- step A2 a row vector after the i-th row in which the i-th element of the row vector is 1 is selected. At this time, if the row vector to be selected is not found (No in step A3), the calculation of the Gaussian elimination method is terminated.
- the row vector after the first row in which the first element is 1 becomes the fifth row vector, so the fifth row vector is selected.
- step A4 the selected row vector is replaced with the first row vector.
- the i-th element of the row vector of the i-th row after replacement is called “pivot”, and the row vector itself is called “pivot row”.
- the Gaussian elimination unit 32 switches the row vector of the fifth row and the row vector of the first row in the decoding matrix 34-1.
- the decoding matrix 34-2 is a state after the row vectors are replaced.
- decoding is performed by Gaussian elimination every time a packet is received.
- this decoding method when this decoding method is used, the amount of calculation for each packet reception varies, and the amount of calculation when the Nth encoded packet is received increases. The calculation may not be completed before the packet arrives.
- the Gaussian elimination unit 32 cannot apply the Gaussian elimination method in Step A3 until the encoded packet corresponding to the fifth row vector arrives.
- the calculation cannot proceed. That is, since the calculation by the Gaussian elimination unit 32 is started only after the packet corresponding to the fifth row vector arrives, the Gaussian elimination unit 32 performs the step after the packet corresponding to the fifth row vector arrives.
- the process of A4 and the process of step A5 are executed five times.
- Patent Document 1 a method as disclosed in Patent Document 1 exists as a method for speeding up the calculation of the Gaussian elimination method.
- Patent Document 1 The entire disclosure of Patent Document 1 and Non-Patent Document 1 is incorporated herein by reference. The following analysis was made by the inventors of the present application.
- the receiving terminal of the encoded packet in the related technology when operating by dividing a plurality of source packet groups into a plurality of encoded packet groups, before decoding of the encoded packet for the previous source packet group is completed, It is necessary to provide a large number of buffers in case an encoded packet for the next source packet group arrives. The reason is that it takes a long time until the decoding is completed after the last packet is received.
- Patent Document 1 is a method for reducing the subsequent calculation amount by omitting a packet that can be decoded as a source packet from a decoding matrix. Therefore, the method described in Patent Document 1 cannot reduce the amount of calculation when the calculation of the Gaussian elimination method does not start.
- An object of the present invention is to provide a terminal, a packet decoding method, and a storage medium storing a program that contribute to the solution of the problem.
- the computer stores an n-row n-column matrix and an n-bit flag in a storage unit, and both the received n-bit encoded packet and the flag are stored.
- the process of extracting the element that becomes 1 in the above and the process of performing an exclusive OR operation on the encoded packet that has received the row vector of the matrix corresponding to the element number of the extracted element is performed for all the extracted elements
- movement of the packet decoding calculation part in the terminal which concerns on 1st Embodiment. It is a figure which illustrates the calculation process (i 1) of the decoding matrix and pivot flag by the packet decoding calculation part in the terminal which concerns on 1st Embodiment.
- FIG. 1 is a block diagram illustrating the configuration of a terminal 21 according to an embodiment of the present invention.
- the terminal 21 includes a storage unit 56 and a calculation unit 64.
- the calculation means 64 extracts an element which is 1 in both the received n-bit encoded packet and the flag (62), and receives the row vector of the matrix (58) corresponding to the element number of the extracted element.
- a process of performing an exclusive OR (XOR) operation on the packet is performed on all the extracted elements. Then, the calculation means 64 determines the element that is first 1 in the encoded packet after the exclusive OR operation, and after the exclusive OR operation as a row vector corresponding to the element number of the determined element. Are inserted into the matrix (58).
- the calculating means 64 sets the element corresponding to the element number of the determined element among the elements of the flag (62) to 1 (if it indicates that the flag of the element is set, The element is not limited to 1). Note that when all the elements of the flag (62) are 1, the decoding is completed.
- the terminal 21 it is possible to speed up the process of decoding the source packet from the encoded packet based on the rateless encoding as compared with the related technology. Because, instead of searching for the pivot row in ascending order of the source packet in the decoding procedure, as in the related art Gaussian elimination, it determines what pivot row the packet will be at each packet reception, This is because the calculation can proceed even when the pivot line is in the middle.
- the transmission terminal 10 includes a source packet transmission unit 12, a packet encoding unit 14, and a packet transmission unit 16.
- the source packet transmission unit 12 packetizes the data to be transmitted to the receiving terminal 21 in accordance with a network protocol for transmitting data.
- the packet encoding unit 14 encodes the source packet into an encoded packet.
- the packet transmission unit 16 transmits the encoded packet to the network 30.
- the mechanism by which the transmission terminal 10 confirms whether or not the N source packets have been decoded at the reception terminal 21 is not particularly limited.
- the transmission terminal 10 can use a method of receiving a decoding completion notification from feedback information notifying that the decoding is completed from the reception terminal 21 and stopping transmission of the encoded packet.
- FIG. 3 is a block diagram illustrating the configuration of the packet decoding unit 52 in the receiving terminal 21 of the present embodiment.
- the packet decoding unit 52 includes a packet decoding calculation unit 54 and a decoding determination unit 72.
- the packet decoding calculation unit 54 performs calculation for decoding the encoded packet received from the packet receiving unit 22 into a source packet using a decoding algorithm.
- the decoding determination unit 72 refers to the result calculated by the packet decoding calculation unit 54 to determine whether the source packet has been decoded or whether the encoded packet remains.
- the packet decoding calculation unit 54 includes a storage unit 56 and a calculation unit 64.
- the storage means 56 holds a decoding matrix 58 and a pivot flag 62.
- the calculation means 64 includes a decoding calculation unit 66 and a pivot position determination unit 68.
- the encoded packet received from the packet receiving unit 22 is stored as a decoding matrix 58 having a matrix shape.
- a pivot flag 62 indicates whether or not a packet is already included in the pivot row in the decoding matrix 58.
- the decoding calculation unit 66 performs calculation for the encoded packet received from the packet reception unit 22 and decoding calculation for the source packet based on the decoding matrix 58.
- the pivot position determination unit 68 determines the pivot position of the encoded packet after the calculation based on the calculation result for the encoded packet received from the packet reception unit 22.
- the decoding calculation unit 66 calculates the row vector of the decoding matrix 58 with respect to the encoded packet received from the packet receiving unit 22 and inserts the calculated encoded packet into the decoding matrix 58 by the pivot position determination unit 68. Later, an operation is performed to calculate the encoded packet after the operation with respect to the row vector of the decoding matrix 58.
- the decoding calculation unit 66 compares the encoded packet received from the packet receiving unit 22 with the pivot flag 62, and a decoding matrix 58 corresponding to an element in which both the encoded packet and the pivot flag 62 are “1”. XOR (exclusive OR) operation is performed on the row vector.
- the row vector corresponding to the i-th element of the encoded packet and the pivot flag 62 is the row vector of the i-th row in the decoding matrix 58.
- the decoding calculation unit 66 performs an XOR operation on the encoded packet that has received the second and fourth row vectors of the decoding matrix 58.
- the pivot position determination unit 68 inserts the encoded packet after the XOR operation into the decoding matrix 58, and then converts the encoded packet after the XOR operation into the row vector of the decoding matrix 58.
- the operation to be performed will be described.
- the decoding calculation unit 66 confirms the column corresponding to the pivot of the inserted pivot row vector (that is, the encoded packet after the XOR operation), and for all row vectors having an element of “1”. XOR the pivot row vector.
- the decoding determination unit 72 refers to the decoding matrix 58 and the pivot flag 62 to determine whether the encoded packet is decoded and N source packets are generated. Specifically, the decoding determination unit 72 refers to the pivot flag 62 and determines that the decoding is completed when all of the N elements are “1”.
- step B1 when the packet decoding unit 52 receives an encoded packet from the packet receiving unit 22, the process proceeds to step B1.
- step B2 the decoding calculation unit 66 confirms the pivot flag 62 and the received encoded packet, and a decoding matrix corresponding to an element in which both the pivot flag 62 and the received encoded packet are “1”.
- the 58 row vectors are XORed with respect to the encoded packet.
- the decoding calculation unit 66 repeats the comparison and calculation in step B2 as many times as the number of elements corresponding to the pivot flag “1”. When the repetition is completed, the process proceeds from step B3 to step B4.
- the received encoded packet is [0, 1, 0, 0, 1], and the pivot flag 62-3 is [0, 1, 0, 0, 0]. Accordingly, the decoding calculation unit 66 performs an XOR operation on the received encoded packet with respect to the second row vector of the decoding matrix 58-3. As a result, the encoded packet after the XOR operation is [0, 0, 1, 1, 0].
- the pivot position determination unit 68 determines the pivot position for the encoded packet after the XOR operation.
- the pivot position refers to the element that is first “1” among the elements of the encoded packet after the XOR operation (that is, the highest bit of the bits having the value “1” in the bit string constituting the encoded packet). Upper bit).
- the Xth element is the first “1” (that is, when the Xth bit is the most significant bit among the bits having the value “1” in the bit string constituting the encoded packet)
- the pivot row is Xth.
- the element in which “1” appears for the first time is the third (that is, the encoded packet).
- the most significant bit of the bits having a value of “1” is the third bit), and the pivot position determination unit 68 determines that the encoded packet is a row vector that becomes the third pivot row. judge.
- step B6 the pivot position determination unit 68 performs an operation of inserting the pivot row determined in step B4 into the Xth row vector of the decoding matrix 58.
- the encoded packet after the calculation is a row vector that becomes the third pivot row, it is inserted in the third row of the decoding matrix 58-4.
- the process proceeds to step B7.
- step B7 after the encoded packet is inserted, the decoding calculation unit 66 applies the encoded packet to another row vector in which “1” is set in the same column as the pivot element of the encoded packet. XOR operation is performed.
- the second row XOR operation is performed on the third row vector (that is, the encoded packet after the XOR operation) with respect to the vector.
- the row vector of the second row is [0, 1, 0, 0, 1].
- step B7 ends, the operation of the packet decoding calculation unit 54 is completed, and the decoding determination unit 72 determines decoding.
- the decryption determination unit 72 considers that the decryption has been completed.
- the decoding matrix 58 is filled with all N rows.
- the decoding matrix 58 is completely filled, and decoding into the source packet is completed.
- all the elements of the pivot flag 62-Y are also “1”, and the decoding determination unit 72 determines that the decoding is completed.
- the packet decoding unit 52 transmits the source packet to the source packet receiving unit 26 and initializes the decoding matrix 58.
- the terminal 21 of the present embodiment it is possible to speed up the process of decoding the source packet from the encoded packet based on the rateless encoding as compared with the related technology.
- the reason is that instead of searching the pivot row in ascending order of the source packet as the decoding procedure, like the Gaussian elimination method used in the related art, what pivot row the packet will be at each packet reception This is because the calculation is advanced even when a pivot row is determined.
- the buffer when the encoded packet for the next source packet group arrives before the decoding of the encoded packet for the previous source packet group is completed is reduced. The reason is that the time from when the last encoded packet for the previous source packet group is received until the decoding is completed is short.
- the calculation means sets 1 as an element corresponding to the element number of the determined element among the elements of the flag. The terminal according to attachment 1.
- the calculation means calculates the encoded packet after the exclusive OR operation as the matrix. Destroy without inserting into the The terminal according to appendix 1 or 2.
- the calculation means performs the exclusive logic for the row vector of the matrix having an element with the same element number as the element number of the element that is first 1 in the encoded packet after the exclusive OR operation.
- Appendix 5 A determination means for determining that the decoding is completed when all the elements of the flag are 1; The terminal according to any one of appendices 1 to 4.
- the computer includes a step of determining that the decoding is completed when all elements of the flag become 1.
- the packet decoding method according to any one of appendices 6 to 9.
- Appendix 11 a process of holding a matrix of n rows and n columns and an n-bit flag in the storage means; A process of extracting an element that is 1 in both the received n-bit encoded packet and the flag; A process of performing an exclusive OR operation on the encoded packet having received the row vector of the matrix corresponding to the element number of the extracted element, for all the extracted elements; A process of determining an element that is first 1 in the encoded packet after the exclusive OR operation; As a row vector corresponding to the element number of the determined element, causing the computer to execute a process of inserting the encoded packet after the exclusive OR operation into the matrix.
- [Appendix 12] Causing the computer to execute a process of setting the element corresponding to the element number of the determined element among the elements of the flag to 1; The program according to appendix 11.
- [Appendix 13] When the element of the flag corresponding to the first element that is 1 in the encoded packet after the exclusive OR operation is 1, without inserting the encoded packet after the exclusive OR operation into the matrix Causing the computer to execute a discarding process; The program according to appendix 11 or 12.
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Abstract
Description
次に、第1の実施形態の端末を備えた通信システムについて、図面を参照して詳細に説明する。
[付記1]
n行n列の行列とnビットのフラグを保持する記憶手段と、
受信したnビットの符号化パケットと前記フラグの双方において1となる要素を抽出し、抽出した要素の要素番号に相当する前記行列の行ベクトルを受信した符号化パケットに対して排他的論理和演算する処理を、抽出したすべての要素について行い、前記排他的論理和演算後の符号化パケットを構成するビット列において、値が「1」であるビットのうちの最上位ビットである、最初に1となる要素を判定し、判定した要素の要素番号に相当する行ベクトルとして、前記排他的論理和演算後の符号化パケットを前記行列に挿入する計算手段と、を備える、
ことを特徴とする端末。
[付記2]
前記計算手段は、前記フラグの要素のうちの、前記判定した要素の要素番号に相当する要素を1とする、
付記1に記載の端末。
[付記3]
前記計算手段は、前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素に相当する前記フラグの要素が1である場合、前記排他的論理和演算後の符号化パケットを前記行列に挿入することなく破棄する、
付記1または2に記載の端末。
[付記4]
前記計算手段は、前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素の要素番号と同一の要素番号の要素が1である前記行列の行ベクトルに対して、前記排他的論理和演算後の符号化パケットを排他的論理和演算したものを前記行列の当該行ベクトルとして格納する処理を、前記行列の各行ベクトルに対して行う、
付記1ないし3のいずれか一に記載の端末。
[付記5]
前記フラグのすべての要素が1となった場合、復号が完了したものと判定する判定手段をさらに備える、
付記1ないし4のいずれか一に記載の端末。
[付記6]
コンピュータが、n行n列の行列とnビットのフラグを記憶手段に保持するステップと、
受信したnビットの符号化パケットと前記フラグの双方において1となる要素を抽出するステップと、
抽出した要素の要素番号に相当する前記行列の行ベクトルを受信した符号化パケットに対して排他的論理和演算する処理を、抽出したすべての要素について行うステップと、
前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素を判定するステップと、
判定した要素の要素番号に相当する行ベクトルとして、前記排他的論理和演算後の符号化パケットを前記行列に挿入するステップと、を含む、
ことを特徴とするパケット復号方法。
[付記7]
前記コンピュータが、前記フラグの要素のうちの、前記判定した要素の要素番号に相当する要素を1とするステップを含む、
付記6に記載のパケット復号方法。
[付記8]
前記コンピュータが、前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素に相当する前記フラグの要素が1である場合、前記排他的論理和演算後の符号化パケットを前記行列に挿入することなく破棄するステップを含む、
付記6または7に記載のパケット復号方法。
[付記9]
前記コンピュータが、前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素の要素番号と同一の要素番号の要素が1である前記行列の行ベクトルに対して、前記排他的論理和演算後の符号化パケットを排他的論理和演算したものを前記行列の当該行ベクトルとして格納する処理を、前記行列の各行ベクトルに対して行うステップを含む、 付記6ないし8のいずれか一に記載のパケット復号方法。
[付記10]
前記コンピュータが、前記フラグのすべての要素が1となった場合、復号が完了したものと判定するステップを含む、
付記6ないし9のいずれか一に記載のパケット復号方法。
[付記11]
n行n列の行列とnビットのフラグを記憶手段に保持する処理と、
受信したnビットの符号化パケットと前記フラグの双方において1となる要素を抽出する処理と、
抽出した要素の要素番号に相当する前記行列の行ベクトルを受信した符号化パケットに対して排他的論理和演算する処理を、抽出したすべての要素について行う処理と、
前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素を判定する処理と、
判定した要素の要素番号に相当する行ベクトルとして、前記排他的論理和演算後の符号化パケットを前記行列に挿入する処理と、をコンピュータに実行させる、
ことを特徴とするプログラム。[付記12]
前記フラグの要素のうちの、前記判定した要素の要素番号に相当する要素を1とする処理を、前記コンピュータに実行させる、
付記11に記載のプログラム。
[付記13]
前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素に相当する前記フラグの要素が1である場合、前記排他的論理和演算後の符号化パケットを前記行列に挿入することなく破棄する処理を、前記コンピュータに実行させる、
付記11または12に記載のプログラム。
[付記14]
前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素の要素番号と同一の要素番号の要素が1である前記行列の行ベクトルに対して、前記排他的論理和演算後の符号化パケットを排他的論理和演算したものを前記行列の当該行ベクトルとして格納する処理を、前記行列の各行ベクトルに対して行う処理を、前記コンピュータに実行させる、
付記11ないし13のいずれか一に記載のプログラム。
[付記15]
前記フラグのすべての要素が1となった場合、復号が完了したものと判定する処理を、前記コンピュータに実行させる、
付記11ないし14のいずれか一に記載のプログラム。
12 ソースパケット送信部
14 パケット符号化部
16 パケット送信部
20、21 受信端末
22 パケット受信部
24、52 パケット復号化部
26 ソースパケット受信部
28、54 パケット復号計算部
30 ネットワーク
32 ガウス消去部
34、34-1~34-X ガウスの消去法による計算過程の復号行列
36、72 復号判定部
38 符号化前のソースパケット
42 送信する符号化パケット
44 受信した符号化パケット
46 復号後のソースパケット
56 記憶手段
58、58-1~58-Y 実施形態のアルゴリズムにおける復号行列
62、62-1~62-Y 実施形態のアルゴリズムにおけるピボットフラグ
64 計算手段
66 復号計算部
68 ピボット位置判定部
Claims (10)
- n行n列の行列とnビットのフラグを保持する記憶手段と、
受信したnビットの符号化パケットと前記フラグの双方において1となる要素を抽出し、抽出した要素の要素番号に相当する前記行列の行ベクトルを受信した符号化パケットに対して排他的論理和演算する処理を、抽出したすべての要素について行い、前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素を判定し、判定した要素の要素番号に相当する行ベクトルとして、前記排他的論理和演算後の符号化パケットを前記行列に挿入する計算手段と、を備える、
ことを特徴とする端末。 - 前記計算手段は、前記フラグの要素のうちの、前記判定した要素の要素番号に相当する要素を1とする、
請求項1に記載の端末。 - 前記計算手段は、前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素に相当する前記フラグの要素が1である場合、前記排他的論理和演算後の符号化パケットを前記行列に挿入することなく破棄する、
請求項1または2に記載の端末。 - 前記計算手段は、前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素の要素番号と同一の要素番号の要素が1である前記行列の行ベクトルに対して、前記排他的論理和演算後の符号化パケットを排他的論理和演算したものを前記行列の当該行ベクトルとして格納する処理を、前記行列の各行ベクトルに対して行う、
請求項1ないし3のいずれか1項に記載の端末。 - 前記フラグのすべての要素が1となった場合、復号が完了したものと判定する判定手段をさらに備える、
請求項1ないし4のいずれか1項に記載の端末。 - n行n列の行列とnビットのフラグを記憶手段に保持し、
受信したnビットの符号化パケットと前記フラグの双方において1となる要素を抽出し、
抽出した要素の要素番号に相当する前記行列の行ベクトルを受信した符号化パケットに対して排他的論理和演算する処理を、抽出したすべての要素について行い、
前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素を判定し、
判定した要素の要素番号に相当する行ベクトルとして、前記排他的論理和演算後の符号化パケットを前記行列に挿入する、
ことを特徴とするパケット復号方法。 - 前記フラグの要素のうちの、前記判定した要素の要素番号に相当する要素を1とする、
請求項6に記載のパケット復号方法。 - 前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素に相当する前記フラグの要素が1である場合、前記排他的論理和演算後の符号化パケットを前記行列に挿入することなく破棄する、
請求項6または7に記載のパケット復号方法。 - 前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素の要素番号と同一の要素番号の要素が1である前記行列の行ベクトルに対して、前記排他的論理和演算後の符号化パケットを排他的論理和演算したものを前記行列の当該行ベクトルとして格納する処理を、前記行列の各行ベクトルに対して行う、 請求項6ないし8のいずれか1項に記載のパケット復号方法。
- n行n列の行列とnビットのフラグを記憶手段に保持する処理と、
受信したnビットの符号化パケットと前記フラグの双方において1となる要素を抽出する処理と、
抽出した要素の要素番号に相当する前記行列の行ベクトルを受信した符号化パケットに対して排他的論理和演算する処理を、抽出したすべての要素について行う処理と、
前記排他的論理和演算後の符号化パケットにおいて最初に1となる要素を判定する処理と、
判定した要素の要素番号に相当する行ベクトルとして、前記排他的論理和演算後の符号化パケットを前記行列に挿入する処理と、をコンピュータに実行させる、
ことを特徴とするプログラムが記憶された記憶媒体。
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| JP2016520938A JP6504162B2 (ja) | 2014-05-22 | 2015-05-19 | 端末、パケット復号方法、および、プログラムが記憶された記憶媒体 |
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| WO2018173168A1 (ja) * | 2017-03-22 | 2018-09-27 | 三菱電機株式会社 | シンボルマッピング装置 |
| CN114760009A (zh) * | 2022-04-01 | 2022-07-15 | 国网综合能源服务集团有限公司 | 数据流的编解码方法、装置及存储介质 |
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| CN112313981A (zh) * | 2018-06-15 | 2021-02-02 | 夏普株式会社 | 用于指示无线终端的受限资源的方法和装置 |
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| AU2003253635A1 (en) | 2002-06-11 | 2003-12-22 | Digital Fountain, Inc. | Decoding of chain reaction codes through inactivation of recovered symbols |
| US8418034B2 (en) * | 2008-02-08 | 2013-04-09 | Kencast, Inc. | Systems, methods, apparatus and computer program products for highly reliable file delivery using compound and braided FEC encoding and decoding |
| EP2134018A1 (en) | 2008-05-23 | 2009-12-16 | Deutsches Zentrum für Luft- und Raumfahrt e.V. | Method for recovery of lost and/ or corrupted data |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2018173168A1 (ja) * | 2017-03-22 | 2018-09-27 | 三菱電機株式会社 | シンボルマッピング装置 |
| JPWO2018173168A1 (ja) * | 2017-03-22 | 2019-07-11 | 三菱電機株式会社 | シンボルマッピング装置 |
| CN114760009A (zh) * | 2022-04-01 | 2022-07-15 | 国网综合能源服务集团有限公司 | 数据流的编解码方法、装置及存储介质 |
| CN114760009B (zh) * | 2022-04-01 | 2023-07-25 | 国网综合能源服务集团有限公司 | 数据流的编解码方法、装置及存储介质 |
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| US20170155408A1 (en) | 2017-06-01 |
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