WO2015017899A1

WO2015017899A1 - A silicon carbide etching process

Info

Publication number: WO2015017899A1
Application number: PCT/AU2014/050171
Authority: WO
Inventors: Francesca Iacopi; Alan Victor Iacopi; Mishra NEEREJ; Glenn Walker; Leonie Hold
Original assignee: Griffith University
Current assignee: Griffith University
Priority date: 2013-08-05
Filing date: 2014-08-05
Publication date: 2015-02-12
Anticipated expiration: 2016-02-05

Abstract

A silicon carbide etching process, including: forming a plasma from an HCl gas; and exposing a surface of silicon carbide to the plasma to etch the silicon carbide.

Description

A SILICON CARBIDE ETCHING PROCESS TECHNICAL FIELD

The present invention relates to a process for etching silicon carbide.

BACKGROUND

The wide-bandgap ceramic semiconductor silicon carbide (SiC) has been the subject of active research in recent decades due to its advantageous mechanical, electronic, and other physical properties, particularly for applications in high temperature and/or high voltage/power electronics, micro-electro mechanical systems (MEMS) and Light Emitting Diodes (LEDs). Additionally, single crystal SiC i also ad antageously used as a substrate for growing epitaxial thin films of electronic materials such as graphe-ne and nitride semiconductors, for example.

However, the high cost of bulk SiC wafers and the high cost and difficulties associated with SiC processing methods have generally limited the use of SiC to specialised application areas such as the aerospace industry. To alleviate the high cost of the material itself, methods for growing epitaxial thin films of SiC on standard silicon (Si) bulk wafers have been developed. However, there remain difficulties with processing SiC to produce devices and structures having desired or otherwise suitable mechanical and/or electronic properties.

For example, an ongoin difficulty with etching processes is that plasma etching of SiC produces highly non-planar sidewalls with vertically oriented "micro-trench" artefacts, as described in D, Ruixue, Y. Yintang, and H. Ru, Micro-Trenching Effect Of Sic ICP Etching In SF_fjO_? Plasma, I. Semiconductors 30 (.1 ), (2009), and in Y, Kawada, T, Tawajra and S. Nakamura, Technology For Controlling Trench Shape In Sic Power Mosfets, Fuji Electric Review 55 (2). pp 69-73. Additionally, the surface, roughness o SiC can pose difficulties for applications requiring another material to be deposited over that surface, including difficulties with adhesion of the deposited material and poor electrical properties of the interface.

It is desired to provide a silicon carbide etching process that alleviates one or more difficulties of the prior art, or that at least provides a useful alternative.

SUMMARY

In accordance with some embodiments of the present invention, there is provided a silicon carbide etching process, including:

forming a plasma from an HC1 gas; and

exposing a surface of silicon carbide to the plasma to etch the silicon carbide.

In some embodiments, the process further includes forming an etch mask over the surface of silicon carbide, the etch mask having one or more openings therein to expose one or more respective regions of the underlying silicon carbide;

wherein said exposing includes exposing the etch mask and exposed regions of the silicon carbide to the plasma to selectively etch the exposed regions of the silicon carbide.

In some embodiments, the process further includes sublimating silicon from at least a surface portion of the silicon carbide to form a corresponding graphene thin film therefrom.

In some embodiments, the silicon carbide is in the form of a thin film of silicon carbide.

In some embodiments, the plasma etches completely through the silicon carbide thin film.

In some embodiments, the silicon carbide is in the form of a thin film of silicon carbide, and the plasma etches completely through the silicon carbide thin film so that the graphene thin film is self-aligned to the remaining regions of the silicon carbide thin film. In some embodiments, prior to said etching, the silicon carbide thin film is supported by a substrate, and the process further includes selectively etching one or more portions of the substrate under corresponding portions of the silicon carbide thin film to form one or more corresponding free standing structures therefrom.

In some embodiments, the one or more free standing structures arc part of one or more sensors.

In some embodiments, the etching reduces the surface roughness of the silicon carbide.

In some embodiments, the silicon carbide surface exposed to the plasma is substantially a surface of an entire wafer.

In some embodiments, the process further includes forming a thin film of a compound semiconductor on the etched silicon carbide surface, wherein the reduced surface roughness of the etched silicon carbide surface improves one or more properties of the interface between the silicon carbide and the compound semiconductor.

In some embodiments, the compound semiconductor is a nitride compound semiconductor.

In some embodiments, said etching forms smooth stdcwalls substantially without microtrenching.

In some embodiments, said plasma is formed at a pressure in a range of 0.5 to 20 mTorr.

In some embodiments, said plasma is formed at a pressure of about 2 to 4 mTorr.

In some embodiments, said plasma is formed from an HCl gas at an HQ flow rate in a range of 20 to 200 seem. In some embodiments, said plasma is formed from an HCI gas al an HO flow rate of about 50 seem.

In some embodiments, said etching is performed at a platen temperature in a range of -20 to 300 ^°C.

In some embodiments, said etching is performed at a platen temperature of about 20 °C.

Also described herein is a silicon carbide etching process, including:

forming an etch mask over a thin film of silicon carbide, the etch mask having one or more openings therein to expose one or more respective regions of the underlying silicon carbide thin film;

forming a plasma from an HO gas; and

exposing the etch mask and exposed regions of the silicon carbide thin film to the plasma to selectively etch the exposed regions of the silicon carbide thin film.

The plasma may etch completely through the silicon carbide thin film.

The process may further include sublimating silicon from at least a surface layer of one or more regions of the silicon carbide thin film to form a corresponding graphene thin film therefrom.

The plasma may etch completely through the silicon carbide thin film so that the graphene thin film is self-aligned to the remaining regions of the silicon carbide thin film.

Prior to said etching, the silicon carbide thin film may be supported by a substrate, and the process may further include selectively etching one or more portions of the substrate under corresponding portions of the silicon carbide thin film to form one or more corresponding free standing structures therefrom. The one or more free standing structures may be part of one or more sensors. The etch mask may be a photoresist etch mask.

The etching may reduce the surface roughness of the exposed regions of the silicon carbide thin film.

Also described herein is a silicon carbide etching process, including:

forming a plasma from an HCI gas; and

exposing a silicon carbide surface having a first surface roughness to the plasma to etch the silicon carbide surface and provide an etched silicon carbide surface having a second surface roughness, wherein the second surface roughness is less than the first surface roughness.

The silicon carbide surface may be a surface of a thin film of silicon carbide.

The silicon carbide surface exposed to the plasma may be substantially a surface of an entire wafer.

The process may further include depositing a thin film of a compound semiconductor onto the etched silicon carbide surface, wherein the reduced surface roughness of the etched silicon carbide surface improves one or more properties of the interface between the silicon carbide and the compound semiconductor. In some embodiments, the compound semiconductor is a nitride compound semiconductor.

Said etching may form smooth sidewalls without microtrenching. The plasma may be formed at a pressure in a range of 0.5 lo 20 mTorr. The plasma may be formed at a pressure of about 2 to 4 mTorr.

The plasma may be formed from an HC1 gas at an HC1 flow rate in a range of 20 to 200 seem. The plasma may be formed from an HC1 gas at an HC1 flow rale of about 50 seem.

The etching may be performed at a platen temperature in a range of -20 to 300 °C. The etching may be performed at a platen temperature of about 20 °C.

Also described herein is a silicon carbide smoothing process, including applying an HQ- based plasma to a first silicon carbide surface having a first RMS surface roughness, wherein the HCI-bascd plasma etches the first silicon carbide surface silicon carbide surface to provide a second silicon carbide surface having a second RMS surface roughness, wherein the second RMS surface roughness is less than the first RMS surface roughness.

Also described herein is a silicon carbide etching process, including:

forming a plasma from an HC1 gas: and

exposing the etch mask and exposed regions of the silicon carbide thin film to the plasma to selectively etch completely through the exposed regions of the silicon carbide thin film.

The process may further include sublimating silicon from at least a surface layer of one or more regions of the silicon carbide thin film to form a corresponding graphene thin film therefrom, the graphene thin film being self-aligned to the remaining regions of the silicon carbide thin film. BRIEF DESCRIPTION OF THE DRA INGS

Some embodiments of the present invention are hereinafter described, by way of example only, with reference to the accompanying drawings, wherein:

Figure 1 is a flow diagram of a process in accordance with some embodiments of the present invention;

Figures 2 to 8 are schematic cross-sectional side views of a substrate or wafer during processing in accordance with the process of Figure 1 ;

Figures 9 to 11 are scanning electron microscope (SEM) images of flower-like structures produced in accordance with the process of Figure 1. each structure including elongate SiC cantilevers radially extending from a central support pillar and suspended above a silicon substrate; each SiC cantilever has a graphene surface layer and the stress in each cantilever causes it to curve upwards, away from the silicon substrate;

Figure 12 is an SEM image of a generally rectangular structure otherwise similar to those shown in Figures 9 to I I;

Figure 13 is an SEM image of a cross-section through an etched SiC trench, demonstrating excellent smoothness of the sidewall and the apparent absence of micro- trenching;

Figures 14 and IS arc atomic force microscope (AFM) images of 5 x 5 μαι² regions of the surface of a SiC sample respectively before and after etching by an HQ-based plasma etching process, demonstrating the reduction in surface roughness resulting from the process; and

Figure 16 is a set of nine photographic images of a single 150 mm (6 inch) diameter thin-film SiC on silicon wafer, as-grown (top left, 245 nm thin film) and after successive etching steps (left to right, top to bottom) using the HCl-based plasma etching process described herein, demonstrating the exceptional uniformity of the etching process even after 90% of the SiC thin Him has been removed. DETAILED DESCRIPTION

In order to address the difficulties of the prior art, the inventors have performed extensive investigations into possible SiC processing technologies, and have unexpectedly determined that plasma etching of SiC with a hydrogen chloride (HCl)-based plasma overcomes many of the difficulties experienced with prior art SiC etching processes. In particular, the HCI-based plasma etching of SiC is surprisingly uniform and produces surprisingly smooth etched surfaces. Indeed, unlike other etching methods, the HQ-based etching processes described herein are unexpectedly found to actually reduce the surface roughness of as-grown SiC substrates and thin films, and consequently can be used to improve the quality of SiC surfaces, irrespective of whether a reduction of thickness is required.

Additionally, the etching processes described herein can be used as an integral step in the production of electronic, photonic, and/or micro-electromechanical devices and structures, including production processes in which the described etching processes are used to pattern a SiC thin-film on which a graphene layer is then formed in a self-aligned growth process. In some embodiments, at least part of the supporting substrate underneath the SiC thin-film is removed to form free-standing structures. These structures can be used as sensors or transducers. Many variations of the described processes and applications for the resulting structures will be apparent to those skilled in the art in light of this disclosure.

As shown in Figure 1. in some embodiments of the present invention, a silicon carbide etching process begins by selecting a substrate 202 at step 102. Typically, the substrate 202 may be composed of elemental silicon, and may be in the form of a standard wafer, and consequently Ls described as such in the following. However, it will be apparent to those skilled in the art that other forms and/or compositions of substrate may be used in other embodiments, including substrates having only a surface layer of silicon supported by at least one other material. At step 104, a thin film of SiC 204 is formed on the substrate 202. as shown in cross- sectional side view in Figure 2. At step 106, a layer of photoresist 302 is deposited over the SiC thin-film 204, as shown in Figure 3. Using standard photolithography methods, the photoresist layer 302 is then patterned to form one or more openings 402 therein and thus expose one or more corresponding regions of the underlying SiC 204. as shown in Figure 4. in which the remaining portions of the photoresist layer 302 are shown as mutually spaced islands of photoresist 404.

At step 110, an HCl-based plasma is formed in a plasma etching tool or chamber. In the described embodiments, an inductively coupled plasma (ICP) etching tool is used, and the plasma is formed from gaseous HC1 supplied at a flow rate in the range of 20 to 200 seem. In some embodiments, the flow rate is in the range of 20 to 100 seem, in others from 20 to 80 seem, in yet others from 30 to 70 seem, or from 40 to 60 seem, or about 50 seem. In the described embodiments, the pressure in the etching tool during etching is in the range of 0.5 to 20 mTorr. In some embodiments, the pressure is in the range of 1 to 10 mTorr; in others, from 1 to 6 mTorr, or from 2 to 4 mTorr. In the described embodiments, an JCP etching tool is operated using a coil power in the range of 500 to 2500 W and a bias power in the range of 30 to 500 W. In some embodiments, the coil power in the range of 700 to 2300 W; in others, in the range of 900 to 2100 W, or 1100 to 1900 W, or 1300 to 1700 W, or about 1500 W. In some embodiments, the bias power is in the range of 30 to 500 W, in others in the range of 30 to 500 W. or 50 to 400 W. or 100 to 300 . or about 200 W.

Once the HCl-based plasma has been generated as described above, it is used to etch the one or more regions of the SiC thin film 204 exposed by the corresponding one or more openings 402. In the described embodiment the etching process is continued until the plasma etches completely through the regions of the SiC thin film 204 exposed by the openings 402, although this need not be the case in other embodiments. As shown in Figure 5. the resulting structure includes mutually spaced regions or islands 502 of SiC on the substrate 202. capped with photoresist 404. At step 112. the photoresist 404 remaining on the SiC islands 502 is removed in the standard manner, resulting in the patterned structure shown in Figure 6. Jn the described embodiment, the one or more regions 602 of the underlying substrate 202 exposed between the SiC regions 502 (or between selected ones of the SiC regions 502 if another etching mask is applied) are etched using any suitable etching method {e.g., standard dry etching) to remove the substrate material from under only one or more selected parts of the one or more SiC regions 502 to thereby form free-standing SiC structures in which a corresponding portion of each SiC structure is suspended above a cavity 702 in the substrate 202, each structure being attached to the remaining substrate material only at attachment regions 704 where the substrate material 202 was not removed.

In the described embodiment the SiC structures arc then processed to sublimate Si from at least a surface layer portion of each SiC structure, thereby forming a corresponding graphene surface layer, as shown in Figure 8. As will be apparent to those skilled in the art, the resulting structures) can take any of a wide variety of physical forms, depending on the configuration of the photolithography mask(s) that is/are used. For example. Figures 9 to 12 are scanning electron microscope SEM) images showing some structures that have been produced by the inventors using the process described above. Figures 9 to 11 show flower-like structures having elongate SiC cantilevers suspended above a silicon substrate and radially extending from a central silicon support pillar that anchors the cantilevers to the substrate. Each SiC cantilever includes a graphene surface layer and the stress in each cantilever causes it to curve upwards, away from the silicon substrate. The curvature thus depends on the physical dimensions of each cantilever and its graphene surface layer, and the cantilever's stress profile, which can be at least partially controlled by the process parameters.

For example, Figure 11 shows one of the flower structures in which the tips of the cantilevers have curved to an angle slightly beyond 90° to the silicon surface. Figure 10 shows an array of similar flower structures having cantilevers of different lengths and consequently different angles relative to the substrate. Similarly, Figure 12 is an SEM image of generally rectangular SiC structures with graphenc-surafce layers and cantilevers extending from only one side. Similar to the flower structures of Figure 11, the stress in the cantilevers has cause them to curve away from the silicon surface by an angle slightly greater than 90°.

An unexpected and advantageous characteristic of the HCl-based etching process described herein is the remarkable smoothness of the etched SiC surfaces, including the absence of unwanted microtrench features that are characteristic of prior art etching processes. Additionally, the sidewails are near-vertical. For example. Figure 13 is an SEM image of a cross-section through an etched SiC trench, demonstrating remarkable smoothness of the near-vertical sidewall and the apparent complete absence of micro- trenching. However, the inventors have found that this latter characteristic depends on the etch mask material. For example, smooth sidewails are produced when a photoresist is used as the mask material, whereas micro trenching is observed if a nickel etch mask is used.

An even more unexpected and advantageous characteristic of the described HCl-based plasma etching processes is the outstanding uniformity of the resulting etched SiC surfaces. Indeed, the inventors have determined that the HCl-based plasma etching processes described herein can even be used to reduce (he surface roughness of as-grown SiC. This is in stark contrast to the typical behaviour of other semiconductor etching processes, which usually increase the surface roughness of the material being etched.

Indeed, the described etching processes can be used to smoothen SiC surfaces, even when the formation of SiC structures or the reduction in thickness of SiC is not required. For example, an HCl-based plasma etching process as described herein can be used solely to reduce the surface roughness of a SiC thin film over an entire wafer without requiring an etch mask. For example, this may be desirable to improve the adhesion of a subsequently deposited layer, and/or to improve the properties of the interface with such layer. For example, this may be useful when a compound semiconductor (e.g.. a nitride semiconductor such as GaN) is to be deposited onto or otherwise formed on a SiC surface. Additionally, ihc HCl-based plasma etching process can be used to improve the electronic properties of the interface between SiC and another electronic material in an electronic, photonic, or electro-mechanical device. The HCl-based plasma etching processes described herein produce excellent uniformity across entire wafers (within ± 1%). even when removing almost the entirety of a SiC thin film, as demonstrated below.

EXAMPLES

EpiiaxiaJ 3C-SiC thin films having thicknesses of about 200 nm were grown on 150mm Si(lOO) and Si(l l l) wafers at 100 C in a hot-wall horizontal Low-Pressuure Chemical Vapour Deposition (LPCVD) system using alternating supplies of SiH» and carbon source gas, as described in Iucopi F, Walker G, Wang L. Malesys L, Ma S, Cunning BV, et. a)., Appl. Phys. Lett. 102:011908 (2013).

A Nanometrics NanoSpec AFT was used to make ellipsometry measurements at 5 points over the surface of each wafer with a 5mm edge exclusion (center plus the 4 cardinal points), assuming a constant refractive index of 2.65, and indicated a thickness uniformity better than 2%.

Some wafers were coated with a photoresist layer that was patterned to form an etch mask. A nickel etch mask was used on some wafers.

An HCl-bascd plasma was generated in an STS (Surface Technology Systems) inductively-coupled plasma (ICP) etching tool at ambient temperature, using a flow rate of 50 seem HO and a chamber pressure of 4 mTorr. The etching tool coil power was about 1500 W and the bias power was about 200 W.

This HCl-based plasma was used to etch the SiC thin films and the resulting SiC etch rate was measured to be about 120 nm min. The etching tool was provided with an end-point detection system, and the StCSi selectivity with these process parameters was measured to be about 0.4-0.6.

The SiC: photoresist selectivity was measured to be in the range of 0.7 to 1.4. The photoresist is hardened by the plasma etch, and consequently the photoresist etch rate decreases over time. Figures 14 and 15 are atomic force microscope (AFM) images of 5 x 5 μτη² regions of the surface of a representative SiC sample before (Figure 14) and after (Figure 15) etching by

4 the HCI-based plasma. Although the AFM images appear fairly similar in terms of the spatial distribution of surface features, the vertical scale of those features, as indicated by the Z-axis scale to the right of each image, is substantially reduced after etching, and for this particular sample the RMS surface roughness was reduced from 3.1 mn to 2.3 wm, a remarkable result. The table below summarises the surface smoothing results from four representative samples.

As noted above, the described plasma etching processes not only provide extremely smooth surfaces, but also demonstrate outstanding uniformity across entire wafers. Figure 16 is a set of nine photographic images of a single ISO mm (6 inch) diameter thin- film SiC on silicon wafer, as-grown (top left. 245 nm thin film) and after successive etching steps (left to right, top to bottom) down to an ultimate thickness of only 35 nm. The uniformity of colour across the wafer in each image demonstrates the exceptional uniformity of the etching process, even after 90% of the SiC thin film has been removed.

Many modifications will be apparent to those skilled in the art without departing from the scope of the present invention.

Claims

CLAIMS:

1. A silicon carbide etching process, including:

forming a plasma from an HC1 gas; and

exposing a surface of silicon carbide to (he plasma to etch the silicon carbide.

2. The process of claim 1. including:

forming an etch mask over the surface of silicon carbide, the etch mask having one or more openings therein to expose one or more respective regions of the underlying silicon carbide;

3. The process of claim I or 2, further including sublimating silicon from at least a surface portion of the silicon carbide to form a corresponding graphenc thin film therefrom.

4. The process of any one of claims 1 to 3, wherein the silicon carbide is in the form of a thin film of silicon carbide.

5. The process of claim 4. wherein the plasma etches completely through the silicon carbide thin film.

6. The process of claim 3, wherein the silicon carbide is in the form of a thin film of silicon carbide, and the plasma etches completely through the silicon carbide thin film so that the graphene thin film is self-aligned to the remaining regions of the silicon carbide thin film. The process of any one of claims 4 to 6. wherein prior to said etching, the silicon carbide thin film is supported by a substrate, and the process further includes selectively etching one or more portions of the substrate under corresponding portions of the silicon carbide thin film to form one or more corresponding free standing structures therefrom. The process of claim 7. wherein the one or more free standing structures arc part of one or more sensors. The process of any one of claims 1 to 8. wherein the etching reduces the surface roughness of the silicon carbide. The process of any one of claims I to 9, wherein the silicon carbide surface exposed to the plasma is substantially a surface of an entire wafer. The process of any one of claims 1 to 10, further including forming a thin film of a compound semiconductor on the etched silicon carbide surface, wherein the reduced surface roughness of the etched silicon carbide surface improves one or more properties of the interface between the silicon carbide and the compound semiconductor. The process of claim 11. wherein the compound semiconductor is a nitride compound semiconductor. The process of any one of claims 1 to 12. wherein said etching forms smooth sidewalls substantially without niicrotrcnching. The process of any one of claims t to 1 , wherein said plasma is formed at a pressure in a range of 0.5 to 20 mTorr. The process of claim 14, wherein said plasma is formed at a pressure of about 2 to 4 mTorr. The process of any one of claims 1 to 15. wherein said plasma is formed from an HQ gas at an HC1 flow rate in a range of 20 to 200 seem. The process of claim 16, wherein said plasma is formed from an HC1 gas at an HC1 flow rate of about 50 seem. The process of any one of claims 1 to 17, wherein said etching is performed at a platen temperature in a range of -20 to 300 °C. The process of claim 18, wherein said etching is performed at a platen temperature of about 20 °C.