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WO2014137943A3 - Éléments de mémoire à impédance programmable et procédés correspondants - Google Patents

Éléments de mémoire à impédance programmable et procédés correspondants Download PDF

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Publication number
WO2014137943A3
WO2014137943A3 PCT/US2014/020034 US2014020034W WO2014137943A3 WO 2014137943 A3 WO2014137943 A3 WO 2014137943A3 US 2014020034 W US2014020034 W US 2014020034W WO 2014137943 A3 WO2014137943 A3 WO 2014137943A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory elements
corresponding methods
programmable impedance
impedance memory
buffer layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2014/020034
Other languages
English (en)
Other versions
WO2014137943A2 (fr
Inventor
Wei Ti Lee
Janet Wang
Chakravarthy Gopalan
Jeffrey Allan Shields
Yi Ma
Kuei Chang TSAI
John Sanchez
John Ross JAMESON
Michael A. Van Buskirk
Venkatesh P. Gopinath
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Adesto Technologies Corp
Original Assignee
Adesto Technologies Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Adesto Technologies Corp filed Critical Adesto Technologies Corp
Priority to CN201480011579.XA priority Critical patent/CN105378959A/zh
Publication of WO2014137943A2 publication Critical patent/WO2014137943A2/fr
Publication of WO2014137943A3 publication Critical patent/WO2014137943A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/841—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/0071—Write using write potential applied to access device gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/0073—Write using bi-directional cell biasing

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)

Abstract

L'invention concerne un élément de mémoire programmable entre différents états d'impédance qui peut comprendre une première électrode; une couche de commutation formée en contact avec la première électrode et comprenant au moins un oxyde métallique; et une couche tampon en contact avec la couche de commutation. Une couche tampon peut comprendre un premier métal, du tellure, un troisième élément et un second métal distribué dans la couche tampon. Une seconde électrode peut être en contact avec la couche tampon.
PCT/US2014/020034 2013-03-03 2014-03-03 Éléments de mémoire à impédance programmable et procédés correspondants Ceased WO2014137943A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201480011579.XA CN105378959A (zh) 2013-03-03 2014-03-03 可编程的阻抗储存元件和相应的方法

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201361771930P 2013-03-03 2013-03-03
US61/771,930 2013-03-03
US14/195,787 US20140293676A1 (en) 2013-03-03 2014-03-03 Programmable impedance memory elements and corresponding methods
US14/195,787 2014-03-03

Publications (2)

Publication Number Publication Date
WO2014137943A2 WO2014137943A2 (fr) 2014-09-12
WO2014137943A3 true WO2014137943A3 (fr) 2015-05-07

Family

ID=51492084

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2014/020034 Ceased WO2014137943A2 (fr) 2013-03-03 2014-03-03 Éléments de mémoire à impédance programmable et procédés correspondants

Country Status (3)

Country Link
US (1) US20140293676A1 (fr)
CN (1) CN105378959A (fr)
WO (1) WO2014137943A2 (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9269898B2 (en) * 2014-02-07 2016-02-23 Crossbar, Inc. Low temperature deposition for silicon-based conductive film
FR3037722B1 (fr) 2015-06-16 2018-08-17 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de lecture d'un dispositif memoire electronique
US9431606B1 (en) * 2015-08-12 2016-08-30 Micron Technology, Inc. Memory cells
US10096361B2 (en) 2015-08-13 2018-10-09 Arm Ltd. Method, system and device for non-volatile memory device operation
US9514814B1 (en) 2015-08-13 2016-12-06 Arm Ltd. Memory write driver, method and system
US20170346005A1 (en) * 2016-05-26 2017-11-30 Imec Vzw Rare-Earth Metal Oxide Resistive Random Access Non-Volatile Memory Device
US11537754B1 (en) 2018-09-18 2022-12-27 Adesto Technologies Corporation Pseudo physically unclonable functions (PUFS) using one or more addressable arrays of elements having random/pseudo-random values
CN110379919B (zh) * 2019-05-30 2021-04-02 西安电子科技大学 一种阻变存储器及其制备方法
CN119317348B (zh) * 2024-08-27 2025-11-04 南方科技大学 一种底电极-绝缘层-顶电极结构及其制备方法和微电子器件

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050226036A1 (en) * 2003-11-28 2005-10-13 Katsuhisa Aratani Memory device and storage apparatus
US20060172067A1 (en) * 2005-01-28 2006-08-03 Energy Conversion Devices, Inc Chemical vapor deposition of chalcogenide materials
US20070161186A1 (en) * 2006-01-09 2007-07-12 Macronix International Co., Ltd. Programmable Resistive RAM and Manufacturing Method
US7602042B2 (en) * 2004-11-10 2009-10-13 Samsung Electronics Co., Ltd. Nonvolatile memory device, array of nonvolatile memory devices, and methods of making the same
US20100012917A1 (en) * 2006-05-31 2010-01-21 Norikatsu Takaura Semiconductor devic
US20100133496A1 (en) * 2008-12-02 2010-06-03 Samsung Electronics Co., Ltd. Resistive random access memory
US20100277967A1 (en) * 2009-04-29 2010-11-04 Macronix International Co., Ltd. Graded metal oxide resistance based semiconductor memory device
US20110194329A1 (en) * 2010-02-09 2011-08-11 Sony Corporation Memory component, memory device, and method of operating memory device
US20120236625A1 (en) * 2011-03-18 2012-09-20 Sony Corporation Memory element and memory device

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6791885B2 (en) * 2002-02-19 2004-09-14 Micron Technology, Inc. Programmable conductor random access memory and method for sensing same
US7190048B2 (en) * 2004-07-19 2007-03-13 Micron Technology, Inc. Resistance variable memory device and method of fabrication
KR20080018938A (ko) * 2005-06-07 2008-02-28 마이크론 테크놀로지, 인크 스위칭 글래스 층을 구비한 메모리 장치
KR101330769B1 (ko) * 2005-12-12 2013-11-18 오보닉스, 아이엔씨. 칼코겐화물 소자 및 감소된 저매늄 또는 텔러륨 함량을갖는 재료
US7531825B2 (en) * 2005-12-27 2009-05-12 Macronix International Co., Ltd. Method for forming self-aligned thermal isolation cell for a variable resistance memory array
KR101239962B1 (ko) * 2006-05-04 2013-03-06 삼성전자주식회사 하부 전극 상에 형성된 버퍼층을 포함하는 가변 저항메모리 소자
US7777215B2 (en) * 2007-07-20 2010-08-17 Macronix International Co., Ltd. Resistive memory structure with buffer layer
US8134139B2 (en) * 2010-01-25 2012-03-13 Macronix International Co., Ltd. Programmable metallization cell with ion buffer layer

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050226036A1 (en) * 2003-11-28 2005-10-13 Katsuhisa Aratani Memory device and storage apparatus
US7602042B2 (en) * 2004-11-10 2009-10-13 Samsung Electronics Co., Ltd. Nonvolatile memory device, array of nonvolatile memory devices, and methods of making the same
US20060172067A1 (en) * 2005-01-28 2006-08-03 Energy Conversion Devices, Inc Chemical vapor deposition of chalcogenide materials
US20070161186A1 (en) * 2006-01-09 2007-07-12 Macronix International Co., Ltd. Programmable Resistive RAM and Manufacturing Method
US20100012917A1 (en) * 2006-05-31 2010-01-21 Norikatsu Takaura Semiconductor devic
US20100133496A1 (en) * 2008-12-02 2010-06-03 Samsung Electronics Co., Ltd. Resistive random access memory
US20100277967A1 (en) * 2009-04-29 2010-11-04 Macronix International Co., Ltd. Graded metal oxide resistance based semiconductor memory device
US20110194329A1 (en) * 2010-02-09 2011-08-11 Sony Corporation Memory component, memory device, and method of operating memory device
US20120236625A1 (en) * 2011-03-18 2012-09-20 Sony Corporation Memory element and memory device

Also Published As

Publication number Publication date
US20140293676A1 (en) 2014-10-02
CN105378959A (zh) 2016-03-02
WO2014137943A2 (fr) 2014-09-12

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