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WO2014185356A1 - Elément photovoltaïque et son procédé de fabrication - Google Patents

Elément photovoltaïque et son procédé de fabrication Download PDF

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Publication number
WO2014185356A1
WO2014185356A1 PCT/JP2014/062489 JP2014062489W WO2014185356A1 WO 2014185356 A1 WO2014185356 A1 WO 2014185356A1 JP 2014062489 W JP2014062489 W JP 2014062489W WO 2014185356 A1 WO2014185356 A1 WO 2014185356A1
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Prior art keywords
conductive
film
semiconductor film
conductive semiconductor
thin film
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English (en)
Japanese (ja)
Inventor
達郎 綿引
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Priority to CN201480025001.XA priority Critical patent/CN105164819B/zh
Priority to JP2015517059A priority patent/JP6072904B2/ja
Publication of WO2014185356A1 publication Critical patent/WO2014185356A1/fr
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/16—Photovoltaic cells having only PN heterojunction potential barriers
    • H10F10/164—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells
    • H10F10/165—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells
    • H10F10/166—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells the Group IV-IV heterojunctions being heterojunctions of crystalline and amorphous materials, e.g. silicon heterojunction [SHJ] photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/20—Electrodes
    • H10F77/206—Electrodes for devices having potential barriers
    • H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/40—Optical elements or arrangements
    • H10F77/42—Optical elements or arrangements directly associated or integrated with photovoltaic cells, e.g. light-reflecting means or light-concentrating means
    • H10F77/48—Back surface reflectors [BSR]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/52—PV systems with concentrators

Definitions

  • the present invention relates to a photovoltaic device and a manufacturing method thereof, and more particularly to a photovoltaic device such as a solar cell configured using a heterojunction of an amorphous semiconductor and a crystalline semiconductor and a manufacturing method thereof.
  • a crystalline solar cell using a crystalline semiconductor substrate particularly a crystalline silicon solar cell using a crystalline silicon substrate has high photoelectric conversion efficiency and has already been widely put into practical use.
  • a solar cell having an intrinsic semiconductor thin film between the conductive thin film and a crystal substrate has been developed.
  • the intrinsic semiconductor film between the crystal surface and the conductive thin film inactivates surface defects, and has the effect of preventing loss due to impurity diffusion from the conductive thin film and carrier recombination. Therefore, a high open circuit voltage can be obtained. Therefore, the photoelectric conversion efficiency is high.
  • This light confinement structure is a method of aiming to increase the short-circuit current by scattering the light and reciprocating the inside of the element many times to substantially increase the optical path length inside the element and absorb more light.
  • Another cause is a loss that cannot be extracted as a current due to absorption of near-infrared light in layers other than the power generation layer existing inside the device.
  • a translucent conductive film that absorbs infrared light is widely used on the light receiving surface and the back surface, and the absorption loss due to this is remarkable.
  • the absorption of silicon which is a power generation layer
  • the amount of absorption in the light-transmitting conductive film is relatively increased, the short-circuit current is reduced, and the characteristics are deteriorated.
  • Patent Document 3 discloses a technique in which insulating fine particles are dispersed in a power generation layer of a thin film solar cell to scatter incident light. Also disclosed is a technique in which insulating fine particles are dispersed and arranged at the interface of each layer of crystalline silicon solar cells.
  • the power generation layer is a crystal substrate, and when insulating fine particles are dispersed inside, the defects inside the crystal increase and the characteristics deteriorate significantly. Moreover, even if it arrange
  • the present invention has been made in view of the above, and in a thin semiconductor substrate having a thickness of 100 ⁇ m or less that achieves both suppression of infrared absorption and an increase in optical path length due to effective scattering, and without causing deterioration of electrical characteristics.
  • Another object of the present invention is to obtain a photovoltaic device having a high conversion efficiency and a method for producing the same.
  • the photovoltaic device of the present invention has a first conductive semiconductor film and a second conductive semiconductor film on the surface opposite to the light incident side.
  • the first conductive semiconductor film is between the power generation layer and the second conductive semiconductor film, and the first conductive semiconductor film has a refractive index different from that of the first conductive semiconductor film. Insulating fine particles are contained, and the second conductive semiconductor film has a higher carrier concentration than the first conductive semiconductor film.
  • the first conductive semiconductor film is responsible for electrical conduction and infrared light reflection / scattering in the normal direction of the substrate, and the second conductive semiconductor film is in the in-plane direction of the substrate.
  • FIG. 1 is a cross-sectional view showing the photovoltaic element according to the first embodiment of the present invention.
  • FIG. 2 is a flowchart showing the manufacturing process of the photovoltaic element.
  • 3A to 3F are process cross-sectional views illustrating the manufacturing process of the photovoltaic element.
  • FIG. 4 is a graph showing the output characteristics of the first embodiment of the present invention.
  • FIG. 5 is a cross-sectional view showing the photovoltaic element of the second embodiment.
  • FIG. 6 is a flowchart showing the manufacturing process of the photovoltaic element.
  • FIG. 7 is a process cross-sectional view showing the manufacturing process of the photovoltaic element.
  • FIG. 8 is a sectional view showing a photovoltaic element according to the third embodiment of the present invention.
  • FIG. 1 is a cross-sectional view showing the photovoltaic element according to the first embodiment of the present invention.
  • FIG. 2 is a flowchart showing the manufacturing process of the photovoltaic
  • FIG. 9 is a sectional view showing a photovoltaic element according to the fourth embodiment of the present invention.
  • FIG. 10 is a sectional view showing a photovoltaic element according to the fifth embodiment of the present invention.
  • FIG. 11 is a cross-sectional view schematically showing the structure of the photovoltaic element according to the sixth embodiment of the present invention.
  • the photovoltaic element of the first embodiment uses a first conductive type crystalline semiconductor substrate, and a second conductive type amorphous semiconductor having a different conductivity type from the semiconductor substrate on the first main surface of the semiconductor substrate.
  • a first intrinsic semiconductor thin film having a thin film and having a substantially intrinsic first amorphous semiconductor thin film between the semiconductor substrate and the second conductive amorphous semiconductor thin film; and having the same conductivity type as the substrate on the second main surface of the substrate
  • a translucent conductive film is provided on the type amorphous semiconductor thin film, and a first current collecting electrode is provided on the translucent conductive film.
  • a first conductive semiconductor film is provided on the first conductive type amorphous semiconductor thin film, and has a refractive index different from the refractive index of the first conductive semiconductor film inside the first conductive semiconductor film.
  • a second conductive semiconductor film having a plurality of insulating fine particles, having a second carrier concentration higher than the first conductive semiconductor film on the first conductive semiconductor film, and on the second conductive semiconductor film 2 has a second collector electrode.
  • FIG. 1 is a cross-sectional view showing the photovoltaic element according to the first embodiment.
  • the light L for power generation enters from the side of the translucent conductive film 11.
  • an n-type single crystal silicon substrate 1 having a thickness of 200 ⁇ m or less is used as the first conductive type crystalline semiconductor substrate.
  • a single crystal silicon substrate with a thickness of 50 ⁇ m to 200 ⁇ m is used.
  • the thickness is less than 50 ⁇ m, the improvement in characteristics due to the reduction in thickness is practically saturated and has no effect.
  • the thickness is larger than 200 ⁇ m, absorption by the crystalline silicon is sufficient, and thus absorption loss by the conductive semiconductor film becomes very small.
  • the first intrinsic amorphous silicon layer 2 is used as the intrinsic first amorphous semiconductor thin film
  • the second intrinsic amorphous silicon layer 3 is used as the intrinsic second amorphous semiconductor thin film. It is done.
  • the n-type amorphous silicon layer 5 is used as the first conductive amorphous semiconductor thin film
  • the p-type amorphous silicon layer 4 is used as the second conductive amorphous semiconductor thin film.
  • each of the n-type amorphous silicon layer 5 and the p-type amorphous silicon layer 4 is amorphous, but microcrystalline silicon may be used.
  • an indium tin oxide layer (ITO) is used as the translucent conductive film 11.
  • 6 and 7 are metal electrodes as current collecting electrodes.
  • Light L for power generation enters the n-type single crystal silicon substrate 1 from the translucent conductive film 11 side, that is, from the light receiving surface 1A side.
  • the opposite surface side of the light receiving surface 1A is referred to as a back surface 1
  • the first indium oxide layer 9 is used as the first conductive semiconductor film, and the carrier concentration is in the range of 1 ⁇ 10 16 cm ⁇ 3 to 1 ⁇ 10 19 cm ⁇ 3 .
  • the material of the insulating fine particles 8 is titanium oxide, the diameter is in the range of 0.5 ⁇ m to 10 ⁇ m, and the amount contained in the first indium oxide layer 9 is in the range of 10% to 80% of the total volume. is there.
  • the first indium oxide layer 9 including the insulating fine particles 8 has a reflectance of 40% or more, preferably 99% or more in the wavelength range of 900 to 1200 nm.
  • the second conductive semiconductor film uses the second indium oxide layer 10 and has a surface carrier concentration in the range of 1 ⁇ 10 19 cm ⁇ 3 to 1 ⁇ 10 21 cm ⁇ 3 .
  • the second indium oxide layer 10 may have a uniform carrier concentration, but a desirable form is that the carrier concentration of the first indium oxide layer 9 is within the second indium oxide layer 10. It is a carrier concentration gradient layer having a structure in which the gradient is changed from the surface carrier concentration to the surface carrier concentration.
  • the second indium oxide layer 10 can be easily produced by changing the oxygen flow rate when producing the second indium oxide layer 10 by a sputtering method.
  • the carrier concentration of the first indium oxide layer 9 is increased exponentially in a film thickness of 50 nm from 1 ⁇ 10 18 cm ⁇ 3 of the second indium oxide layer 10 to 1 ⁇ 10 21 cm ⁇ 1 . Thereby, the connection resistance with the first indium oxide layer 9 and the connection resistance with the metal electrode 7 are reduced, and the characteristics are improved.
  • the first indium oxide layer 9 which is the first conductive semiconductor layer containing the insulating fine particles 8 can be produced by a coating method using a solution containing a material. .
  • a solution containing insulating fine particles and indium oxide particles is applied on the n-type amorphous silicon layer 5 by spin coating or screen printing, and heated and dried to uniformly contain the insulating fine particles 8.
  • Indium oxide layer 9 can be formed.
  • the solution is composed of an organic solvent such as indium oxide particles, an organic binder, and alcohols.
  • the diameter of the indium oxide particles is, for example, about 10 to 50 nm.
  • the organic binder for example, an acrylic resin is used.
  • the volume ratio of the insulating fine particles 8 can be easily controlled by the concentration relative to the indium oxide particles in the solution. Further, the film thickness can be controlled so that the reflectance becomes a predetermined value by repeating the number of times of coating. Since the carrier concentration in the first indium oxide layer 9 is generally determined by the amount of oxygen, it can be easily controlled by annealing in an oxygen atmosphere after the film is formed.
  • the technique of directly applying and forming on the n-type amorphous silicon layer 5 is used, but other techniques may be used.
  • a high temperature process of 200 ° C. or higher is adopted for a photovoltaic element including an amorphous semiconductor, characteristics may be deteriorated. Therefore, although details will be described in Embodiment 2, for example, a second indium oxide layer 10 and a first indium oxide layer 9 including insulating fine particles 8 are formed in this order on a metal sheet in advance, and then the first indium oxide layer 9 is formed in this order.
  • One indium oxide layer 9 may be bonded onto the n-type amorphous silicon layer 5. With this method, a process exceeding 200 ° C.
  • the process can be flexible when manufacturing the structure, and the process can be flexible. Further, by increasing the temperature, for example, the quality of the first and second indium oxide layers 9 and 10 can be improved, and the degree of freedom in design is improved.
  • a method of bonding the first indium oxide layer 9 and the n-type amorphous silicon layer 5 there is a method using a conductive adhesive, but a preferable method is a method using no conductive material, for example, n If the back surface of the single crystal silicon substrate 1 is flat, a surface activated bonding method can be used. Even if it does not have a so-called texture structure having a concavo-convex structure on the back surface, the use of this structure can sufficiently scatter light, so that there is no deterioration in characteristics.
  • a solution containing indium oxide particles used for forming the first indium oxide layer 9 is formed in a state in which the insulating fine particles 8 are not contained. It can apply
  • Indium oxide is used for the first conductive semiconductor film, but other materials may be used as long as they have high transparency to infrared light and the conductivity can be controlled in a wide range by the carrier concentration.
  • a material that does not contain indium, which is a rare metal is preferable. Even if boron oxide, zinc oxide to which gallium or aluminum is added in a trace amount, silicon to which a trace amount of boron or phosphorus is added, or an organic semiconductor may be used. good.
  • the structure proposed in this embodiment can be manufactured at low cost by a coating method.
  • titanium oxide is used as the insulating fine particles 8, but other materials may be used as long as the insulating fine particles 8 have no charge inside. Specific examples include silicon oxide, aluminum oxide, magnesium oxide, magnesium fluoride, zirconium oxide, silicon nitride, silicon nitride oxide, carbonized silicon, diamond and the like. Alternatively, bubbles, organic substances, and oxygen atoms may be used. A material having a higher refractive index than the first conductive semiconductor film is desirable.
  • the insulating fine particles 8 preferably have a diameter of 0.5 ⁇ m or more and 10 ⁇ m or less.
  • the diameter of the insulating fine particles 8 is less than 0.5 ⁇ m, the scattering property is lowered because it is less than half of the transmission wavelength.
  • the diameter of the insulating fine particles 8 exceeds 10 ⁇ m, the film thickness of the first conductive semiconductor film exceeds 10 ⁇ m, and the vertical resistance value of the first conductive semiconductor film is 0. 1 ⁇ cm 2 or more.
  • the carrier concentration of the first conductive semiconductor film is increased to avoid this, the light absorption loss cannot be ignored when the film thickness exceeds 10 ⁇ m, and the characteristics deteriorate in any situation.
  • the resistivity of a material manufactured by these methods is greatly inferior to that of indium oxide manufactured by using a vacuum process, and it is difficult to achieve both optical characteristics and electrical characteristics with a single layer.
  • By adopting a two-layer structure it becomes possible to achieve both optical characteristics and electrical characteristics, and at the same time, it is possible to improve the characteristics of the element and simultaneously reduce the material and process costs.
  • an n-type single crystal silicon substrate 1 having a main surface with a plane orientation of (100) and containing phosphorus (P) was prepared (FIG. 3A).
  • the n-type single crystal silicon substrate 1 has a size of about 10 cm ⁇ 10 cm to 20 cm ⁇ 20 cm and a thickness of about 100 to 200 ⁇ m.
  • the surface of the n-type single crystal silicon substrate 1 is etched by dipping in an alkaline solution to remove wire saw damage during slicing. Since crystal distortion remains in the cross section, the surface is etched by about 10 to 20 ⁇ m using HF + HNO 3 or NaOH.
  • step S101 After removing impurities in the substrate by gettering, unevenness of the texture structure is formed in order to reduce reflection loss by the optical confinement structure.
  • An alkali solution containing isopropyl alcohol is used as a method for forming the textured irregularities (step S101).
  • the texture was formed after the wire saw damage removal process to reduce the influence of metal contamination on the wire saw damage, but when the influence of metal contamination on the wire saw is small, the removal of the wire saw damage and the formation of the texture. It may also serve as.
  • the wire saw damage can be removed and the texture can be formed.
  • RIE reactive ion etching
  • the n-type single crystal silicon substrate 1 is cleaned by RCA cleaning, the surface oxide film is removed with dilute hydrofluoric acid immediately before the film formation, and the intrinsic non-existence is obtained by plasma CVD in a 13.56-60 MHz plasma CVD chamber.
  • a crystalline silicon layer 2 (step S102) and a p-type amorphous silicon layer 4 (step S103) were sequentially formed on the light receiving surface side (FIG. 3B).
  • Intrinsic amorphous silicon layer 2 is formed by plasma CVD under the conditions of SiH 4 gas flow rate of 60 sccm, H 2 gas of 60 sccm, pressure of 100 Pa, substrate temperature of 170 ° C., and RF power of 30 W.
  • the film thickness is 3 nm.
  • the film thickness is preferably 1 nm or more and 10 nm or less.
  • a p-type amorphous silicon layer 4 is formed by plasma CVD (step S103).
  • the film forming conditions are as follows: SiH 4 gas flow rate 10 sccm, H 2 gas flow rate 1000 sccm, B 2 H 6 gas (1% H 2 base) flow rate 2 sccm, pressure 200 Pa, substrate temperature 170 ° C., and RF power 200 W.
  • the film thickness is 4 nm. In addition, 1 nm or more and 10 nm or less are preferable. In order to reduce light absorption, it is preferable to reduce the thickness of the p-type silicon layer without lowering Voc and fill factor FF.
  • the back side intrinsic amorphous silicon layer 3 (step S104) and the n-type amorphous silicon layer 5 are sequentially laminated (step S105) (FIG. 3C).
  • the intrinsic amorphous silicon layer 3 is formed by the plasma CVD method under the conditions of SiH 4 gas flow rate 60 sccm, H 2 gas flow rate 60 sccm, pressure 100 Pa, substrate temperature 170 ° C., and RF power 30 W.
  • the film thickness is 4 nm. A range of 1 nm to 10 nm is preferable.
  • the n-type amorphous silicon layer 5 is formed by plasma CVD under the conditions of SiH 4 gas flow rate of 40 sccm, PH 3 gas (2% H 2 base) flow rate of 20 sccm, pressure of 100 Pa, substrate temperature of 170 ° C., and RF power of 30 W. ing.
  • the film thickness is 20 nm. A range of 1 nm to 40 nm is preferable.
  • an indium tin oxide layer as the translucent conductive film 11 is formed on the light receiving surface side (step S106) (FIG. 3D).
  • the indium tin oxide (ITO) layer is formed by a sputtering method.
  • the formation conditions are a substrate temperature of 180 ° C., an Ar gas flow rate of 70 sccm, an O 2 gas flow rate (5% Ar base) of 5 sccm, a pressure of 0.7 Pa, and an RF power of 800 W, and the film thickness is 100 nm.
  • the film thickness of the indium tin oxide layer is preferably 60 nm to 120 nm from the viewpoint of optical confinement.
  • translucent conductive film SnO 2 , In 2 O 3 , ZnO, CdO, CdIn 2 O 4 , CdSnO 3 , MgIn 2 O 4 , CdGa 2 O 4 , GaInO 3 , InGaZnO 4 , Cd 2 Sb 2 O 7 , Cd 2 GeO 4 , CuAlO 2 , CuGaO 2 , SrCu 2 O 2 , TiO 2 , Al 2 O 3, etc.
  • dopant one or more elements selected from Al, Ga, In, B, Y, Si, Zr, Ti, F, and Ce may be used.
  • Other forming methods include vapor deposition and ion plating.
  • a first indium oxide layer 9 including insulating fine particles 8 is formed on the back surface side as a first conductive semiconductor layer (step S107) (FIG. 3E).
  • a solution containing insulating fine particles and indium oxide particles is applied by a screen printing method, heated and dried to form the first indium oxide layer 9 uniformly containing insulating fine particles.
  • the solution is composed of an organic solvent such as indium oxide particles, an organic binder, and alcohols.
  • the diameter of the indium oxide particles is, for example, about 10 to 50 nm, and the organic binder is, for example, an acrylic resin.
  • the volume ratio of the insulating fine particles may be easily adjusted by the concentration with respect to the indium oxide particles in the solution.
  • the oxygen concentration can be adjusted by annealing in an oxygen atmosphere, and the carrier concentration can be controlled.
  • the composition gradient layer is formed as the first conductive semiconductor layer, it can be achieved by a method of decreasing the concentration of the insulating fine particles 8 sequentially in a plurality of coating steps.
  • a second indium oxide layer 10 having a thickness of about 10 to 100 nm is formed as a second conductive semiconductor layer on the back side by sputtering (step S108) (FIG. 3 (f)).
  • a metal electrode 6 as a current collecting electrode on the light receiving surface side and a metal electrode 7 as a current collecting electrode on the back surface side are sequentially formed on the light receiving surface side and the back surface side (step S109, step S110).
  • the collector electrodes 6 and 7 are formed by inkjet, screen printing, copper wire bonding, spraying, or the like. Screen printing is preferable from the viewpoint of productivity. Screen printing is formed using a conductive paste made of metal particles such as Ag and a resin binder.
  • the photovoltaic element shown in FIG. 1 is obtained as described above.
  • FIG. 4 is a graph showing the change in the improvement rate of the output characteristics when the volume ratio of the insulating fine particles 8 in the first indium oxide layer 9 is changed in the photovoltaic element of the present embodiment.
  • the carrier concentrations in the first indium oxide layer 9 are 1 ⁇ 10 17 cm ⁇ 3 (white squares) and 1 ⁇ 10 18 cm ⁇ 3 (black circles), respectively, and the mobility is about 1 to 10 cm 2 / Vs.
  • the mobility described here is the mobility in a state where the insulating fine particles 8 are not included.
  • the surface carrier concentration in the second indium oxide layer 10 is about 1 to 5 ⁇ 10 20 cm ⁇ 3 .
  • the output characteristics are standardized when the output of a cell manufactured with a conventional structure is 1.
  • the first indium oxide layer 9 containing the insulating fine particles 8 is not used, and only the second indium oxide layer 10 has a carrier concentration of about 1 to 5 ⁇ 10 20 cm ⁇ 3 .
  • the volume ratio of the insulating fine particles 8 is increased, the absorption by the second indium oxide layer 10 is reduced, and the output characteristics are improved by increasing the optical path length due to optical scattering.
  • the improvement in optical characteristics is almost saturated when the volume ratio of the insulating fine particles 8 is in the range of about 40 to 60%. Output characteristics are improved.
  • the electrical resistance in the thickness direction of the first indium oxide layer 9 is 0.1 ⁇ cm 2 or less, and the influence of electrical characteristics is very small, so that the loss is small.
  • the volume ratio of the insulating fine particles 8 is 60% or more, the optical characteristics are not improved any more, and the electrical characteristics start to deteriorate, so that the output characteristics are deteriorated.
  • the volume ratio of the insulating fine particles 8 exceeds 80%, the electrical resistance increases and the output characteristics are greatly deteriorated.
  • the surface carrier concentration of the second indium oxide layer 10 is set to about 1 to 5 ⁇ 10 20 cm ⁇ 3 as in the case of a typical element, so that the electrical characteristics are maintained.
  • the surface carrier concentration of the first indium oxide layer 9 is as low as less than 1 ⁇ 10 19 cm ⁇ 3 and the electrical characteristics are not good, but it has scattering properties, and the optical characteristics can be improved.
  • the first indium oxide layer 9 having a low carrier concentration and the second indium oxide layer 10 having a high carrier concentration are formed in this order on the back surface 1B side of the n-type single crystal silicon substrate 1, and oxidation with a low carrier concentration is performed.
  • the insulating fine particles 8 By disposing the insulating fine particles 8 in the indium layer, both optical characteristics and electrical characteristics can be achieved, and the characteristics are improved.
  • the carrier concentration is made uniform, it becomes difficult to achieve both, and loss of either or both of the optical characteristics and the electrical characteristics cannot be suppressed.
  • insulating fine particles are arranged in the second indium oxide layer 10 having a high carrier concentration, it becomes difficult to suppress absorption loss and the characteristics are deteriorated.
  • the first indium oxide layer 9 containing the insulating fine particles 8 is in direct contact with the n-type amorphous silicon layer 5 constituting the power generation layer, light absorption is small and scattering is performed. The effect can be exhibited effectively.
  • the first indium oxide layer 9 contains insulating fine particles 8 which are substantially spherical fine particles, the area of the scattering surface can be made extremely large with respect to the film thickness, and light absorption is suppressed. In addition, the scattering effect can be enhanced. Also from the above points, according to the configuration of the present embodiment, it is possible to greatly improve the optical characteristics.
  • FIG. 5 is a sectional view showing the photovoltaic element of the second embodiment
  • FIG. 6 is a flowchart showing the manufacturing process of the photovoltaic element
  • FIG. 7 is a sectional view of the process.
  • the first and second indium oxide layers 9 and 10 are directly applied on the n-type amorphous silicon layer 5 and baked, but in this embodiment, the method is used. The method for preventing a semiconductor layer from deteriorating by a baking process is shown.
  • the second indium oxide layer 10 and the first indium oxide layer 9 are sequentially formed on the metal substrate 7S as the current collecting electrode on the back surface, and the n
  • This is a photovoltaic device formed by direct bonding to the n-type single crystal silicon substrate 1 on which the layers up to the type amorphous silicon layer 5 are formed by surface activated bonding. Since other parts are the same as those in the first embodiment, description thereof is omitted here.
  • the second indium oxide layer 10 and the first indium oxide layer 9 including the insulating fine particles 8 are formed in this order on the metal substrate 7S in advance, and the element region is formed. This is a method in which the substrate side can be formed without undergoing a high temperature process by directly bonding to the n-type single crystal silicon substrate 1.
  • a mask is formed on the back surface side, and a texture is formed only on the light receiving surface side (single-side texture forming step S101S).
  • the process up to the step of forming the light-transmitting conductive film 11 in step S106 and obtaining the laminate shown in FIG. 7A is the same as that of the first embodiment.
  • the metal electrode 6 is formed by screen printing as the light-receiving surface-side collecting electrode (light-receiving surface-side collecting electrode forming step S110).
  • a metal substrate 7S such as a metal sheet is prepared in advance (step S201).
  • the second indium oxide layer 10 (FIG. 7C) is applied on the metal substrate 7S by a screen printing method (step S202).
  • the first indium oxide layer 9 (FIG. 7D) including the insulating fine particles 8 is produced by a screen printing method or the like (step S203).
  • heat treatment is performed at 200 to 250 ° C. for 30 minutes (step S204).
  • the first indium oxide layer 9 is bonded to the n-type amorphous silicon layer 5 by the surface activation bonding method (FIG. 7E) (step S205).
  • the surface activated room temperature bonding method surface bonding is performed in a vacuum to bring the surface atoms into an active state that is easy to form a chemical bond, and the temperature at which the bonding or heat treatment at room temperature is greatly reduced. It is a way to make it possible.
  • the surface Prior to bonding, the surface is cleaned using sputter etching using an ion beam or plasma, and such a surface layer is removed by diffusion or the like through a heating (and pressurizing) process, and a chemical reaction between atoms. To improve the bonding strength.
  • This process takes place in a vacuum chamber evacuated to high vacuum. At this time, the surface where the atoms with bonds after the sputter etching are exposed has a high bonding force with other atoms and is considered to be in an active state. Can be obtained.
  • a process exceeding 200 ° C. can be adopted when the above structure is manufactured, and the process can be flexible. Further, by increasing the temperature, for example, the quality of the first and second indium oxide layers 9 and 10 can be improved, and the degree of freedom in design is greatly improved.
  • this structure does not have a so-called textured structure having a concavo-convex structure on the back surface, the use of this structure can sufficiently scatter light, so there is no deterioration in characteristics.
  • the thick metal substrate 7S can be used as the current collecting electrode on the back surface side, and the resistance can be further reduced.
  • a method for joining the first indium oxide layer 9 and the n-type amorphous silicon layer 5 may be used.
  • FIG. 8 is a sectional view showing the structure of a photovoltaic element according to the third embodiment of the present invention.
  • the light L for power generation enters from the side of the translucent conductive film 11.
  • the photovoltaic element of the third embodiment includes a third conductive semiconductor between the first conductive type amorphous semiconductor thin film and the first conductive semiconductor film in the photovoltaic element of the first embodiment. And a carrier concentration of the third conductive semiconductor film is higher than a carrier concentration of the first conductive semiconductor film.
  • the third conductive semiconductor thin film is the third indium oxide layer 13, and the carrier concentration is in the range of 1 ⁇ 10 19 cm ⁇ 3 to 5 ⁇ 10 20 cm ⁇ 3. And the thickness is desirably 1 nm or more and 100 nm or less.
  • Other configurations are the same as those of the photovoltaic element of the first embodiment shown in FIG.
  • the third indium oxide layer 13 as the third conductive semiconductor film is a first conductive type amorphous thin film ( It is formed on the n-type amorphous silicon layer 5).
  • the manufacturing method is not limited to the coating method, and other methods such as a sputtering method or a CVD method may be used.
  • the resistance of the junction increases when the work function difference is large. In this case, it is possible to reduce the junction resistance by increasing the carrier concentration. If it is 1 ⁇ 10 19 cm ⁇ 3 or less, the junction characteristics are deteriorated, and if it is 5 ⁇ 10 20 cm ⁇ 3 or more, the absorption by the third indium oxide layer 13 is increased and the characteristics are degraded. .
  • the third indium oxide layer 13 is desirably thin, but if the carrier concentration is 1 ⁇ 10 19 cm ⁇ 3, it may be about 100 nm. If it is 1 ⁇ 10 19 cm ⁇ 3 or more, it is necessary to suppress the film thickness to 100 nm or less.
  • the carrier concentration is high between the first conductive type amorphous semiconductor thin film (n-type amorphous silicon layer 5) and the first conductive semiconductor film (first indium oxide layer 9). Since the third conductive semiconductor film is provided, the electrical characteristics can be improved.
  • the second conductive semiconductor film (second indium oxide layer 10) is changed from the carrier concentration of the first conductive semiconductor film to the carrier concentration of the surface with an inclination. Is desirable.
  • Embodiment 4 The photovoltaic device of the fourth embodiment is characterized by a structure in which the p-type amorphous silicon layer 4 and the n-type amorphous silicon layer 5 of the first embodiment are interchanged. The other details are the same as those of the first embodiment, and thus detailed description thereof is omitted.
  • FIG. 9 is a sectional view showing the structure of the photovoltaic element according to the fourth embodiment of the present invention.
  • the light L for power generation enters from the side of the translucent conductive film 11.
  • the manufacturing procedure and process are the same as those in Embodiment Mode 1, and description thereof is omitted.
  • the present invention can also be applied to an element that receives light L from the first conductive type amorphous semiconductor thin film side, and the improvement in characteristics is shown in FIG. It is the same.
  • the photovoltaic element of the fifth embodiment uses a first conductive type crystalline semiconductor substrate, and includes a field effect layer having the same conductivity type as the substrate on the first main surface of the substrate, and on the field effect layer A passivation film is provided, and an antireflection film is provided on the passivation film. Furthermore, a substantially intrinsic second amorphous semiconductor thin film is provided on the second main surface of the substrate, and the second conductivity type amorphous semiconductor thin film is formed on a part of the second amorphous semiconductor thin film. And having a first conductivity type amorphous semiconductor thin film in the other part.
  • a first conductive semiconductor film and a fourth conductive semiconductor film are provided on the first conductive type amorphous semiconductor thin film and the second conductive type amorphous semiconductor thin film, respectively. Insulating fine particles having refractive indexes different from those of the first and fourth conductive semiconductor thin films are provided inside the conductive semiconductor thin film, and the first and fourth conductive semiconductor thin films are provided on the first and fourth conductive semiconductor thin films.
  • the second and fifth conductive semiconductor thin films each have a higher carrier concentration than the fourth conductive semiconductor film, and the first and second current collecting electrodes are provided on the second and fifth conductive semiconductor thin films. Each has a structure.
  • FIG. 10 is a sectional view schematically showing the structure of the photovoltaic element according to the fifth embodiment of the present invention.
  • the field effect layer is an n-type silicon layer 15 doped with the same conductivity type as the n-type single crystal silicon substrate 1, and has a higher carrier concentration than the n-type single crystal silicon substrate 1.
  • the passivation film is the silicon oxide layer 14 and contributes to improvement of the photocurrent by electrically deactivating the surface of the n-type silicon layer 15.
  • the fourth conductive semiconductor film is the fourth indium oxide layer 16, contains the insulating fine particles 8, and has a carrier concentration of less than 1 ⁇ 10 19 cm ⁇ 3 .
  • the mobility is about 1-10 cm 2 / Vs.
  • the fifth conductive semiconductor film is the fifth indium oxide layer 17, and the carrier concentration is about 1 to 5 ⁇ 10 20 cm ⁇ 3 .
  • Light L for power generation enters from the antireflection film 12 side.
  • Other configurations are the same as those of the photovoltaic element of the first embodiment shown in FIG.
  • phosphorus is diffused into the n-type single crystal silicon substrate 1 having the texture structure on both sides to form the n-type silicon layer 15.
  • a silicon oxide layer 14 is deposited by a CVD method, and the second main surface is polished or etched using the silicon oxide layer 14 as a mask.
  • the polishing method may be alkaline solution treatment or mechanical polishing.
  • the positive electrode and the negative electrode are sequentially separated by the separation line S on the second main surface by using a patterning technique based on a lithography technique or a screen printing technique to produce the structure shown in FIG. Since the manufacturing method of each layer is the same as the method described in Embodiment Mode 1, description thereof is omitted.
  • the present invention can also be applied to a so-called back electrode type photovoltaic device having a current extraction electrode on the surface opposite to the light incident surface as shown in the fifth embodiment.
  • the flatness of the second main surface is higher than that of the first main surface in order to improve patterning accuracy. Therefore, the optical path length is lower than that of the conventional structure. Therefore, by applying the present invention, the improvement of the characteristics can be made higher than that shown in FIG.
  • the n-type silicon layer 15 and the silicon oxide layer 14 are used as the passivation film, but these can be changed, and the intrinsic amorphous semiconductor and the first or second conductive layer can be used as the field effect layer.
  • a type amorphous semiconductor thin film may be used.
  • a silicon nitride layer, an aluminum oxide layer, a silicon nitride oxide layer, or a laminated structure of these materials may be used instead of the silicon oxide layer 14, a silicon nitride layer, an aluminum oxide layer, a silicon nitride oxide layer, or a laminated structure of these materials may be used.
  • the same process is performed. It can also be formed. However, they may be different, and the sheet resistance of the first conductive type semiconductor film is preferably lower than the sheet resistance of the fourth conductive type semiconductor film from the effect of improving the characteristics.
  • FIG. FIG. 11 is a sectional view schematically showing the structure of a photovoltaic element according to the sixth embodiment of the present invention.
  • the photovoltaic element of the sixth embodiment includes a metal between the first conductive semiconductor film (first indium oxide layer 9) and the second conductive semiconductor film (second indium oxide layer 10).
  • the electrode 7 is arranged. Since other configurations are the same as those of the photovoltaic element of the first embodiment, detailed description thereof is omitted.
  • a direct contact is formed between the first conductive semiconductor layer and the metal electrode.
  • the second indium oxide layer only serves to reduce the in-plane resistance loss.
  • tin is included in the metal electrode material, and tin is added to the first indium oxide layer 9 by a thermal process such as firing. The carrier concentration is partially increased by diffusion.
  • the metal electrode 7 is formed by grid electrodes and bus electrodes distributed at a predetermined interval over the entire back surface of the n-type single crystal silicon substrate 1.
  • the metal electrode 7 is electrically connected in one cell and covered with the second conductive semiconductor layer, and is exposed from the second conductive semiconductor layer only in the connection region with the adjacent cell. Just do it. That is, it is covered with a solder plating layer or the like for external connection only in the connection area with the adjacent cell.
  • the thermal process for diffusing the constituent material (constituent metal) of the metal electrode 7 into the first indium oxide layer 9 as the first conductive semiconductor layer is the second step as the second conductive semiconductor layer. It is desirable to perform this prior to the formation of the indium oxide layer 10. Thereby, the constituent metal of the metal electrode 7 is selectively diffused in the direction of the first indium oxide layer 9, so that the contact resistance at the interface is reduced.
  • heat treatment is performed after the formation of the second indium oxide layer 10, there is some metal diffusion in the second indium oxide layer 10, but it diffuses in the direction of the first indium oxide layer 9 having a lower impurity concentration. Accordingly, the contact resistance between the first conductive semiconductor layer and the metal electrode is reduced.
  • the second conductive semiconductor film includes the metal electrode pattern laminated so as to be distributed over the first conductive semiconductor film, and the second conductive semiconductor film leaves the external connection region. It is formed so as to cover the electrode. According to this configuration, not only the life can be extended by covering the metal electrode, but also the current collecting resistance can be reduced.
  • the semiconductor substrate includes a crystal silicon substrate such as a silicon carbide substrate in addition to a crystalline silicon substrate such as a single crystal silicon substrate or a polycrystalline silicon substrate. It can also be applied to silicon-based substrates.
  • a crystal silicon substrate such as a silicon carbide substrate in addition to a crystalline silicon substrate such as a single crystal silicon substrate or a polycrystalline silicon substrate.
  • the intrinsic or conductive amorphous silicon thin film a crystalline thin film such as a microcrystalline silicon thin film or a polycrystalline silicon thin film may be used.
  • the light receiving surface side may be formed of a diffusion layer.
  • the insulating fine particles 8 may be other materials as long as they are the insulating fine particles 8 having no electric charge in addition to titanium oxide.
  • Specific examples include silicon oxide, aluminum oxide, magnesium oxide, magnesium fluoride, zirconium oxide, silicon nitride, silicon nitride oxide, carbonized silicon, diamond and the like.
  • bubbles, organic substances, and oxygen atoms may be used.
  • a material having a higher refractive index than the first conductive semiconductor film is desirable.
  • the fourth and fifth conductive semiconductor layers need not be a light-transmitting conductive film containing indium, which is a rare metal, and any of the structures proposed in the present invention can be manufactured at low cost by a coating method.
  • Zinc oxide to which boron, gallium, or aluminum is added in a trace amount, silicon to which boron or phosphorus is added in a trace amount, or an organic semiconductor may be used.
  • the first and second conductive semiconductor layers can be formed by any appropriate method such as a spin coating method or a screen printing method, or a method of doping oxygen ions or the like after film formation by sputtering or the like. is there.
  • the amorphous semiconductor thin film includes an amorphous semiconductor thin film and a microcrystalline semiconductor thin film.
  • the present invention can also be applied to a structure using a crystalline thin film such as a polycrystalline silicon thin film instead of an amorphous semiconductor thin film.
  • the photovoltaic element and the manufacturing method thereof according to the present invention can employ a process that does not require a vacuum apparatus such as a coating method, and can be expected to improve characteristics. It also leads to cost reduction. Therefore, it is particularly suitable for photovoltaic power generation that requires a large area.

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  • Photovoltaic Devices (AREA)

Abstract

Cet élément photovoltaïque est doté de : un film semi-conducteur amorphe d'un premier type de conductivité (une couche de silicium amorphe de type n (5)) sur une surface d'un substrat de silicium monocristallin de type n (1) servant comme substrat semi-conducteur, ladite surface étant sur le côté opposé de la surface d'incidence de lumière ; un premier film semi-conducteur conducteur (une première couche d'oxyde d'indium (9)) ayant une faible concentration de support sur le semi-conducteur amorphe ; et un second film semi-conducteur conducteur (une seconde couche d'oxyde d'indium (10)) ayant une concentration élevée de support sur le premier film semi-conducteur conducteur. Des particules fines isolantes (8) sont contenues dans le premier film semi-conducteur conducteur ayant une faible concentration de support. En conséquence, l'adsorption sur le film semi-conducteur conducteur n'a pas lieu et aucune perte n'est provoquée même si la lumière est diffusée et que la longueur du trajet optique est augmentée. De plus, un bon équilibre est atteint entre la suppression d'absorption infrarouge et l'augmentation de la longueur du trajet optique au moyen de diffusion efficace, de telle sorte qu'une efficacité de conversion élevée peut être obtenue sans provoquer de détérioration des caractéristiques électriques même si un substrat semi-conducteur mince de 100 µm au moins est utilisé.
PCT/JP2014/062489 2013-05-14 2014-05-09 Elément photovoltaïque et son procédé de fabrication Ceased WO2014185356A1 (fr)

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