WO2014165623A1 - Flash drives and methods for producing flash drives - Google Patents

Abstract

Memory Devices that are configurable from a substantially rectangular and planar first position to a second position having a processing circuitry interface extending therefrom.

Description

Flash Drives and Methods for Producing Flash Drives

CROSS REFERENCE TO RELATED APPLICATION

This application claims priority to U.S. Provisional Patent Application Serial No. 61/807,602 which was filed on April 2, 2013, entitled "Flash Drives and Methods for Producing Flash Drives", and U.S. Provisional Patent Application Serial No. 61/873,622 which was filed September 4, 2013, entitled "Flash Drives and Methods for Producing Flash Drives", the entirety of each of which is incorporated by reference herein.

TECHNICAL FIELD

This disclosure relates to memory devices, particularly, placard memory devices constructed of substantially rectangular substrate, including but not limited to cellulose based substrate. BACKGROUND

Reference is drawn to the backgrounds of U.S. Patent No. 8,047,443 issued November 1, 2011, entitled "Data Storage Devices"; U.S. Patent No. 8,469,280 issued June 25, 2013, entitled "Programming Devices and Programming Methods"; U.S. Patent No. 8,561,910 issued October 22, 2013, entitled "Memory Programming Methods and Memory Programming Devices"; U.S. Patent Application Publication No. US 2014/0043923 published February 13, 2014, entitled "Memory Programming Methods and Memory Programming Devices"; U.S. Patent No. 8,523,071 issued September 3, 2013, entitled "Electronic Assemblies and Methods of Forming Electronic Assemblies"; and U.S. Patent No. 8,469,271 issued June 25, 2013, entitled "Electronic Storage Devices, Programming Methods, and Device Manufacturing Methods", the entirety of each of which is incorporated by reference herein. DRAWINGS

Embodiments of the disclosure are described below with reference to the following accompanying drawings. Figs. 1A and 1B represent a memory device according to an embodiment.

Figs.2A-2E depict memory devices according to an embodiment in multiple configurations. Fig. 3 represents a memory device in one configuration upon interface with a computer processing device.

Figs.4A-4E depict another memory device according to another embodiment.

Figs.5A-5E depict another memory device according to another embodiment.

Figs. 6A-6E depict another memory device according to an embodiment.

Figs. 7A-7E depict yet another memory device according to yet another embodiment. DESCRIPTION

The present disclosure provides memory devices that can include a rectangular and planar substrate configurable in at least two positions by folding portions of the substrate toward one another. The first position can be substantially planar and rectangular and the second position can be substantially planar and rectangular but include an appendage extending therefrom. The appendage can define and/or include a process circuitry interface.

The present disclosure also provides memory devices that can include a substantially planar and rectangular substrate configurable in at least two positions by folding portions of the substrate toward one another. The devices can also include a rectangular portion defined within the substrate. The rectangular portion can include process circuitry and be bounded by opposing perforations defining opposing edges of the portion. The rectangular portion can also be bounded by at least one slice defining another edge of the rectangular portion.

The present disclosure also provides methods for extending processing circuitry interface(s) from a planar and rectangular substrate by folding the substrate. The methods can include providing the planar and rectangular substrate in a first position, with the first position defining edges around the substrate without an interface extending therefrom. The methods can also include folding at least two portions of the substrate toward one another from between the first position to a second position along a fold line to extend a processing circuitry interface from the substrate. The folding can bias at least two layers of the substrate away from one another at the interface. The present disclosure provides memory devices that can be at least a component of a substantially rectangular placard. Such placards can include substantially cellulose based placards as described in the patent publications referenced herein. The embodiments of the memory devices will be described with reference to Figs. 1 A-7E.

Referring first to Fig. 1A, a memory device 10 is shown as a substantially rectangular configuration having memory and/or processing circuitry 12 associated therewith. According to example implementations, the remainder of the placard of memory device 10 can be substantially rectangular placard 14. Device 10 as shown can be substantially rectangular and planar. As shown in Fig. 1A, this can be the first position of the substrate. The remainder of the placard can be portions 36. As shown, these portions are substantially equivalent in size and can be defined by a fold line 13 extending the processing circuitry portion of the device. Referring to Fig. 1B, memory component and/or processing control component can include interface component 16 and/or processing and control component 18. These memory components and/or processing and control components are consistent with those described in U.S. Patent No. 8,047,443 issued November 1, 2011, entitled "Data Storage Devices"; U.S. Patent No. 8,469,280 issued June 25, 2013, entitled "Programming Devices and Programming Methods"; U.S. Patent No. 8,561,910 issued October 22, 2013, entitled "Memory Programming Methods and Memory Programming Devices"; U.S. Patent Application Publication No. US 2014/0043923 published February 13, 2014, entitled "Memory Programming Methods and Memory Programming Devices"; U.S. Patent No. 8,523,071 issued September 3, 2013, entitled "Electronic Assemblies and Methods of Forming Electronic Assemblies"; and U.S. Patent No. 8,469,271 issued June 25, 2013, entitled "Electronic Storage Devices, Programming Methods, and Device Manufacturing Methods", the entirety of each of which is incorporated by reference herein. As can be seen in this Figure, the circuitry is defined by a substantially rectangular portion of the device. The portion can be bounded by opposing perforations and at least one slice.

Perforations of the present disclosure can be a series of punches having substrate therebetween. Perforations can provide for the folding of the substrate while maintaining a connection between portions of the substrate. The perforations can also be considered engineered weaknesses within the substrate. Perforations are not necessarily punches, perforations can also be partial slices in the substrate. For example a partial slice may slice the substrate only part way through without completely separating the substrate. Lines, as well as perforations can be used to establish fold lines in the substrate. Slices are disconnects between the substrate. Slices can be made by punching the substrate, but slices do represent portions of the substrate that are no longer connected or can be easily disconnected without damaging the substrate. As another example, slices may be formed by burning away portions of the substrate with a laser.

Perforations can designate a structure within the placard that allows for at least partial separation or hinging of one portion of the placard in relation to another portion of the placard without complete separation between the two portions. In accordance with example implementations, this perforation may be a simple series of complete recesses or cuts in the placard and/or they may be just partial slices wherein a hinge portion may be on one side of the placard, while the other opposing side is completely detached, creating a hinged portion.

Referring to Figs.2A-2E, embodiments of memory device 10 are shown in different configurations. In accordance with example implementations, and with reference to Fig.2A, device 10 can include at least one or more perforations 20 and one or more slices 22. Within device 10 can be rectangular portion 28. Rectangular portion 28 can include processing circuitry and be bounded by perforations 20 as well as slice 22.

As an example, portion 28 can have a dimension of 30 in relation to a total dimension of the combination of 35 and 34. As can be seen, perforation 20 can separate sections 35 and 34 of portion 28. Accordingly the dimensions of 24 and 26 can be different to accommodate for the differences of dimensions of 34 and 35.

Sections 35 and 34 can together make up rectangular portion 28 and the separation of these sections can run parallel to the opposing perforations defining the rectangular portion. Upon folding this separating perforation can provide the hinge that layers section 34 upon section 35 to define the process circuitry interface. Remaining perforations can upon folding bias these two sections away from one another. This bias can facilitate the coupling of this interface with an interface of another device such as a USB port. In accordance with example implementations, these perforations may also be aligned to facilitate predefined bending or hinging of portions of the placard in relation to other portions of the placard. As can be seen in Fig. 2A, there are at least four perforations in device 10.

In accordance with example embodiments of the disclosure, placard 10 may also include slices 22. Slices 22 are complete disconnections between portions of the placard and are designed to allow for a complete separation between portions of the placard without hinging. As can be seen, at least one perforation may terminate at a slice.

In accordance with example implementations, aligning a series of perforations and/or slices can allow for the predefined configuration of the placard in one configuration that is substantially rectangular as shown in Fig. 2A, and then another configuration or a second configuration that is not substantially rectangular. In accordance with example implementations and with reference to Figs. 2B, 2C, and 2D, as can be seen, while purposely rotating opposing portions of device 10, hinging at perforations 20 can facilitate the separation of portions of device 10 at slice 22. The other configuration and/or second configuration can be substantially rectangular but may also include an appendage 26. Appendage 26 can include interface components as described herein.

Referring to Fig. 3, for example, device 10 can include at least two portions 38 and 30 biased against each other at a perforation 20 that allows for interface components to be inserted into a USB port, for example, and the biasing of portions 30 and 38 away from each other maintains the relationship of this interface component within the USB port. As shown in Figs.4A-4E, a substantially similar placard to that shown in Figs. 2A-2E is shown, only in a larger configuration. This placard may be manipulated as described with reference to Figs. 2A-2E. Referring to Figs. 5A-E, another device according to another embodiment of the disclosure is provided. As can be seen, device 50 can include memory and/or processing circuitry 52 as well as perforation 60 and slices 62. As shown in this embodiment, the rectangular portion including circuitry 52 can be defined by a pair of opposing slices 62. A perforation 60 can extend across the rectangular portion 82 between slices as well as be aligned with bordering portions 80. As can be seen, these portions can be substantially similar in width. Dissimilar in dimensions are the 84, 88, and 86 portions. The alignment of these portions provide for the extension of the circuitry in the second position as well as the biasing.

In accordance with example implementations, rotation of device 50 can result in a substantially rectangular device 50 being converted to a substantially rectangular device having an appendage 66 that can include portions 68 and 70 biased away from one another and hinged at perforation 60. As can be seen, device 50 can include multiple parallel or opposing perforations 60 as well as multiple parallel slices 62.

With reference to Fig. 6A-6E, the configuration of Fig. 5A-5E can be aligned to extend towards a corner of a substantially rectangular device, allowing for the extension of the appendage orthogonal to a device rather than normal to a device edge.

In accordance with yet another embodiment, and with reference to Figs. 7A-7E, device 100 can be first perforated and separated along at least a separation point 110 to create at least two components 112 and 114. At least one of these components, for example, component 114, can be configured in a substantially flat configuration as separated from component 112 to a substantially appendaged configuration as shown in Fig.7E by pivoting component 114 along predefined perforations and slices as shown. Upon configuration, component 114 can be inserted into a computer operating device such as that shown in Fig.3.

Claims

CLAI MS

1 . A memory device comprising a rectangu lar and planar su bstrate configurable in at least two positions by foldi ng portions of the substrate toward one another, a first position being su bstantially planar and rectangu lar and a second position bei ng su bstantially planar and rectangu lar with an appendage extending therefrom , the appendage comprising process circu itry i nterface .

2. The memory device of claim 1 wherein the appendage comprises at least two layers of substrate cou pled to and biased away from one another.

3. The memory device of claim 1 wherein the second position of the substrate is completely detached from a portion of the su bstrate in the first position .

4. The memory device of claim 1 wherein the substrate i ncludes at least one perforation and at least one slice, the perforation operable to designate a hi nge between portions of the substrate and the slice operable to allow separation between portions of the su bstrate.

5. The memory device of claim 1 wherein the substrate is su bstantially cellu lose.

6. The memory device of claim 1 wherein the substrate defi nes a business card .

7. A memory device comprising:

a substantially planar and rectangular substrate configurable in at least two positions by folding portions of the substrate toward one another; and

a rectangular portion defined within the substrate, the

rectangular portion comprising process circuitry and bounded by opposing perforations defining opposing edges of the portion, the rectangular portion also bounded by at least one slice defining another edge of the rectangular portion.

8. The memory device of claim 7 wherein the slice defines a detached separation between portions of the substrate.

9. The memory device of claim 7 wherein the perforation defines connections between portions of the substrate.

10. The memory device of claim 7 further comprising another slice defining the edge of the rectangular portion, the other slice opposing the one slice.

11. The memory device of claim 7 wherein the rectangular portion further comprises another perforation, the other perforation being parallel to the opposing perforations and located between the opposing perforations, the other perforations defining two sections of the rectangular portion, one of the sections comprising the process circuitry and the other configured to fold against the one section in one of the two positions.

12. The memory device of claim 11 wherein the one of the two positions, the sections are biased away from one another.

13. The memory device of claim 7 further comprising a fold line extending normally from the slice through the remainder of a

remainder of the substrate other than the rectangular portion.

14. The memory device of claim 13 wherein the fold line defines substantially equal portions of the substrate.

15. A method for extending a processing circuitry interface from a planar and rectangular substrate by folding the substrate, the method comprising:

providing the planar and rectangular substrate in a first position, the first position defining edges around the substrate without an interface extending therefrom;

folding at least two portions of the substrate toward one another from between the first position to a second position along a fold line to extend a processing circuitry interface from the substrate, the folding biasing at least two layers of the substrate away from one another at the interface.

16. The method of claim 15 wherein the folding further comprises separating a rectangular portion of the substrate from a remainder of the substrate along at least one slice defined between the remainder of the substrate and the rectangular portion.

17. The method of claim 16 wherein the rectangular portion is separated along two opposing slices.

18. The method of claim 16 wherein the folding further comprises layering two sections of the rectangular portion.

19. The method of claim 15 further comprising coupling the processing circuitry of the substrate with a computer operable device.

20. The method of claim 19 further comprising processing data from the substrate using the computer operable device.