WO2014030371A1 - ゲルマニウム層上に窒化酸化アルミニウム膜を備える半導体構造およびその製造方法 - Google Patents
ゲルマニウム層上に窒化酸化アルミニウム膜を備える半導体構造およびその製造方法 Download PDFInfo
- Publication number
- WO2014030371A1 WO2014030371A1 PCT/JP2013/056678 JP2013056678W WO2014030371A1 WO 2014030371 A1 WO2014030371 A1 WO 2014030371A1 JP 2013056678 W JP2013056678 W JP 2013056678W WO 2014030371 A1 WO2014030371 A1 WO 2014030371A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- oxide film
- nitride oxide
- aluminum nitride
- heat treatment
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28255—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor belonging to Group IV and not being elemental silicon, e.g. Ge, SiGe, SiGeC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
- H10D64/683—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being parallel to the channel plane
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
- H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
Definitions
- the present invention relates to a semiconductor structure and a manufacturing method thereof, and relates to a semiconductor structure including an aluminum nitride oxide film on a germanium layer and a manufacturing method thereof.
- Germanium (Ge) is a semiconductor having electronic properties superior to silicon (Si).
- germanium oxide for example, GeO 2
- MOSFET Metal Oxide Semiconductor Field Effect Transistor
- Non-Patent Documents 1 and 2 describe using an aluminum nitride (eg, AlN) film as a part of the gate insulating film.
- the aluminum nitride film has a higher dielectric constant than the silicon oxide (SiO 2 ) film, and can reduce EOT (Equivalent Oxide Thickness). As the gate length becomes finer, it is important to make the EOT thinner.
- An object of the present invention is to suppress deterioration of an interface state between a germanium layer and an aluminum nitride oxide film.
- the present invention comprises a germanium layer and an aluminum nitride oxide film formed on the germanium layer, wherein the aluminum nitride oxide film has an EOT of 2 nm or less, and a metal film on the aluminum nitride oxide film is Au
- the capacitance value of the germanium layer and the metal film when the voltage is 1 MHz is Cit
- the germanium layer in the accumulation region Cit / Cacc is 0.4 or less, where Ccc is the capacitance value between the metal film and the metal film. According to the present invention, it is possible to suppress the deterioration of the interface state between the germanium layer and the aluminum nitride oxide film.
- the structure when the initial film thickness (nm) before the heat treatment of the aluminum nitride oxide film is T, the structure may be Cit / Cacc ⁇ 0.05 ⁇ T.
- At least one of a germanium nitride oxide film and a compound film of germanium nitride oxide and aluminum nitride oxide formed between the germanium layer and the aluminum nitride oxide film can be provided.
- the aluminum nitride oxide film may have an EOT of 1 nm or less.
- a gate electrode formed over the aluminum nitride oxide film can be provided.
- the present invention includes a step of forming an aluminum nitride oxide film on a germanium layer, the aluminum nitride oxide film, an inert gas atmosphere, a pressure at which the pressure of the inert gas at room temperature is greater than atmospheric pressure, and Heat-treating at a heat treatment temperature higher than the temperature at which the aluminum nitride oxide film is formed. According to the present invention, it is possible to suppress the deterioration of the interface state between the germanium layer and the aluminum nitride oxide film.
- the inert gas may be a nitrogen gas.
- the heat treatment temperature in the heat treatment step may be 400 ° C. or higher, and the pressure may be 2 atm or higher.
- the heat treatment temperature in the heat treatment step may be 400 ° C. or higher, and the pressure may be 10 atm or higher.
- the above structure can include a step of forming a gate electrode over the aluminum nitride oxide film.
- the method includes a step of forming a gate electrode on the aluminum nitride oxide film, the inert gas is nitrogen gas, the heat treatment temperature in the heat treatment step is 400 ° C. or higher, and the pressure is 10 atmospheres or higher. It can be set as the structure which is.
- the present invention it is possible to suppress the deterioration of the interface state between the germanium layer and the aluminum nitride oxide film.
- FIG. 1A to 1D are cross-sectional views illustrating a method for manufacturing a semiconductor structure.
- FIG. 2A and FIG. 2B are diagrams showing the CV characteristic and the IV characteristic in each sample.
- FIG. 3A and FIG. 3B are diagrams showing the CV characteristics.
- FIG. 4 is a schematic diagram showing a standardized capacitance value with respect to the voltage V.
- FIGS. 5A and 5B are diagrams showing the leakage current density and Cit / Cacc with respect to the initial film thickness, respectively.
- FIG. 6A and FIG. 6B are diagrams showing the CV characteristic and the IV characteristic in each sample.
- FIG. 7 is a diagram showing the CV characteristics of each sample.
- FIG. 8 is a diagram showing the interface state density Dit.
- FIG. 9A to 9C are cross-sectional views of samples A to C, respectively.
- FIG. 10A shows the Q-Mass current of nitrogen gas with respect to the heat treatment temperature of each sample.
- FIG. 10B shows the result of measuring the gas released from each sample using Q-Mass when each sample is heat-treated in vacuum.
- FIG. 11A to FIG. 11C are cross-sectional views illustrating a method for manufacturing a semiconductor structure according to the first embodiment. 12A shows the CV characteristics, and FIG. 12B shows the IV characteristics. 13 is a cross-sectional view of a transistor using the semiconductor structure of Example 1.
- FIG. 10A shows the Q-Mass current of nitrogen gas with respect to the heat treatment temperature of each sample.
- FIG. 10B shows the result of measuring the gas released from each sample using Q-Mass when each sample is heat-treated in vacuum.
- FIG. 11A to FIG. 11C are cross-sectional views illustrating a method for manufacturing a semiconductor structure according to the first embodiment. 12A shows the CV characteristics, and FIG. 12B shows the
- AlON aluminum nitride oxide
- the EOT can be thinned.
- the aluminum nitride oxide film is heat-treated in order to improve the film quality of the aluminum nitride oxide film, the interface state between the germanium substrate and the aluminum nitride oxide film is deteriorated. Therefore, the conditions under which the interface state between the germanium substrate and the aluminum oxynitride film does not deteriorate even by heat treatment were examined.
- FIG. 1A to 1D are cross-sectional views illustrating a method for manufacturing a semiconductor structure.
- a germanium substrate 10 is prepared.
- the germanium substrate 10 is a p-type having a (100) plane as a main surface, a dopant of Ga (gallium), and a dopant concentration of about 1 ⁇ 10 16 cm ⁇ 3 .
- an aluminum nitride oxide film 12 is formed on the germanium substrate 10.
- the aluminum nitride oxide film 12 is formed by a reactive sputtering method using aluminum nitride as a target and a gas containing nitrogen gas.
- the target aluminum nitride has a composition ratio of nitrogen and aluminum of approximately 1: 1, but contains oxygen of several atomic percent to several tens atomic percent. For this reason, the formed aluminum nitride oxide film 12 contains oxygen of several atomic percent to several tens atomic percent.
- the germanium substrate 10 is heat-treated in an inert gas. This heat treatment is a post-treatment after the aluminum nitride oxide film 12 is formed, and aims to reduce the defect density in the aluminum nitride oxide film 12.
- an aluminum (Al) film is formed as the metal film 16 on the back surface of the germanium substrate 10
- a gold (Au) film is formed as the metal film 14 on the surface of the aluminum nitride oxide film 12.
- the voltage applied to the metal film 14 when other than Au is used as the metal film 14 can be corrected to the voltage when Au is used as the metal film 14 using the work function of the metal film 14.
- the thickness of the aluminum nitride oxide film 12 was set to 3 nm, and the heat treatment in FIG. 1B was performed in a nitrogen gas atmosphere for 5 minutes.
- the heat treatment conditions for each sample are the following four types. Gas pressure: 1 atmosphere, heat treatment temperature: 500 ° C Gas pressure: 1 atm, heat treatment temperature: 600 ° C. Gas pressure: 50 atm, heat treatment temperature: 500 ° C Gas pressure: 50 atm, heat treatment temperature: 600 ° C
- the gas pressure is a pressure at room temperature (about 25 ° C.). That is, after the sample is sealed with the above gas pressure at room temperature, the temperature is raised and heat treatment is performed. For this reason, the gas pressure during the heat treatment is greater than the gas pressure. The same applies to the following experiments.
- FIG. 2A and FIG. 2B are diagrams showing the CV characteristic and the IV characteristic in each sample.
- the measurement temperature is room temperature. 2A and 2B, each dot indicates a measurement point.
- FIG. 2A shows the capacitance value C between the metal films 16 and 14 with respect to the voltage V of the metal film 14 with respect to the metal film 16.
- the frequency for measuring the capacitance value is 1 MHz.
- the sample having a gas pressure of 1 atm has a capacitance value C that decreases in steps with increasing voltage V in both heat treatments at 500 ° C. and 600 ° C. Furthermore, hysteresis occurs in the CV characteristics.
- the sample having a gas pressure of 50 atm has good CV characteristics and small hysteresis in both heat treatments at 500 ° C. and 600 ° C. 2A
- the saturation capacity value of the sample at 50 atm and 500 ° C. is 1.5 ⁇ F / cm 2 to 1.6 ⁇ F / cm 2 , which corresponds to EOT of 1.85 nm to 2 nm.
- EOT can be converted from the saturation capacity value.
- FIG. 2B shows the leakage current density J between the metal films 16 and 14 with respect to the voltage V of the metal film 14 with respect to the metal film 16.
- the sample having a gas pressure of 1 atm has a large leakage current in both the heat treatment at 500 ° C. and 600 ° C.
- the sample with a gas pressure of 50 atm has a small leakage current in both heat treatments at 500 ° C. and 600 ° C.
- the flat band voltage of these samples is about ⁇ 0.5V.
- FIG. 2 (b) the leak current densities at (flat band voltage ⁇ 1V) of the 500 ° C. and 600 ° C.
- samples having a gas pressure of 1 atm are about 5 ⁇ 10 ⁇ 2 A / cm 2 and about 1 ⁇ , respectively. 10 1 A / cm 2 .
- the leak current densities in the (flat band voltage -1V) of the 500 ° C. and 600 ° C. samples with a gas pressure of 50 atm are about 1 ⁇ 10 ⁇ 5 A / cm 2 and about 1 ⁇ 10 ⁇ 2 A / cm 2 , respectively. .
- 3 (a) and 3 (b) are diagrams showing the CV characteristics.
- 3A shows the CV characteristics of a sample at 600 ° C. with a gas pressure of 1 atm
- FIG. 3B shows the CV characteristics of a sample at 600 ° C. with a gas pressure of 50 atm.
- the measurement temperature is room temperature.
- the frequencies are 10 kHz, 100 kHz, and 1 MHz.
- the capacitance value C near the inversion region is large at a frequency of 10 kHz.
- FIG. 3B the CV characteristics are almost the same regardless of the frequency. This indicates that the sample at 50 atm has few interface states and a good interface state.
- a sample at 50 atmospheres has a smaller capacitance value near the inversion region than a sample at 1 atmosphere.
- FIG. 4 is a schematic diagram showing a capacitance value normalized by a saturation capacitance value with respect to the voltage V.
- the standardized capacitance value is obtained by standardizing the capacitance value measured at a frequency of 1 MHz with the capacitance value of the accumulation region (region where voltage V is small).
- the interface states are poor in the order of curves 40, 42 and 44. The closer to the inversion region, the larger the normalized capacitance value as the curves 40, 42 and 44 are obtained.
- the relative magnitude relationship of the interface state density can be evaluated by the normalized capacitance value when the voltage V is V0.
- the initial film thickness T is the film thickness of the aluminum nitride oxide film 12 when the aluminum nitride oxide film 12 is formed on the germanium substrate 10 as shown in FIG. That is, it is the thickness of the aluminum nitride oxide film 12 before the heat treatment in FIG.
- the leakage current density J is a leakage current density when the voltage V is a flat band voltage ⁇ 1V.
- Cit / Cacc is obtained by standardizing the capacitance value Cit at a frequency of 1 MHz when the voltage V is 0.5 V (corresponding to V0 in FIG. 4) with the capacitance value Cacc (corresponding to the saturation capacitance value) of the storage region. It is.
- the leakage current density J is slightly smaller for the 50 atm sample than for the 1 atm sample.
- the Cit / Cacc is smaller in the 50 atm sample than in the 1 atm sample. This indicates that the sample at 50 atm has a low interface state density and a good interface state.
- Cit / Cacc can be set to 0.4 or less in a 50 atm sample.
- the sample at 50 atmospheres is below the solid line. That is, Cit / Cacc ⁇ 0.05 ⁇ T.
- a favorable interface between the germanium substrate 10 and the aluminum nitride oxide film 12 can be formed by heat-treating the aluminum nitride oxide film 12 at a gas pressure of 50 atmospheres.
- the thickness of the aluminum nitride oxide film 12 was set to 3 nm, and the heat treatment in FIG. 1B was performed at a heat treatment temperature of 500 ° C., a heat treatment time of 5 minutes, and a gas pressure of 50 atm.
- the gas atmosphere of each sample is helium (He) gas, argon (Ar) gas, and nitrogen (N 2 ) gas.
- FIG. 6A and FIG. 6B are diagrams showing the CV characteristic and the IV characteristic in each sample.
- the measurement temperature is room temperature. 6A and 6B, each dot indicates a measurement point, and a straight line indicates a line connecting the dots.
- the measuring method is the same as in FIGS. 2 (a) and 2 (b).
- the CV characteristic of the gas pressure of FIG. 2 (a) is 1 atm and the heat treatment temperature is 500 ° C. Small step and hysteresis.
- the leakage current is smaller than that of the sample of FIG. 2B where the gas pressure is 1 atm and the heat treatment temperature is 500 ° C.
- the flat band voltage of these samples is about ⁇ 0.5V.
- the leakage current at (flat band voltage ⁇ 1V) is about 5 ⁇ 10 ⁇ 3 A / cm 2 , respectively.
- the interface between the germanium substrate 10 and the aluminum nitride oxide film 12 can be satisfactorily formed.
- argon gas it can be approximately the same as nitrogen gas.
- the atmosphere for the heat treatment may be a rare gas without depending on the nitrogen gas.
- the heat treatment in FIG. 1B was performed at a heat treatment temperature of 500 ° C., a heat treatment time of 5 minutes, a nitrogen gas atmosphere, and a gas pressure of 50 atm.
- the film thickness of the aluminum nitride oxide film 12 of each sample is 24 nm and 3 nm.
- FIG. 7 is a diagram showing the CV characteristics of each sample.
- the capacitance value C is normalized by the maximum capacitance value Cmax.
- Other measurement methods are the same as those in FIG.
- the film thickness of the aluminum nitride oxide film 12 is 24 nm, the inversion layer is not formed.
- the aluminum nitride oxide film 12 is preferably thin.
- the heat treatment in FIG. 1B was performed at a heat treatment temperature of 600 ° C., a heat treatment time of 5 minutes, a nitrogen gas atmosphere, and a gas pressure of 50 atm.
- the film thickness of the aluminum nitride oxide film 12 of each sample is 5 nm and 3 nm.
- FIG. 8 is a diagram showing the interface state density Dit. 8, the vertical axis represents the interface state density Dit, the horizontal axis represents the energy from the center E M energy gap. Dit was calculated by CV measurement at 200K. Dots indicate measurement points, and upper and lower bars indicate measurement errors. As shown in FIG. 8, when the thickness of the aluminum nitride oxide film 12 is 5 nm and 3 nm, the interface state density is as small as about 4 ⁇ 10 11 eV ⁇ 1 cm ⁇ 2 . Therefore, the reason why the interface state density can be suppressed by high-pressure heat treatment in an inert gas atmosphere was investigated.
- FIG. 9A to 9C are cross-sectional views of samples A to C, respectively.
- a germanium oxynitride film 22 having a thickness of 10 nm is formed on a germanium substrate 10 by a sputtering method.
- An aluminum nitride oxide film 12 having a thickness of 3 nm is formed on the germanium nitride oxide film 22 by the same method as in FIG.
- an aluminum nitride oxide film 12 having a thickness of 3 nm is formed on the germanium substrate 10 using the same method as in FIG.
- a thin germanium oxynitride film 24 is formed on the surface of the germanium substrate 10 by nitrogen gas and residual oxygen used for the sputtering method.
- a silicon oxide film 26 having a thickness of 10 nm is formed on the silicon substrate 28 by using a thermal oxidation method.
- an aluminum nitride oxide film 12 having a thickness of 3 nm is formed by the same method as in FIG.
- FIG. 10A is a diagram showing the Q-Mass current of nitrogen gas with respect to the heat treatment temperature of each sample.
- FIG. 10B shows the result of measuring the gas released from each sample using Q-Mass when each sample is heat-treated in vacuum.
- the vertical axis indicates the Q-Mass current of nitrogen gas
- the horizontal axis indicates the heat treatment temperature.
- a dot indicates a measurement point, and a straight line indicates a line connecting the dots.
- sample C nitrogen gas is not released up to 800 ° C. or higher.
- sample B nitrogen gas is released at about 780 ° C.
- sample A more nitrogen gas is released than sample B at about 770 ° C.
- FIG. 10B is a diagram showing the peak temperature with respect to the aluminum nitride oxide film thickness.
- the peak temperature at which nitrogen gas is released is plotted while changing the aluminum nitride oxide film thickness of Sample A. Dots indicate measurement points, and straight lines indicate approximate lines. As the thickness of the aluminum nitride oxide film 12 increases, the peak temperature shifts to a slightly higher temperature.
- the inventor performed the heat treatment of the aluminum nitride oxide film 12 on the germanium substrate 10 at 1 atm to cause the deterioration of the interface characteristics between the germanium substrate 10 and the aluminum nitride oxide film 12 as follows. I guessed.
- nitrogen gas is released. Nitrogen gas is not released from sample C, but a large amount of nitrogen gas is released from sample A. This shows that nitrogen is not released from the aluminum nitride oxide film 12, but nitrogen gas is released from the germanium nitride oxide film 24 through the aluminum nitride oxide film 12. That is, the nitrogen gas released in the sample B is nitrogen in the germanium nitride oxide film 24.
- the atmosphere for the heat treatment may be an inert gas instead of a nitriding gas. This is presumably because the release of nitriding is suppressed by the total pressure of the atmosphere during the heat treatment. Therefore, the heat treatment atmosphere may be a gas that does not react with the aluminum nitride oxide film 12 and the germanium substrate 10.
- the germanium nitride oxide film 24 may interdiffuse with aluminum nitride oxide. Therefore, at least one of a germanium nitride oxide film and a compound film of germanium nitride oxide and aluminum nitride oxide is formed between the germanium substrate 10 and the aluminum nitride oxide film 12. Further, the film thickness of the film is preferably 1 nm or less, more preferably 0.5 nm or less, and further preferably 0.3 nm or less from the viewpoint of reducing EOT. The film thickness is preferably 0.1 nm or more in order to keep the interface state between the germanium substrate 10 and the aluminum nitride oxide film 12 in a good state.
- FIG. 11A to FIG. 11C are cross-sectional views illustrating a method for manufacturing a semiconductor structure according to the first embodiment.
- a germanium layer 30 is prepared.
- the germanium layer 30 may be a single crystal germanium substrate or a germanium film formed on a substrate (for example, a silicon substrate).
- the germanium layer 30 may be high-purity germanium, but may contain impurities. For example, n-type or p-type germanium may be used. Further, the germanium layer 30 may contain silicon to such an extent that the effect of the above experiment can be obtained.
- the composition ratio of silicon should just be about 10 atomic% or less of the whole.
- the main surface of the germanium layer 30 can be a (111) plane, for example, but may be another crystal plane such as a (110) plane or a (100) plane.
- an aluminum nitride oxide film 32 is formed on the germanium layer 30.
- the aluminum nitride oxide film 32 is formed by, for example, a sputtering method.
- aluminum nitride or aluminum can be used as the target.
- nitrogen gas as the sputtering gas
- the aluminum nitride oxide film 32 can be formed using a reactive sputtering method.
- the aluminum nitride oxide film 32 may not intentionally contain oxygen. However, since aluminum is easily oxidized, the aluminum nitride film contains oxygen and becomes an aluminum nitride oxide film 32.
- the oxygen content in the aluminum nitride oxide film 32 is several atomic% to several tens atomic%. Furthermore, the oxygen content may be several atomic percent or less.
- the germanium layer 30 and the aluminum nitride oxide film 32 are heat-treated under a high pressure in an inert gas atmosphere. Thereby, the film quality of the aluminum nitride oxide film 32 can be improved. Further, it is possible to suppress the deterioration of the interface characteristics between the germanium layer 30 and the aluminum nitride oxide film 32.
- the heat treatment is performed at a heat treatment temperature higher than the temperature at which the aluminum nitride oxide film 32 is formed.
- the temperature at which the film quality of the aluminum nitride oxide film 32 is improved is preferably a heat treatment temperature of 400 ° C. or higher. More preferably, it is 500 degreeC or more.
- the heat treatment temperature is preferably 700 ° C. or lower.
- the inert gas is a gas that does not react with the aluminum nitride oxide film 32 and the germanium layer 30 at the heat treatment temperature.
- the gas pressure for the heat treatment is such that the pressure of the inert gas at room temperature is greater than atmospheric pressure, and is determined according to the thickness of the aluminum nitride oxide film 32, the heat treatment temperature, and the like.
- the gas pressure at room temperature is preferably 2 atmospheres or more, preferably 5 atmospheres or more, 10 atmospheres or more, or 20 atmospheres or more. Is preferred.
- the gas pressure at room temperature is preferably 100 atm or less.
- the leakage current increases.
- the EOT of the aluminum nitride oxide film 32 is 2 nm or less as shown in FIG.
- the metal film (see the metal film 14 in FIG. 1D) formed on the aluminum oxide film 32 has a flat band voltage of ⁇ 1 V
- the leakage current is 1 ⁇ 10 ⁇ 2. A / cm 3 or less. Further, as shown in FIG.
- the capacitance value of the germanium layer 30 and the metal film when the voltage with respect to the germanium layer 30 of the metal film is 0.5 V is Cit
- the germanium layer 30 and the metal film in the accumulation region Cit / Cacc can be set to 0.4 or less when the capacitance value is Cacc.
- Cit / Cacc is preferably 0.3 or less, more preferably 0.2 or less, and particularly preferably 0.15 or less.
- the interface state density can be reduced.
- Cit / Cacc ⁇ 0.05 ⁇ T.
- Cit / Cacc ⁇ 0.04 ⁇ T.
- the EOT of the aluminum nitride oxide film 32 is preferably 1.5 nm or less, and more preferably 1.0 nm or less.
- the leakage current density is preferably 1 ⁇ 10 ⁇ 3 A / cm 3 or less, and more preferably 1 ⁇ 10 ⁇ 4 A / cm 3 or less.
- the capacitance value when the voltage with respect to the germanium layer 30 of the metal film is 0.5 V is Cit, but when an n-type germanium layer is used, The capacitance value when the voltage with respect to the germanium layer 30 of the metal film is ⁇ 0.5 V is Cit. That is, Cit is a capacitance value when a voltage of 0.5 V is applied to the inversion region side with respect to the germanium layer 30 of the metal film. Further, for example, the voltage for the germanium layer 30 of the metal film is ⁇ 1V from the flat band voltage, which corresponds to when 1V is applied from the flat band voltage to the accumulation region side.
- the voltage difference at C Cmax / 2 (Cmax is the maximum capacity value) is used as an index of hysteresis.
- the semiconductor structure manufactured by the manufacturing method of Example 1 can have a hysteresis index of 50 mV or less when the EOT is 2 nm or less. Further, the hysteresis index can be set to 30 mV or less. Thus, the interface state between the germanium layer 30 and the aluminum nitride oxide film 32 can be improved.
- FIG. 11A a germanium substrate was used as the germanium layer 30.
- FIG. 11B an aluminum nitride oxide film 32 having a thickness of 2 nm was formed by sputtering using nitrogen gas and using aluminum nitride as a target.
- FIG. 11C the heat treatment was performed under the conditions of a heat treatment temperature of 600 ° C., a heat treatment time of 5 minutes, a nitrogen gas atmosphere, and a room temperature pressure of 50 atm. The CV characteristics and IV characteristics of the sample thus prepared were measured. The EOT of this sample is about 0.9 nm.
- FIG. 12A shows the CV characteristics
- FIG. 12B shows the IV characteristics.
- the CV measurement frequencies are 1 MHz, 100 kHz, and 10 kHz.
- CV characteristics are good.
- Figure 12 Referring to (b), the leakage current, forward direction 1 ⁇ 10A / cm 2 or less, the reverse direction is 1 ⁇ 10 -2 A / cm 2 or less. Thus, even if EOT is 1 nm or less, the leakage current (particularly in the reverse direction) is as small as 1 ⁇ 10 ⁇ 2 A / cm 2 or less.
- FIG. 13 is a cross-sectional view of a transistor using the semiconductor structure of the first embodiment.
- a gate electrode 34 is formed on the germanium layer 30 with an aluminum nitride oxide film 32 interposed therebetween.
- Source or drain regions 36 are formed in the germanium layer 30 on both sides of the gate electrode 34.
- the germanium layer 30 is p-type and the source or drain region 36 is n-type.
- the germanium layer 30 may be n-type, and the source or drain region 36 may be p-type.
- the aluminum nitride oxide film 32 as a gate insulating film, a MOSFET with a thin EOT of the gate insulating film and a good interface state between the gate insulating film and the semiconductor layer can be realized.
- Example 1 The semiconductor structure of Example 1 can also be applied to semiconductor devices other than MOSFETs.
- Germanium substrate 12 32 Aluminum oxynitride film 24
- Germanium oxynitride film 30 Germanium layer 34 Gate electrode
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Optics & Photonics (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Formation Of Insulating Films (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
Description
各サンプルの熱処理条件は以下の4種類である。
ガス圧力:1気圧、熱処理温度:500℃
ガス圧力:1気圧、熱処理温度:600℃
ガス圧力:50気圧、熱処理温度:500℃
ガス圧力:50気圧、熱処理温度:600℃
なお、ガス圧力は、室温(約25℃)での圧力である。すなわち、室温において上記ガス圧力でサンプルを密閉後、温度を上げ熱処理を行なっている。このため、熱処理時のガスの圧力は、上記ガス圧力より大きい。以下の実験においても同様である。
12、32 窒化酸化アルミニウム膜
24 窒化酸化ゲルマニウム膜
30 ゲルマニウム層
34 ゲート電極
Claims (11)
- ゲルマニウム層と、
前記ゲルマニウム層上に形成された窒化酸化アルミニウム膜と、
を具備し、
前記窒化酸化アルミニウム膜のEOTが2nm以下であり、前記窒化酸化アルミニウム膜上に金属膜としてAuを形成した際の前記金属膜の前記ゲルマニウム層に対する電圧を反転領域側に0.5V印加したときの前記ゲルマニウム層と前記金属膜との周波数が1MHzにおける容量値をCit、蓄積領域における前記ゲルマニウム層と前記金属膜との容量値をCaccとしたとき、Cit/Caccは0.4以下であることを特徴とする半導体構造。 - 前記窒化酸化アルミニウム膜の熱処理前の初期膜厚(nm)をTとしたとき、
Cit/Cacc<0.05×T
であることを特徴とする請求項1記載の半導体構造。 - 前記ゲルマニウム層と前記窒化酸化アルミニウム膜との間に形成された、窒化酸化ゲルマニウム膜、および窒化酸化ゲルマニウムと窒化酸化アルミニウムとの化合物膜の少なくとも一方を具備することを特徴とする請求項1または2記載の半導体構造。
- 前記窒化酸化アルミニウム膜のEOTが1nm以下であることを特徴とする請求項1から3のいずれか一項記載の半導体構造。
- 前記窒化酸化アルミニウム膜上に形成されたゲート電極を具備することを特徴とする請求項1から4のいずれか一項記載の半導体構造。
- ゲルマニウム層上に窒化酸化アルミニウム膜を形成する工程と、
前記窒化酸化アルミニウム膜を、不活性ガス雰囲気、室温での前記不活性ガスの圧力が大気圧より大きくなるような圧力、および前記窒化酸化アルミニウム膜を形成する際の温度より高い熱処理温度において熱処理する工程と、
を含むことを特徴とする半導体構造の製造方法。 - 前記不活性ガスは窒素ガスであることを特徴とする請求項6記載の半導体構造の製造方法。
- 前記熱処理する工程における熱処理温度は400℃以上であり、かつ前記圧力は2気圧以上であることを特徴とする請求項6または7記載の半導体構造の製造方法。
- 前記熱処理する工程における熱処理温度は400℃以上であり、前記圧力は10気圧以上であることを特徴とする請求項6または7記載の半導体構造の製造方法。
- 前記窒化酸化アルミニウム膜上にゲート電極を形成する工程を含むことを特徴とする請求項6から9のいずれか一項記載の半導体構造の製造方法。
- 前記窒化酸化アルミニウム膜上にゲート電極を形成する工程を含み、
前記不活性ガスは窒素ガスであり、
前記熱処理する工程における熱処理温度は400℃以上であり、前記圧力は10気圧以上であることを特徴とする請求項6記載の半導体構造の製造方法。
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020157004282A KR101680152B1 (ko) | 2012-08-24 | 2013-03-11 | 게르마늄 층 상에 질화 산화 알루미늄 막을 구비하는 반도체 구조 및 그 제조방법 |
| JP2013543456A JP5499225B1 (ja) | 2012-08-24 | 2013-03-11 | ゲルマニウム層上に窒化酸化アルミニウム膜を備える半導体構造およびその製造方法 |
| US14/630,198 US9306026B2 (en) | 2012-08-24 | 2015-02-24 | Semiconductor structure having aluminum oxynitride film on germanium layer and method of fabricating the same |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012-185276 | 2012-08-24 | ||
| JP2012185276 | 2012-08-24 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US14/630,198 Continuation US9306026B2 (en) | 2012-08-24 | 2015-02-24 | Semiconductor structure having aluminum oxynitride film on germanium layer and method of fabricating the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2014030371A1 true WO2014030371A1 (ja) | 2014-02-27 |
Family
ID=50149695
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2013/056678 Ceased WO2014030371A1 (ja) | 2012-08-24 | 2013-03-11 | ゲルマニウム層上に窒化酸化アルミニウム膜を備える半導体構造およびその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US9306026B2 (ja) |
| JP (1) | JP5499225B1 (ja) |
| KR (1) | KR101680152B1 (ja) |
| WO (1) | WO2014030371A1 (ja) |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FI127415B (en) * | 2015-04-16 | 2018-05-31 | Turun Yliopisto | Preparation of foreign oxide in a semiconductor |
| US10224224B2 (en) | 2017-03-10 | 2019-03-05 | Micromaterials, LLC | High pressure wafer processing systems and related methods |
| US10622214B2 (en) | 2017-05-25 | 2020-04-14 | Applied Materials, Inc. | Tungsten defluorination by high pressure treatment |
| US10847360B2 (en) | 2017-05-25 | 2020-11-24 | Applied Materials, Inc. | High pressure treatment of silicon nitride film |
| JP7190450B2 (ja) | 2017-06-02 | 2022-12-15 | アプライド マテリアルズ インコーポレイテッド | 炭化ホウ素ハードマスクのドライストリッピング |
| US10234630B2 (en) | 2017-07-12 | 2019-03-19 | Applied Materials, Inc. | Method for creating a high refractive index wave guide |
| US10269571B2 (en) | 2017-07-12 | 2019-04-23 | Applied Materials, Inc. | Methods for fabricating nanowire for semiconductor applications |
| US10179941B1 (en) | 2017-07-14 | 2019-01-15 | Applied Materials, Inc. | Gas delivery system for high pressure processing chamber |
| US10276411B2 (en) | 2017-08-18 | 2019-04-30 | Applied Materials, Inc. | High pressure and high temperature anneal chamber |
| US10096516B1 (en) | 2017-08-18 | 2018-10-09 | Applied Materials, Inc. | Method of forming a barrier layer for through via applications |
| KR102405723B1 (ko) | 2017-08-18 | 2022-06-07 | 어플라이드 머티어리얼스, 인코포레이티드 | 고압 및 고온 어닐링 챔버 |
| US11177128B2 (en) | 2017-09-12 | 2021-11-16 | Applied Materials, Inc. | Apparatus and methods for manufacturing semiconductor structures using protective barrier layer |
| US10643867B2 (en) | 2017-11-03 | 2020-05-05 | Applied Materials, Inc. | Annealing system and method |
| CN111357090B (zh) | 2017-11-11 | 2024-01-05 | 微材料有限责任公司 | 用于高压处理腔室的气体输送系统 |
| KR102622303B1 (ko) | 2017-11-16 | 2024-01-05 | 어플라이드 머티어리얼스, 인코포레이티드 | 고압 스팀 어닐링 프로세싱 장치 |
| WO2019099255A2 (en) | 2017-11-17 | 2019-05-23 | Applied Materials, Inc. | Condenser system for high pressure processing system |
| CN111699549B (zh) | 2018-01-24 | 2025-03-28 | 应用材料公司 | 使用高压退火的接缝弥合 |
| WO2019173006A1 (en) | 2018-03-09 | 2019-09-12 | Applied Materials, Inc. | High pressure annealing process for metal containing materials |
| US10714331B2 (en) | 2018-04-04 | 2020-07-14 | Applied Materials, Inc. | Method to fabricate thermally stable low K-FinFET spacer |
| US10950429B2 (en) | 2018-05-08 | 2021-03-16 | Applied Materials, Inc. | Methods of forming amorphous carbon hard mask layers and hard mask layers formed therefrom |
| US10566188B2 (en) | 2018-05-17 | 2020-02-18 | Applied Materials, Inc. | Method to improve film stability |
| US10704141B2 (en) | 2018-06-01 | 2020-07-07 | Applied Materials, Inc. | In-situ CVD and ALD coating of chamber to control metal contamination |
| US10748783B2 (en) | 2018-07-25 | 2020-08-18 | Applied Materials, Inc. | Gas delivery module |
| US10675581B2 (en) | 2018-08-06 | 2020-06-09 | Applied Materials, Inc. | Gas abatement apparatus |
| JP7179172B6 (ja) | 2018-10-30 | 2022-12-16 | アプライド マテリアルズ インコーポレイテッド | 半導体用途の構造体をエッチングするための方法 |
| CN112996950B (zh) | 2018-11-16 | 2024-04-05 | 应用材料公司 | 使用增强扩散工艺的膜沉积 |
| WO2020117462A1 (en) | 2018-12-07 | 2020-06-11 | Applied Materials, Inc. | Semiconductor processing system |
| US11901222B2 (en) | 2020-02-17 | 2024-02-13 | Applied Materials, Inc. | Multi-step process for flowable gap-fill film |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3737221B2 (ja) | 1996-09-06 | 2006-01-18 | 英樹 松村 | 薄膜作成方法及び薄膜作成装置 |
| JP4372021B2 (ja) | 2005-01-28 | 2009-11-25 | 株式会社東芝 | 半導体装置の製造方法 |
| JP4891667B2 (ja) | 2005-08-22 | 2012-03-07 | 株式会社東芝 | 半導体装置の製造方法 |
| JP2009094488A (ja) * | 2007-09-21 | 2009-04-30 | Semiconductor Energy Lab Co Ltd | 半導体膜付き基板の作製方法 |
| JP2011054872A (ja) | 2009-09-04 | 2011-03-17 | Panasonic Corp | 半導体装置及びその製造方法 |
-
2013
- 2013-03-11 WO PCT/JP2013/056678 patent/WO2014030371A1/ja not_active Ceased
- 2013-03-11 JP JP2013543456A patent/JP5499225B1/ja active Active
- 2013-03-11 KR KR1020157004282A patent/KR101680152B1/ko active Active
-
2015
- 2015-02-24 US US14/630,198 patent/US9306026B2/en active Active
Non-Patent Citations (4)
| Title |
|---|
| J.P.XU ET AL.: "Comparative Study of HfTa-based gate-dielectric Ge metal-oxide-semiconductor capacitors with and without AlON interlayer", APPLIED PHYSICS A, vol. 99, no. ISSUE, 25 November 2009 (2009-11-25), pages 177 - 180 * |
| TOMONORI NISHIMURA ET AL.: "High-Electron-Mobility Ge n-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with High-Pressure Oxidized Y203", APPLIED PHYSICS EXPRESS, vol. 4, no. ISSUE, 2 June 2011 (2011-06-02), pages 064201 * |
| TOSHIYUKI TABATA ET AL.: "AIN/Ge MIS Gate Stack ni Okeru Koatsu Chisso Anneal no Koka", 2012 NEN SHUNKI DAI 59 KAI EXTENDED ABSTRACTS, JAPAN SOCIETY OF APPLIED PHYSICS AND RELATED SOCIETIES, 29 February 2012 (2012-02-29), pages 13-064 * |
| TOSHIYUKI TABATA ET AL.: "Effect of High Pressure Inert Gas Annealing on AlON/Ge Gate Stacks", APPLIED PHYSICS EXPRESS, vol. 5, no. ISSUE, 22 August 2012 (2012-08-22), pages 091002 * |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20150036714A (ko) | 2015-04-07 |
| US9306026B2 (en) | 2016-04-05 |
| JP5499225B1 (ja) | 2014-05-21 |
| KR101680152B1 (ko) | 2016-11-28 |
| US20150171185A1 (en) | 2015-06-18 |
| JPWO2014030371A1 (ja) | 2016-07-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5499225B1 (ja) | ゲルマニウム層上に窒化酸化アルミニウム膜を備える半導体構造およびその製造方法 | |
| JP5105627B2 (ja) | 複数のアニールステップを用いた酸窒化シリコンゲート誘電体の形成 | |
| US7964514B2 (en) | Multiple nitrogen plasma treatments for thin SiON dielectrics | |
| CN100367513C (zh) | 在硅衬底上层叠栅极绝缘膜和栅极电极的半导体器件及其制造方法 | |
| JP4895803B2 (ja) | 誘電体膜及びゲートスタックの形成方法並びに誘電体膜の処理方法 | |
| JP3954015B2 (ja) | 改善された超薄型ゲート誘電体のプラズマ窒化物形成方法 | |
| US20160155641A1 (en) | System and Method for Mitigating Oxide Growth in a Gate Dielectric | |
| US20080164581A1 (en) | Electronic device and process for manufacturing the same | |
| US20040175961A1 (en) | Two-step post nitridation annealing for lower EOT plasma nitrided gate dielectrics | |
| JP2009545895A (ja) | 希ガスを含有するダブルプラズマ窒化物形成によるCMOSSiONゲート誘電性能の改善 | |
| Watanabe et al. | La–silicate gate dielectrics fabricated by solid phase reaction between La metal and SiO 2 underlayers | |
| JP3148982B2 (ja) | 半導体装置及びその製造方法 | |
| JP2005093865A (ja) | 半導体装置の製造方法 | |
| KR101786439B1 (ko) | 게르마늄층 상에 산화 게르마늄을 포함하는 막을 구비하는 반도체 구조 및 그 제조방법 | |
| CN100380609C (zh) | 半导体基片的uv增强的氧氮化 | |
| CN111430228A (zh) | 一种超高介电常数介质薄膜的制备方法 | |
| JP5030172B2 (ja) | 絶縁膜及びその製造方法、並びに絶縁膜を備えた電子デバイス | |
| US8691636B2 (en) | Method for removing germanium suboxide | |
| US9691620B2 (en) | Semiconductor structure having film including germanium oxide on germanium layer and method of fabricating the same | |
| US12477809B2 (en) | Semiconductor device and method for manufacturing semiconductor device | |
| JPWO2014050187A1 (ja) | ゲルマニウム層の表面の平坦化方法並びに半導体構造およびその製造方法 | |
| Meyer et al. | SF6∕ O2 plasma effects on silicon nitride passivation of AlGaN∕ GaN high electron mobility transistors | |
| JPWO2005074037A1 (ja) | 半導体装置の製造方法 | |
| Liu et al. | Effect of O 2 plasma surface treatment on gate leakage current in AlGaN/GaN HEMT | |
| KR102102609B1 (ko) | 유전체막의 형성 방법, 반도체 소자의 제조방법 및 그에 따라 제조된 반도체 소자 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ENP | Entry into the national phase |
Ref document number: 2013543456 Country of ref document: JP Kind code of ref document: A |
|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 13831351 Country of ref document: EP Kind code of ref document: A1 |
|
| ENP | Entry into the national phase |
Ref document number: 20157004282 Country of ref document: KR Kind code of ref document: A |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 13831351 Country of ref document: EP Kind code of ref document: A1 |