Classifications

• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01T—MEASUREMENT OF NUCLEAR OR X-RADIATION
  • G01T1/00—Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
  • G01T1/16—Measuring radiation intensity
  • G01T1/24—Measuring radiation intensity with semiconductor detectors
  • G01T1/248—Silicon photomultipliers [SiPM], e.g. an avalanche photodiode [APD] array on a common Si substrate
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
  • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
  • H10F39/10—Integrated devices
  • H10F39/12—Image sensors
  • H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors

Definitions

• the present invention relates to a device having a plurality of microcells, such as a silicon photomultiplier (SiPM, silicon photomultiplier).
• SiPM silicon photomultiplier
• Silicon photomultipliers consist of microcells or detector cells, each with an avalanche photodiode (APD,
• Avalanche photodiode and a series resistance.
• the photodiode which is usually operated in the reverse direction, partially switches when radiation, for example a photon, arrives. This effect is enhanced by the avalanche effect in the photodiode.
• a caused by the switching of the photodiode voltage ⁇ drop is measurable and evaluable.
• A2 is an array of detector cells ⁇ be withdrawn, wherein each detector cell is formed as an avalanche photodiode from ⁇ .
• An avalanche photodiode is integrated into a CMOS process.
• a digital circuit outputs a first value in an idle state and another value when the avalanche photodiode detects a photon.
• a circuit outputs a trigger signal at the start of Integ ⁇ rationszeitraums made in response to the cell transfer of ei ⁇ nem digital value to another.
• DE 10 2010 041805 A1 shows a device with a plurality of photosensitive microcells preferably arranged in a line or matrix for detecting one or more photons, each of which can be biased in the blocking direction and operated in Geiger mode avalanche photodiode, a connected in series with her Löschwiderstand and an amplifier element whose input is at the respective node between the avalanche photodiode and the Löschwiderstand and their respective output signal with the output signals from amplifier elements of other micro cells to an OR-linked signal line are summarized for detecting / evaluating the time or at time points of the ⁇ meeting one or more photons at one or more different micro-cells, the anodes of the avalanche photodiodes are connected to the respective micro-cells to an output line for respectively detecting the charges generated by the affected microcells Arrival of one or more photons are generated. This makes it possible to carry out the detection of the charges and the detection of the time or points functionally substantially independent of ⁇
• the speed of the signal line depends on the ratio between the current of the NMOS transistors and the total capacity of the signal line.
• the first possibility is to improve the current driving capability of the transistors.
• the second possibility is to reduce the capacitance on the Sig ⁇ naltechnisch. Both options can be through a reduction of the component sizes of the technology used can be achieved, for example by using a verbos ⁇ serten CMOS node technology.
• this solution Probably the most important limitation is given by the maximum voltage at the gate oxide of the transistor. This requires a mini ⁇ male thickness of the gate oxide and thereby limits the minimum dimensions of the transistor. For example, if the microcells are operated at an overvoltage of 3 volts, transistors with a technology node of 0.35 ym could be used. However, further lowering the minimum sizes would increase the complexity and cost of the process.
• the respective microcell group is an amplifier element having at least one Jonan- circuit, a hunt group and N3 control terminals supplied ⁇ arranged.
• the N3 control terminals of the respective Verellrele ⁇ ments are, in particular in each case, connected to a node between the avalanche photodiode and the erasing resistance of one of N3 micro-cells of the associated micro-cell group.
• the hunt group of the respective amplifier element is connected to the N3 microcells of the associated microcells group.
• the device is in particular a photomultiplier.
• the microcells are arranged on the detector surface of the photomultiplier in particular cell-shaped or matrix-shaped.
• the source terminal of the jewei ⁇ time amplifier element with the micro-cells of N3 zugeord ⁇ Neten micro-cell group is connected.
• the source terminal of the amplifier element assigned to the respective microcell group can also be connected to all microcells of this assigned microcell group.
• the amplifier element is designed as a MOSFET transistor, in particular as an NMOS transistor or as a PMOS transistor, or as a multi-emitter bipolar transistor.
• control terminals are designed as gate terminals, the Sammelan ⁇ circuit as a drain terminal and the source terminal as a source terminal.
• the multi-emitter bipolar transistor is an embodiment of a bipolar transistor.
• the multi-emitter bipolar transistor has a base connection and a collector connection.
• the multi-emitter bipolar transistor has a plurality of emitter terminals.
• the multi-emitter bipolar transistor is a parallel connection of a number of conventional bipolar transistors whose base or collector Conclusions are summarized to one connection and their emitter connections are available separately.
• the hunt groups of the amplifier elements associated with the microcell groups of microcell groups adjacent in a predetermined direction are connected to an OR-linked signal line for detecting the timing of the occurrence of one or more photons to one or more different ones Connected microcells.
• the predetermined direction on the detection surface of the photo-multipliers ⁇ is given for example by the cellular or matrix-shaped arrangement of the micro-cells on the detector surface.
• the micro-cells of micro ⁇ cell groups are connected in a row on the detection face into a single OR-linked signal line.
• the respective signal is conducted to an amplifier stage, wherein the off ⁇ gears of the amplifier stages for providing a global trigger signal for the detected moment of impact of one or more photons at one or more different micro-cells are connected together.
• This embodiment is particularly suitable for large De ⁇ tektor lake in which it is advantageous to the
• the anodes of the avalanche photodiodes of the respective microcells are interconnected to form an output line for respectively detecting the charges generated in the affected microcells by the impingement of one or more photons.
• the avalanche photodiodes have the same electrical properties.
• the avalanche photodiodes have identical bases on the detector surface of the photomultiplier.
• the Nl microcells are grouped into the N2 microcells group on the surface of the device of the ⁇ art that the surface of the device is completely and without overlap filled with the N2 microcell groups.
• planar crystallographic groups are the symmetry groups of periodic patterns or packing of the Euclidean plane. There are exactly seventeen such groups. In the sense of group theory, the groups consist of the set of all congruent mappings that map the pattern to itself, along with the composition of mappings as a group operation.
• the N1 microcells are grouped into the N2 microcell groups on the surface of the device such that the number N2 of microcell groups is minimal.
• the number of amplifier elements is minimized.
• the number of hunt groups is also reduced.
• Minimizing the number of hunt connections also minimizes the capacitive load on the signal line. Consequently, the Ge ⁇ speed of the trigger is raised to the signal line or maximized.
• the respective microcell group with N3 avalanche photodiodes, N3 erosion resistors and an amplifier element has the shape of a hexagon, the shape a dodecagon, the shape of a rectangle, in particular a square, or the shape of a pentagon.
• the respective micro- has cell group in the form of a hexagon, wherein the at amplifier ⁇ element the shape of a hexagon, the respective Lawi ⁇ NEN photodiode having the shape of a symmetrical trapezium, and the short side of the symmetrical trapezoid to a side of the hexagon borders.
• the erasure resistance preferably has the shape of a rectangle which, with a short side, adjoins a corner of the hexagon of the amplifier element.
• the embodiment with the respective microcell group in the form of a hexagon is the most symmetrical embodiment and makes it possible to place the amplifier element of the microcell group for, for example, six microcells in a common well. In the case of the NMOS transistor as the amplifier element, these microcells then share a common drain region.
• the respective microcell group has the shape of a dodecagon
• the amplifier ⁇ element has the shape of a triangle, in particular a gleich ⁇ side triangle
• the respective avalanche photodiode has the shape of a hexagon and a corner of the hexagon for adaptation one side of the triangle is dull.
• the respective micro-cell group has the shape of a rectangle
• the amplifier element has the shape of a rectangle
• the respective La ⁇ winen photodiode has the shape of a rectangle and a corner of the rectangle of the avalanche photodiode to adapt to a corner of the rectangle of the amplifier element is blunted.
• the rectangle of the amplifier element is rotated 45 ° with respect to the rectangles of the avalanche photodiodes on the surface of the device.
• the respective micro cell group has the shape of a pentagon, wherein the at amplifier ⁇ element the shape of a hexagon, the respective avalanches photodiode having the shape of a symmetrical trapezium and is adjacent the short side of the symmetrical trapezoid to a side of the hexagon.
• Detecting the verursach- by the photons th load shifting and the detection of or the times of arrival of the photons in the functional Wesentli ⁇ chen are independently carried out preferably so that higher freedom is available in the circuit design. Furthermore, a photomultiplier is proposed, which has a device as described above.
• a method for producing a device having a plurality Nl of photosensitive microcells for detecting one or more photons is proposed, each of which can be biased in a reverse direction, operable in Geiger mode avalanche photodiode and one with the Lawi ⁇ nen photodiode in series switched extinguishing resistance aufwei ⁇ sen.
• the Nl microcells are grouped into N2 microcell groups with N3 microcells each.
• the jewei ⁇ then micro-cell group is assigned to an amplifier element comprising at least one source terminal, a collector terminal and N3 ⁇ control terminals.
• the N3 control terminals of the respective amplifier element are connected to a node between the avalanche photodiode and the erase resistance of one of the N3 microcells of the associated microcell array and the common terminal of the respective amplifier element is connected to the N3 microcells of the associated microcell array.
• FIG. 1 shows an equivalent circuit diagram of an exemplary embodiment of a photomultiplier
• Figure 2 is a schematic view of a first embodiment of an execution ⁇ geometric arrangement of micro- cell groups of a photomultiplier.
• Fig. 3 is a schematic view of a detail of a
• Fig. 4 is a schematic view of an amplifier element of a microcell array of Fig. 2;
• Figure 5 is a schematic view of a second embodiment of an exporting ⁇ approximately geometric arrangement of microcells groups a photomultiplier.
• Fig. 6 is a schematic view of an amplifier element of a microcell array of Fig. 5;
• Figure 7 is a schematic view of a third example of exporting ⁇ approximately a geometrical arrangement of microcells groups of a photomultiplier.
• Fig. 8 is a schematic view of an amplifier element of a microcell array of Fig. 7;
• Figure 9 is a schematic view of a fourth example of exporting ⁇ approximately a geometrical arrangement of microcells groups of a photomultiplier.
• Figure 10 is a schematic view of a fifth embodiment ⁇ approximately example of a geometric arrangement of microcells groups of a photomultiplier.
• 11 is a schematic view of a detail of a
• Fig. 12 is a schematic view of an avalanche photodiode of a microcell array of Fig. 10;
• FIG. 13 is a flowchart of an embodiment of a
• FIG. 1 an equivalent circuit diagram of an embodiment of a photomultiplier 1 is shown.
• FIG. 1 shows that the photomultiplier 1 has a multiplicity of photosensitive microcells 2.
• the respective micro cell 2 has an avalanche photodiode 3 and a resistor connected to the avalanche photodiode 3 in series quenching resistance 4.
• the avalanche photodiode 3 and the Löschwi ⁇ resistor 4 are connected at a node 10 degrees.
• the avalanche photodiode 3 can be prestressed in a reverse direction and can be operated in Geiger mode.
• FIG. 1 shows a photomultiplier 1 with two microcell groups 5.
• the microcells 2 arranged in the first line of the device 1 belong to a first microcell group 5, whereas the microcells 2 arranged in the second line of the photomultiplier 1 belong to it a second microcell group 5 belong.
• FIG. 2 shows five different embodiments of a geometric arrangement of Microcell groups 5 on a photomultiplier 1.
• Figs. 2 to 4 the first embodiment, the FIG.
• the respective microcell group 5 is assigned a Ver ⁇ stronger element 6 with at least one source terminal 7, ei ⁇ nem hunt group 8 and N3 control terminals 9.
• the amplifier element 6 is configured as an NMOS transistor, wel ⁇ cher having a source terminal 7, a drain terminal 8 and N3 gate terminals 9.
• the NMOS transistor 6 may also have a well terminal 13.
• FIG. 1 shows only an equivalent circuit diagram, with each line of the photomultiplier 1 of FIG. 1 actually having only one single NMOS transistor 6. That is, those shown in the first row of the substitute ⁇ diagram of FIG. 1 NMOS transistors 6 actually physical by a single NMOS transistor
• physi cal ⁇ NMOS transistor 6 has a source terminal 7, a drain terminal 8 and N3 gate terminals 9.
• the number N3 ent ⁇ speaks the number of microcells 2 Mikrozellengrup- pe. 5
• the N3 control terminals of the respective NMOS transistor 6 are each connected to the node 10 between the avalanche Photodiode 3 and the erase resistor 4 of the microcell 2 of the associated microcell group 5 is connected. Details can be found in FIGS. 2 to 4. Consequently, the NMOS transistor 6 of the upper line of FIG's. 1 is formed such that its N3 gate terminals 9 (shown four gate terminals 9) are connected in the top line of Fig. 1 with a jewei ⁇ then node 10 , The hunt group 8 of the single physical NMOS transistor 6 of the upper row is connected to the N3 microcells 2 of the associated microcell group 5. Consequently, the hunt group 8 of the
• NMOS transistor 6 of the upper row of FIG. 1 is connected to all microcells 2 of the upper microcell group 5. The same applies to the NMOS transistor 6 of the lower row of the photomultiplier 1 of FIG. 1.
• the source terminal 7 of the respective NMOS transistor 6 is connected to the N3 microcells of the associated microcell group 5. Referring to FIG. 1, this means in detail that the source terminal 7 of the upper NMOS transistor 6 is connected to all (four drawn) microcells 2 of the upper row of the photomultiplier 1.
• the drain terminal 8 of the upper transistor 6 of FIG. 1 is connected to an OR-linked signal line 11 for detecting the time or points in time of the occurrence of one or more photons on one or more microcells 2. Consequently, the upper signal line 11 of FIG. 1 is connected to all microcells of the upper row of FIG. The same applies to the microcells of the lower row of FIG. 1.
• the signal line 11 may also be connected to an amplifier stage (not shown), the outputs of the Verstär ⁇ kerchn for providing a global trigger signal for the detected time of the occurrence of one or several ⁇ rer photons on one or more different micro-cells 2 are connected together. Details on this can be found in the published patent application DE 10 2010 041805 AI.
• the anodes of the avalanche photodiodes 3 of the respective microcells 2 are combined to form an output line 14 for respectively detecting the charges which are generated in the affected microcells 2 by the appearance of one or more photons.
• the avalanche photodiodes 3 have an identi ⁇ cal surface on the photomultiplier 1.
• the number of incident photodiodes can be derived in a simple manner.
• the Nl microcells 2 are in particular such ⁇ piert that the surface of the device 1 is completely filled and over ⁇ lappungskay with N2 microcell groups 5 in the N2 microcell groups 5 on the surface of the device. 1
• the grouping is chosen in particular such that the number N2 of the microcell groups 5 on the photomultiplier 1 is minimal.
• FIGS. 2 to 12 the five exemplary embodiments of geometric arrangements of micro ⁇ groups of cells 5 are shown on a photomultiplier tube 1 in the following.
• FIG. 2 shows a schematic view of a first embodiment of a geometric arrangement of microcell groups 5 of a photomultiplier 1.
• the microcell groups 5 of a row are connected via the respective associated NMOS transistor 6 to a signal line 11. 2, six rows and thus six signal lines 11 are shown.
• the respective microcell groups 5 of FIG. 2 have the shape of a hexagon.
• the NMOS transistor 6 is in the middle the respective micro cell group 5 in the form of a hexagon.
• the avalanche photodiodes 3 of the respective micro cell group 5 are arranged around the NMOS transistor 6 and have the shape of a symmetrical trapezoid.
• the jewei ⁇ celled extinguishing resistor 4 is arranged between two avalanche photodiodes. 3
• the erase resistors 4 are all connected to a Be ⁇ te with a conduit 12 for the supply voltage.
• FIG. 3 shows a schematic view of a detail of a microcell group 5 of FIG. 2.
• FIG. 5 shows only one avalanche photodiode 3 of the six avalanche photodiodes 3 which belong to the microcell group 5.
• the Figure illustrates. 3 to be arrange ⁇ th erasure resistance at one side of the avalanche photodiode 3 4.
• the erase resistor 4 has the form of egg nes rectangle, which is adjacent to a short side at a corner of the hexagon of the NMOS transistor 6.
• micro-cell group 5 of Fig. 2 and 3 has a series of six-fold symmetry, which allows micro-cell groups 5 of Fig. 3 to each other and thus the detector surface of the photomultiplier tube 1 without gaps and without overlap procedure available ⁇ len.
• FIG. 4 shows a schematic view of an NMOS transistor 6 of a microcell group 5 according to FIG. 2.
• the NMOS transistor 6 is arranged for connection to six avalanche photodiodes 3 (see FIG. 2). Accordingly, the NMOS transistor 6 of Fig. 4 has six source terminals 9, each arranged at 60 ° to each other and to the outside
• the common drain terminal 8 is located in the center region of the NMOS transistor 6. Further, the NMOS transistor 6 has six source terminals 7, which, however, mit- connected to each other and therefore physically represent a single source terminal 7.
• FIG. 5 shows a schematic view of a second exemplary embodiment of a geometric arrangement of microcell groups 5 of a photomultiplier 1.
• the detector ⁇ surface of the photomultiplier tube 1 of Fig. 5 is divided into four rows, each row has a signal line 11, which are connected to four microcells 5 groups.
• the respective microcell group 5 of FIG. 5 has the shape of a dodecagon and has three avalanche photodiodes 3, wherein the NMOS transistor 6 has the shape of an equilateral triangle.
• the respective avalanche photodiode 3 has the shape of a hexagon, with one corner of the hexagon being truncated to conform to one side of the triangle.
• FIG. 6 shows a schematic view of an NMOS transistor 6 of a microcell group 5 according to FIG. 5.
• the NMOS transistor 6 of FIG. 5 has a triangular base area and is suitable for contacting three microcells 2.
• the microcell group 5 of FIG. 5 accordingly has three microcells 2 each.
• Fig. 7 is a schematic view of a third example of exporting ⁇ approximately a geometrical arrangement of microcell groups is 5 a photomultiplier tube 1 shown.
• the extract of the detector surface of the photomultiplier 1 of Fig. 7 is divided into four rows and four columns. Each row and each column has four microcells groups 5. Each row is connected to ei ⁇ ner signal line. 11
• the respective microcell group 5 of FIG. 7 has the shape of a square.
• the jeweili ⁇ ge NMOS transistor 6 of Fig. 7 also has the shape of a square.
• the respective avalanche photodiode 3 has the shape ei ⁇ nes square, wherein one corner of the square of the avalanche photodiode is truncated to fit a corner of the square of the NMOS transistor 6.
• the square of the NMOS transistor 6 of the respective Mikrozel ⁇ lenate 5 is 45 ° compared to the squares of the avalanche Photodiode 3 on the detector surface of the device 1 ge ⁇ rotates.
• FIG. 8 shows a schematic view of the NMOS transistor 6 of a microcell group 5 according to FIG. 7.
• Fig. 9 shows a schematic view of a fourth example of exporting ⁇ approximately a geometrical arrangement of microcell groups 5 a photomultiplier tube 1.
• the extract of the detector surface of the photomultiplier tube 1 of Fig. 9 is divided into three rows and three columns. Each row and each column has three microcells groups 5. Each row is connected to a signal line ⁇ 11th
• the respective microcell group 5 of FIG. 9 has the shape of a rectangle.
• the respective NMOS transistor 6 of FIG. 9 has the shape of a square.
• the per ⁇ stays awhile avalanche photodiode 3 has the shape of a rectangle with one corner of the rectangle of the avalanche photodiode is blunted 3 for adapting to a corner of the square of the NMOS transistor. 6
• the square of the NMOS transistor 6 of the respective Mikrozel ⁇ lenate 5 is rotated by 45 ° relative to the rectangles of the avalanche photodiode 3 on the detector surface of the device 1 ge ⁇ .
• Fig. 10 shows a schematic view of a fifth embodiment ⁇ approximately example of a geometric arrangement of microcells groups 5 a photomultiplier tube 1.
• the respective micro cell group 5 of Fig. 10 has the shape of a pentagon.
• the NMOS transistor 6 of the respective micro-cell group 5 has the shape of a hexagon, wherein the jewei ⁇ celled avalanche photodiode 3 has the shape of a symmetrical Trape ⁇ zes and adjacent the short side of the symmetrical trapezoid to a side of the hexagon.
• the long side of the trapezium symmet ⁇ step is, however, adapted to the shape of the pentagon of the micro-cell group. 5 Fig.
• FIG. 11 shows a schematic view of a section of egg ⁇ ner microcells Group 5 of FIG. 11 10.
• FIG. I s only one of the six micro-cells of the micro-cell group 5 of Fig. 10, at the side thereof an erase resistor 4 angeord- net.
• the erase resistor 4 has the shape of a rectangle, which adjoins with a short side to a corner of the hexagon of the NMOS transistor 6.
• FIG. 12 again shows the avalanche photodiode 3 of a microcell group 5 according to FIGS. 10 and 11.
• Fig. 13 is a flow diagram of one embodiment of a method for manufacturing a photomultiplier is Darge ⁇ represents.
• the photomultiplier has a multiplicity Nl of photosensitive microcells for detecting one or more photons, each of which has an avalanche photodiode which can be biased in a reverse direction, which can be operated in Geiger mode, and an erosion resistor which is connected in series with the avalanche photodiode.
• the NI microcells are grouped into N2 microcell groups each with N3 microcells.
• an amplifier element having at least one source terminal, a hunt group and N3 control terminals is assigned to the respective microcell group.
• the N3 control terminals of the respective amplifier element are connected to a node between the avalanche photodiode and the erase resistance of one of the N3 microcells of the associated microcell array.
• the hunt group of the respective amplifier element is connected to the N3 microcells of the associated micro cell group. The order of steps 101 to 104 can be changed.

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• 2012
  • 2012-03-26 DE DE102012204806A patent/DE102012204806B4/de not_active Expired - Fee Related
• 2013
  • 2013-03-26 WO PCT/EP2013/056416 patent/WO2013144151A2/fr not_active Ceased

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