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WO2013020592A1 - Matrice de cellules et son procédé de fabrication - Google Patents

Matrice de cellules et son procédé de fabrication Download PDF

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Publication number
WO2013020592A1
WO2013020592A1 PCT/EP2011/063757 EP2011063757W WO2013020592A1 WO 2013020592 A1 WO2013020592 A1 WO 2013020592A1 EP 2011063757 W EP2011063757 W EP 2011063757W WO 2013020592 A1 WO2013020592 A1 WO 2013020592A1
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WO
WIPO (PCT)
Prior art keywords
cell
contact layer
array
conductive
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2011/063757
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English (en)
Inventor
Juergen Sollner
Frank Saeuberlich
Michael Geisler
Markus Braun
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SCHMID TECHNOLOGY CENTER GmbH
Original Assignee
SCHMID TECHNOLOGY CENTER GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
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Priority to PCT/EP2011/063757 priority Critical patent/WO2013020592A1/fr
Publication of WO2013020592A1 publication Critical patent/WO2013020592A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/20—Electrodes
    • H10F77/206—Electrodes for devices having potential barriers
    • H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F19/00—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules
    • H10F19/30—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules comprising thin-film photovoltaic cells
    • H10F19/31—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules comprising thin-film photovoltaic cells having multiple laterally adjacent thin-film photovoltaic cells deposited on the same substrate
    • H10F19/35—Structures for the connecting of adjacent photovoltaic cells, e.g. interconnections or insulating spacers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the invention relates to an array of a plurality of cells formed on a stack comprising an insulating substrate layer, whereon at least a first electrical contact layer, an intermediate layer, and a second electrical contact layer are supported.
  • the invention further relates to a method of structuring and contacting an array of cells formed on a stack which comprises at least an insulating substrate layer, whereon at least a first electrical contact layer, an intermediate layer, and a second electrical contact layer are supported.
  • the current invention relates to a thin-film array of cells and to a method of structuring and contacting the cells on the array, as can be found in particular in thin-film solar cell arrays.
  • the invention is also applicable to similar type of arrays, as can be found in battery arrays, electrochromic arrays or other types of arrays.
  • Photovoltaic cells generate electrical power from electromagnetic radiation, such as sunlight, incident thereon.
  • Thin-film photovoltaic cells generally include an insulating substrate layer made from glass or plastic, whereon a first contact layer (the back contact layer), one or more intermediate layers that comprise the photovoltaic absorber, and a second electrical contact layer (the front contact layer) are supported.
  • the front contact layer must be made of a transparent material.
  • the thin films allow to make an array of cells which are electrically connected so that the solar array can output a voltage high enough to be used by an electronic device such as an inverter, at low electric loss.
  • the photovoltaic cells made in thin-film technology are monolithically circuited, i.e. structuring and contacting of the cells are provided, while the cell layers are generated.
  • CIGS CIGS
  • CuInGaSe 2 the so-called CIGS cell, comprising CuInGaSe 2 in a certain relation (the optimum formulation being Culn 0 72 Gao.28Se 2 (see the doctoral thesis of Andreas Schulz, Plasmapolymerinstrumente Barriere füren aus für skalierbaren Mikrowellen-Plasmattle fur flexible Solarzellenmodule, University of Stuttgart, 2005).
  • CIGS is a natural semiconductor of the p-type.
  • the necessary p-n transition for the solar cell is effected in the CIGS cell by a combination with the semiconductor CdS of the n-type.
  • Such a thin-film CIGS cell is usually built on a substrate made of glass having a thickness of 2 to 4 mm.
  • the glass substrate is preferably substituted by a thin metal foil coated with an insulating material.
  • a molybdenum back contact of a thickness of about 1 pm is applied by DC- sputtering.
  • the CIGS absorber is deposited thereon by PVD.
  • a CdS buffering layer of about 50 nm thickness is applied within a chemical solution.
  • a ZnO layer of usually 1 pm thickness is applied by spraying.
  • the definition of individual cells and the contacting thereof is made monolithically during the generation of the various layers of the structure.
  • the first structuring step PI is applied after the generation of the back contact layer to generate the individual back contacts.
  • This structuring step PI is usually performed by laser ablating.
  • a structuring step P2 also using a laser.
  • the combined CIGS and CdS layer structure is structured by removing the layers down to the back contact layer to electrically isolate a first cell from an adjacent second cell.
  • the front contact of ZnO is applied.
  • the front contact layer and the other cell layers are removed down to the back contact layer to electrically isolate the cells.
  • the adjacent cells are serially connected.
  • a disadvantage of this well-known monolithic circuiting is that the several vacuum steps that are necessary to generate the individual layers of the photovoltaic module must be interrupted by the structuring steps which usually use laser ablation or etching steps. Moreover, a substantial dead area is produced between the two scribes that are produced during the P2 and P3 steps.
  • EP 1 045 454 Al an alternative method of making a solar cell array is known according to which the solar cell is first completely manufac- tured, while the structuring and circuiting of individual cells is performed thereafter.
  • the structuring and circuiting of individual cells is performed by first generating an isolation scribe separating a first one and a second one of adjacent cells which may be done by etching using a photoresist film as a mask.
  • the metallic electrode layer, the active cc-Si layer and the transparent conductive film layer are removed until the substrate layer is exposed.
  • the transparent conductive film layer is exposed.
  • a protective film layer is applied between the metallic electrode layer the cc-Si film and the transparent conductive film to achieve insulation between neighboring solar cell elements.
  • a conductive material is applied on top of the protective film to effect a series connection between the transparent conductive film of one cell and the metallic electrode layer of the adjacent cell.
  • a further approach for the structuring and circuiting of a solar cell array after the manufacture thereof is known from US 2008/0314439 Al.
  • the subsequent structuring process includes the forming of at least one cell isolation scribe in the stack of thin-film layers.
  • a second electrical contact layer isolation scribe is formed for each cell isolation scribe adjacent to a respective cell isolation scribe.
  • a via scribe is formed in the stack of thin-film layers between each cell isolation scribe and its respective second electrical contact layer isolation scribe.
  • Insulating ink is disposed in each cell isolation scribe, and conductive ink is disposed in each via scribe to form a via.
  • Conductive ink is also disposed along the top surface of the stack of thin-film layers to form at least one conductive grid.
  • this process has the advantage of a reliable structuring and circuiting of individual cells after the monolithical integration of the complete photovoltaic stack, also this method suffers from the drawback that the area between the two isolation scribes that are formed parallel to each other, is a dead area.
  • the isolation scribes are usually made as thin as possible and are generated at a distance as small as possible.
  • this requires a high preci- sion processing and on the other hand enhances the risk of short circuiting.
  • the remaining area extending from the first isolation scribe to the adjacent isolation scribe is a dead area which cannot contribute to the generation of energy.
  • an array of a plurality of cells formed on a stack comprising an insulating substrate material, whereon at least a first electrical contact layer, an intermediate layer, and a second electrical contact layer are supported, said array comprising:
  • said first cell comprises a conductive leg extending through said second contact layer and said intermediate layer toward said first contact layer, said conductive leg being insulated against said intermediate layer and said second contact layer of said first cell; wherein said conductive leg comprises a conductive via extending from an end of said conductive leg remote from said substrate layer toward the second cell for electrically connecting said first cell to said second cell; and
  • said insulating ridge has a certain length extending over the entire length of said first and second cells, said conductive leg having a certain longitudinal extension in a direction parallel to said insulating ridge, said longitudinal extension of said conductive leg being substantially shorter than said length of said insulating ridge.
  • this object is achieved according to a first alternative of the invention by a method of structuring and contacting an array of cells formed on a stack, the method comprising the following steps:
  • a stack comprising at least an insulating substrate layer, whereon at least a first electrical contact layer, an intermediate layer, and a second electrical contact layer are supported;
  • said insulating ridge has a certain length extending over the entire length of said first and second cells, said conductive leg having a certain longitudinal extension in a direction parallel to said insulating ridge, said longitudinal extension of said conductive leg being substantially shorter than said length of said insulating ridge.
  • a stack comprising at least an insulating substrate layer, whereon at least a first electrical contact layer, an intermediate layer, and a second electrical contact layer are supported;
  • said insulating ridge has a certain length extending over the entire length of said first and second cells, said conductive leg having a certain longitudinal extension in a direction parallel to said insulating ridge, said longitudinal extension of said conductive leg being substantially shorter than said length of said insulating ridge.
  • the dead area of the stack which e.g. may be a thin-film photovoltaic stack, is considerably reduced by the current invention.
  • the dead area between two adjacent cells is made up by the area of the insulating ridge and by the area of the conductive leg surrounded by the insulating material insulating the conductive leg against the intermediate layer and the first contact layer. Since the conductive leg together with its surrounding insulating material may have a very small cross section filling a hole with a thickness which is preferably smaller than 2 mm in any direction of its cross section, the additional dead area resulting from the conductive leg and the surrounding insulating material may be very small.
  • the hole through which the conductive leg and the insulating material extend may be for example a circular hole with a diameter on the order of 1 mm.
  • the array is configured in a different way, such as a battery array or as an electrochromic array, the reduction of the dead area leads to a similar improvement in performance.
  • a further advantage of the array according to the invention is that it can be structured with a multiple sequence of conductive vias and conductive legs for connecting a first cell with an adjacent second cell, thereby dispensing with the longitudinal bus bars usually necessary in cell arrays due to the relatively low electrical conductivity of transparent front contact layers. This may further lead to savings in conductive material, such as silver.
  • the generation of the first and second holes according to the first alternative of the method does not require a specific high precision process, since the insulating material filled into the first hole leads to a safe insulation against the remaining layers of the stack. Also the exact position of the first and second holes is not very important to achieve a precise connection and insulation.
  • the second alternative of the method according to the invention provides a process which does not require high precision operations.
  • the generation of the first hole does not require particularly high precision and also the providing of the conductive leg extending through the first hole needs only to keep a certain distance from the walls of the hole.
  • a safe insulation between the conductive leg and the remaining layers the intermediate layer and the first electrical contact layer is obtained. Since the first hole at least partially contacts the insulation scribe, it can be ensured that the conductive via that is applied in a later step is safely insulated against the second conductive layer and the intermediate layer of the first cell.
  • both alternatives of the method according to the invention can be performed after the stack comprising various layers has been produced which may include several vacuum steps. So the vacuum steps can be performed one after another, and the structuring and circuiting of the array can be done thereafter. This leads to lower total cost and may help to design more compact production lines.
  • the cross section of the hole through which the conductive via and the surrounding insulating material extend can be relatively small, but still large enough to provide a safe and reliable process. The dead area resulting therefrom is small when compared with the dead area resulting from the distance between two parallel insulation ridges according to US 2008/0314439 Al or between the two trenches resulting from the monolithic cell definition and circuiting.
  • the longitudinal extension of the conductive leg is shorter than a third, preferably shorter than a tenth, of the length of the insulating ridge, and, in practice may be even much smaller.
  • the conductive leg has a certain lateral extension in a direction perpendicular to the insulating ridge, the lateral extension of the conductive leg also being substantially shorter then the length of the insulating ridge, preferably shorter than a third, more preferably shorter than a tenth, of the length of the insulating ridge.
  • the lateral extension of the conductive leg may be even much smaller.
  • the conductive leg together with surrounding insulating material extends through a hole formed in the stack and filled with the insulating material having a thickness being smaller than 2 mm in any direction of its cross section.
  • the hole through which the conductive leg and the surrounding insulating material extend may be a cylindrical hole with a diameter on the order of 1 mm or even less.
  • the conductive leg and the insulating material surrounding the conductive leg may be substantially disk-shaped, preferably at least partially having a circular or oval cross section.
  • An at least partially circular cross section is particularly preferred, since it may be easily generated by a laser beam, and since it is the most space-saving configuration. However, also any other cross section of the conductive leg is possible, even if not preferred.
  • the insulating ridge comprises an isolation scribe filled with insulating material, wherein the insulating material preferably protrudes beyond a surface of the second contact layer.
  • This feature helps to ensure a reliable insulation of the subsequently applied conductive via.
  • the conductive via extends toward the second contact layer of the second cell for electrically connecting the first contact layer of the first cell to the second contact layer of the second cell, wherein the conductive via is preferably shaped as a contact finger.
  • the contact finger may extend along a major extension of the respective cell to effect a good connection to the second contact layer which in case of a transparent configuration such as in a solar cell is usually not a very good conductor.
  • the conductive leg extends in a direction substantially perpendicular to the substrate layer, while the conductive via preferably extends in a direction substantially parallel to the substrate layer.
  • the conductive leg is surrounded by insulating material filling a hole which at least partially intersects the insulating ridge.
  • This configuration is a particularly space-saving configuration, since the dead area generated by the hole is kept as small as possible.
  • each conductive leg is covered by insulating material at an end thereof which is remote from the substrate layer.
  • each conductive leg extends at least partially into the first contact layer, the conductive leg preferably having a curved bottom surface, which is preferably bowl-shaped and that extends into the first contact layer.
  • the array may be configured as a thin-film array and may preferably be configured as a solar cell array, as a battery array or as an electrochromic array. Also other configurations are possible.
  • a thin-film solar cell array is one of the main applications of the invention.
  • the solar cell array may be configured as a CIGS solar cell array, however also any other kind of solar cell arrays is possible.
  • the "intermediate layer" between the first contact layer and the second contact layer in the case of a solar cell array is the solar cell absorber and may comprise several layers, such as an absorber layer and a buffer layer. Also apart from the other layers mentioned, there may be additional layers, such as a top layer on top of the second contact layer, such as an anti-reflective layer.
  • the array is configured as a battery array, as an electrochromic array or as a different array, again there may be additional layers apart from the first contact layer, the second contact layer and the intermediate layer which usually is the active layer, such as the voltage generating layer within a thin-film battery.
  • each conductive leg and each contact via is made of a material selected from the group consisting of silver, tin, gold, and alloys thereof.
  • the insulating material comprises a lacquer, which is preferably UV-hardened.
  • the insulating material surrounding each conductive leg and applied onto an end surface thereof which is remote from the substrate layer forms a closed surface configured for protecting the array against environmental influences.
  • the substrate layer is made of a material selected from the group consisting of polyimide, glass and a metal foil coated with an insulating material.
  • a polyimide layer is very light weight, is a glass layer more rigid and can be processed at much higher temperatures such as occurring in the preparation of a CIGS solar cell which includes the deposition of the absorber at a substrate temperature of about 550 to 600°C. So in this case only a glass substrate or a metal foil substrate that is coated with an insulating material can be used.
  • a coated metal foil substrate has the advantage of being much thinner than a glass substrate, thus saving weight and increasing flexibility of the cell.
  • the array comprises a plurality of adjacent cells arranged consecutively in a first direction and being connected in series.
  • the first cell and the second cell are connected by a plurality of conductive vias, each conductive via connecting the second cell with a conductive leg extending from the first contact layer of the first cell.
  • This configuration is particularly suited for large arrays containing larger (longer) adjacent cells which are each connected in series.
  • a plurality of conductive vias is used for obtaining a better electrical contact to the adjacent cell.
  • the conductive vias extend in parallel to each other, and preferably, at a constant distance to each other.
  • bus bars usually necessary in the prior art can be dispensed with. Also a savings in conductive material, such as silver, is effected.
  • the step of insulating the conductive leg comprises preferably applying insulating material around the conductive leg within the first hole which preferably also covers the remote end of the conductive leg and part of the conductive via.
  • the conductive via is preferably mechanically and electrically connected to the second contact layer of the second cell.
  • the conductive leg and the conductive via are applied by a method selected from the group consisting of ink jet printing, screen printing, light induced plating and galvanizing, wherein the method may comprise masking or selective inhibiting.
  • Ink jet printing is particularly preferred for its high precision, while screen printing is particularly preferred because of its low cost.
  • the step of providing a hole comprises a method selected from the group consisting of laser ablating, etching and selective chemical etching, wherein the method may further comprise masking or selective inhibiting.
  • laser ablating is a very precise method
  • etching and selective chemical etching usually in combination with masking or selective inhibiting are very cost-effective methods.
  • the step of applying insulating material comprises applying a lacquer, and preferably hardening the lacquer by irradiating with ultraviolet light. Also this may be done, e.g. by ink jet printing or by screen printing.
  • Fig. 5 a flow chart of the different steps of a first method according to the invention.
  • Fig. 6 a flow chart of a second method according to the invention.
  • Fig. 7 a solar cell array according to the prior art in schematic top view in
  • FIG. 8 a solar cell array according to the invention shown in Fig. 8a) in schematic top view, and in Fig. 8a) an enlarged representation of a virtual cell unit in schematic representation.
  • the layers have a relatively small thickness, e.g. in a thin-film solar cell array the substrate layer having a thickness of possibly 25 m, while the other layers may have a thickness of about 2 ⁇ , while the ridge shown e.g. in Fig. lb may have a lateral extension of 100 pm.
  • Fig. 1 a first alternative of a method of contacting an array of cells formed on a stack is shown in different steps.
  • a stack 10 is schematically shown in cross section.
  • the stack 10 may be a photovoltaic stack of a CIGS photovoltaic cell.
  • the substrate layer 12 may be made from glass or from a metal foil coated with an insulating material, such as glass or a ceramic coating.
  • a first contact layer forming the back contact of the photovoltaic stack is applied.
  • the first contact layer in a CIGS cell configuration is made of molybdenum and may be applied by DC sputtering at a thickness of about 1 pm.
  • an intermediate layer 16 which in this case forms the absorber layer of a thickness of about 2 pm is applied.
  • the CIGS absorber made of CIGS may be applied by physical vapor deposition (PVD), preferably at a substrate temperature of about 550 to 600°C.
  • the intermediate layer 16 further comprises a CdS buffer layer of a thickness of about 50 nm on top of the absorber layer.
  • the buffer layer may be applied within a liquid solution in a chemical bath.
  • a transparent second contact layer 18 made of ZnO may be applied by spraying at a thickness of about 1 m.
  • Such a thin-film photovoltaic stack is shown in the drawings according to Figs. 1 to 4.
  • an isolation scribe 20 is generated e.g. by laser ablation.
  • the isolation scribe 20 extends through all the layers 18, 16, 14 until the substrate layer 12 is reached, or it may even extend to a small extent into the substrate layer 12 to effect a safe delineating of the stack 10 into a first cell 22 and an adjacent second cell 24 which is insulated from the first cell 22.
  • a first hole 25 which may have a diameter of about 1 mm is generated in close vicinity to the isolation scribe 20.
  • the first hole 25 extends through the second contact layer 18 and the intermediate layer 16 up to the first contact layer 14 and may partially protrude therein.
  • the isolation scribe 20 and the first hole 25 are filled with insulating material denoted 28. Thereby an insulating ridge 26 filled with insulating material is generated. Also the first hole 25 is completely filled with insulating material, with a cap on top of the hole 25 also extending over the insulation ridge 26.
  • a second hole 30 is generated within the first hole 25.
  • the second hole 30 extends through the insulating material 28 and ends on the first contact layer 14 or may partially protrude into this layer.
  • the second hole 30 is filled with electrically conductive material to generate a conductive leg 32 extending from the first contact layer 14 (the back contact of the first cell 22) extending upwardly and protruding beyond the upper surface of the insulating material 28.
  • a conductive via 34 is applied thereon to connect the top end of the conductive leg 32 with the surface of the second contact layer 18 (the transparent front contact layer) of the second cell 24. It can be seen from Fig. lg that the conductive via 34 is formed as a slim contact finger having a small extension in the direction of the insulating ridge 26 but having a substantially larger extension or length perpendicularly thereto.
  • the forming of the first and second holes 25, 30 may also be effected by laser ablation or e.g. by selective etching using appropriate masking.
  • the application of insulating material 28 may be performed by screen printing or ink jet printing.
  • lacquer is used as insulating material which is hardened by ultraviolet radiation.
  • the electrically conductive material used for filling the second bore 30 and for applying the conductive via 34 may be made of silver, tin, gold, alloys thereof or similar materials. For example a silver alloy may be applied by ink jet printing or by screen printing.
  • FIG. 2 A variation of the method according to Fig. 1 is shown in Fig. 2.
  • the second bore 30 extends partially into the first contact layer 14 and has a bowl-shaped bottom surface 36.
  • Such a configuration leads to an enlarged interface surface to the first contact layer 14 which improves the electrical contact and may allow for a smaller diameter of the conductive leg 32 which is sufficient for a good electrical contact.
  • FIGs. 3a and 3b a further variation of the method shown in Figs. 1 and 2 is depicted, the respective array being denoted with 10b and 10c.
  • the first hole 25 should intersect to some extent the isolation scribe 20 or the insulating ridge 26. It is shown in Figs. 3a and 3b that the exact positioning of the first hole 25 is not of a particular importance, since an intersection with the insulating ridge 26 can be obtained with different positions of the first hole 25.
  • Fig. 4 a further variation of the method according to the invention is explained.
  • the respective array is denoted with lOd.
  • Fig. 4a While in Fig. 4a the first step of providing the array lOd is shown, in Fig. 4b the second step of providing an isolation scribe 20, e.g. by laser ablating is shown. This step leads to a separation of the array lOd into a first cell 22 and a second cell 24 which are electrically insulated from each other, as already explained before.
  • the isolation scribe 20 is filled with insulating material that protrudes to some extent beyond the top surface of the second contact layer 18.
  • a conductive leg 32 is applied, e.g. by ink printing.
  • the conductive via 34 extending from the top end of the conductive leg 32 towards the top surface of the second contact layer 18 may also be applied by ink jet printing.
  • the resulting configuration is shown in top view in Fig. 4f.
  • the remaining space between the conductive leg 32 and the inner wall of the hole 25 is filled with insulating material as shown in Fig. 4g.
  • the insulating material 28 also covers the rim of the hole 25 and protrudes a little bit over the insulating ridge 26, so as to generate a curved top cap forming a diffusion barrier and safely insulating the conductive leg 32 and the end of the conductive via 34 against environmental influences.
  • This configuration is shown in cross section in Fig. 4g and in top view in Fig. 4h.
  • FIG. 5 A flow chart of the first alternative of the method according to the invention is shown in Fig. 5.
  • a stack comprising an insulating substrate layer, whereon at least a first electrical contact layer, an intermediate layer and a second electrical contact layer are supported, is provided.
  • an isolation scribe is provided for separating the stack into at least a first cell and an adjacent second cell insulated from each other.
  • the first hole and the isolating scribe are filled with insulating material.
  • a second hole is provided within the first hole which protrudes until the surface of the first contact layer or protrudes a little bit into the first contact layer.
  • step 60 first a stack comprising an insulating substrate layer is provided, whereon at least a first electrical contact layer, an intermediate layer, and a second electrical contact layer are supported.
  • an isolation scribe is provided, e.g. by laser ablating or by etching.
  • the isolation scribe is filled with insulating material which may be done e.g. by screen printing or by ink jet printing.
  • a hole is provided which again may be done by laser ablating or by selective etching using suitable masking.
  • a conductive leg is generated within the hole spaced apart from the hole wall.
  • a conductive via is provided to connect the upper end of the conductive leg of the first cell with the second contact layer of the second cell to generate a series connection between the two cells.
  • insulating material is provided to fill the remaining space around the conductive leg and to effect a top cap protecting the upper end of the conductive leg and the connection of the conductive via.
  • a solar cell array according to the prior art is shown in top view.
  • the solar cell array 70 has a building block length 1 and a building block width w.
  • the solar cell array 70 comprises adjacent cells which are arranged consecutively one after another in the direction of the building block length and which are connected in series.
  • each cell is a lengthy cell which is made up of a variety of virtual cell units 72 which are shown one besides the other extending in the building block width w.
  • Fig. 7b the finger length on the active area of the cell surface is denoted with fla, while the dead area length between the two insulation ridges 73 and 75 is denoted with da. So the additional dead area apart from the finger surface on active is a surface of the size da x cuw (cell unit width shown on the right side of Fig. 7b)).
  • Fig. 8a the array 80 is schematically shown with the same building block length 1 and the same building block width w.
  • the virtual cell unit 82 shown in the right top corner of Fig. 8a) is connected in series with the virtual cell unit 82 left to it.
  • the dead area resulting from the finger on active fla is the same as in the prior art configuration according to Fig. 7.
  • the additional dead area resulting from the series connection of the virtual cell with the adjacent virtual cell is considerably smaller. It merely comprises the surface of the insulating ridge 26 and the surface of the hole with radius r including the top cap ending at the insulating ridge 26.
  • This dead area 84 is considerably smaller than the dead area resulting from the prior art configuration shown in Fig. 7b), with the savings reaching to about 5 or 6 % which is quite a lot.

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Abstract

L'invention concerne une matrice d'une pluralité de cellules, par ex. des cellules solaires, formée sur un empilement (10d) comprenant une couche de substrat isolant (12), constituant un support pour au moins une première couche de contact électrique (14), une couche intermédiaire (16), et une seconde couche de contact électrique (18). La matrice comprend au moins une première cellule (22) et une deuxième cellule (24) adjacentes et séparées l'une de l'autre par au moins une nervure isolante (26) s'étendant à travers la seconde couche de contact (18), la couche intermédiaire (16) et la première couche de contact (14) vers la couche de substrat (12). La première cellule (22) comprend un organe conducteur (32) s'étendant à travers la seconde couche (18) et la couche intermédiaire (16) vers la première couche de contact (14), l'organe conducteur (32) étant isolé par rapport à la couche intermédiaire (16) et la seconde couche de contact (18) de la première cellule par un matériau isolant qui l'entoure. L'organe conducteur (32) comprend une partie conductrice (34) s'étendant depuis une extrémité de l'organe conducteur (32) distante de la couche de substrat (12) permettant de connecter électriquement la première cellule à la deuxième cellule. La nervure isolante (26) a une certaine longueur s'étendant au-dessus de toute la longueur des première et deuxième cellules (22, 24) et l'organe conducteur a une certaine extension longitudinale dans une direction parallèle à la nervure isolante (26), l'extension longitudinale de l'organe conducteur (32) étant sensiblement plus courte que la longueur de la nervure isolante (26).
PCT/EP2011/063757 2011-08-10 2011-08-10 Matrice de cellules et son procédé de fabrication Ceased WO2013020592A1 (fr)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022162922A (ja) * 2021-04-13 2022-10-25 株式会社エネコートテクノロジーズ 太陽電池の製造方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3604917A1 (de) 1986-02-17 1987-08-27 Messerschmitt Boelkow Blohm Verfahren zur herstellung eines integrierten verbandes in reihe geschalteter duennschicht-solarzellen
WO1992007386A1 (fr) * 1990-10-15 1992-04-30 United Solar Systems Corporation Configuration monolithique de cellules solaires et methode de realisation
EP1045454A1 (fr) 1998-07-27 2000-10-18 Citizen Watch Co., Ltd. Cellule solaire, procede de production et masque de photolithographie permettant de fabriquer ladite cellule solaire
US20080314439A1 (en) 2007-06-20 2008-12-25 Misra Mohan S Array Of Monolithically Integrated Thin Film Photovoltaic Cells And Associated Methods
WO2010127656A2 (fr) * 2009-05-08 2010-11-11 Forschungszentrum Jülich GmbH Procédé de fabrication et de câblage en série d'éléments photovoltaïques pour former un module solaire et module solaire

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3604917A1 (de) 1986-02-17 1987-08-27 Messerschmitt Boelkow Blohm Verfahren zur herstellung eines integrierten verbandes in reihe geschalteter duennschicht-solarzellen
WO1992007386A1 (fr) * 1990-10-15 1992-04-30 United Solar Systems Corporation Configuration monolithique de cellules solaires et methode de realisation
EP1045454A1 (fr) 1998-07-27 2000-10-18 Citizen Watch Co., Ltd. Cellule solaire, procede de production et masque de photolithographie permettant de fabriquer ladite cellule solaire
US20080314439A1 (en) 2007-06-20 2008-12-25 Misra Mohan S Array Of Monolithically Integrated Thin Film Photovoltaic Cells And Associated Methods
WO2010127656A2 (fr) * 2009-05-08 2010-11-11 Forschungszentrum Jülich GmbH Procédé de fabrication et de câblage en série d'éléments photovoltaïques pour former un module solaire et module solaire

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022162922A (ja) * 2021-04-13 2022-10-25 株式会社エネコートテクノロジーズ 太陽電池の製造方法

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