WO2012149720A1 - Chip state monitoring method and device, and chip - Google Patents

Abstract

Disclosed are a chip state monitoring method and device, and a chip. The method includes: a control module sending a numerical value copy instruction to each operation processing module with a counter in a chip simultaneously; after receiving the numerical value copy instruction, each operation processing module copying the current counting numerical value of the counter thereof and saving the copied counting numerical value to an appointed location; and a monitoring module acquiring from the appointed location the counting numerical value of each operation processing module, and determining the state of the chip according to the counting numerical value. The chip state monitoring method and device and the chip in the embodiments of the present invention can acquire the counting numerical value of each operation processing module in the chip at the same moment, so as to judge the state of the chip more accurately according to these counting numerical values.

Description

 Chip state monitoring method, device and chip

 The present invention relates to the field of data communications, and in particular, to a chip state monitoring method, apparatus, and chip. Background technique

 The device located in the forwarding plane of the data communication network generally includes a plurality of chips, such as a media access control chip (MAC), a network processor chip (NP, Network Processor), a traffic manager chip (TM, a traffic manager), a switch chip, and the like. . Each of the operating processing modules of the chips respectively performs operations such as receiving, buffering, processing, transmitting, and discarding various service data, and the chip collects statistics on the amount of business data processed by each operation processing module through a counter. The external monitoring device can determine the basic state of the chip by looking at the count values of these counters.

 A specific implementation in the prior art is that the chip allocates at least one counter for each operational processing module, for example, an input counter is assigned to the input module, an output counter is assigned to the output module, and a discard counter and a completion counter are assigned to the processing module. The monitoring module can sequentially read the count values of the counters in the chip, and compare the count values to determine the basic state of the chip.

 However, in the prior art, the monitoring module sequentially reads the count values of the counters in the chip, and the scheme for determining the basic state of the chip by these count values has obvious defects:

 If the monitoring module reads the count value of each counter in the chip and the chip has stopped receiving and processing the service data, the count value sequentially read by the monitoring module can correctly reflect the number of data processed by the chip. However, the devices in the current network do not stop processing the service data because the monitoring module needs to read the count value of each counter in the chip, so that the counter count value sequentially read by the monitoring module cannot correctly reflect the operation of the chip at the same time. The processing module collects statistics on the service data, that is, the monitoring module cannot read the count values of all the counters in the chip at the same time.

For example, suppose that the monitoring module reads the count value A of the input counter at time T1, and reads the count value B of the output counter at time T2. Since there is another service data entering the chip processing between T1 and T2, the count value A The count value B is not read at the same time, so the monitoring module cannot accurately determine the state of the chip based on the relative relationship between the count value A and the count value B. Summary of the invention

 The technical problem to be solved by the embodiments of the present invention is to provide a chip state monitoring method, device and chip, which can obtain the count value of the counters of each operation processing module in the chip at the same time, thereby more accurately determining the chip according to the count values. status.

 In order to solve the above technical problem, an embodiment of the present invention provides a chip state monitoring method, including:

 The control module simultaneously sends a numerical copying instruction to each operation processing module with a counter in the chip;

 After receiving the numerical copy instruction, each operation processing module copies the current count value of the self counter, and saves the copied count value to the designated position;

 The monitoring module acquires the count value of each operation processing module from the specified position, and determines the state of the chip based on the count value.

 Before the control module sends the value copy instruction to each operation processing module with a counter in the chip, the method further includes:

 The control module receives a counter acquisition instruction sent by the monitoring module, and the counter acquisition instruction triggers the control module to simultaneously send a value replication instruction to each operation processing module with a counter in the chip.

 The operation processing module, after receiving the value copy instruction, copies the current count value of the self counter, and saves the copied count value to the specified location, including:

 After receiving the value copy instruction, each operation processing module copies the current count value of the own counter; each operation processing module saves the copied count value to the designated position; the specified position includes: a storage unit of each operation processing module itself, or Control module

 The counters of the respective operation processing modules themselves work normally.

 The value copy instruction is the highest priority instruction, and each operation processing module receives the value copy instruction and preferentially executes the instruction.

 Each operation processing module with a counter in the chip includes: an input module, a processing module, and an output module.

 Correspondingly, the embodiment of the invention further provides a chip state monitoring device, including:

a control module, configured to simultaneously send a numerical value to each operation processing module with a counter in the chip Making a command; causing each operation processing module with a counter in the chip to copy the current count value of the counter, and saving the copied count value to the specified position;

 And a monitoring module, configured to acquire a count value of each operation processing module from the specified location, and determine a state of the chip according to the count value.

 The control module includes:

 An instruction receiving unit, configured to receive a counter acquisition instruction sent by the monitoring module;

 The instruction sending unit is configured to simultaneously send a value copy instruction to each operation processing module with a counter in the chip after the instruction receiving unit receives the counter acquisition instruction.

 The designated location includes: a storage unit of each operation processing module itself, or the control module.

 The value copy instruction is the highest priority instruction, and each operation processing module receives the value copy instruction and preferentially executes the instruction.

 Correspondingly, an embodiment of the present invention further provides a chip, including: a control module and at least two operation processing modules with a counter;

 a control module, configured to simultaneously send a value replication instruction to each operation processing module with a counter in the chip;

 An operation processing module, configured to: after receiving the value copy instruction sent by the control module, copy the current count value of the counter, and save the copied count value to a specified position; and read by other devices to determine the status of the chip .

 The operation processing module with a counter includes: an input module, a processing module, and an output module.

 The chip state monitoring method, device and chip provided by the embodiments of the present invention can send an instruction for obtaining the counter count value to each operation processing module having a counter in the chip at the same time, so that the monitoring module obtains each operation processing module counter in the chip. The count value at the same time, so that the chip status is more accurately judged. DRAWINGS

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below. Obviously, the drawings in the following description Only some embodiments of the present invention, for those of ordinary skill in the art, do not pay Other drawings can also be obtained from these drawings on the premise of inventive labor.

 1 is a schematic flow chart of a first embodiment of a chip state monitoring method according to the present invention;

 2 is a schematic flow chart of a second embodiment of a chip state monitoring method according to the present invention;

 3 is a schematic structural view of a first embodiment of a chip state monitoring device according to the present invention;

 4 is a schematic structural diagram of a second embodiment of a chip state monitoring apparatus according to the present invention;

 FIG. 5 is a schematic structural diagram of an embodiment of a chip provided by the present invention. detailed description

 The chip state monitoring method, apparatus and chip provided by the embodiment of the invention send an instruction to obtain a counter count value to each operation processing module having a counter in the chip at the same time, so that the monitoring module obtains each operation processing in the chip. The module counter counts at the same time, which makes more accurate judgment of the chip status.

 BRIEF DESCRIPTION OF THE DRAWINGS The technical solutions in the embodiments of the present invention will be described in detail with reference to the accompanying drawings. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without creative work are within the scope of the present invention.

 1 is a schematic flowchart of a first embodiment of a chip state monitoring method according to the present invention, as shown in FIG.

 At S100, the control module simultaneously sends a value copy instruction to each of the operational processing modules with counters in the chip.

 In S101, after receiving the numerical copy instruction, each operation processing module copies the current count value of the self-counter.

 At S102, the respective operation processing modules save the count value of the copy thereof to the designated position. At S103, the monitoring module acquires the count value of each operation processing module from the specified location. At S104, the monitoring module determines the state of the chip based on the count value it has acquired.

 According to the chip state monitoring method provided by the embodiment of the present invention, the control module sends an instruction for acquiring the counter count value to each operation processing module having a counter in the chip at the same time, so that the monitoring module can obtain the counter of each operation processing module in the chip. The count value at the same time can make a more accurate judgment on the state of the chip.

2 is a schematic flowchart of a second embodiment of a chip state monitoring method according to the present invention. In the embodiment, the flow of the chip state monitoring method will be described in more detail. As shown in FIG. 2: At S200, the control module receives a counter acquisition instruction. The counter acquisition instruction is used to trigger the control module to simultaneously send a value copy instruction to each operation processing module with a counter in the chip.

 More specifically, the control module may be located inside the monitored chip, and the counter acquisition command may be sent by the monitoring module connected to the chip, or may be periodically triggered by the control module itself. In the embodiment of the present invention, each operation processing module with a counter in the chip includes: an input module, a processing module, and an output module. In a specific implementation, the monitoring module may be a central processing unit (CPU).

 Those skilled in the art will appreciate that there may be multiple input modules, processing modules, and output modules in the chip. Multiple input modules indicate that the chip has multiple input interfaces. Multiple output modules indicate that the chip has multiple output interfaces. There may also be multiple processing modules inside the chip. The processing modules may be serially and possibly parallelized. In this embodiment, an input module, a processing module, and an output module in the chip are taken as an example for description.

 At S201, the control module simultaneously sends a value copy instruction to each of the operational processing modules with counters in the chip.

 More specifically, each operation processing module with a counter in the chip includes: an input module, a processing module, an output module, and the like, and the operation processing module has at least one counter for processing instructions and messages that have been processed by the operation processing module. The number of business data is counted. For example, the input module has an input counter for counting the number of service data that the input module has received; the processing module has a drop counter and a completion counter, which are respectively used to count the number of service data that the processing module has completed processing and the processed module. The amount of business data discarded.

 Further, the counter statistics may be performed by the operation processing module for each operation processing of the service data, and the counter is incremented by one.

 At S202, after each operation processing module receives the value copy instruction, the current counter value of the own counter is copied. Preferably, for each operation processing module in the chip, the value copy instruction is the highest priority instruction, and each operation processing module receives the value copy instruction and preferentially executes the instruction.

In this embodiment, in order to make the monitoring module more accurately judge the state of the chip, it is necessary to obtain the count value of each operation processing module counter in the chip at the same time. To achieve the above objectives, not only the control module needs to send a numerical copy instruction to each operation processing module at the same time, but also each operation processing module needs to execute the instruction at the same time. Therefore, in S202, the value copy instruction is the highest priority index. Therefore, after each operation processing module receives, the instruction will be executed immediately, and will not be queued in the sequence of instructions to be executed, thereby ensuring that each operation processing module will copy the current count value of its own counter at the same time.

 More specifically, the value copy instruction may be an electrical signal in practical applications, such as a rising edge pulse signal. The manner in which each operational processing module replicates the current count value of its own counter can employ various data replication techniques, such as data snapshot techniques. Data snapshot technology (such as Flash copy, Snapshot, Point-in-time-copy, etc.) is a technology that preserves data images at a certain time. The retained image is called a snapshot (ie Snapshot) and allows the image to operate as raw data. Read or write to the "image" as well.

 It should be noted that when each operation processing module copies the count value of its own counter, the counter itself is not affected and continues to operate.

 In S203, each operation processing module saves the copied count value to a designated location for reading by the monitoring module; the specified location includes: a storage unit of each operation processing module itself, or the control module, and may even It is a storage device external to the chip.

 At S204, the monitoring module acquires the count value of each operation processing module from the specified location. More specifically, the monitoring module reads the count value from the specified position where the count value is saved when it is needed. It should be emphasized that, regardless of when and how the monitoring module reads the count value in S204, the count value read by it is always the count value that each operation processing module saves at the specified position after being copied at the same time, and Not the current real-time count value of each operation processing module counter.

 At S205, the monitoring module determines the state of the chip based on the count value of each of the operational processing modules it reads. More specifically, the present embodiment is described by taking three operation processing modules of an input module, a processing module, and an output module in the chip as an example. Other chips having different functions or quantities of operation processing modules are monitored in the same manner as the present embodiment.

 Assume that the input module has an input counter; the processing module has a drop counter; and the output module has an output counter. The monitoring module reads the count value A of the input counter at a certain moment, the count value B of the discard counter, and the count value C of the output counter, and assumes that at this moment, the number of service data being processed by the processing module is X, then X=A- (B+C).

In general, the amount of business data X being processed inside the chip is relatively small, usually several tens. The user can set the value of X according to his own needs, for example 100. When the value of A-(B+C) is greater than the preset X threshold of 100, the monitoring module determines that the chip is abnormal. Preferably, even if the value of A-(B+C) does not exceed the preset X threshold, further chip failure detection may be triggered if a large change in B/A is found during successive multiple monitoring.

 In the prior art, the monitoring module sequentially reads the counters one by one in sequence, and each time the monitoring module reads a counter, it needs to initiate a read command first, and then waits for the result, and the monitoring module and the chip generally use the control channel to communicate, the rate. Slower, each read operation has a certain delay. Therefore, in the prior art, the monitoring module cannot obtain the count value of each operation processing module at the same time, and the calculated number of service data being processed by the processing module is compared with the number of service data actually processed by the processing module at a certain moment. The large gap causes the monitoring module to not accurately determine the true state of the chip.

 In the chip state monitoring method provided by the embodiment of the present invention, the control module sends an instruction to each operation processing module in the chip at the same time, and the control module can obtain the count value of each operation processing module counter at the same time, thereby more accurately facing the chip. State makes a judgment.

 3 is a schematic structural diagram of a first embodiment of a chip state monitoring device according to the present invention. As shown in FIG. 3, the chip state monitoring device includes:

 The control module 1 is configured to simultaneously send a value copy instruction to each operation processing module with a counter in the chip; so that each operation processing module with a counter in the chip copies the current count value of the counter, and saves the copied count value to Specify the location.

 The monitoring module 2 is configured to acquire a count value of the respective operation processing module counters from the specified position, and determine a state of the chip according to the count value.

 The chip state monitoring device provided by the embodiment of the present invention sends an instruction for acquiring the counter count value to each operation processing module in the chip at the same time by the control module, so that the monitoring module can obtain the counters of the operation processing modules in the chip at the same time. The value is counted to make a more accurate judgment of the state of the chip.

 Referring to FIG. 4, it is a schematic structural diagram of a second embodiment of a chip state monitoring device provided by the present invention. In the present embodiment, the specific structure of the chip state monitoring device will be described in more detail. As shown in FIG. 4, the chip state monitoring device includes: a control module 1 and a monitoring module 2.

 The control module 1 is configured to simultaneously send a value copy instruction to each operation processing module with a counter in the chip; so that each operation processing module with a counter in the chip copies the current count value of the counter, and the copied count value Save to the specified location. More specifically, the control module 1 can be located inside the monitored chip, and includes: an instruction receiving unit 11 and an instruction transmitting unit 12.

The instruction receiving unit 11 is configured to receive a counter acquisition instruction sent by the monitoring module 2; The device fetch instruction is used to trigger the instruction transmitting unit 12 of the control module 1 to simultaneously transmit a value copy instruction to each operation processing module with a counter in the chip. The counter acquisition instruction may be sent by the monitoring module 2 connected to the control module 1, or may be periodically triggered by the control module 1 itself.

 The instruction sending unit 12 is configured to simultaneously send a value copy instruction to each operation processing module with a counter in the chip after the instruction receiving unit 11 receives the counter acquisition instruction.

 More specifically, each operation processing module with a counter in the chip includes: an input module 3, a processing module 4, and an output module 5. Those skilled in the art will appreciate that there may be multiple input modules, processing modules, and output modules in the chip. Multiple input modules indicate that the chip has multiple input interfaces. Multiple output modules indicate that the chip has multiple output interfaces. There may also be multiple processing modules inside the chip. The processing modules may be serially connected in parallel. In this embodiment, an input module, a processing module, and an output module in the chip are taken as an example for description.

 Input module 3, processing module 4, output module 5 These operation processing modules are provided with at least one counter for counting service data such as instructions and messages that have been processed by the operation processing module. For example, the input module 3 has an input counter 31 for counting the number of service data that the input module 3 has received; the processing module 4 has a drop counter 41 for counting the number of service data discarded by the processing module 4. The output module 5 has an output counter 51 for counting the number of service data output by the output module 5.

 Preferably, the value copy instruction sent by the command sending unit 12 is the highest priority instruction, and each operation processing module receives the value copy instruction and preferentially executes the instruction. In this embodiment, in order to make the monitoring module 2 more accurately judge the state of the chip, it is necessary to obtain the count value of each operation processing module in the chip at the same time. To achieve the above object, not only the instruction transmitting unit 12 needs to send a value copy instruction to each operation processing module at the same time, but also each operation processing module needs to execute the instruction at the same time. Therefore, the value copy instruction should be the highest priority instruction so that each operation processing module executes the instruction immediately after it is received, without placing the instruction in the sequence of instructions to be executed.

 Further, after each operation processing module receives the value copy instruction, it immediately copies the current count value of the own counter. More specifically, each operation processing module can copy the current counter value of the counter itself by using various data replication technologies, such as data snapshot technology, and each operation processing module does not receive the counter itself during the process of copying the counter value. Influence, continue to run.

After each operation processing module copies the count value, it is necessary to save these count values to the specified position for the monitoring module 2 to read. The specified location includes: a storage list of each operation processing module itself The element, or the control module, can also be stored in an external storage device connected to the chip if necessary. Taking each operation processing module to save the copied count value in its own storage unit as an example, the input module 3 stores the current count value of the input counter 31 to the input count snapshot unit 32; the processing module 4 will discard the current counter 41 The count value is stored to the discard count snapshot unit 42; the output module 5 stores the current count value of the output counter 51 to the output count snapshot unit 52.

 It should be noted that when each operation processing module copies the count value of its own counter, each counter is not affected and continues to operate.

 The monitoring module 2 is configured to obtain a count value of each operation processing module counter from the specified location, and determine a state of the chip according to the count value. In a specific implementation, the monitoring module 2 can be a CPU.

 More specifically, the monitoring module 2 reads the count value from the specified position where the count value is stored when it is needed. It should be emphasized that although the manner in which the monitoring module 2 in the embodiment reads the count value may be sequentially read, it reads the count value of each operation processing module that is saved at the specified position after copying the counter at the same time. Instead of reading its current count value directly from the counters of the individual operational processing modules.

 The monitoring module 2 determines the state of the chip based on the count value of each of the read operation processing module counters. Taking three operation processing modules of the input module 3, the processing module 4, and the output module 5 in the chip as an example: Assume that the monitoring module 2 reads the count value of the input counter 31 at a certain time, and the count value of the discard counter 41 is B. The count value of the output counter 51 is C, and it is assumed that at this moment, the number of service data being processed by the processing module 4 is X, then X=A-(B+C).

 In general, the amount of business data X being processed inside the chip will be relatively small, usually dozens. The user can set the threshold of X according to his own needs, for example 100. When the value of A-(B+C) is greater than the preset X threshold 100, the monitoring module 1 determines that the chip is abnormal; preferably, even if the value of A-(B+C) does not exceed the preset X threshold, However, if the B/A change is found to be large during successive multiple monitoring, further chip failure detection can be triggered.

In the prior art, the monitoring module sequentially reads the counters one by one in sequence, and each time the monitoring module reads a counter, it needs to initiate a read command first, and then waits for the result, and the monitoring module and the chip generally use the control channel to communicate, the rate. Slower, each read operation has a certain delay. Therefore, in the prior art, because the monitoring module cannot obtain the count value of each operation processing module at the same time, the calculated number of service data being processed by the processing module is actually being processed by the processing module at a certain moment. There is a large gap in the number of business data, which causes the monitoring module to not accurately determine the true state of the chip. The chip state monitoring device provided by the embodiment of the present invention sends a command to each operation processing module in the chip at the same time by the control module, so that the monitoring module can obtain the count value of each operation processing module counter at the same time, thereby more accurately The state of the chip is judged.

 5 is a schematic structural diagram of a chip embodiment according to the present invention. As shown in FIG. 5, the chip includes: a control module 1 and at least two operation processing modules with a counter. In this embodiment, an input module is included. 3. The processing module 4 and the output module 5 are three chips of an operation processing module with a counter as an example. Those skilled in the art will appreciate that there may be multiple input modules, processing modules, and output modules in the chip. In this embodiment, an input module 3, a processing module 4, and an output module 5 in the chip are taken as an example for description.

 The control module 1 is configured to simultaneously send a numerical copy instruction to each operation processing module with a counter in the chip. Control Module 1 The action of simultaneously transmitting a value copy instruction to each operation processing module with a counter in the chip is triggered by the counter acquisition instruction. The counter acquisition command may be sent by the monitoring module 2 connected to the chip, or may be periodically triggered by the control module 1 itself. After receiving the counter acquisition command, the control module 1 simultaneously sends a numerical copy instruction to each operation processing module (input module 3, processing module 4, and output module 5) with a counter in the chip.

 Preferably, the value copy instruction sent by the control module 1 to each operation processing module is the highest priority instruction, and each operation processing module receives the value copy instruction and preferentially executes the instruction. In this embodiment, in order to make the monitoring module more accurately judge the state of the chip, it is necessary to obtain the count value of each operation processing module in the chip at the same time. Therefore, not only the control module needs to send a value copy instruction to each operation processing module at the same time, but also each operation processing module needs to execute the instruction at the same time.

 The operation processing module is configured to: after receiving the value copy instruction sent by the control module 1, immediately copy the current count value of the counter, and save the copied count value to the designated position; and the monitoring module reads to determine the chip status.

More specifically, various operation processing modules can copy the current count value of their counters by using various data replication techniques, such as data snapshots. After each operation processing module completes the copying, the copied count value can be saved in its own storage unit, for example, the input count snapshot unit 32 of the input module 3, the discard count snapshot unit 42 of the processing module 4, and the output count of the output module 5. The snapshot unit 52; may also send the copied count value to the control module for saving, and may even be sent to a storage device external to the chip for saving if necessary, and each operation processing module is in the copy counter During the numerical process, the counter itself is not affected and continues to run.

 The monitoring module 2 connected to the chip acquires the count values of the respective operation processing module counters of the chip from the designated position when necessary, and determines the state of the chip based on the count values. It should be emphasized that the monitoring module 2 in this embodiment reads the count value of the specified position in any manner, and reads the count value of each operation processing module that is saved at the specified position after being copied at the same time, and Not the current count value of the counter of each operation processing module.

 The chip provided by the embodiment of the present invention sends an instruction for acquiring the counter count value to each operation processing module having a counter in the chip at the same time by the control module, so that the monitoring module connected to the chip can obtain each operation processing module in the chip. The count value of the counter at the same time, in order to make a more accurate judgment of the state of the chip. This can be accomplished by a computer program controlling the associated hardware, which can be stored in a computer readable storage medium, which, when executed, can include the flow of an embodiment of the methods described above. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM).

 The above description is only a preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, and the equivalent changes made by the claims of the present invention are still within the scope of the present invention.

Claims

Rights request A chip state monitoring method, characterized in that:  The control module simultaneously sends a numerical copying instruction to each operation processing module with a counter in the chip;  After receiving the numerical copy instruction, each operation processing module copies the current count value of the self counter, and saves the copied count value to the designated position;  The monitoring module acquires the count value of each operation processing module from the specified position, and determines the state of the chip based on the count value. The chip state monitoring method according to claim 1, wherein before the control module sends the value copy instruction to each operation processing module with a counter in the chip, the method further includes: the control module receiving the monitoring module The sent counter acquires an instruction, and the counter acquisition instruction triggers the control module to simultaneously transmit a value copy instruction to each operation processing module with a counter in the chip. The chip state monitoring method according to any one of claims 1 to 2, wherein each of the operation processing modules copies the current count value of the own counter after receiving the numerical copy instruction, and copies the The count value is saved to the specified location, including:  After receiving the value copy instruction, each operation processing module copies the current count value of the own counter; each operation processing module saves the copied count value to the designated position; the specified position includes: a storage unit of each operation processing module itself, or Control module  The counters of the respective operation processing modules themselves work normally. The chip state monitoring method according to any one of claims 1 to 3, wherein the value copy instruction is a highest priority instruction, and each operation processing module receives the value copy instruction and preferentially executes the instruction. The chip state monitoring method according to any one of claims 1 to 4, wherein each of the operation processing modules with a counter in the chip comprises: an input module, a processing module, and an output mode Piece. 6. A chip state monitoring device, comprising:  a control module, configured to simultaneously send a value copy instruction to each operation processing module with a counter in the chip; so that each operation processing module with a counter in the chip copies the current count value of the counter, and saves the copied count value To the designated location;  And a monitoring module, configured to acquire a count value of each operation processing module from the specified location, and determine a state of the chip according to the count value. 7. The chip state monitoring device according to claim 6, wherein the control module comprises:  An instruction receiving unit, configured to receive a counter acquisition instruction sent by the monitoring module;  The instruction sending unit is configured to simultaneously send a value copy instruction to each operation processing module with a counter in the chip after the instruction receiving unit receives the counter acquisition instruction. The chip state monitoring device according to claim 6 or 7, wherein the specified location comprises: a storage unit of each operation processing module itself, or the control module. The chip state monitoring device according to any one of claims 6 to 8, wherein the value copy instruction is a highest priority instruction, and each operation processing module receives the value copy instruction and preferentially executes the instruction. 10. A chip, comprising: a control module and at least two operational processing modules with counters;  a control module, configured to simultaneously send a value replication instruction to each operation processing module with a counter in the chip; An operation processing module, configured to: after receiving the value copy instruction sent by the control module, copy the current count value of the counter, and save the copied count value to a specified position; and read by other devices to determine the status of the chip . The chip according to claim 10, wherein the at least two operation processing modules with a counter comprise: an input module, a processing module, and an output module.