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WO2011125935A1 - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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Publication number
WO2011125935A1
WO2011125935A1 PCT/JP2011/058420 JP2011058420W WO2011125935A1 WO 2011125935 A1 WO2011125935 A1 WO 2011125935A1 JP 2011058420 W JP2011058420 W JP 2011058420W WO 2011125935 A1 WO2011125935 A1 WO 2011125935A1
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WIPO (PCT)
Prior art keywords
electrode
layer
hole
semiconductor substrate
photosensitive resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2011/058420
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French (fr)
Japanese (ja)
Inventor
英之 和田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujikura Ltd
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Fujikura Ltd
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Publication date
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Publication of WO2011125935A1 publication Critical patent/WO2011125935A1/en
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Definitions

  • the present invention relates to a semiconductor device provided with a through electrode, and in particular, a semiconductor that prevents the occurrence of cracks and the like in the protective layer filling the inside of the through hole in which the through electrode is formed, and improves the durability of the protective layer.
  • the present invention relates to an apparatus and a manufacturing method thereof. This application claims priority based on Japanese Patent Application No. 2010-087257 for which it applied on April 5, 2010, and uses the content here.
  • the through electrode is formed by covering a through hole formed perpendicular to the semiconductor substrate with a conductive metal.
  • the technology for forming the through electrode can significantly reduce the wiring distance as compared with the conventional method for realizing the connection by wire bonding, and thus contributes to speeding up, power saving, and downsizing of the semiconductor device.
  • the through electrode having these excellent features is very advantageous in that it is possible to realize a high-density mounting or a high information processing speed that is currently progressing rapidly.
  • FIG. 8 shows an example of a semiconductor device having a conventional through electrode.
  • the semiconductor device 101 includes, as main components, a semiconductor substrate 102 having an insulating portion 103 formed on a first surface 102a (one surface or one surface), and a first surface 102a of the semiconductor substrate 102.
  • the circuit element 104 is formed.
  • a through hole 106 is formed in the semiconductor substrate 102 so that the electrode pad 105 is exposed on the second surface 102b side of the semiconductor substrate.
  • An insulating layer 107 is formed on both surfaces of the semiconductor substrate 102 and inside the through hole 106, and the rewiring layer 108 and the through hole are formed on the side surface of the through hole 106 and on the second surface 102 b of the semiconductor substrate on the insulating layer 107.
  • An electrode 109 is formed. The through electrode 109 is electrically connected to the electrode pad 105.
  • the circuit element 104 is electrically connected to the electrode pad 105 through the wiring portion 119. Furthermore, the electrode pad 105 is electrically connected to the redistribution layer 108 through the through electrode 109, whereby the electrical connection between the circuit element 104 and the member disposed on the second surface 102 b of the semiconductor substrate 102. Connection is possible.
  • the rewiring layer 108 and the through electrode 109 are mainly composed of Cu. Further, the rewiring layer 108 and the through electrode 109 are covered and protected by a protective layer 110 (overcoat layer).
  • a protective layer 110 an inexpensive negative photosensitive resin is often used. This negative photosensitive resin is embedded in the through hole 106 and simultaneously covers the second surface 102b of the semiconductor substrate 102 including the rewiring layer 108.
  • the negative photosensitive resin used in this structure is a dry film-like or varnish-like resin.
  • the negative photosensitive resin is filled in the through hole 106 by a method such as film lamination or spin coating.
  • a scribe line for dicing into an opening of a Cu pad on which the solder bump 15 is placed or a chip size is formed by photolithography, and the semiconductor substrate is completed.
  • the conventional structure has a defect that a void 151 is generated when the photosensitive resin coating is applied.
  • the photosensitive resin does not easily enter the through hole having a large aspect ratio, and it is difficult to completely fill the inside of the through hole with the resin.
  • the void 151 is likely to occur at a position close to the intersection between the bottom surface 109a and the side surface 109b of the through electrode 109 that covers the inside of the through hole.
  • the exposure light hardly reaches the inside of the through hole 106. Therefore, the photochemical reaction of the photosensitive resin does not sufficiently proceed inside the through hole, and a protective layer having poor mechanical strength is formed due to the remaining unreacted photosensitive component, and a crack-like void 152 is formed. There was a problem that would occur.
  • the presence of such voids 151 or voids 152 in the protective layer 110 makes it easy for cracks to expand starting from the voids or voids, and also facilitates breakage of the through electrodes 109, resulting in the reliability of the semiconductor device 101. There is a problem that the performance is lowered.
  • the present invention has been made in view of such circumstances, and an object of the present invention is to provide a semiconductor device that prevents a defect that a crack or the like is generated in a protective layer filling the inside of a through hole constituting a through electrode. There is.
  • a semiconductor device includes a semiconductor substrate including a first surface, a second surface opposite to the first surface, an electrode pad provided on the first surface, and the second surface.
  • a through hole penetrating the semiconductor substrate from the surface toward the first surface and exposing the electrode pad; an exposed portion where the electrode pad is exposed; and a side surface of the through hole; a bottom surface and a side surface; And a through electrode electrically connected to the electrode pad, and a protective layer filled in the through hole, covering the through electrode, and formed of a plurality of layers.
  • the layer closest to the first surface among the plurality of layers of the protective layer covers at least an intersection located between the bottom surface and the side surface of the through electrode, and is positive photosensitive.
  • Made of resin That is, the layer closest to the first surface is formed using a positive photosensitive resin.
  • the method for manufacturing a semiconductor device includes the following steps (A) to (G).
  • a semiconductor substrate having a first surface and a second surface opposite to the first surface is prepared, and an electrode pad is formed on the first surface.
  • a through hole penetrating the semiconductor substrate is formed from the second surface toward the first surface to expose the electrode pad.
  • a through electrode having a bottom surface and a side surface is formed by covering the exposed portion where the electrode pad is exposed and the side surface of the through hole.
  • the through electrode is covered with a positive photosensitive resin.
  • the positive photosensitive resin is removed so that the positive photosensitive resin remains at least at the intersection between the bottom surface and the side surface of the through electrode.
  • step (D), the step (E), and the step (F) are repeated a plurality of times.
  • the protective layer that fills the through hole and covers the through electrode is formed by a plurality of protective layers.
  • the protective layer composed of a plurality of layers covers at least the intersection located between the bottom surface and the side surface of the through electrode, and is formed using a positive photosensitive resin.
  • the bottom portion of the through electrode that is difficult for light to reach is coated with a positive photosensitive resin, and light is applied to the surface coated with the positive photosensitive resin. Irradiation is performed to remove the resin so that the positive photosensitive resin remains on the bottom surface of the through electrode. Accordingly, the protective layer can be reliably filled in the through hole, and the positive photosensitive resin can be filled in the corner of the bottom surface of the through electrode that is difficult for exposure light to reach. For this reason, the problem resulting from the photosensitive resin inside the through hole not being exposed can be eliminated.
  • the steps of filling the positive photosensitive resin, irradiating light, and removing the resin are repeated a plurality of times.
  • a small amount of resin is filled into the through hole, and then the resin is filled into the through hole so as to overlap the previously filled resin. That is, the resin is filled into the through hole little by little. For this reason, the resin is more reliably filled into the through-hole, and filling failure is less likely to occur.
  • FIG. 1 is a cross-sectional view showing a first embodiment of a semiconductor device according to the present invention. It is a figure explaining the process of the manufacturing method of the semiconductor device which concerns on this invention. It is a figure explaining the process of the manufacturing method of the semiconductor device which concerns on this invention. It is a figure explaining the process of the manufacturing method of the semiconductor device which concerns on this invention. It is a figure explaining the process of the manufacturing method of the semiconductor device which concerns on this invention. It is a figure explaining the process of the manufacturing method of the semiconductor device which concerns on this invention. It is a figure explaining the process of the manufacturing method of the semiconductor device which concerns on this invention. It is sectional drawing which shows 2nd Embodiment of the semiconductor device which concerns on this invention. It is sectional drawing which shows 3rd Embodiment of the semiconductor device which concerns on this invention.
  • FIG. 1 is a cross-sectional view showing an embodiment of the present invention.
  • reference numeral 1 denotes a semiconductor device
  • reference numeral 2 denotes a semiconductor substrate
  • reference numeral 3 denotes an insulating portion
  • reference numeral 4 denotes a circuit element
  • reference numeral 5 denotes an electrode pad
  • reference numeral 6 denotes a through hole
  • Reference numeral 7 indicates an insulating layer
  • reference numeral 8 indicates a rewiring layer
  • reference numeral 9 indicates a through electrode
  • reference numeral 20 indicates a support substrate
  • reference numeral 21 indicates a bonding resin.
  • the semiconductor device 1 is supported by a semiconductor substrate 2 provided with a rewiring layer 8, a through electrode 9, a circuit element 4, and the like via a bonding resin 21.
  • the structure is supported by the substrate 20.
  • the semiconductor substrate 2 is a semiconductor substrate such as silicon or GaAs, for example.
  • the thickness of the semiconductor substrate 2 is, for example, about several hundred ⁇ m.
  • the first surface 2 a of the semiconductor substrate 2 functions as the insulating portion 3.
  • the semiconductor substrate 2 may be a semiconductor wafer such as a silicon wafer, or may be a semiconductor chip having a predetermined dimension (chip dimension) divided by cutting (dicing) the semiconductor wafer.
  • the semiconductor substrate 2 is a semiconductor chip, first, various circuit elements and the like are formed on the semiconductor wafer, and then the semiconductor wafer is cut to obtain a plurality of semiconductor chips having predetermined dimensions (chip dimensions). be able to.
  • the circuit element 4 is, for example, a semiconductor functional element such as a memory, an IC, an imaging element, and a MEMS element.
  • the support substrate 20 As a material for the support substrate 20, it is desirable to select a material (member) whose thermal expansion coefficient of the support substrate 20 is close to the thermal expansion coefficient of the semiconductor substrate 2 at the temperature at which the semiconductor substrate 2 and the support substrate 20 are bonded. . Specifically, a glass substrate is preferable, but if the circuit element 2 does not require optical characteristics, the material of the support substrate 20 does not need to be a transparent material. Further, the support substrate 20 is not always necessary, and the support substrate 20 may be omitted when the strength required for the semiconductor substrate 2 is sufficiently obtained.
  • the material of the bonding resin 21 a material having adhesiveness and electrical insulation is used. For example, it is desirable to use polyimide resin, epoxy resin, benzocyclobutane (BCB) resin, or the like.
  • An electrode pad 5 is provided on the first surface 2 a of the semiconductor substrate 2.
  • a material having excellent conductivity such as Al or Cu, an aluminum-silicon (Al-Si) alloy, an aluminum-silicon-copper (Al-Si-Cu) alloy is preferably used.
  • the electrode pad 5 is electrically connected to the circuit element 4 provided on the first surface 2 a of the semiconductor substrate 2 through the wiring portion 19.
  • the wiring portion 19 is disposed on the first surface 2 a of the semiconductor substrate 2 and constitutes a circuit that electrically connects the electrode pad 5 and the circuit element 4.
  • the material of the wiring portion 19 may be the same material as that of the electrode pad 5 and is made of conductive material such as Al or Cu, an aluminum-silicon (Al-Si) alloy, an aluminum-silicon-copper (Al-Si-Cu) alloy, or the like. A material having excellent properties is preferably used.
  • a through hole 6 penetrating from the second surface 2b toward the first surface 2a is formed in a portion where the electrode pad 5 is provided. Therefore, when viewed from the second surface 2 b side, a part of the electrode pad 5 is exposed through the through hole 6.
  • the diameter of the through hole 6 is, for example, about several tens of ⁇ m. Further, the number of through holes 6 provided on the semiconductor substrate 2 is not particularly limited.
  • An insulating layer 7 is provided on the second surface 2 b of the semiconductor substrate 2 and the side surfaces of the through holes 5.
  • the semiconductor substrate 2 has insulating properties on the second surface 2 b of the substrate and the side surfaces of the through holes 6.
  • the insulating layer 7 is made of, for example, SiO 2 , SiN, or a resin film.
  • a through electrode 9 is formed inside the through hole 6 to cover the side surface of the through hole 6 and the exposed portion where the electrode pad 5 is exposed.
  • a rewiring layer 8 is formed on the second surface 2 b of the semiconductor substrate 2. One end of the rewiring layer 8 is electrically connected to the through electrode 9.
  • the through electrode 9 is electrically connected to the electrode pad 5.
  • the material of the through electrode 9 and the rewiring layer 8 is preferably a material having excellent conductivity. Further, as the material of the through electrode 9, it is more preferable to use a material that is excellent in adhesion between the electrode pad 5 and the through electrode 9 and that does not easily diffuse into the electrode pad 5.
  • the material of the rewiring layer 8 and the through electrode 9 includes conductors (such as various metals or alloys) such as Cu, Al, Ni, Ag, Pb, Sn, Au, Co, Cr, Ti, TiW, or the like. It is preferable to use a material in which is combined.
  • the through electrode 9 is disposed in a part of the through hole 6 so as to extend between the first surface 2 a and the second surface 2 b of the semiconductor substrate 2 may be employed.
  • the protective layer 10 includes a first layer 11 made of a positive photosensitive resin and a second layer 12 made of a negative photosensitive resin.
  • the first layer 11 is disposed at least inside the through hole 6, and is the layer closest to the first surface 2 a of the semiconductor substrate 2 in the protective layer 10.
  • the positive photosensitive resin is a photosensitive resin in which an exposed portion generated by exposing the resin is removed by a chemical solution.
  • the negative photosensitive resin is a photosensitive resin in which the resin excluding the exposed portion is removed by a chemical solution.
  • the first layer 11 is disposed in the inside of the through hole 6 at a position near the first surface 2 a of the semiconductor substrate 2, that is, a position near the bottom of the through hole 6 (bottom side).
  • the bottom surface 9a of the through electrode 9 is covered.
  • the thickness of the first layer 11 is not particularly limited, but at least the intersecting portion where the bottom surface 9a and the side surface 9b of the through electrode 9 intersect each other is covered with the first layer 11 made of a positive photosensitive resin. ing.
  • various resin materials such as a polyimide resin, a silicone resin, and an epoxy resin can be applied.
  • the second layer 12 covers the inside of the through hole 6 and the second surface 2 b of the semiconductor substrate 2 so as to cover the first layer 11.
  • the second layer 12 is patterned so that at least the connection portion of the rewiring layer 8 is exposed, and a hemispherical solder bump 15 is formed on this connection portion.
  • the resin constituting the second layer 12 any type of photosensitive resin is applicable regardless of whether it is a positive type or a negative type.
  • various resin materials such as polyimide resin, silicone resin, and epoxy resin can be used.
  • the protective layer filling the through hole 6 is formed by a plurality of protective layers.
  • the semiconductor device 1 according to this embodiment has a configuration in which at least the intersection between the bottom surface and the side surface of the through electrode 9 is covered with the first layer 11 made of a positive photosensitive resin. Regardless of the magnitude of the photosensitive reaction in the positive photosensitive resin, a resin layer having a stable strength can be obtained after the desired thermosetting treatment.
  • the first layer 11 made of a positive photosensitive resin is disposed at least at the intersection between the bottom surface and the side surface of the through electrode 9 in the through hole where light does not easily reach when exposing the photosensitive resin.
  • the conventional semiconductor device it is possible to suppress the occurrence of cracks or the like of the protective layer 10 that is easily generated at the intersection between the bottom surface and the side surface of the through electrode 9.
  • a negative photosensitive resin is employed as the material of the second layer 12, but the material is not limited to a negative type, and a positive photosensitive resin may be employed. Further, any resin can be used as long as the resin can be patterned so as to protect the second surface 2b of the semiconductor substrate 2 and expose a part of the rewiring layer 8.
  • FIGS. 2A to 2E are views for sequentially explaining the steps of the method of manufacturing a semiconductor device according to the present invention, using cross-sectional views. 2A to 2E, the support substrate and the bonding resin are omitted.
  • step A a process of preparing the semiconductor substrate 2 on which the rewiring layer 8 and the through electrode 9 have been formed will be described with reference to FIG. 2A.
  • step A the semiconductor substrate 2 provided with the circuit element 4 is prepared, and the electrode pad 5 and the wiring part 19 are formed on the first surface 2a of the semiconductor substrate 2 (step A).
  • step B A through hole 6 reaching the electrode pad 5 from the second surface 2b of the semiconductor substrate 2 is formed (step B).
  • the through hole 6 is formed from the second surface 2b of the semiconductor substrate 2 so that the electrode pad 5 is exposed.
  • the diameter and the cross-sectional shape of the through-hole 6 are not particularly limited, but are appropriately set according to the thickness of the semiconductor substrate 2 or the use (desired use) of the semiconductor substrate 2 and can be appropriately determined according to the desired wiring. .
  • the thickness of the semiconductor substrate 2 is 100 ⁇ m
  • the hole diameter of the through hole 6 is 80 ⁇ m.
  • a through hole 6 formation method for example, a DRIE (Deep-Reactive Ion Etching) method, a wet etching method, a machining method using a micro drill, a photoexcited electrolytic polishing method, or the like can be used.
  • a DRIE Deep-Reactive Ion Etching
  • step C After forming the insulating layer 7 on the side surface of the through hole 6 and the second surface 2b of the semiconductor substrate 2, the exposed portion of the electrode pad 5, the through electrode 9 covering the side surface of the through hole 6, and the semiconductor substrate 2 A rewiring layer 8 covering the second surface 2b is formed (step C).
  • the electrode pad 5, the rewiring layer 8 of the insulating layer 7 and the through electrode 9 are electrically connected.
  • the insulating layer 7 is formed, for example, by depositing SiO 2 by plasma CVD or the like.
  • the formation method of the rewiring layer 8 and the through electrode 9 is not particularly limited, and examples of the formation method include a sputtering method, a vapor deposition method, a plating method, and a combination of these two or more methods.
  • a photolithography technique is preferably used as a patterning method for the rewiring layer 8 and the through electrode 9.
  • the through electrode 9 is formed so as to cover the entire surface of the through hole 6 .
  • the through electrode on the electrode pad 5 and the second surface 2b of the semiconductor substrate 2 is described.
  • the present invention is not limited to the structure described above.
  • the through electrode 9 may be formed linearly on the side surface of the through hole 6.
  • the semiconductor substrate 2 on which the rewiring layer 8 and the through electrode 9 are formed as shown in FIG. 2A can be prepared.
  • the positive photosensitive resin 11a is applied to the second surface 2b of the semiconductor substrate 2 to cover the rewiring layer 8 and the through electrode 9, and the through hole 6 is filled with the positive photosensitive resin 11a.
  • the positive photosensitive resin 11a is preferably a low-viscosity liquid resin so that the resin can easily enter the through hole 6.
  • a positive photosensitive resin having a viscosity of 50 to 300 cP can be applied.
  • a method for applying the positive photosensitive resin 11a a method in which the resin can enter the through hole 6 is preferable. For example, a spin coat coating method, a spray coating method or the like is preferable.
  • the semiconductor substrate 2 is returned to an atmospheric pressure environment to fill the through hole 6 with a differential pressure.
  • the exposure light 60 is irradiated onto the second surface 2b of the semiconductor substrate 2 (step E).
  • the exposure light 60 light including the photosensitive wavelength of the photosensitive resin is used.
  • the optimum photosensitive wavelength for exposure varies depending on the resin material, it is generally preferable to use light in the ultraviolet region called g, h, i line.
  • the positive photosensitive resin is developed so that the positive photosensitive resin 11a remains at least at the intersection between the bottom surface 9a and the side surface 9b of the through electrode 9 (steps). F).
  • the resin is developed so as to reach about half the depth of the through-hole 6, and the positive photosensitive resin 11a applied on the second surface 2b of the semiconductor substrate 2 disappears,
  • the positive photosensitive resin 11a disposed at a position close to the bottom surface 9a of the through electrode 9 remains.
  • the developer used in the development step can be determined according to the type of photosensitive resin.
  • heat treatment is performed in this state to volatilize excess photosensitive group components, solvent components, and the like of the positive photosensitive resin, thereby causing a thermosetting reaction.
  • the negative photosensitive resin 12a is coated on the second surface 2b of the semiconductor substrate 2, and the negative photosensitive resin 12a is filled into the through-hole 6 (step G). As shown in FIG. 2D, the negative photosensitive resin 12a is applied on the second surface 2b.
  • a coating method of the negative photosensitive resin 12a a spin coat coating method, a film laminating method, a spray coating method, or the like can be employed. Further, after applying the negative photosensitive resin 12a under a vacuum pressure, the semiconductor substrate 2 is returned to an atmospheric pressure environment to fill the inside of the through hole 6 with a differential pressure. it can.
  • the negative photosensitive resin 12a is patterned using photolithography technology. Specifically, as shown in FIG. 2D, the negative photosensitive resin 12a is irradiated with exposure light 60 through a photomask 70, and the mask pattern is transferred to the negative photosensitive resin 12a. Next, as shown in FIG. 2E, the negative photosensitive resin 12a is developed to remove unnecessary photosensitive resin. Cure and descum are applied to the remaining photosensitive resin 12. Finally, the solder bump 15 is formed, and the semiconductor device 1 as shown in FIG. 1 can be obtained.
  • the semiconductor substrate 1 of the first embodiment can be manufactured by the method as described above. By manufacturing in this way, the positive photosensitive resin 11a is filled at the bottom of the through hole 6 where light does not easily reach, so that the bottom of the through hole 6 is reliably covered with the positive photosensitive resin 11a.
  • the positive photosensitive resin 11a is formed by a single coating process, but the present invention is not limited to the above-described method.
  • the coating process of the positive photosensitive resin 11a can be repeated a plurality of times. That is, a manufacturing method in which the negative photosensitive resin 12a is applied after performing the steps D to F a plurality of times may be used.
  • a manufacturing method in which the negative photosensitive resin 12a is applied after performing the steps D to F a plurality of times may be used.
  • a small amount of resin is filled into the through holes, and then the resin that has been previously filled The resin is filled into the through hole so as to overlap with the inside. That is, the resin is filled into the through hole 6 little by little. For this reason, the resin is more reliably filled into the through-hole, and filling failure is less likely to occur.
  • the material of the second layer 12 is not limited to the negative photosensitive resin, and a positive photosensitive resin may be used. Further, any resin can be used as long as the resin can be patterned so as to protect the second surface 2b of the semiconductor substrate 2 and expose a part of the rewiring layer 8.
  • 3 to 7 are cross-sectional views showing an example of an embodiment of the semiconductor device of the present invention.
  • the same members as those in the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted or simplified.
  • the differences between the first embodiment and the third to sixth embodiments will be mainly described. State.
  • the protective layer 10b includes a first layer 11b made of a positive photosensitive resin, a second layer 13b, and a space between the first layer 11b and the second layer 13b. And a third layer 12b disposed in the first layer.
  • the third layer 12b can be formed by forming a film by a suitable film formation method after the formation of the first layer 11b.
  • the third layer 12b is formed of a material having adhesiveness to both the first layer 11b and the second layer 13b.
  • the third layer 12b is not limited to the resin layer but may be a metal layer.
  • the third layer 12b is interposed between the first layer 11b and the second layer 13b. Adhesiveness with the 2nd layer 13b can be improved.
  • the first layer 11 c constituting the protective layer 10 c is not formed at a position near the center of the bottom surface 9 a of the through electrode 9, and the bottom surface 9 a and the side surface 9 b of the through electrode are not formed. It is formed so as to cover only the intersection between them. In this configuration, only the intersection between the bottom surface and the side surface of the through electrode 9 that is most difficult to fill is filled with a small amount of the first layer 11 c and then the second layer 12 c is filled into the through hole 6. . By this method, the through hole 6 can be reliably filled without generating a void.
  • the shape of the first layer 11 d constituting the protective layer 10 d is symmetric in a cross section that includes the center point of the through hole 6 and is perpendicular to the semiconductor substrate 2. It need not be in shape. That is, the first layer 11d remaining by exposure may be formed in an asymmetric shape.
  • the 1st layer 11e which comprises the protective layer 10e may have a convex shape that the center part rises upwards.
  • the protective layer 10f can be formed by using a plurality of layers in accordance with the function of the protective layer.
  • the protective layer 10f includes a first layer 11f, a second layer 12f, a third layer 13f, and a fourth layer 14f.
  • the protective layer 10f is comprised with the some resin layer, it becomes possible to form the protective layer 10f which has a function according to the objective which each layer implement
  • the material of the first layer 11f and the third layer 13f a material that can easily fill the through hole is applied, and as the material of the second layer 12f and the fourth layer 14f, rewiring is performed.
  • a material that functions as a protective film for protecting the film or a material excellent in pattern processability can be applied.
  • the present invention can be widely applied to a semiconductor device provided with a through electrode and a manufacturing method thereof.
  • SYMBOLS 1 ... Semiconductor device, 2 ... Semiconductor substrate, 3 ... Insulating part, 4 ... Circuit element, 5 ... Electrode pad, 6 ... Through-hole, 7 ... Insulating layer, 8 ... Redistribution layer, 9 ... Through electrode, 10 ... Protective layer 11 ... first layer, 12 ... second layer, 19 ... wiring section.

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Abstract

The disclosed semiconductor device (1) is provided with: a semiconductor substrate (2) having a first surface (2a), a second surface opposite of the first surface (2a), and an electrode pad (5) disposed on the first surface (2a); a through-hole (6) penetrating the semiconductor substrate (2) from the second surface to the first surface (2a) and exposing the electrode pad (5); a through-electrode (9) covering the side surface of the through-hole (6) and the exposed portion of the electrode pad (5), having a bottom surface and a side surface, and electrically connected to the electrode pad (5); and a protective layer (10) filling the through-hole (6), covering the through-electrode (9), and configured by multiple layers (11, 12). That layer of the multiple layers (11, 12) of the protective layer (10) which is nearest the first surface (2a) covers at least the intersection portion positioned between the bottom surface (9a) and the side surface (9b) of the through-electrode (9), and comprises a positive photosensitive resin.

Description

半導体装置及びその製造方法Semiconductor device and manufacturing method thereof

　本発明は、貫通電極を備える半導体装置に係り、特に、貫通電極が形成される貫通孔の内部を充填する保護層にクラック等が発生する不具合を防止し、保護層の耐久性を向上させる半導体装置及びその製造方法に関する。
　本願は、２０１０年４月５日に出願された特願２０１０－０８７２５７号に基づき優先権を主張し、その内容をここに援用する。 The present invention relates to a semiconductor device provided with a through electrode, and in particular, a semiconductor that prevents the occurrence of cracks and the like in the protective layer filling the inside of the through hole in which the through electrode is formed, and improves the durability of the protective layer. The present invention relates to an apparatus and a manufacturing method thereof.
This application claims priority based on Japanese Patent Application No. 2010-087257 for which it applied on April 5, 2010, and uses the content here.

　従来、受光素子又はイメージセンサ素子等の回路素子を備える半導体装置においては、回路素子と配線層との間の接続構造としてワイヤーボンディングが使用されていた。これに対し、最近、ワイヤーボンディングに代わり、貫通電極（Ｔｈｒｏｕｇｈ－Ｓｉｌｉｃｏｎ　Ｖｉａ、ＴＳＶ）を用いた半導体装置、特に、貫通電極を用いたウエハレベルパッケージが提案されてきている。 Conventionally, in a semiconductor device including a circuit element such as a light receiving element or an image sensor element, wire bonding has been used as a connection structure between the circuit element and the wiring layer. On the other hand, semiconductor devices using through electrodes (Through-Silicon Via, TSV) instead of wire bonding, in particular, wafer level packages using through electrodes have been proposed recently.

　貫通電極は、半導体基板に垂直に形成された貫通孔を、導電性を有する金属で被覆することによって形成されている。貫通電極を形成する技術は、ワイヤーボンディングによる接続を実現する従来の手法と比較して、配線距離を大幅に短縮できるため、半導体装置の高速化、省電力化、小型化に寄与する。
　これら優れた特徴を有する貫通電極は、現在急速に進んでいる実装の高密度化又は情報処理速度の高速化が実現できるという点において非常に優位である。 The through electrode is formed by covering a through hole formed perpendicular to the semiconductor substrate with a conductive metal. The technology for forming the through electrode can significantly reduce the wiring distance as compared with the conventional method for realizing the connection by wire bonding, and thus contributes to speeding up, power saving, and downsizing of the semiconductor device.
The through electrode having these excellent features is very advantageous in that it is possible to realize a high-density mounting or a high information processing speed that is currently progressing rapidly.

　従来の貫通電極を用いた半導体装置としては、例えば、特許文献１に記載された半導体装置が知られている。図８は、従来の貫通電極を備えた半導体装置の一例を示す。この半導体装置１０１は、主な構成要素として、第１面１０２ａ（一面、２つの面のうち一方の面）に絶縁部１０３が形成された半導体基板１０２と、半導体基板１０２の第１面１０２ａ上に形成された回路素子１０４とを有している。 For example, a semiconductor device described in Patent Document 1 is known as a conventional semiconductor device using a through electrode. FIG. 8 shows an example of a semiconductor device having a conventional through electrode. The semiconductor device 101 includes, as main components, a semiconductor substrate 102 having an insulating portion 103 formed on a first surface 102a (one surface or one surface), and a first surface 102a of the semiconductor substrate 102. The circuit element 104 is formed.

　半導体基板１０２には、電極パッド１０５が半導体基板の第２面１０２ｂ側に露出するように、貫通孔１０６が形成されている。半導体基板１０２の両面及び貫通孔１０６の内部には絶縁層１０７が形成されており、絶縁層１０７上であって貫通孔１０６の側面及び半導体基板の第２面１０２ｂには再配線層１０８及び貫通電極１０９が形成されている。貫通電極１０９は、電極パッド１０５と電気的に接続されている。 A through hole 106 is formed in the semiconductor substrate 102 so that the electrode pad 105 is exposed on the second surface 102b side of the semiconductor substrate. An insulating layer 107 is formed on both surfaces of the semiconductor substrate 102 and inside the through hole 106, and the rewiring layer 108 and the through hole are formed on the side surface of the through hole 106 and on the second surface 102 b of the semiconductor substrate on the insulating layer 107. An electrode 109 is formed. The through electrode 109 is electrically connected to the electrode pad 105.

　回路素子１０４は、配線部１１９を介して電極パッド１０５と電気的に接続されている。更に、電極パッド１０５は貫通電極１０９を介して再配線層１０８と電気的に接続されており、これにより、回路素子１０４と半導体基板１０２の第２面１０２ｂに配置されている部材との電気的接続が可能である。 The circuit element 104 is electrically connected to the electrode pad 105 through the wiring portion 119. Furthermore, the electrode pad 105 is electrically connected to the redistribution layer 108 through the through electrode 109, whereby the electrical connection between the circuit element 104 and the member disposed on the second surface 102 b of the semiconductor substrate 102. Connection is possible.

　再配線層１０８及び貫通電極１０９は、主にＣｕから構成されている。また、再配線層１０８及び貫通電極１０９は、保護層１１０（オーバーコート層）で被覆され、保護されている。
　この保護層１１０を形成する際には、安価なネガ型感光性樹脂が多用される。このネガ型感光性樹脂は、貫通孔１０６の内部に埋め込まれ、同時に再配線層１０８を含む半導体基板１０２の第２面１０２ｂを被覆する。この構造において使用されるネガ型感光性樹脂は、ドライフィルム状又はワニス状の樹脂である。フィルムラミネート又はスピンコート等の手法によって、ネガ型感光性樹脂が貫通孔１０６の内部に充填される。 The rewiring layer 108 and the through electrode 109 are mainly composed of Cu. Further, the rewiring layer 108 and the through electrode 109 are covered and protected by a protective layer 110 (overcoat layer).
In forming the protective layer 110, an inexpensive negative photosensitive resin is often used. This negative photosensitive resin is embedded in the through hole 106 and simultaneously covers the second surface 102b of the semiconductor substrate 102 including the rewiring layer 108. The negative photosensitive resin used in this structure is a dry film-like or varnish-like resin. The negative photosensitive resin is filled in the through hole 106 by a method such as film lamination or spin coating.

　保護層１１０が形成された後は、フォトリソグラフィによって、はんだバンプ１５を載せるＣｕパッドの開口部又はチップサイズにダイシングするためのスクライブラインを形成し、半導体基板が完成する。 After the protective layer 110 is formed, a scribe line for dicing into an opening of a Cu pad on which the solder bump 15 is placed or a chip size is formed by photolithography, and the semiconductor substrate is completed.

特開平５－１５２４３５号公報Japanese Patent Laid-Open No. 5-152435

　しかしながら、近年の配線パターン等の微細化に伴い、貫通孔１０６のアスペクト比の増加に従って、従来の構造では、感光性樹脂の塗膜の際にボイド１５１が生じるという不具合があった。このような原因としては、アスペクト比が大きい貫通孔には感光性樹脂が入りにくく、貫通孔の内部を完全に樹脂で充填し難いことが考えられる。特に、貫通孔の内部を被覆する貫通電極１０９の底面１０９ａと側面１０９ｂとの間の交差部に近い位置にボイド１５１が発生し易い。 However, with the recent miniaturization of wiring patterns and the like, with the increase in the aspect ratio of the through-hole 106, the conventional structure has a defect that a void 151 is generated when the photosensitive resin coating is applied. As such a cause, it is conceivable that the photosensitive resin does not easily enter the through hole having a large aspect ratio, and it is difficult to completely fill the inside of the through hole with the resin. In particular, the void 151 is likely to occur at a position close to the intersection between the bottom surface 109a and the side surface 109b of the through electrode 109 that covers the inside of the through hole.

　また、感光性樹脂を露光する際に、露光光は貫通孔１０６の内部に到達しにくい。そのため、貫通孔の内部において、感光性樹脂の光化学反応が十分に進まず、未反応な感光成分が残留することに起因して機械的強度が劣る保護層が形成され、クラックのような空隙１５２が発生してしまうという問題があった。
　このようなボイド１５１又は空隙１５２が保護層１１０に存在することによって、ボイド又は空隙を起点にクラックが拡大し易くなり、更に貫通電極１０９の断線が生じ易くなり、結果的に半導体装置１０１の信頼性が低下するという問題がある。 Further, when exposing the photosensitive resin, the exposure light hardly reaches the inside of the through hole 106. Therefore, the photochemical reaction of the photosensitive resin does not sufficiently proceed inside the through hole, and a protective layer having poor mechanical strength is formed due to the remaining unreacted photosensitive component, and a crack-like void 152 is formed. There was a problem that would occur.
The presence of such voids 151 or voids 152 in the protective layer 110 makes it easy for cracks to expand starting from the voids or voids, and also facilitates breakage of the through electrodes 109, resulting in the reliability of the semiconductor device 101. There is a problem that the performance is lowered.

　この発明は、このような事情を考慮してなされたもので、その目的は、貫通電極を構成する貫通孔の内部を充填する保護層にクラック等が発生する不具合を防止する半導体装置を提供することにある。 The present invention has been made in view of such circumstances, and an object of the present invention is to provide a semiconductor device that prevents a defect that a crack or the like is generated in a protective layer filling the inside of a through hole constituting a through electrode. There is.

　本発明の第１態様の半導体装置は、第１面と、前記第１面とは反対の第２面と、前記第１面に設けられた電極パッドとを備えた半導体基板と、前記第２面から前記第１面に向けて前記半導体基板を貫通し、前記電極パッドを露呈する貫通孔と、前記電極パッドが露呈されている露呈部及び前記貫通孔の側面を被覆し、底面と側面とを有し、前記電極パッドと電気的に接続された貫通電極と、前記貫通孔内に充填され、前記貫通電極を被覆し、複数層で形成された保護層とを備える。この半導体装置において、前記保護層の前記複数層のうち最も前記第１面に近い層は、少なくとも前記貫通電極の前記底面と前記側面との間に位置する交差部を被覆し、ポジ型感光性樹脂からなる。即ち、最も前記第１面に近い前記層は、ポジ型感光性樹脂を用いて形成されている。 A semiconductor device according to a first aspect of the present invention includes a semiconductor substrate including a first surface, a second surface opposite to the first surface, an electrode pad provided on the first surface, and the second surface. A through hole penetrating the semiconductor substrate from the surface toward the first surface and exposing the electrode pad; an exposed portion where the electrode pad is exposed; and a side surface of the through hole; a bottom surface and a side surface; And a through electrode electrically connected to the electrode pad, and a protective layer filled in the through hole, covering the through electrode, and formed of a plurality of layers. In this semiconductor device, the layer closest to the first surface among the plurality of layers of the protective layer covers at least an intersection located between the bottom surface and the side surface of the through electrode, and is positive photosensitive. Made of resin. That is, the layer closest to the first surface is formed using a positive photosensitive resin.

　本発明の第２態様の半導体装置の製造方法は、次の工程（Ａ）～（Ｇ）を有する。
（Ａ）第１面と、前記第１面とは反対の第２面とを有する半導体基板を準備し、前記第１面に電極パッドを形成する。
（Ｂ）前記第２面から前記第１面に向けて前記半導体基板を貫通する貫通孔を形成し、前記電極パッドを露呈する。
（Ｃ）前記電極パッドが露呈されている露呈部及び前記貫通孔の側面を被覆し、底面と側面とを有する貫通電極を形成する。
（Ｄ）ポジ型感光性樹脂を用いて前記貫通電極を被覆する。
（Ｅ）前記半導体基板の前記第２面に光を照射する。
（Ｆ）少なくとも前記貫通電極の前記底面と前記側面との間に位置する交差部に前記ポジ型感光性樹脂が残存するように、前記ポジ型感光性樹脂を除去する。
（Ｇ）次いで、前記貫通孔内に樹脂を充填する。 The method for manufacturing a semiconductor device according to the second aspect of the present invention includes the following steps (A) to (G).
(A) A semiconductor substrate having a first surface and a second surface opposite to the first surface is prepared, and an electrode pad is formed on the first surface.
(B) A through hole penetrating the semiconductor substrate is formed from the second surface toward the first surface to expose the electrode pad.
(C) A through electrode having a bottom surface and a side surface is formed by covering the exposed portion where the electrode pad is exposed and the side surface of the through hole.
(D) The through electrode is covered with a positive photosensitive resin.
(E) Irradiating light to the second surface of the semiconductor substrate.
(F) The positive photosensitive resin is removed so that the positive photosensitive resin remains at least at the intersection between the bottom surface and the side surface of the through electrode.
(G) Next, a resin is filled in the through hole.

　本発明の第２態様の半導体装置の製造方法においては、前記工程（Ｄ），前記工程（Ｅ），及び前記工程（Ｆ）を複数回繰り返すことが好ましい。 In the method for manufacturing a semiconductor device according to the second aspect of the present invention, it is preferable that the step (D), the step (E), and the step (F) are repeated a plurality of times.

　本発明の第１態様の半導体装置によれば、貫通孔内に充填されて貫通電極を被覆する保護層が複数層の保護層によって形成されている。複数層からなる保護層は、少なくとも前記貫通電極の前記底面と前記側面との間に位置する交差部を被覆し、かつ、ポジ型感光性樹脂を用いて形成されている。これにより、貫通孔の内部に保護層が確実に充填された半導体装置を提供することができる。また、露光光が届きにくい貫通孔の底面の隅部にポジ型感光性樹脂が充填されるので、貫通孔の内部に位置する感光性樹脂が露光されないことに起因する問題を排除できる。ゆえに、成型後において樹脂にクラックが生じる（樹脂クラック）等の不具合の発生を抑制することができる半導体装置を提供することができる。 According to the semiconductor device of the first aspect of the present invention, the protective layer that fills the through hole and covers the through electrode is formed by a plurality of protective layers. The protective layer composed of a plurality of layers covers at least the intersection located between the bottom surface and the side surface of the through electrode, and is formed using a positive photosensitive resin. Thereby, it is possible to provide a semiconductor device in which the protective layer is reliably filled in the through hole. In addition, since the positive photosensitive resin is filled in the bottom corners of the through holes that are difficult for exposure light to reach, problems caused by the photosensitive resin located inside the through holes not being exposed can be eliminated. Therefore, it is possible to provide a semiconductor device capable of suppressing the occurrence of defects such as cracks in the resin (resin cracks) after molding.

　また、本発明の第２態様の半導体装置の製造方法においては、まず、光が届きにくい貫通電極の底部をポジ型感光性樹脂で被覆し、ポジ型感光性樹脂が被覆された面に光を照射し、貫通電極の底面にポジ型感光性樹脂が残存するように樹脂を除去している。これにより、貫通孔の内部に保護層を確実に充填することができるとともに、露光光が届きにくい貫通電極の底面の隅部にポジ型感光性樹脂を充填することができる。このため、貫通孔の内部の感光性樹脂が露光されないことに起因する問題を排除できる。ゆえに、成型後において樹脂にクラックが生じる（樹脂クラック）等の不具合の発生を抑制することができる半導体装置の製造方法を提供することができる。
　更に、本発明の第２態様の半導体装置の製造方法においては、上記ポジ型感光性樹脂の充填、光照射、樹脂除去の工程が複数回繰り返されている。これにより、少量の樹脂が貫通孔の内部に充填され、その後、先に充填された樹脂上に重なるように樹脂が貫通孔の内部に充填される。即ち、少しずつ貫通孔の内部に樹脂が充填される。このため、より確実に貫通孔の内部に樹脂が充填され、充填不良が発生しにくくなる。 In the method for manufacturing a semiconductor device according to the second aspect of the present invention, first, the bottom portion of the through electrode that is difficult for light to reach is coated with a positive photosensitive resin, and light is applied to the surface coated with the positive photosensitive resin. Irradiation is performed to remove the resin so that the positive photosensitive resin remains on the bottom surface of the through electrode. Accordingly, the protective layer can be reliably filled in the through hole, and the positive photosensitive resin can be filled in the corner of the bottom surface of the through electrode that is difficult for exposure light to reach. For this reason, the problem resulting from the photosensitive resin inside the through hole not being exposed can be eliminated. Therefore, it is possible to provide a method for manufacturing a semiconductor device capable of suppressing the occurrence of defects such as cracks in the resin (resin cracks) after molding.
Furthermore, in the method for manufacturing a semiconductor device according to the second aspect of the present invention, the steps of filling the positive photosensitive resin, irradiating light, and removing the resin are repeated a plurality of times. Thus, a small amount of resin is filled into the through hole, and then the resin is filled into the through hole so as to overlap the previously filled resin. That is, the resin is filled into the through hole little by little. For this reason, the resin is more reliably filled into the through-hole, and filling failure is less likely to occur.

本発明に係る半導体装置の第１実施形態を示す断面図である。1 is a cross-sectional view showing a first embodiment of a semiconductor device according to the present invention. 本発明に係る半導体装置の製造方法の工程を説明する図である。It is a figure explaining the process of the manufacturing method of the semiconductor device which concerns on this invention. 本発明に係る半導体装置の製造方法の工程を説明する図である。It is a figure explaining the process of the manufacturing method of the semiconductor device which concerns on this invention. 本発明に係る半導体装置の製造方法の工程を説明する図である。It is a figure explaining the process of the manufacturing method of the semiconductor device which concerns on this invention. 本発明に係る半導体装置の製造方法の工程を説明する図である。It is a figure explaining the process of the manufacturing method of the semiconductor device which concerns on this invention. 本発明に係る半導体装置の製造方法の工程を説明する図である。It is a figure explaining the process of the manufacturing method of the semiconductor device which concerns on this invention. 本発明に係る半導体装置の第２実施形態を示す断面図である。It is sectional drawing which shows 2nd Embodiment of the semiconductor device which concerns on this invention. 本発明に係る半導体装置の第３実施形態を示す断面図である。It is sectional drawing which shows 3rd Embodiment of the semiconductor device which concerns on this invention. 本発明に係る半導体装置の第４実施形態を示す断面図である。It is sectional drawing which shows 4th Embodiment of the semiconductor device which concerns on this invention. 本発明に係る半導体装置の第５実施形態を示す断面図である。It is sectional drawing which shows 5th Embodiment of the semiconductor device which concerns on this invention. 本発明に係る半導体装置の第６実施形態を示す断面図である。It is sectional drawing which shows 6th Embodiment of the semiconductor device which concerns on this invention. 従来の半導体装置の断面図である。It is sectional drawing of the conventional semiconductor device.

　以下、本発明の実施形態に係る半導体装置を、図面を参照して詳細に説明する。以下の説明に用いる各図面では、各部材を認識可能な大きさとするため、各部材の縮尺を適宜変更している。 Hereinafter, a semiconductor device according to an embodiment of the present invention will be described in detail with reference to the drawings. In each drawing used for the following description, the scale of each member is appropriately changed in order to make each member a recognizable size.

（第１実施形態）
　図１は、本発明の実施形態を示す断面図である。図１において、符号１は半導体装置、符号２は半導体基板を示し、符号３は絶縁部を示し、符号４は回路素子を示し、符号５は電極パッドを示し、符号６は貫通孔を示し、符号７は絶縁層を示し、符号８は再配線層を示し、符号９は貫通電極を示し、符号２０は支持基板を示し、符号２１は接合樹脂を示している。 (First embodiment)
FIG. 1 is a cross-sectional view showing an embodiment of the present invention. In FIG. 1, reference numeral 1 denotes a semiconductor device, reference numeral 2 denotes a semiconductor substrate, reference numeral 3 denotes an insulating portion, reference numeral 4 denotes a circuit element, reference numeral 5 denotes an electrode pad, reference numeral 6 denotes a through hole, Reference numeral 7 indicates an insulating layer, reference numeral 8 indicates a rewiring layer, reference numeral 9 indicates a through electrode, reference numeral 20 indicates a support substrate, and reference numeral 21 indicates a bonding resin.

　図１に示されているように、第１実施形態の半導体装置１は、再配線層８，貫通電極９，回路素子４等が設けられている半導体基板２が、接合樹脂２１を介して支持基板２０によって支持されている構造を有する。
　半導体基板２は、例えば、シリコン又はＧａＡｓ等の半導体基板である。半導体基板２の厚さは、例えば数百μｍ程度である。半導体基板２の第１面２ａは絶縁部３として機能している。 As shown in FIG. 1, the semiconductor device 1 according to the first embodiment is supported by a semiconductor substrate 2 provided with a rewiring layer 8, a through electrode 9, a circuit element 4, and the like via a bonding resin 21. The structure is supported by the substrate 20.
The semiconductor substrate 2 is a semiconductor substrate such as silicon or GaAs, for example. The thickness of the semiconductor substrate 2 is, for example, about several hundred μm. The first surface 2 a of the semiconductor substrate 2 functions as the insulating portion 3.

　半導体基板２は、シリコンウエハ等の半導体ウエハでもよく、半導体ウエハを切断（ダイシング）することによって分割された所定の寸法（チップ寸法）を有する半導体チップであってもよい。半導体基板２が半導体チップである場合には、まず、半導体ウエハの上に各種回路素子等を形成した後、半導体ウエハを切断することで所定の寸法（チップ寸法）を有する複数の半導体チップを得ることができる。回路素子４は、例えばメモリ、ＩＣ、撮像素子、ＭＥＭＳ素子等の半導体機能素子等である。 The semiconductor substrate 2 may be a semiconductor wafer such as a silicon wafer, or may be a semiconductor chip having a predetermined dimension (chip dimension) divided by cutting (dicing) the semiconductor wafer. When the semiconductor substrate 2 is a semiconductor chip, first, various circuit elements and the like are formed on the semiconductor wafer, and then the semiconductor wafer is cut to obtain a plurality of semiconductor chips having predetermined dimensions (chip dimensions). be able to. The circuit element 4 is, for example, a semiconductor functional element such as a memory, an IC, an imaging element, and a MEMS element.

　支持基板２０の材料としては、半導体基板２と支持基板２０とを接合する時の温度における支持基板２０の熱膨張率が半導体基板２の熱膨張率に近い材料（部材）を選択することが望ましい。具体的には、ガラス基板が好適であるが、回路素子２に光学特性が要求されない場合には、支持基板２０の材料が透明な材料である必要はない。また、支持基板２０は必ずしも必要ではなく、半導体基板２に要求される強度が十分に得られる場合には、支持基板２０を省略してもよい。
　接合樹脂２１の材料としては、接着性及び電気絶縁性を有する材料が用いられ、例えば、ポリイミド樹脂、エポキシ樹脂、ベンゾシクロブタン（ＢＣＢ）樹脂等を用いることが望ましい。 As a material for the support substrate 20, it is desirable to select a material (member) whose thermal expansion coefficient of the support substrate 20 is close to the thermal expansion coefficient of the semiconductor substrate 2 at the temperature at which the semiconductor substrate 2 and the support substrate 20 are bonded. . Specifically, a glass substrate is preferable, but if the circuit element 2 does not require optical characteristics, the material of the support substrate 20 does not need to be a transparent material. Further, the support substrate 20 is not always necessary, and the support substrate 20 may be omitted when the strength required for the semiconductor substrate 2 is sufficiently obtained.
As the material of the bonding resin 21, a material having adhesiveness and electrical insulation is used. For example, it is desirable to use polyimide resin, epoxy resin, benzocyclobutane (BCB) resin, or the like.

　半導体基板２の第１面２ａ上には電極パッド５が設けられている。電極パッド５の材質としては、Ａｌ又はＣｕ、アルミニウム－シリコン（Ａｌ－Ｓｉ）合金、アルミニウム－シリコン－銅（Ａｌ－Ｓｉ－Ｃｕ）合金等の導電性に優れる材料が好適に用いられる。
　電極パッド５は、配線部１９を介して、半導体基板２の第１面２ａ上に設けられている回路素子４と電気的に接続されている。配線部１９は、半導体基板２の第１面２ａ上に配置され、電極パッド５と回路素子４とを電気的に接続する回路を構成している。配線部１９の材質としては、電極パッド５と同様の材質を用いればよく、Ａｌ又はＣｕ、アルミニウム－シリコン（Ａｌ－Ｓｉ）合金、アルミニウム－シリコン－銅（Ａｌ－Ｓｉ－Ｃｕ）合金等の導電性に優れる材料が好適に用いられる。 An electrode pad 5 is provided on the first surface 2 a of the semiconductor substrate 2. As the material of the electrode pad 5, a material having excellent conductivity such as Al or Cu, an aluminum-silicon (Al-Si) alloy, an aluminum-silicon-copper (Al-Si-Cu) alloy is preferably used.
The electrode pad 5 is electrically connected to the circuit element 4 provided on the first surface 2 a of the semiconductor substrate 2 through the wiring portion 19. The wiring portion 19 is disposed on the first surface 2 a of the semiconductor substrate 2 and constitutes a circuit that electrically connects the electrode pad 5 and the circuit element 4. The material of the wiring portion 19 may be the same material as that of the electrode pad 5 and is made of conductive material such as Al or Cu, an aluminum-silicon (Al-Si) alloy, an aluminum-silicon-copper (Al-Si-Cu) alloy, or the like. A material having excellent properties is preferably used.

　半導体基板２においては、電極パッド５が設けられた部分に、第２面２ｂから第１面２ａに向けて貫通されている貫通孔６が形成されている。従って、第２面２ｂ側から見ると、貫通孔６を通して電極パッド５の一部が露呈される。貫通孔６の口径は、例えば数十μｍ程度である。また、半導体基板２上に設けられる貫通孔６の数は、特に限定されない。 In the semiconductor substrate 2, a through hole 6 penetrating from the second surface 2b toward the first surface 2a is formed in a portion where the electrode pad 5 is provided. Therefore, when viewed from the second surface 2 b side, a part of the electrode pad 5 is exposed through the through hole 6. The diameter of the through hole 6 is, for example, about several tens of μm. Further, the number of through holes 6 provided on the semiconductor substrate 2 is not particularly limited.

　また、半導体基板２の第２面２ｂ及び貫通孔５の側面には絶縁層７が設けられている。絶縁層７を設けることによって、半導体基板２は、基板の第２面２ｂ及び貫通孔６の側面が絶縁性を有する。絶縁層７は、例えば、ＳｉＯ２、ＳｉＮ、又は樹脂膜で構成されている。 An insulating layer 7 is provided on the second surface 2 b of the semiconductor substrate 2 and the side surfaces of the through holes 5. By providing the insulating layer 7, the semiconductor substrate 2 has insulating properties on the second surface 2 b of the substrate and the side surfaces of the through holes 6. The insulating layer 7 is made of, for example, SiO 2 , SiN, or a resin film.

　更に、貫通孔６の内部には、貫通孔６の側面および電極パッド５が露呈されている露呈部を覆う貫通電極９が形成されている。半導体基板２の第２面２ｂには、再配線層８が形成されている。再配線層８の一端は貫通電極９と電気的に接続されている。貫通電極９は、電極パッド５と電気的に接続されている。貫通電極９および再配線層８の材料は、導電性に優れた材料であることが好ましい。また貫通電極９の材料としては、電極パッド５と貫通電極９との密着性に優れるとともに、電極パッド５の内部に拡散しにくい材料を用いることが更に好ましい。例えば、再配線層８及び貫通電極９の材料としては、Ｃｕ、Ａｌ、Ｎｉ、Ａｇ、Ｐｂ、Ｓｎ、Ａｕ、Ｃｏ、Ｃｒ、Ｔｉ、ＴｉＷ等の導体（各種の金属又は合金等）、あるいはそれらが組み合わされた材料を採用することが好適である。 Furthermore, a through electrode 9 is formed inside the through hole 6 to cover the side surface of the through hole 6 and the exposed portion where the electrode pad 5 is exposed. A rewiring layer 8 is formed on the second surface 2 b of the semiconductor substrate 2. One end of the rewiring layer 8 is electrically connected to the through electrode 9. The through electrode 9 is electrically connected to the electrode pad 5. The material of the through electrode 9 and the rewiring layer 8 is preferably a material having excellent conductivity. Further, as the material of the through electrode 9, it is more preferable to use a material that is excellent in adhesion between the electrode pad 5 and the through electrode 9 and that does not easily diffuse into the electrode pad 5. For example, the material of the rewiring layer 8 and the through electrode 9 includes conductors (such as various metals or alloys) such as Cu, Al, Ni, Ag, Pb, Sn, Au, Co, Cr, Ti, TiW, or the like. It is preferable to use a material in which is combined.

　また、貫通電極９を貫通孔６の側面の全体に被覆する必要はない。例えば、貫通孔６の一部に、半導体基板２の第１面２ａと第２面２ｂとの間に亘るように貫通電極９が配置された構成が採用されてもよい。 Further, it is not necessary to cover the entire side surface of the through hole 6 with the through electrode 9. For example, a configuration in which the through electrode 9 is disposed in a part of the through hole 6 so as to extend between the first surface 2 a and the second surface 2 b of the semiconductor substrate 2 may be employed.

　そして、半導体基板２の第２面２ｂ及び貫通孔６の内部は、保護層１０で被覆されている。前述したように、半導体基板２及び貫通孔６は絶縁層７，再配線層８，及び貫通電極９によって被覆されているため、保護層１０は、絶縁層７，再配線層８，及び貫通電極９を被覆するように形成されている。
　本実施形態に係る半導体装置１は、保護層１０がポジ型感光性樹脂からなる第一の層１１とネガ型感光性樹脂からなる第二の層１２とによって構成されている。第一の層１１は、少なくとも貫通孔６の内部に配置されており、保護層１０の中で最も半導体基板２の第１面２ａに近い層である。
　ポジ型感光性樹脂とは、樹脂を露光することによって生成された露光部が薬液により除去されるような感光性樹脂である。ネガ型感光性樹脂とは、露光部を除く樹脂が薬液により除去されるような感光性樹脂である。 The second surface 2 b of the semiconductor substrate 2 and the inside of the through hole 6 are covered with a protective layer 10. As described above, since the semiconductor substrate 2 and the through hole 6 are covered with the insulating layer 7, the rewiring layer 8, and the through electrode 9, the protective layer 10 includes the insulating layer 7, the rewiring layer 8, and the through electrode. 9 is formed so as to cover 9.
In the semiconductor device 1 according to the present embodiment, the protective layer 10 includes a first layer 11 made of a positive photosensitive resin and a second layer 12 made of a negative photosensitive resin. The first layer 11 is disposed at least inside the through hole 6, and is the layer closest to the first surface 2 a of the semiconductor substrate 2 in the protective layer 10.
The positive photosensitive resin is a photosensitive resin in which an exposed portion generated by exposing the resin is removed by a chemical solution. The negative photosensitive resin is a photosensitive resin in which the resin excluding the exposed portion is removed by a chemical solution.

　図１に示すように、第一の層１１は、貫通孔６の内部うち、半導体基板２の第１面２ａに近い位置、つまり、貫通孔６の底部に近い位置（底部側）に配置されており、貫通電極９の底面９ａを被覆している。第一の層１１の厚さは特に限定されないが、少なくとも、貫通電極９の底面９ａと側面９ｂとが交差している交差部は、ポジ型感光性樹脂からなる第一の層１１によって被覆されている。
　第一の層１１の材料としては、例えばポリイミド樹脂、シリコーン樹脂、エポキシ樹脂等の様々な樹脂材料を適用することができる。
　第二の層１２は、第一の層１１を覆うように、貫通孔６の内部及び半導体基板２の第２面２ｂを被覆している。第二の層１２は、少なくとも再配線層８の接続部が露呈されるようにパターニングされ、この接続部に半球状のはんだバンプ１５が形成される。第二の層１２を構成する樹脂としては、ポジ型、ネガ型を問わず、どちらのタイプの感光性樹脂でも適用可能である。第二の層１２の材料としては、例えば、ポリイミド樹脂、シリコーン樹脂、エポキシ樹脂等の様々な樹脂材料を用いることができる。 As shown in FIG. 1, the first layer 11 is disposed in the inside of the through hole 6 at a position near the first surface 2 a of the semiconductor substrate 2, that is, a position near the bottom of the through hole 6 (bottom side). The bottom surface 9a of the through electrode 9 is covered. The thickness of the first layer 11 is not particularly limited, but at least the intersecting portion where the bottom surface 9a and the side surface 9b of the through electrode 9 intersect each other is covered with the first layer 11 made of a positive photosensitive resin. ing.
As a material of the first layer 11, various resin materials such as a polyimide resin, a silicone resin, and an epoxy resin can be applied.
The second layer 12 covers the inside of the through hole 6 and the second surface 2 b of the semiconductor substrate 2 so as to cover the first layer 11. The second layer 12 is patterned so that at least the connection portion of the rewiring layer 8 is exposed, and a hemispherical solder bump 15 is formed on this connection portion. As the resin constituting the second layer 12, any type of photosensitive resin is applicable regardless of whether it is a positive type or a negative type. As a material of the second layer 12, for example, various resin materials such as polyimide resin, silicone resin, and epoxy resin can be used.

　本実施形態に係る半導体装置１においては、貫通孔６内を充填する保護層が複数層の保護層によって形成されている。これにより、貫通孔の内部に保護層が確実に充填された半導体装置を提供することができる。
　更に、本実施形態に係る半導体装置１は、少なくとも貫通電極９の底面と側面との間の交差部がポジ型感光性樹脂からなる第一の層１１で被覆された構成を有する。ポジ型感光性樹脂における感光反応の大小に関わらず、所望の熱硬化処理を経た後においては安定した強度を有する樹脂層を得ることができる。感光性樹脂を露光する際に光が届きにくい貫通孔内部において、少なくとも貫通電極９の底面と側面との間の交差部にポジ型感光性樹脂からなる第一の層１１が配置されている。このような構造においては、従来の半導体装置においては貫通電極９の底面と側面との間の交差部において発生し易かった保護層１０のクラック等の発生を抑制することができる。 In the semiconductor device 1 according to the present embodiment, the protective layer filling the through hole 6 is formed by a plurality of protective layers. Thereby, it is possible to provide a semiconductor device in which the protective layer is reliably filled in the through hole.
Furthermore, the semiconductor device 1 according to this embodiment has a configuration in which at least the intersection between the bottom surface and the side surface of the through electrode 9 is covered with the first layer 11 made of a positive photosensitive resin. Regardless of the magnitude of the photosensitive reaction in the positive photosensitive resin, a resin layer having a stable strength can be obtained after the desired thermosetting treatment. The first layer 11 made of a positive photosensitive resin is disposed at least at the intersection between the bottom surface and the side surface of the through electrode 9 in the through hole where light does not easily reach when exposing the photosensitive resin. In such a structure, in the conventional semiconductor device, it is possible to suppress the occurrence of cracks or the like of the protective layer 10 that is easily generated at the intersection between the bottom surface and the side surface of the through electrode 9.

　なお、本実施形態においては、第二の層１２の材料としてネガ型感光性樹脂が採用されているが、ネガ型に限ることはなく、ポジ型感光性樹脂が採用されてもよい。また、半導体基板２の第２面２ｂを保護し、かつ、再配線層８の一部を露呈させるようにパターニングが可能な樹脂であれば、どのような樹脂でも使用可能である。 In this embodiment, a negative photosensitive resin is employed as the material of the second layer 12, but the material is not limited to a negative type, and a positive photosensitive resin may be employed. Further, any resin can be used as long as the resin can be patterned so as to protect the second surface 2b of the semiconductor substrate 2 and expose a part of the rewiring layer 8.

　次に、図２Ａ～図２Ｅを参照して、本発明の実施形態に係る半導体装置の製造方法について説明する。図２Ａ～図２Ｅは、断面図を用いて本発明の半導体装置の製造方法の工程を順に説明する図である。なお、図２Ａ～図２Ｅについては、支持基板及び接合樹脂を省略している。 Next, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. 2A to 2E. 2A to 2E are views for sequentially explaining the steps of the method of manufacturing a semiconductor device according to the present invention, using cross-sectional views. 2A to 2E, the support substrate and the bonding resin are omitted.

　以下、各工程に順に説明する。まず、再配線層８及び貫通電極９が形成済みの半導体基板２を用意する工程について図２Ａを参照して説明する。
（１）まず、回路素子４を備えた半導体基板２を用意し、半導体基板２の第１面２ａに電極パッド５及び配線部１９を形成する（工程Ａ）。 Hereinafter, each step will be described in order. First, a process of preparing the semiconductor substrate 2 on which the rewiring layer 8 and the through electrode 9 have been formed will be described with reference to FIG. 2A.
(1) First, the semiconductor substrate 2 provided with the circuit element 4 is prepared, and the electrode pad 5 and the wiring part 19 are formed on the first surface 2a of the semiconductor substrate 2 (step A).

（２）半導体基板２の第２面２ｂから電極パッド５に到達する貫通孔６を形成する（工程Ｂ）。この貫通孔６は、電極パッド５が露呈するように半導体基板２の第２面２ｂから形成される。貫通孔６の直径、断面形状は、特に限定されないが、半導体基板２の厚さ又は半導体基板２の用途（所望の用途）に応じて適宜設定され、所望の配線に応じて適宜決めることができる。本実施形態では、半導体基板２の厚さは１００μｍであり、貫通孔６の孔径は８０μｍである。 (2) A through hole 6 reaching the electrode pad 5 from the second surface 2b of the semiconductor substrate 2 is formed (step B). The through hole 6 is formed from the second surface 2b of the semiconductor substrate 2 so that the electrode pad 5 is exposed. The diameter and the cross-sectional shape of the through-hole 6 are not particularly limited, but are appropriately set according to the thickness of the semiconductor substrate 2 or the use (desired use) of the semiconductor substrate 2 and can be appropriately determined according to the desired wiring. . In the present embodiment, the thickness of the semiconductor substrate 2 is 100 μm, and the hole diameter of the through hole 6 is 80 μm.

　貫通孔６形成方法としては、例えばＤＲＩＥ（Ｄｅｅｐ－Ｒｅａｃｔｉｖｅ　Ｉｏｎ　Ｅｔｃｈｉｎｇ）法、ウェットエッチング法、マイクロドリル等による機械加工法、光励起電解研磨法等を用いることができる。 As a through hole 6 formation method, for example, a DRIE (Deep-Reactive Ion Etching) method, a wet etching method, a machining method using a micro drill, a photoexcited electrolytic polishing method, or the like can be used.

（３）貫通孔６の側面及び半導体基板２の第２面２ｂ上に絶縁層７を形成した後、電極パッド５の露呈部、貫通孔６の側面を被覆する貫通電極９、及び半導体基板２の第２面２ｂを被覆する再配線層８を形成する（工程Ｃ）。電極パッド５と絶縁層７条の再配線層８及び貫通電極９は電気的に接続されている。
　絶縁層７は、例えばＳｉＯ２をプラズマＣＶＤ等により成膜することで形成される。再配線層８及び貫通電極９の形成方法は、特に限定されず、この形成方法としては、例えば、スパッタリング法、蒸着法、めっき法等、あるいはこれらの２つ以上の方法の組み合わせが挙げられる。また、再配線層８及び貫通電極９のパターニング方法としては、フォトリソグラフィ技術が好適に用いられる。 (3) After forming the insulating layer 7 on the side surface of the through hole 6 and the second surface 2b of the semiconductor substrate 2, the exposed portion of the electrode pad 5, the through electrode 9 covering the side surface of the through hole 6, and the semiconductor substrate 2 A rewiring layer 8 covering the second surface 2b is formed (step C). The electrode pad 5, the rewiring layer 8 of the insulating layer 7 and the through electrode 9 are electrically connected.
The insulating layer 7 is formed, for example, by depositing SiO 2 by plasma CVD or the like. The formation method of the rewiring layer 8 and the through electrode 9 is not particularly limited, and examples of the formation method include a sputtering method, a vapor deposition method, a plating method, and a combination of these two or more methods. In addition, as a patterning method for the rewiring layer 8 and the through electrode 9, a photolithography technique is preferably used.

　また、本実施形態においては、貫通電極９が、貫通孔６の全面を被覆するようにして形成された例を説明しているが、電極パッド５と半導体基板２の第２面２ｂの貫通電極９とが電気的に接続されていれば、本発明は上述した構造に限定されない。例えば、貫通孔６の側面に線状に貫通電極９が形成されてもよい。 In the present embodiment, an example in which the through electrode 9 is formed so as to cover the entire surface of the through hole 6 is described. However, the through electrode on the electrode pad 5 and the second surface 2b of the semiconductor substrate 2 is described. As long as 9 is electrically connected, the present invention is not limited to the structure described above. For example, the through electrode 9 may be formed linearly on the side surface of the through hole 6.

　以上の工程Ａ～工程Ｃを経て、図２Ａに示されるような、再配線層８及び貫通電極９が形成された半導体基板２を用意することができる。 Through the above steps A to C, the semiconductor substrate 2 on which the rewiring layer 8 and the through electrode 9 are formed as shown in FIG. 2A can be prepared.

（４）ポジ型感光性樹脂１１ａを半導体基板２の第２面２ｂに塗工し、再配線層８及び貫通電極９を被覆し、貫通孔６の内部にポジ型感光性樹脂１１ａを充填する（工程Ｄ）。
　ポジ型感光性樹脂１１ａは、貫通孔６の内部に樹脂が容易に入り込むことができるように、低粘度の液状樹脂であることが好ましい。具体的には、粘度５０～３００ｃＰのポジ型感光性樹脂が適用できる。
　ポジ型感光性樹脂１１ａの塗布方法としては、貫通孔６の内部まで樹脂が入り込むことができる方法が好ましい。例えばスピンコート塗布法、スプレー塗布法等が好ましい。その他の方法として、真空圧下でポジ型感光性１１ａを塗布した後、半導体基板２を大気圧環境下へ戻すことによって、貫通孔６の内部へ差圧充填する手法を採用することもできる。 (4) The positive photosensitive resin 11a is applied to the second surface 2b of the semiconductor substrate 2 to cover the rewiring layer 8 and the through electrode 9, and the through hole 6 is filled with the positive photosensitive resin 11a. (Process D).
The positive photosensitive resin 11a is preferably a low-viscosity liquid resin so that the resin can easily enter the through hole 6. Specifically, a positive photosensitive resin having a viscosity of 50 to 300 cP can be applied.
As a method for applying the positive photosensitive resin 11a, a method in which the resin can enter the through hole 6 is preferable. For example, a spin coat coating method, a spray coating method or the like is preferable. As another method, after applying the positive photosensitive 11a under a vacuum pressure, the semiconductor substrate 2 is returned to an atmospheric pressure environment to fill the through hole 6 with a differential pressure.

（５）半導体基板２の第２面２ｂに露光光６０を照射する（工程Ｅ）。露光光６０としては、感光性樹脂の感光波長を含む光が用いられる。露光に最適な感光波長は樹脂材料により異なるが、一般的にはｇ、ｈ、ｉ線と呼ばれる紫外線領域の光を用いることが好ましい。 (5) The exposure light 60 is irradiated onto the second surface 2b of the semiconductor substrate 2 (step E). As the exposure light 60, light including the photosensitive wavelength of the photosensitive resin is used. Although the optimum photosensitive wavelength for exposure varies depending on the resin material, it is generally preferable to use light in the ultraviolet region called g, h, i line.

（６）図２Ｃに示すように、少なくとも貫通電極９の底面９ａの側面９ｂとの間の交差部にポジ型感光性樹脂１１ａが残存するように、ポジ型感光性樹脂の現像を行う（工程Ｆ）。この現像によって、貫通孔６の深さに対する半分程度の深さに到達するように樹脂が現像され、半導体基板２の第２面２ｂ上に塗工されたポジ型感光性樹脂１１ａは消失し、かつ、貫通電極９の底面９ａに近い位置に配置されているポジ型感光性樹脂１１ａは残存する。現像工程において用いられる現像液は、感光性樹脂の種類に応じて定めることができる。
　次いで、この状態で熱処理を行い、ポジ型感光性樹脂の余分な感光基成分、溶剤成分等を揮発させ、熱硬化反応を生じさせる。 (6) As shown in FIG. 2C, the positive photosensitive resin is developed so that the positive photosensitive resin 11a remains at least at the intersection between the bottom surface 9a and the side surface 9b of the through electrode 9 (steps). F). By this development, the resin is developed so as to reach about half the depth of the through-hole 6, and the positive photosensitive resin 11a applied on the second surface 2b of the semiconductor substrate 2 disappears, In addition, the positive photosensitive resin 11a disposed at a position close to the bottom surface 9a of the through electrode 9 remains. The developer used in the development step can be determined according to the type of photosensitive resin.
Next, heat treatment is performed in this state to volatilize excess photosensitive group components, solvent components, and the like of the positive photosensitive resin, thereby causing a thermosetting reaction.

（７）ネガ型感光性樹脂１２ａを半導体基板２の第２面２ｂに被覆し、ネガ型感光性樹脂１２ａを貫通孔６の内部に充填する（工程Ｇ）。
　図２Ｄに示すように、ネガ型感光性樹脂１２ａを第２面２ｂ上に塗布する。ネガ型感光性樹脂１２ａの塗布方法としては、スピンコート塗布法、フィルムラミネート法、スプレー塗布法等を採用することができる。更には、真空圧下でネガ型感光性樹脂１２ａを塗布した後、半導体基板２を大気圧環境下へ戻すことによって、差圧充填により貫通孔６の内部に樹脂を充填する手法を採用することもできる。 (7) The negative photosensitive resin 12a is coated on the second surface 2b of the semiconductor substrate 2, and the negative photosensitive resin 12a is filled into the through-hole 6 (step G).
As shown in FIG. 2D, the negative photosensitive resin 12a is applied on the second surface 2b. As a coating method of the negative photosensitive resin 12a, a spin coat coating method, a film laminating method, a spray coating method, or the like can be employed. Further, after applying the negative photosensitive resin 12a under a vacuum pressure, the semiconductor substrate 2 is returned to an atmospheric pressure environment to fill the inside of the through hole 6 with a differential pressure. it can.

　次いで、フォトリソグラフィ技術を用いて、ネガ型の感光性樹脂１２ａをパターン加工する。具体的には、図２Ｄに示すように、ネガ型感光性樹脂１２ａにフォトマスク７０を通して露光光６０を照射し、マスクパターンをネガ型感光性樹脂１２ａに転写する。
　次いで、図２Ｅに示すように、ネガ型感光性樹脂１２ａを現像して不要な感光性樹脂を除去する。残した感光性樹脂１２に対して、キュア及びデスカムを施す。最後に、はんだバンプ１５を形成して、図１に示すような半導体装置１を得ることができる。 Next, the negative photosensitive resin 12a is patterned using photolithography technology. Specifically, as shown in FIG. 2D, the negative photosensitive resin 12a is irradiated with exposure light 60 through a photomask 70, and the mask pattern is transferred to the negative photosensitive resin 12a.
Next, as shown in FIG. 2E, the negative photosensitive resin 12a is developed to remove unnecessary photosensitive resin. Cure and descum are applied to the remaining photosensitive resin 12. Finally, the solder bump 15 is formed, and the semiconductor device 1 as shown in FIG. 1 can be obtained.

　第１実施形態の半導体基板１は、上述したような方法で製造することができる。このような方法で製造することにより、光が届きにくい貫通孔６の底部においてポジ型感光性樹脂１１ａが充填されるため、貫通孔６の底部がポジ型感光性樹脂１１ａで確実に覆われる。 The semiconductor substrate 1 of the first embodiment can be manufactured by the method as described above. By manufacturing in this way, the positive photosensitive resin 11a is filled at the bottom of the through hole 6 where light does not easily reach, so that the bottom of the through hole 6 is reliably covered with the positive photosensitive resin 11a.

　また、上述した製造方法においては、一度のみの塗布工程によってポジ型感光性樹脂１１ａが形成されているが、本発明は上述した方法に限定されない。ポジ型感光性樹脂１１ａの塗布工程を複数回繰り返し行うこともできる。つまり、工程Ｄ～工程Ｆを複数回実施した後に、ネガ型感光性樹脂１２ａを塗布するという製造方法を用いてもよい。
　このように、ポジ型感光性樹脂１１ａの塗布、露光、感光性樹脂の除去を複数回繰り返し行うことによって、少ない少量の樹脂が貫通孔の内部に充填され、その後、先に充填された樹脂上に重なるように樹脂が貫通孔の内部に充填される。即ち、少しずつ貫通孔６の内部に樹脂が充填される。このため、より確実に貫通孔の内部に樹脂が充填され、充填不良が発生しにくくなる。 In the manufacturing method described above, the positive photosensitive resin 11a is formed by a single coating process, but the present invention is not limited to the above-described method. The coating process of the positive photosensitive resin 11a can be repeated a plurality of times. That is, a manufacturing method in which the negative photosensitive resin 12a is applied after performing the steps D to F a plurality of times may be used.
In this way, by repeating the application of the positive photosensitive resin 11a, exposure, and removal of the photosensitive resin a plurality of times, a small amount of resin is filled into the through holes, and then the resin that has been previously filled The resin is filled into the through hole so as to overlap with the inside. That is, the resin is filled into the through hole 6 little by little. For this reason, the resin is more reliably filled into the through-hole, and filling failure is less likely to occur.

　また、第二の層１２の材料としては、ネガ型感光性樹脂に限ることはなく、ポジ型感光性樹脂を用いてもよい。また、半導体基板２の第２面２ｂを保護し、かつ、再配線層８の一部を露呈させるようにパターニングが可能な樹脂であれば、どのような樹脂でも使用可能である。 Further, the material of the second layer 12 is not limited to the negative photosensitive resin, and a positive photosensitive resin may be used. Further, any resin can be used as long as the resin can be patterned so as to protect the second surface 2b of the semiconductor substrate 2 and expose a part of the rewiring layer 8.

　次に、本発明に係る第３～第６実施形態を図面に基づいて説明する。
　図３～図７は、本発明の半導体装置の実施形態の一例を示す断面図である。図３～図７において、第１実施形態と同一部材には同一符号を付して、その説明は省略または簡略化し、第１実施形態と第３～第６実施形態との相違点を中心に述べる。 Next, third to sixth embodiments according to the present invention will be described with reference to the drawings.
3 to 7 are cross-sectional views showing an example of an embodiment of the semiconductor device of the present invention. 3 to 7, the same members as those in the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted or simplified. The differences between the first embodiment and the third to sixth embodiments will be mainly described. State.

（第２実施形態）
　図３に示す第２実施形態においては、保護層１０ｂが、ポジ型感光性樹脂からなる第一の層１１ｂ、第二の層１３ｂ、及び第一の層１１ｂと第二の層１３ｂとの間に配置された第三の層１２ｂとから構成されている。第一の層１１ｂの形成後に好適な成膜方法で成膜することによって、第三の層１２ｂを形成することができる。
　この第三の層１２ｂは、第一の層１１ｂ及び第二の層１３ｂの両方の樹脂に対して接着性を有する材料によって形成されている。第三の層１２ｂは樹脂層に限らず、金属層であってもよい。このような構成においては、第一の層１１ｂと第二の層１３ｂとの接着性が高くない場合に、第三の層１２ｂを両層の間に介在させることによって、第一の層１１ｂと第二の層１３ｂとの接着性を高めることができる。 (Second Embodiment)
In the second embodiment shown in FIG. 3, the protective layer 10b includes a first layer 11b made of a positive photosensitive resin, a second layer 13b, and a space between the first layer 11b and the second layer 13b. And a third layer 12b disposed in the first layer. The third layer 12b can be formed by forming a film by a suitable film formation method after the formation of the first layer 11b.
The third layer 12b is formed of a material having adhesiveness to both the first layer 11b and the second layer 13b. The third layer 12b is not limited to the resin layer but may be a metal layer. In such a configuration, when the adhesion between the first layer 11b and the second layer 13b is not high, the third layer 12b is interposed between the first layer 11b and the second layer 13b. Adhesiveness with the 2nd layer 13b can be improved.

（第３実施形態）
　図４に示す第３実施形態においては、保護層１０ｃを構成する第一の層１１ｃは、貫通電極９の底面９ａの中心に近い位置に形成されず、貫通電極の底面９ａと側面９ｂとの間の交差部のみを覆うように形成されている。この構成においては、最も充填しにくい貫通電極９の底面と側面との間の交差部のみが、少量の第一の層１１ｃで充填され、次いで第二の層１２ｃを貫通孔６内に充填する。この方法により、貫通孔６内にボイドが発生すること無く確実に充填することができる。 (Third embodiment)
In the third embodiment shown in FIG. 4, the first layer 11 c constituting the protective layer 10 c is not formed at a position near the center of the bottom surface 9 a of the through electrode 9, and the bottom surface 9 a and the side surface 9 b of the through electrode are not formed. It is formed so as to cover only the intersection between them. In this configuration, only the intersection between the bottom surface and the side surface of the through electrode 9 that is most difficult to fill is filled with a small amount of the first layer 11 c and then the second layer 12 c is filled into the through hole 6. . By this method, the through hole 6 can be reliably filled without generating a void.

（第４実施形態）
　図５に示す第４実施形態においては、保護層１０ｄを構成する第一の層１１ｄの形状は、貫通孔６の中心点を含むとともに半導体基板２に垂直な任意の面に沿う断面において、対称形である必要はない。つまり、露光によって残存する第一の層１１ｄが非対称形の形状で形成されてもよい。 (Fourth embodiment)
In the fourth embodiment shown in FIG. 5, the shape of the first layer 11 d constituting the protective layer 10 d is symmetric in a cross section that includes the center point of the through hole 6 and is perpendicular to the semiconductor substrate 2. It need not be in shape. That is, the first layer 11d remaining by exposure may be formed in an asymmetric shape.

（第５実施形態）
　図６に示す第５実施形態において、保護層１０ｅを構成する第一の層１１ｅは、その中心部が上方に盛り上がるような凸形状を有してもよい。 (Fifth embodiment)
In 5th Embodiment shown in FIG. 6, the 1st layer 11e which comprises the protective layer 10e may have a convex shape that the center part rises upwards.

（第６実施形態）
　図７に示す第６実施形態においては、保護層の機能に合わせて複数層を使用することによって保護層１０ｆを形成することができる。図７に示した例においては、保護層１０ｆは、第一の層１１ｆ，第二の層１２ｆ，第三の層１３ｆ，第四の層１４ｆで構成されている。このように、複数の樹脂層で保護層１０ｆが構成されている場合、各々の層が実現する目的に応じた機能を有する保護層１０ｆを形成することが可能となる。例えば、第一の層１１ｆ及び第三の層１３ｆの材料として、貫通孔に容易に充填することが可能な材料を適用し、第二の層１２ｆ及び第四の層１４ｆの材料として、再配線を保護する保護膜としての機能する材料又はパターン加工性に優れた材料を適用することができる。 (Sixth embodiment)
In the sixth embodiment shown in FIG. 7, the protective layer 10f can be formed by using a plurality of layers in accordance with the function of the protective layer. In the example shown in FIG. 7, the protective layer 10f includes a first layer 11f, a second layer 12f, a third layer 13f, and a fourth layer 14f. Thus, when the protective layer 10f is comprised with the some resin layer, it becomes possible to form the protective layer 10f which has a function according to the objective which each layer implement | achieved. For example, as the material of the first layer 11f and the third layer 13f, a material that can easily fill the through hole is applied, and as the material of the second layer 12f and the fourth layer 14f, rewiring is performed. A material that functions as a protective film for protecting the film or a material excellent in pattern processability can be applied.

　本発明は、貫通電極を備えた半導体装置及びその製造方法に広く適用可能である。 The present invention can be widely applied to a semiconductor device provided with a through electrode and a manufacturing method thereof.

１…半導体装置、２…半導体基板、３…絶縁部、４…回路素子、５…電極パッド、６…貫通孔、７…絶縁層、８…再配線層、９…貫通電極、１０…保護層、１１…第一の層、１２…第二の層、１９…配線部。 DESCRIPTION OF SYMBOLS 1 ... Semiconductor device, 2 ... Semiconductor substrate, 3 ... Insulating part, 4 ... Circuit element, 5 ... Electrode pad, 6 ... Through-hole, 7 ... Insulating layer, 8 ... Redistribution layer, 9 ... Through electrode, 10 ... Protective layer 11 ... first layer, 12 ... second layer, 19 ... wiring section.

Claims (3)

　半導体装置であって、
　第１面と、前記第１面とは反対の第２面と、前記第１面に設けられた電極パッドとを備えた半導体基板と、
　前記第２面から前記第１面に向けて前記半導体基板を貫通し、前記電極パッドを露呈する貫通孔と、
　前記電極パッドが露呈されている露呈部及び前記貫通孔の側面を被覆し、底面と側面とを有し、前記電極パッドと電気的に接続された貫通電極と、
　前記貫通孔内に充填され、前記貫通電極を被覆し、複数層で形成された保護層と、
　を備え、
　前記保護層の前記複数層のうち最も前記第１面に近い層は、少なくとも前記貫通電極の前記底面と前記側面との間に位置する交差部を被覆し、ポジ型感光性樹脂からなる
　ことを特徴とする半導体装置。 A semiconductor device,
A semiconductor substrate comprising a first surface, a second surface opposite to the first surface, and an electrode pad provided on the first surface;
A through-hole penetrating the semiconductor substrate from the second surface toward the first surface, exposing the electrode pad;
Covering the exposed portion where the electrode pad is exposed and the side surface of the through hole, and having a bottom surface and a side surface, the through electrode electrically connected to the electrode pad,
A protective layer filled in the through hole, covering the through electrode, and formed of a plurality of layers;
With
Of the plurality of layers of the protective layer, the layer closest to the first surface covers at least the intersection located between the bottom surface and the side surface of the through electrode, and is made of a positive photosensitive resin. A featured semiconductor device. 　半導体装置の製造方法であって、
（Ａ）第１面と、前記第１面とは反対の第２面とを有する半導体基板を準備し、前記第１面に電極パッドを形成し、
（Ｂ）前記第２面から前記第１面に向けて前記半導体基板を貫通する貫通孔を形成し、前記電極パッドを露呈し、
（Ｃ）前記電極パッドが露呈されている露呈部及び前記貫通孔の側面を被覆し、底面と側面とを有する貫通電極を形成し、
（Ｄ）ポジ型感光性樹脂を用いて前記貫通電極を被覆し、
（Ｅ）前記半導体基板の前記第２面に光を照射し、
（Ｆ）少なくとも前記貫通電極の前記底面と前記側面との間に位置する交差部に前記ポジ型感光性樹脂が残存するように、前記ポジ型感光性樹脂を除去し、
（Ｇ）次いで、前記貫通孔内に樹脂を充填する
　ことを特徴とする半導体装置の製造方法。 A method for manufacturing a semiconductor device, comprising:
(A) preparing a semiconductor substrate having a first surface and a second surface opposite to the first surface, forming an electrode pad on the first surface;
(B) forming a through hole penetrating the semiconductor substrate from the second surface toward the first surface, exposing the electrode pad;
(C) Covering the exposed portion where the electrode pad is exposed and the side surface of the through hole, forming a through electrode having a bottom surface and a side surface;
(D) Covering the through electrode with a positive photosensitive resin,
(E) irradiating the second surface of the semiconductor substrate with light;
(F) removing the positive photosensitive resin so that the positive photosensitive resin remains at least at the intersection located between the bottom surface and the side surface of the through electrode;
(G) Next, a resin is filled in the through hole. A method for manufacturing a semiconductor device, comprising: 　請求項２に記載の半導体装置の製造方法であって、
　前記工程Ｄ，前記工程Ｅ，及び前記工程Ｆを複数回繰り返すことを特徴とする請求項２に記載の半導体装置の製造方法。 A method of manufacturing a semiconductor device according to claim 2,
3. The method of manufacturing a semiconductor device according to claim 2, wherein the step D, the step E, and the step F are repeated a plurality of times.
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