WO2011161965A1

WO2011161965A1 - Plasma doping device, plasma doping method, method for manufacturing semiconductor element, and semiconductor element

Info

Publication number: WO2011161965A1
Application number: PCT/JP2011/003584
Authority: WO
Inventors: Shinji Kubota; Masahiro Horigome; Hirokazu Ueda; Takaaki Matsuoka; Toshihisa Nozawa
Original assignee: Tokyo Electron Ltd
Current assignee: Tokyo Electron Ltd
Priority date: 2010-06-23
Filing date: 2011-06-23
Publication date: 2011-12-29
Anticipated expiration: 2012-12-23
Also published as: JP2013534712A; TW201205648A

Abstract

[Problem to be solved] Provides a plasma doping device with which damage to a substrate to be processed can be reduced and facilitate uniform treatment during doping. [MEANS TO SOLVE THE PROBLEM] The plasma doping device 31 is provided with a processing container 32 implanting a dopant in its inside to a substrate to be processed, a gas supply unit 33 supplying a doping gas and an inert gas for excitation of plasma inside the processing container 32, a supporting table 34 disposed inside the processing container 32 and supporting the substrate to be processed W on it, a plasma generating mechanism 39 generating plasma inside the processing container 32 by using a microwave, a high frequency power source 58 that can supply bias power to the supporting table 34, and a controller 28 controlling the plasma doping device 31. Here, the controller 28 controls the supplied bias power supplied by a high frequency power source 58 such that an ion energy of the dopant is less than 100eV.

Description

PLASMA DOPING DEVICE, PLASMA DOPING METHOD, METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR ELEMENT

This invention relates to a plasma doping device, a plasma doping method, a method for manufacturing a semiconductor element, and a semiconductor element. In particular, this invention relates to a plasma doping device, a plasma doping method, a method for manufacturing a semiconductor element, and a semiconductor element which are used in manufacturing a semiconductor element.

Semiconductor elements such as LSI (Large Scale Integrated circuit) or MOS (Metal Oxide Semiconductor) transistors are manufactured by providing treatments such as doping, etching, CVD (Chemical Vapor Deposition), and sputtering etc. to a semiconductor substrate (wafer) as a substrate to be processed.

Here, a technology relating to a plasma doping device for carrying out doping using plasma with regard to ion implantation, where a dopant is implanted into a substrate to be processed, that is, doping is carried out, has been disclosed in Japanese Patent Application Publication 2008-300687 (Patent document 1). According to Patent document 1, doping of a certain dopant is carried out by using the plasma generated from microwave.

Patent documents

[Patent document 1] Japanese Patent Application Publication 2008-300687

PROBLEM TO BE SOLVED BY THE INVENTION

Regarding an implantation of dopant to a substrate to be processed, conventionally, an ion implantation device was employed due to the ease of controlling dose quantity, etc. However, there were following drawbacks in such an ion implantation device.

In the conventional ion implantation device, it is a method in which ion implantation is done by sequentially bombarding an ion cluster on to a substrate to be processed which is the doping target; however, since the energy of ion is high, the crystalline structure was easily prone to damage during doping, and the crystalline structure on the doping side used to become significantly amorphous. In such a amorphized layer, although restoration is possible during the post-doping annealing treatment, if the amorphous layer area were large, or deep, it would require prolonged periods and high temperature even for this annealing treatment.

Further, there was also the risk of doping of contaminants such as unwanted metal ions, etc. during doping. That is, high energy ions impinge not only on the substrate to be processed, but also on the members constituting the inside of the treatment device, and contaminants such as unwanted metal ions therefrom are generated. Therefore, such contaminants such as unwanted metal ions deposit on the substrate to be processed to which doping is yet to take place. There was the problem of implantation of those contaminants along with the dopant inside the substrate to be processed during ion implantation. In particular, recently, from the view point of reducing the junction voltage or junction leak required during PN junction in 30nm transistor, reduction in damage to substrate to be processed and reduction of contaminants that are doped during ultra-shallow junction (Xj) have been demanded. In addition, in the ion implantation device, since doping is done by impinging the ion clusters from the top of the substrate to be processed, isotropic ion implantation was difficult. For example, for a substrate to be processed provided with a high aspect ratio concave portion, uniform doping of the layer on the upper portion side and the layer on the side portion side, more explicitly, almost same doping density to required depth, is difficult. That is, there is also the problem of isotropic doping being difficult.

Here, carrying out doping using a plasma produced by such as ICP (Inductively-coupled Plasma) etc., may also be contemplated. However, even with ICP plasma, because plasma doping has to be carried out under conditions of relatively high electronic temperature, and because the ion energy of generated plasma is high, the plasma damage to the substrate to be processed is high. Therefore, reduction of further damage is desired. In addition, recently, since an improvement in the doping uniformity of the treatment during doping is also strongly desired, it has become a problem in the course of carrying plasma doping using ICP etc.

The aim of this invention is to provide a plasma doping device in which a reduction of damage to a substrate to be processed and a reduction in the contaminants that are doped can be achieved.

The other aim of this invention is to provide a plasma doping method in which a reduction of damage to a substrate to be processed and a reduction in the contaminants that are doped can be achieved.

Still another aim of this invention is to provide a method for manufacturing a semiconductor element in which a reduction of damage to a substrate to be processed and a reduction in the contaminants that are doped can be achieved.

Still another aim of this invention is to provide a semiconductor element wherein a reduction of damage to a substrate to be processed and a reduction in the contaminants that are doped can be achieved.

MEANS TO SOLVE THE PROBLEM

In one aspect of this invention, the plasma doping device provided in this invention is a plasma doping device for performing doping by implanting dopant into a substrate to be processed, the plasma doping device provided with:
a processing container implanting the dopant in its inside to the substrate to be processed;
a gas supply unit supplying a doping gas and an inert gas for excitation of plasma inside the processing container, a supporting table disposed inside the processing container and supporting the substrate to be processed on it;
a plasma generating mechanism generating plasma inside the processing container by using a microwave;
a pressure adjusting mechanism adjusting a pressure inside the processing container;
a bias power supply mechanism that can supply bias power to the supporting table; and
a controller controlling the plasma doping device.
The controller controls bias power supplied by the bias power supply mechanism such that ion energy of the dopant is less than 100eV.

In this manner, when performing doping with plasma, since the plasma is generated using microwave and the bias power is controlled to keep the ion energy of dopant below 100eV at the time of plasma doping, apart from reducing the plasma damage to the substrate to be processed during plasma doping, it will be also possible to control the amorphization of crystalline structure during doping. Through such amorphization control, apart from maintaining excellent surface condition of the substrate to be processed, it will also be possible to either eliminate or simplify the subsequent annealing treatment for recovering the formed amorphous layer. According to the doping with such plasma using microwave, apart from providing an almost uniform treatment to the entire surface of the substrate to be processed, as it becomes possible to perform cleaning of the surface condition of the substrate to be processed by supplying inert gas for plasma excitation during doping, the risk of doping of contaminating substances such as metal ions that become as contaminants or ions as unwanted impurities etc. can be reduced. Moreover, since there is no deposition of such contaminating substances, the energy loss due to deposits is small, and a deeper doping at a lower energy can be achieved. Since uniform doping can be done to a required depth from the surface layer irrespective of the shape of the substrate to be processed, it becomes possible to provide uniform treatment even to a substrate to be processed in which a high aspect ratio concave portion has been formed. That is, it is possible to carry out isotropic doping. Therefore, the layer doped thus has excellent characteristics. From the above, such a plasma doping device enables reduction of damage to substrate to be processed, and reduction of contaminants doped.

In another aspect of this invention, a plasma doping method is a plasma doping method for performing doping by implanting a dopant to a substrate to be processed by using plasma, the method including:
supporting the substrate to be processed on a supporting table disposed inside a processing container;
supplying a doping gas and an inert gas for excitation of plasma into the processing container;
generating plasma inside the processing container by using microwave;
supplying a bias power to the supporting table such that an ion energy of the dopant is less than 100eV; and
implanting the dopant to the substrate to be processed.

Further, in still another aspect of this invention, a plasma doping method is a plasma doping method for performing doping by implanting a dopant to a substrate to be processed by using plasma, the method including:
supporting the substrate to be processed on a supporting table disposed inside a processing container;
supplying a doping gas and an inert gas for excitation of plasma into the processing container;
generating plasma inside the processing container by using microwave; and
implanting the dopant to the substrate to be processed without applying bias power to the supporting table.

Further, in still another aspect of this invention, a method of manufacturing a semiconductor element is a method for manufacturing a semiconductor element manufactured by implanting a dopant to a substrate to be processed by using plasma, the method including the steps of:
supporting the substrate to be processed on a supporting table disposed inside a processing container;
supplying a doping gas and an inert gas for excitation of plasma into the processing container;
generating plasma inside the processing container by using microwave;
supplying a bias power to the supporting table such that an ion energy of the dopant is less than 100eV; and
implanting the dopant to the substrate to be processed.

Further, in still another aspect of this invention, a method of manufacturing a semiconductor element is a method for manufacturing a semiconductor element manufactured by implanting a dopant to a substrate to be processed by using plasma, the method including the steps of:
supporting the substrate to be processed on a supporting table disposed inside a processing container;
supplying a doping gas and an inert gas for excitation of plasma into the processing container;
generating plasma inside the processing container by using microwave; and
implanting a dopant to the substrate to be processed without applying bias power to the supporting table.

Further, in still another aspect of this invention, a semiconductor element is a semiconductor element manufactured by implanting a dopant to a substrate to be processed by using plasma, the semiconductor element manufactured by:
supporting the substrate to be processed on a supporting table disposed inside a processing container;
supplying a doping gas and an inert gas for excitation of plasma into the processing container;
generating plasma inside the processing container by using microwave;
supplying a bias power to the supporting table such that an ion energy of the dopant is less than 100eV; and
implanting the dopant to the substrate to be processed.

Further, in still another aspect of this invention, a semiconductor element is a semiconductor element manufactured by implanting a dopant to a substrate to be processed by using plasma, the semiconductor element manufactured by:
supporting the substrate to be processed on a supporting table disposed inside a processing container;
supplying a doping gas and an inert gas for excitation of plasma into the processing container;
generating plasma inside the processing container by using microwave; and
implanting a dopant to the substrate to be processed without applying bias power to the supporting table.

EFFECT OF THE INVENTION

According to the such a plasma doping device, a plasma doping method and a method for manufacturing a semiconductor element, when performing doping with plasma, since the plasma is generated using microwave and the bias power is controlled to keep the ion energy of dopant below 100eV at the time of plasma doping, apart from reducing the plasma damage to the substrate to be processed during plasma doping, it will be also possible to suppress the amorphization of crystalline structure during doping. Through such amorphization suppression, apart from maintaining excellent surface condition of the substrate to be processed, it will also be possible to either eliminate or simplify the subsequent annealing treatment for recovering the formed amorphous layer. According to the doping with such plasma using microwave, apart from providing an almost uniform treatment to the entire surface of the substrate to be processed, as it becomes possible to perform cleaning of the surface condition of the substrate to be processed by supplying inert gas for plasma excitation during doping, the risk of doping of contaminating substances such as metal ions that become as contaminants or ions as unwanted impurities etc. can be reduced. Moreover, since there is no deposition of such contaminating substances, the energy loss due to deposits is small, and a deeper doping at a lower energy can be achieved. Since uniform doping can be done to a required depth from the surface layer irrespective of the shape of the substrate to be processed, it becomes possible to provide uniform treatment even to a substrate to be processed in which a high aspect ratio concave portion has been formed. That is, it is possible to carry out isotropic doping. Therefore, the layer doped thus has excellent characteristics. From the above, a reduction of damage to substrate to be processed, and a reduction of contaminants doped can be achieved.

With such a semiconductor element, a reduction of damage to substrate to be processed, and a reduction of contaminants doped can be achieved.

Fig. 1 is a schematic cross-section view showing a part of the MOS type semiconductor element. Fig. 2 is a schematic cross-section view showing the principal parts of the plasma doping device used in the method for manufacturing a semiconductor element provided in one embodiment of this invention. Fig. 3 shows a slot antenna plate, included in the plasma doping device shown in Fig. 2, as viewed from the thickness direction of the plate. Fig. 4 is a graph showing the relation between distance from the lower surface of the dielectric window and electron temperature of plasma. Fig. 5 is a graph showing the relation between distance from the lower side of the dielectric window and electron density of plasma. Fig. 6 is a graph showing the relation between electron temperature and electron density in ICP and radial line slot antenna plasma. Fig. 7 is a schematic drawing of a silicon substrate before plasma doping. Fig. 8 is a schematic drawing of a silicon substrate when plasma is generated. Fig. 9 is a schematic drawing of a silicon substrate subjected to plasma doping. Fig. 10 is a schematic drawing showing the bombarding of ion cluster to the silicon substrate in the ion implantation device. Fig. 11 is a schematic drawing of a silicon substrate subjected to doping in the ion implantation device. Fig. 12 is a schematic drawing when DC pulse bias is OFF in the doping by ICP. Fig. 13 is a schematic drawing when DC pulse bias is ON in the doping by ICP. Fig. 14 shows part of the substrate to be processed analyzed by atom probe when P (phosphorus) is doped by the plasma doping device provided in the invention of this application. Fig. 15 is a TEM photograph near the surface of the silicon substrate when the bias power is 0 W. Fig. 16 is a TEM photograph near the surface of the silicon substrate when the bias power is 100 W. Fig. 17 is a TEM photograph near the surface of the silicon substrate when the bias power is 200 W. Fig. 18 is a TEM photograph near the surface of the silicon substrate when the bias power is 300 W. Fig. 19 is a TEM photograph in the vicinity of the surface of the silicon substrate when plasma doping is done by ICP. Fig. 20 is a TEM photograph in the vicinity of the surface of silicon substrate when the bias power is 100 W, and the bias frequency is 13.56MHz. Fig. 21 is a TEM photograph near the surface of the silicon substrate when the bias power is 100 W and the bias frequency is 400kHz. Fig. 22 is a schematic drawing of the appearance of a FinFET (Field Effect Transistor). Fig. 23 is a schematic drawing showing, in the FinFET structure, the status of carrying out doping with the ion implantation device. Fig. 24 is a schematic drawing showing, in the FinFET structure, the status of carrying out doping by plasma doping. Fig. 25 is a SSRM (Scanning spreading resistance microscopy) image, in the FinFET structure, of plasma doping done with a bias power of 0 W. Fig. 26 is a SSRM image, in the FinFET structure, of plasma doping done with a bias power of 100 W, and a bias frequency of 400kHz. Fig. 27 is a SSRM image, in the FinFET structure, of plasma doping done with a bias power of 100 W, and a bias frequency of 13.56MHz.

EMBODIMENTS OF THE INVENTION

An embodiments of the present invention are described below with reference to drawings. First, a configuration of a semiconductor element provided in one embodiment of the present invention is described. Fig. 1 is a schematic cross-section view showing a part of a MOS type semiconductor element provided in one embodiment of the present invention. Incidentally, in the MOS type semiconductor element shown in Fig. 1, a conductive layer is shown by hatching.

According to Fig. 1, in a MOS type semiconductor element 11, an element isolation region 13, a p-type well 14a, an n-type well 14b, a high concentration n-type impurity diffusion region 15a, a high concentration p-type impurity diffusion region 15b, an n-type impurity diffusion region 16a, a p-type impurity diffusion region 16b and a gate oxide film 17 are provided on a silicon substrate 12. One of the high concentration n-type impurity diffusion regions 15a provided so as to sandwich the gate oxide layer 17, and one of the high concentration p-type impurity diffusion regions 15b provided so as to sandwich the gate oxide layer 17, becomes a drain while the other becomes a source.

A gate electrode 18 that functions as a conductive layer is provided on the gate oxide layer 17, and at the side section of the gate electrode 18 is provided a gate side wall 19 that functions as an insulation layer. Further, on the silicon substrate 12 provided with the gate electrode 18 etc., is provided an insulation layer 21. In the insulation layer 21 are provided contact holes 22 connecting the high concentration n-type impurity diffusion region 15a and the high concentration p-type impurity diffusion region, and inside the contact hole 22 is provided a filling electrode 23. On that is further provided a metal interconnection layer 24 that functions as a conductive layer. In addition, an inter-layer insulation film (not illustrated) that functions as an insulation layer and a metal interconnection layer that functions as a conductive layer are alternately provided, and finally a pad (not illustrated) that functions as a contact point with outside is provided. In this manner, the MOS type semiconductor element 11 is formed.

The MOS type semiconductor element 11 provided in one embodiment of the present invention is formed by implanting a dopant, that is, doping, in the n-type impurity diffusion region 16a and the p-type impurity diffusion region 16b with the help of a plasma doping device described later. Specifically, for example, in the n-type impurity diffusion region 16a, B₂H₆ gas is used as a doping gas, and B (boron) is implanted as the dopant. In such a region, although formation of ultra-shallow junction, so-called a shallow junction is desired, and reduction of junction voltage and junction leak are desired, according to the plasma doping device, explained later, provided in one embodiment of the present invention, it is possible to achieve reduction in damage to substrate to be processed, and reduction in the contaminants that are doped.

Next, a configuration and operation of a plasma doping device employed in the manufacture of a semiconductor element provided in one embodiment of the present invention are explained.

Fig. 2 is a schematic cross-section view showing principal parts of the plasma doping device provided in one embodiment of the present invention. Fig. 3 shows a slot antenna plate, included in the plasma doping device shown in Fig. 2, as viewed from the bottom direction, that is, from the direction of the arrow III in Fig. 2. Further, for ease of understanding, a part of the hatching of members is omitted in Fig. 2.

With reference to Fig. 2 and Fig. 3, a plasma doping device 31 is provided with a processing container 32 for performing plasma doping to the substrate to be processed W in its inside, a gas supply unit 33 for supplying into the processing container 32 a gas for plasma excitation and a doping gas that becomes the basis for the dopant to be implanted, a supporting table 34 in the form of a circular plate to support the substrate to be processed W on it, a plasma generating mechanism 39 to generate plasma inside the processing container 32 by using a microwave, and a controller 28 to control the overall operation of the plasma doping device 31. The controller 28 controls the entire plasma doping device 31 such as a gas flow rate in the gas supply unit 33, and pressure inside the processing container 32, etc.

The processing container 32 includes a bottom section 41 located at the lower side of the supporting table 34, and a side wall 42 extending toward the upper direction from the outer circumference of the bottom section 41. The Side wall 42 is approximately cylindrical in shape. In the bottom section 41 of the processing container 32 is provided a ventilation hole 43 so as to partly penetrate it for ventilation. The top side of the processing container 32 is open, and with a lid 44 disposed at the top side of the processing container 32, a dielectric window 36 described later, and an O-ring 45 as a sealing member located between the dielectric window 36 and the lid 44, the processing container 32 is configured to be tightly sealed.

A gas supply unit 33 includes a first gas supply unit 46 for blowing the gas towards the middle of the substrate to be processed W, and a second gas supply unit 47 for blowing the gas from the outside of the substrate to be processed W. A gas supply hole 30 for supplying a gas in the first gas supply unit 46 is located in the middle of the radial direction of the dielectric window 36, and is provided in a location more retracted in the inside direction of dielectric window 36 than a bottom surface 48 of the dielectric window 36 that becomes the facing side opposite to the supporting table 34. The first gas supply unit 46 supplies an inert gas for excitation of plasma or a doping gas by adjusting the flow rate etc. by a gas supplying system 49 connected to the first gas supply unit 46. The second gas supply unit 47 is formed by providing a plurality of gas supply holes 50 in a part of the upper section of the side wall 42 for supplying an inert gas for excitation of plasma or a doping gas to the inside of the processing container 32. A plurality of gas supply holes 50 are provided in the circumferential direction for equitable distribution. To the first gas supply unit 46 and the second gas supply unit 47, the same type of an inert gas for exciting plasma and a doping gas is supplied from the same gas supply source. Incidentally, depending on the demand or the control contents, it is also possible to supply different gases from the first gas supply unit 46 and the second gas supply unit 47, and their flow rates can also be adjusted.

In a supporting table 34, a high frequency power source for RF (Radio frequency) bias is electrically connected via a matching unit 59 to an electrode inside the supporting table 34. This high frequency power source 58, for example, can output a high frequency of 13.56MHz at a given power (bias power). The matching unit 59 accommodates a impedance matching box for achieving matching between impedance on a high frequency power source 58 side and impedance on a load side such as mainly an electrode, plasma and the processing container 32, and inside this impedance matching box is included a blocking condenser for auto bias generation.

The supporting table 34 can support on it the substrate to be processed W by a electrostatic chuck (not illustrated). Further, the supporting table 34 is provided with a heater (not illustrated) for heating etc., and it is possible to set a desired temperature with the temperature adjusting mechanism 29 provided inside the supporting table 34. The supporting table 34 is supported by an insulating cylindrical support 51 extending vertically from the lower side of bottom 41. The ventilation hole 43 mentioned above is provided along the outer circumference of the cylindrical support 51 so as to penetrate partly into the bottom 41 of the processing container 32. The ventilation unit (not illustrated) is connected via a ventilation pipe (not illustrated) below the circular ventilation hole 43. The ventilation unit has a vacuum pump such as turbo molecular pump. With the ventilation unit, the inside of the processing container 32 can be depressurized to the desired pressure.

The plasma generating mechanism 39 is provided outside the processing container 32, and includes a microwave generator 35 for generating microwave for plasma excitation, a dielectric window 36 disposed in a location opposite to the supporting table 34 for introducing the microwave generated from the microwave generator 35 into the processing container 32, a slot antenna plate 37 disposed on the upper side of the dielectric window 36 and provided with a plurality of slot holes 40 to radiate the microwave to the dielectric window 36, and a dielectric member 38 disposed on the slot antenna plate 37 to radially transmit the microwave introduced from a co-axial waveguide tube 56 described later.

The microwave generator 35 having a matching mechanism 53 is connected via a mode converter 54 and a waveguide tube 55 to the top of the co-axial waveguide tube 56 that introduces the microwave. For example, a TE mode microwave generated in the microwave generator 35 passes through the waveguide tube 55, converted to TEM mode by a mode converter 54 and propagates through the coaxial waveguide tube 56. The frequency of the microwave generated in the microwave generator 35 can be selected, for example, as 2.45GHz.

The dielectric window 36 is substantially discoid, and constituted from a dielectric material. A circular concave portion 57 hollowed in a taper shape in a part of the bottom surface 48 of the dielectric window 36 for facilitating generation of a standing wave from the microwave that is introduced. With this concave portion 57, it becomes possible to generate the plasma effectively from microwave at the lower side of the dielectric window 36. Incidentally, as a specific material of the dielectric window 36 can be offered quartz, alumina etc.

The slot antenna plate 37 is in the form of a thin, circular plate. Regarding the plurality of long slot holes 40, as shown in Fig. 3, a pair of slot holes 40 is provided orthogonally substantially in a shape of the letter "/ |", and pairs of slot holes 40 are provided in the circumference direction with a required gap. Also in a radial direction, pairs of slot holes 40 are provided with required gap.

The microwave generated by the microwave generator 35 is conveyed to the dielectric member 38 through the co-axial waveguide tube 56. The microwave radiates towards the radial direction inside the dielectric member 38 that is sandwiched between a cooling jacket 52, which has a circulation pathway 29 for circulating coolant etc. in its inside and in which temperature adjustment of the dielectric member 38 etc. is performed, and the slot antenna plate 37, and radiates to the dielectric window 36 from the plurality of slot holes 40 provided in the slot antenna plate 37. The microwave permeating the dielectric window 36 generates an electric field directly below the dielectric window 36, and generates plasma inside the processing container 32. That is, the microwave plasma that is used for treatment in the plasma doping device 31 is generated within the processing container 32 by the microwave radiated from a radial line slot antenna, the radial line slot antenna being of a configuration comprised of the cooling jacket 52, the slot antenna plate 37 and the dielectric member 38 explained above. Further, in the following description, the plasma generated thus may also be referred to as a radial line slot antenna plasma.

Fig. 4 is a graph showing the relation between the distance from the bottom surface 48 of the dielectric window 36 in the processing container 32 when the plasma is generated in the plasma doping device 31 and the electron temperature of the plasma. Fig. 5 is a graph showing the relation between the distance from the bottom surface 48 of the dielectric window 36 in the processing container 32 when the plasma is generated in the plasma doping device 31 and the electron density of the plasma.

Referring to Fig. 4 and Fig. 5, the region directly below the dielectric window 36, specifically, a region 26 of about up to 10mm indicated by a single dotted line, is called as a so-called plasma generation region. In this region 26, the electron temperature is high, and the electron density is greater than 1x10¹² cm^-3. On the other hand, a region 27 exceeding 10mm indicated by a double dotted line is called as a plasma diffusion region. In this region 27, the electron temperature is about 1.0 - 1.3eV, at lease less than 1.5eV, and the electron density is about 1x10¹²cm^-3, at least higher than 1x10¹¹ cm^-3. The plasma doping for the substrate to be processed W described later, for example, occurs in such a plasma diffusion region. That is, for the plasma doping process, it is desirable to employ a microwave plasma where the electron temperature of the plasma is less than 1.5eV, and the electron density of the plasma is higher than 1x10¹¹ cm^-3 in the vicinity of the surface of the substrate to be processed W.

Incidentally, for reference, the relation between the electron temperature and the electron density in ICP will be described. Fig. 6 is a graph showing the relation between the electron temperature and the electron density in the ICP and the radial line slot antenna plasma, which is a microwave plasma using the radial line slot antenna described above. In Fig. 6, the vertical axis shows the electron temperature (eV) and the horizontal axis shows the electron density (/cm³). In Fig. 6, the black triangular symbol shows the case of ICP when the pressure is 20mTorr inside the processing container, the white triangular symbol shows the case of ICP when the pressure is 50mTorr inside the processing container, the black circle symbol shows the case of radial line slot antenna plasma when the pressure is 20mTorr inside the processing container, and the white circle symbol shows the case of radial line slot antenna plasma when the pressure is 50mTorr inside the processing container.

Referring to Fig. 6, for realizing a high electron density and a low electron temperature in a plasma doping treatment, it is preferable that the data lies near the bottom right in the graph. Following may be considered concerning this. A high electron density state may also be thought to be high ion density state, and with the increased number of dopant for doping, the doping can be made efficient since more number of dopant can be implanted in a short time. Further, since a high electron density state functions to completely decompose the doping gas, it becomes possible to provide a state where more dopant that is optimal for doping, that is a dopant decomposed completely to atomic state, specifically, for example, more P atoms than PH molecules, can be generated. Also, in a low electron density state, since it becomes possible to reduce the damage to the substrate to be processed in plasma doping.

Incidentally, in the case of ICP, in a high pressure state, consistency of plasma becomes very bad because of the mechanism of plasma generation. Further, since collision between electron and doping gas becomes more, the density becomes decreased. That is, in the case of ICP, it is extremely difficult to create a condition of high density plasma at high pressure. Therefore, in the case of ICP, the treatment has to be performed usually at a very low pressure of a few mTorr, which is not preferable from the process point of view.

On the other hand, according to the invention of the present patent application, in a radial line slot antenna plasma where the pressure inside the processing container is not less than 50mTorr, it becomes possible to realize a higher electron density and a lower electron temperature. That is, based on the radial line slot antenna plasma with a higher pressure inside the processing container, a plasma treatment at a comparatively lower electron temperature and a comparatively higher electron density can be carried out.

Incidentally, the plasma doping device 31 of a configuration described above can also be applied as a plasma etching device, and as a plasma CVD device. That is, for example, by providing necessary optimal condition in etching by supplying an etching gas and a gas for plasma excitation from the gas supply unit, etching of the substrate to be processed W can be carried out.

Next, using the plasma doping device 31 mentioned above, a method of manufacture of a semiconductor element produced by implanting a dopant to a substrate to be processed is described.

Referring to Fig. 1 - Fig. 6, and Fig. 7 - Fig. 9 described later, first, the substrate to be processed W that is a base of the semiconductor element is supported with an electrostatic chuck on the supporting table 34 disposed inside the processing container 32. Here, with regard to a silicon substrate as the substrate to be processed, an extremely thin film of natural oxide is provided on its surface. In this natural oxide film, contaminants such as CH₄ or CO₂, H₂O etc. have been adsorbed. This state is shown in Fig. 7. Fig. 7 is a schematic cross-sectional drawing showing a cross-section where a contaminant 63 has been adsorbed in a natural oxide film 62 formed on a surface of a silicon substrate 61 as a substrate to be processed. The thickness of the natural oxide film 62 is less than about 1nm.

Next, an inert gas such as He gas, Ar gas, Xe gas, and Kr gas etc., is introduced from the gas supply unit 33 as a gas for plasma excitation. Here, bias power supplied from the bias power supply mechanism is adjusted such that ion energy of the dopant becomes less than 100eV. Moreover, the pressure inside the processing container 32 is controlled so that the pressure inside the processing container 32 becomes 50mTorr.. Moreover, using the temperature adjusting mechanism 29 provided inside the supporting table 34, the temperature of the silicon substrate 61 supported on the supporting table 34 is adjusted to 400C. That is, as described later, the substrate to be processed is heated to a temperature at which the molecules or atoms of doping gas decomposed selectively by the plasma will be adsorbed on the surface of the substrate to be processed that is to be doped. Under such a condition, microwave plasma is generated inside the processing container 32.

Fig. 8 is a schematic drawing showing a state where microwave plasma 65 was generated. In this case, the natural oxide film 62, which was formed on the surface of the silicon substrate 61 and to which the contaminant 63 is adsorbed, is removed by the generated microwave plasma 65, resulting in a clean surface 64 of the silicon substrate 61. In this case, cleaning such as elimination of contaminants can be also done by supplying an inert gas prior to generation of the plasma.

Next, plasma doping is carried out by supplying a doping gas into the processing container 32. Fig. 9 is a schematic drawing showing the state where a doping gas is supplied. Doping gas is supplied using the gas supply unit 33. In this case, the doping gas is supplied so as to mix with the inert gas for plasma excitation. As doping species can be offered such as B (boron), P (phosphorus), As (arsenic), C (carbon), N (nitrogen), F (fluorine), Ge (germanium), Si (silicon), BF₂ (boron fluoride) etc. Therefore, as gas species to dope these kinds of doping species, there are gases such as B₂H₆, PH₃, AsH₃, GeH₄, CH₄, NH₃, NF₃, N₂, HF, and SiH₄ etc. That is, a doping gas supplied from the gas supply unit 33 includes at least one type of gas selected from the group consisting of B₂H₆, PH₃, AsH₃, GeH₄, CH₄, NH₃, NF₃, N₂, HF, and SiH₄.

In this case, first, the dopant 66 supplied from the doping gas, as shown in Fig. 9, is first adsorbed near the surface 64 of the silicon substrate 61. In this case, since the surface 64 of the silicon substrate 61 is in a state of having been cleaned beforehand by the microwave plasma 65, adsorption occurs in a state where there is hardly any adsorbed contaminant 63. During this, if the temperature of the substrate to be processed is heated for example to about 400C., it is possible to provide a state where adsorption of contaminants such as CH₄ or CO₂, H₂O etc., is difficult.

Therefore, the ions are accelerated in a plasma sheath section provided between the microwave plasma 65 and the silicon substrate 61, and with the energy of collision of these ions with the molecules or atoms adsorbed in the surface, the dopant further diffuses inside. In this manner, plasma doping occurs due to microwave plasma. Through such plasma doping, the semiconductor element containing the silicon substrate provided in one embodiment of the present invention is obtained.

In this manner, when performing doping with plasma, since the plasma is generated using microwave and the ion energy of dopant is controlled below 100eV at the time of plasma doping, apart from reducing the plasma damage to the substrate to be processed during plasma doping, it will also be possible to control the amorphization of crystalline structure during doping. Due to this, it will be possible to either eliminate or simplify the subsequent annealing treatment required after doping for recovering the formed amorphous layer. Further, apart from providing an almost uniform treatment to the entire surface of the substrate to be processed, as it becomes possible to perform a cleaning of the surface condition of the substrate to be processed by supplying an inert gas for plasma excitation during doping, the risk of doping of contaminants such as metal ions that become as contaminants or ions as unwanted impurities etc. can be reduced. Since uniform doping can be done to a required depth from the surface layer irrespective of the shape of the substrate to be processed, it becomes possible to provide a uniform treatment even to a substrate to be processed in which a high aspect ratio concave portion has been formed. That is, it is possible to carry out isotropic doping. Therefore, the layer doped thus has excellent characteristics.

Since the pressure inside the processing container 32 is adjusted to 50mTorr, in the generated radial line slot antenna plasma, it becomes possible to provide a plasma treatment at a higher electron density and a lower electron temperature. Therefore, it becomes possible to significantly reduce the plasma damage.

In this case, since the temperature of the silicon substrate 61 supported on the supporting table 34 is adjusted to 400C., it becomes possible to prevent adsorption of contaminants that are relatively easily adsorbed at lower temperature on the surface 64 of the silicon substrate 61, and positively adsorb the doping gas. Specifically, adsorption of contaminants such as CH₄ or CO₂, H₂O etc. can be rendered difficult. Therefore, ion implantation of contaminants can be remarkably reduced. In addition, as described above, the energy loss during implantation due to deposition of contaminants can be significantly reduced.

A detailed explanation of this is given below. For example, when performing plasma doping with a gas mixture of PH₃ gas and He gas, radical species of P, PH, PH₂, PH₃, H, H₂, He are produced by the plasma. Here, let us consider the gas components that will adsorb on the surface of the substrate to be processed. First, regarding He, adsorption even at room temperature is not possible. H desorbs at about 200C. That is, if the temperature of the substrate to be processed is adjusted up to about 200C. where H will be adsorbed, the surface of the substrate to be processed assumes a state where both H and P are adsorbed, and H is also doped along with P. Since this doping of H will desorb during the subsequent annealing treatment, the energy required in the doping of H will become a total waste. Therefore, for example, by adjusting the temperature of the substrate to be processed to a temperature above 200C. where only P electrons are adsorbed and providing a condition where only P is adsorbed on the surface of the substrate to be processed, a very efficient doping, namely, deep doping of a desired dopant at a lower energy, can be achieved.

Here, in such plasma doping, a diffusion depth of a dopant, so-called doping depth, is determined by a penetration depth when ions of such as inert gas (for example, He gas) are accelerated.

From the above, such a plasma doping enables a reduction of damage to the substrate to be processed, and a reduction of contaminants that are going to be doped.

For reference, mechanism when doping is carried out with an ion implantation device will be described. Fig. 10 is a schematic diagram showing a condition near the surface of the silicon substrate when doping is carried out using the ion implantation device.

Referring to Fig. 10, in the ion implantation device, an ion cluster 74 of a large mass composed of a plurality of dopants 75 is scanned as a beam on to various regions of a silicon substrate 71, and the dopants 75 constituting the ion cluster 74 are implanted into the silicon substrate 71. On the silicon substrate 71, a natural oxide film 72 has been provided, and various deposit layers 73 have been adsorbed on the natural oxide film 72. These deposit layers 73 are composed of dopants and contaminants produced during the bombarding of the ion cluster 74. Then, by ion implantation, the ion cluster 74 is impinged on the silicon substrate 71. With this, when the ion cluster 74 impinges, a part of the dopant 75 is implanted into the inside of the silicon substrate 71. Thus, ion implantation happens in this manner. However, impinging of the ion cluster 74 results in a damage 76 to the inner layer near the surface of the silicon substrate 71 due to collision energy. Further, in addition to the dopant 75, a part of the deposit layer 73 that was deposited near the surface is also implanted as contaminants. Furthermore, a crystalline structure near the surface of the silicon substrate 71 is destroyed resulting in the formation of an amorphous layer 77. Thereupon, part of a mass of the dopant 75 that was broken during impinging is deposited as the deposit layer 73 in other region, and interferes in the ion implantation in the other region.

The silicon substrate 71 so doped is shown in Fig. 11. In the silicon substrate 71 in which although the dopant 75 was properly implanted, large numbers of the damages 76 are produced near the surface layer, and the amorphous layer 77 is formed at that surface layer. Furthermore, matter other than the dopant 75 will also get implanted by doping, which is not desirable.

For reference, a mechanism when doping is carried out with ICP will be described. Fig. 12 and Fig. 13 are schematic drawings showing the condition near the surface of the silicon substrate when doping is carried out with ICP. A DC pulse bias is applied in the case of doping with ICP. Fig. 12 shows the case of the DC pulse bias being OFF, and Fig. 13 shows the case of the DC pulse bias being ON. Here, as shown in Fig. 12, bias power is not applied when the DC pulse bias is OFF, and in a lower side of a generated plasma 83, a dopant 82 is adsorbed on the surface of a silicon substrate 81. Further, as shown in Fig. 13, when the DC pulse bias is ON, the dopant 82 is sucked into the silicon substrate 81 due to the DC pulse bias. Here, the energy of the ions produced by ICP is very high being 500-1000eV, and due to the effect of ion suction by the DC pulse bias, a damage 84 is produced in the inner layer of the silicon substrate 81 similar to the case of the ion implantation device described above. Moreover, it causes collapse of the crystalline structure at the surface and formation of a amorphous layer 85.

Although such a damage of the inner layer of the silicon substrate can be recovered by annealing treatment, when an annealing treatment of high temperature and prolonged period is required, the throughput increases, and it is also not preferable from the view point of increase in contact width.

That is, in the invention of the present patent application, a reduction in the internal damage to a silicon substrate occurring during suction of dopants can be achieved by using plasma of comparatively high electron density and comparatively low electron temperature and minimizing the ion energy at the time of doping by controlling the applied bias power. Moreover, with the plasma described above, ion implantation can be effected at one time to the entire surface of the silicon substrate without forming deposits and destroying the crystalline structure surface layer of the silicon substrate during implantation of dopant,. Furthermore, even if the damage by plasma occurs, such damage is very small, and even during the damage recovery by annealing treatment, damage recovery can be achieved by annealing treatment at a comparatively low temperature and short time.

In the above embodiment, the ion energy of the dopant during plasma doping was controlled to below 100eV; however, for this, the bias power need not be applied, or the plasma doping may be carried out while applying a comparatively small bias power such that the ion energy of the dopant that will be implanted to the silicon substrate does not become high. Specifically, for example, the dopant is implanted by applying a bias power such that the ion energy of the dopant is less than 100ev. The ion energy of the dopant of 100eV corresponds to the case when a bias power of 300W is applied.

In the embodiment described above, although cleaning of the surface of the substrate to be processed was done by supplying the inert gas for excitation of plasma to the surface of a substrate to be processed during the course of plasma doping, it is not limited to this, and cleaning of the surface of the substrate to be processed may also be done by supplying an inert gas for excitation of plasma to the surface of the substrate to be processed before carrying out plasma doping. By doing so, the risk of doping of the contaminants can be further reduced. Further, cleaning can be done by supplying an inert gas to the surface of the substrate to be processed even after carrying out plasma doping. By doing so, the influence of the contaminants in the post-doping processes can be reduced.

Here, surface characteristics of the silicon substrate were observed using AFM (Atomic Force Microscope). Table 1 shows the surface roughness of the silicon substrate after each treatment. In Table 1, the surface roughness Ra indicates the arithmetic mean roughness, and the surface roughness Rmax indicates the maximum height. All units are in nm (nanometer).

Referring to Table 1, the surface roughness Ra of the Reference, that is a silicon substrate for which no doping treatment was given, is 0.10nm and the surface roughness Rmax is 1.12nm. In contrast to this, in the case of sample A where bias power was not applied in plasma doping, the surface roughness Ra of the silicon substrate is 0.09nm and the surface roughness Rmax is 0.97nm. In the case of sample B where bias power was not applied in plasma doping but DI rinse was carried out subsequently, the surface roughness Ra of the silicon substrate is 0.09nm and the surface roughness Rmax is 1.02nm. Further, in the case of sample C where bias power was set to 100W and the frequency was set to 13.56MHz in plasma doping, the surface roughness Ra of the silicon substrate is 0.09nm, and the surface roughness Rmax is 1.11nm. Further, in the case of sample D where bias power was set to 100W and the frequency was set to 13.56MHz in plasma doping, and DI (De Ionize: deionize) rinse was carried out, the surface roughness of the silicon substrate Ra is 0.11nm and the surface roughness Rmax is 1.13nm. That is, in the all cases, the surface roughness Ra and the surface roughness Rmax of the silicon substrate are very small, and compared to the undoped silicon substrate, it is found that those values hardly change. Therefore, from an observation of the surface characteristics of the silicon substrate by AFM, those characteristics are found to be excellent with bias power in the region from 0 to 100W.

That is, the invention of this application does not intend to form an amorphous layer in the surface of the substrate to be processed followed by doping in that layer, but rather carry out doping after reducing the plasma damage to the substrate to be processed and suppressing the formation of an amorphous layer.

Next, the conditions of doping when carrying out doping are explained. Fig. 14 shows the status when part of the substrate to be processed, subjected to doping by the plasma doping device provided in the invention of this application, is analyzed by an atom probe. In this case, the bias power is 300W. The black colored dot in Fig. 14 indicates the existence of phosphorus atom, the black colored region of high dot density is considered to indicate a large aggregation of phosphorus atoms. The region shown in Fig. 14 is a so-called shoulder region of a FinFET explained later. Referring to Fig. 14, it is found that the distribution of phosphorus atom is isotropic.

Next, TEM photographs near the surface of the respective silicon substrates when plasma doping is carried out at bias power of 0 W, 100 W, 200 W and 300 W are shown. Fig. 15 is a TEM photograph near the surface of a silicon substrate for bias power of 0 W, Fig. 16 is a TEM photograph near the surface of a silicon substrate for bias power of 100 W, Fig. 17 is a TEM photograph near the surface of a silicon substrate for bias power of 200 W, and Fig. 18 is a TEM photograph near the surface of a silicon substrate for bias power of 300 W. In Fig. 18 etc., dark colored regions, namely, black region parts, indicate regions damaged by plasma.

Referring to Figs. 15-18, it is found that the region undergoing plasma damage becomes larger with an increase in the bias power. It is found that there is occurrence of EOR (End Of Region: end layer) damage in the

regions

86 and 87 enclosed by solid line. It is also found that with an increase in the bias power, the size of the amorphous layer region in the surface layer also increases. That is, it is found that with an increase in the bias power, the plasma damage occurring inside the silicon substrate increases, and the amorphous layer region in the surface layer also increases. This is also understood from the fact that the thickness of the amorphous layer shown by A₂ in Fig. 18 has become more than the thickness of the amorphous layer shown by A₁ in Fig. 17. The state shown in Fig. 18 is for bias power of 300 W, and it is better to carry out plasma doping so as to suppress such a state. With this, it is better to adjust to less than 100eV as ion energy of dopant corresponding to bias power of 300 W. Here, the thickness of amorphous layers shown by A₁ and A₂ is about 2-3nm.

For reference, a TEM photograph in the vicinity of the surface of the silicon substrate when plasma doping is done by ICP is shown in Fig. 19. Referring to Fig. 19, it is found that the amorphous layer is clearly formed near the surface. Here, the thickness of the amorphous layer is about 5 nm.

Next, the bias frequency for the case of applying bias is explained. Fig. 20 is a TEM photograph near the surface of the silicon substrate for the case of bias power of 100 W and bias frequency of 400kHz. Fig. 21 is a TEM photograph near the surface of the silicon substrate for the case of bias power of 100 W and bias frequency of 13.56MHz. Even in Fig. 20 etc., dark colored regions, namely, black region parts, indicate regions damaged by plasma.

Referring to Fig. 20 and Fig. 21, the dark colored regions near the surface layer are found to be more in Fig. 21 than in Fig. 20. That is, regarding the frequency of bias when applying bias, the plasma damage is found to be small when the frequency is high. In this case, by setting the frequency of bias power to 13.56MHz, the plasma damage can be reduced. Further, in the actual use, it may be better to fix a region higher than 13.56, more specifically, a region of 13.56-300 MHz, for plasma treatment by microwave.

Incidentally, such plasma doping can be effectively applied for 3D device structures of such as a Fin FET etc. Fig. 22 is a schematic perspective view depicting a schematic configuration of a FinFET. With reference to Fig. 22, in a FinFET 91, a long projection called as a fin 92 projecting in the upward direction from the surface of the silicon substrate is provided so as to extend in the front and back direction of the paper. A gate 93 is provided so as to partly cover the fin 92. In the fin 92, a source 94 is provided in front of the gate 93, and a drain 95 is provided at the back side. It can be effectively applied in the plasma doping of such structure as the FinFET 91. Incidentally, for such structure of the FinFET 91, the plasma doping is done in a region shown by a hatching 96 in Fig. 22.

Fig. 23 shows the case of carrying out doping for such a fin 92 using an ion implantation device. On the other hand, Fig. 24 shows the case of a plasma doping provided in the invention of the present patent application. First, referring to Fig. 23, photoresist layers 98 formed on a silicon substrate 97 are comparatively taller than the fin 92. In such case, in doping using the ion implantation device, for rendering the ion implantation anisotropic, the ions irradiating from inclined directions as shown by dotted lines 99 in Fig. 23 become a shadow of the taller photoresist layers 98, and thus ion implantation cannot occur properly. That is, in the fin 92 disposed near the photoresist layers 98, the ion implantation on the photoresist layers 98 side will be incomplete.

In contrast to this, with reference to Fig. 24, in the plasma of microwave, irrespective of the height of the photoresist layers 98, the plasma is generated uniformly and diffused in the region where the fin 92 has been provided. Therefore, isotropic plasma doping is done for the entire surface of the fin 92 irrespective of the height of the photoresist layers. Therefore, for such a FinFET 91, suitable doping becomes possible.

In such a FinFET structure, it becomes possible to control erosion, that is, a change in shape on treatment, specifically, a so-called shoulder down at a corner of the fin, and achieve improvement in the uniformity of treatment. Fig. 25 shows an SSRM of the FinFET for the case of bias power of 0 W. Fig. 26 shows an SSRM of the FinFET for the case of bias power of 100 W and a bias power frequency of 400kHz. Fig. 27 shows an SSRM of the FinFET for the case of bias power of 100 W and a bias power frequency of 13.56 MHz. The samples shown in Fig. 25 - Fig. 27 were subjected to a ramp anneal called as RTA (Rapid Thermal Anneal), here, an annealing treatment of 950C., 60 seconds. In Fig. 25 - Fig. 27, the comparatively darker gray regions shown by

symbols

67, 68 and 69 respectively indicate low resistance, namely, the region implanted with the dopant.

Referring to Fig. 25, for the case of the bias power of 0 W, it is found that the dopant has been implanted suitably along the fin shape. That is, the comparatively darker gray regions are found to be formed along the outer shape of the fin. Also similarly in Fig. 27, it is found that the dopant has been implanted along the outer shape of the fin. On the other hand, for the case shown in Fig. 26, the ion implantation has become somewhat nonuniform. This is thought that, by setting the bias frequency to 400kHz, since the damage to the crystalline structure is more compared to 13.56 MHz, the diffusion during annealing has become nonuniform. That is, when carrying out doping to forms such as FinFET, as per Fig. 25 and Fig. 27, the uniformity of implantation of the dopant can be thoroughly maintained if the bias frequency is 13.56 MHz.

In the embodiment described above, the plasma treatment was carried out with the radial line slot antenna microwave using a slot antenna plate, however, it is not limited to this, and a microwave plasma treatment device with a comb shaped antenna section or a microwave plasma treatment device that generates surface wave plasma by radiating microwave from a slot may also be used.

In the above embodiment, although the plasma treatment was carried out using the microwave plasma where the electron temperature of the plasma was less than 1.5eV, and the electron density of the plasma was higher than 1x10¹¹cm^-3, it is not restricted to this, and it may also be applied, for example, to regions where the electron density of the plasma is below 1x10¹¹cm^-3.

In the above embodiment, a silicon substrate was employed as a substrate to be processed; however, it is not limited to this, for example, it can be equally well applied even for doping in interlayer films.

As above, although the embodiments of the present invention were described with the help of drawings, the present invention is not limited to the embodiments shown by the figures. In the embodiments shown by the figures, within the scope same as the present invention or within the equivalent scope, various modifications or transformations are possible.

EXPLANATION OF NUMBERS

11 MOS type semiconductor element, 12, 61, 71, 81, 97 Silicon substrate, 13 Element isolation region, 14a p-type well, 14b n-type well, 15a High concentration n-type impurity diffusion region, 15b High concentration p-type impurity diffusion region, 16a n-type impurity diffusion region, 16b p-type impurity diffusion region, 17 Gate oxide film, 18 Gate electrode, 19 Gate side wall section, 21 Insulating film, 22 Contact hole, 23 Filling electrode, 24 Metal interconnection layer, 26, 27, 86, 87 Regions, 28 Controller, 29 Temperature adjusting mechanism, 31 Plasma doping device, 32 Processing container, 33, 46, 47 Gas supply unit, 34 Supporting table, 35 Microwave generator, 36 Dielectric window, 37 Slot antenna plate, 38 Dielectric member, 39 Plasma generating mechanism, 40 Slot hole, 41 Bottom, 42 Side wall, 43 Ventilation hole, 44 Lid, 45 O-ring, 48 Bottom surface, 49 Gas supply system, 30, 50 Gas supply hole, 51 Cylindrical support, 52 Cooling jacket, 53 Matching mechanism, 54 Mode converter, 55 Waveguide tube, 56 Co-axial waveguide tube, 57 Concave portion, 58 High frequency power source, 59 Matching unit, 60 Circulating path, 62, 72 Natural oxide film, 63 Contaminant, 64 Surface, 65, 83 Plasma, 66, 75, 82 Dopant, 73 Deposit layer, 74 Ion cluster, 76, 84 Damage, 77, 85 Amorphous layer, 91 FinFET, 92 Fin, 93 Gate, 94 Source, 95 Drain, 96 Hatching, 98 Photoresist layer, 99 Dotted line

Claims

A plasma doping device for performing doping by implanting a dopant to a substrate to be processed by using plasma, comprising:
a processing container implanting the dopant in its inside to the substrate to be processed;
a gas supply unit supplying a doping gas and an inert gas for excitation of plasma inside the processing container;
a supporting table disposed inside the processing container and supporting the substrate to be processed on it;
a plasma generating mechanism generating plasma inside the processing container by using a microwave;
a pressure adjusting mechanism adjusting a pressure inside the processing container;
a bias power supply mechanism that can supply bias power to the supporting table; and
a controller controlling the plasma doping device,
wherein the controller controls bias power supplied by the bias power supply mechanism such that ion energy of the dopant is less than 100eV.
The plasma doping device according to claim1, wherein the controller controls the bias power supply mechanism so as not to supply bias power to the supporting table.
The plasma doping device according to claim 1, wherein the controller sets a frequency of bias power supplied from the bias power supply mechanism in a range of 13.56-300MHz.
The plasma doping device according to claim 1, wherein the controller controls the pressure adjusting mechanism so that a pressure inside the processing container is not less than 50mTorr.
The plasma doping device according to claim 1, wherein the controller heats the substrate to be processed to a temperature at which molecules or atoms of doping gas decomposed selectively by the plasma are adsorbed on a surface of the substrate to be processed that is to be doped.
The plasma doping device according to claim 1, wherein the controller supplies the inert gas to a surface of the substrate to be processed that is to be doped prior to supplying the doping gas from the gas supply unit.
The plasma doping device according to claim 1, wherein the controller supplies the inert gas to a surface of the doped substrate to be processed after performing doping to the substrate to be processed.
The plasma doping device according to claim 1, wherein the plasma generating mechanism comprises a microwave generator to generate microwave for plasma excitation, a dielectric window for permeating the microwave generated by the microwave generator to the inside of the processing container, and a slot antenna provided with a plurality of slot holes to radiate microwave to the dielectric window.
The plasma doping device according to claim 8, wherein the microwave plasma generated from the plasma generating mechanism is generated by a radial line slot antenna.
The plasma doping device according to claim 1, wherein the gas supply unit supplies at least one type of gas selected from the group consisting of B₂H₆, PH₃, AsH₃, GeH₄, CH₄, NH₃, NF₃, N₂, HF and SiH₄ as a doping gas.
A plasma doping method for performing doping by implanting a dopant to a substrate to be processed by using plasma, the method comprising:
supporting the substrate to be processed on a supporting table disposed inside a processing container;
supplying a doping gas and an inert gas for excitation of plasma into the processing container;
generating plasma inside the processing container by using microwave;
supplying a bias power to the supporting table such that an ion energy of the dopant is less than 100eV; and
implanting the dopant to the substrate to be processed.
A plasma doping method for performing doping by implanting a dopant to a substrate to be processed by using plasma, the method comprising:
supporting the substrate to be processed on a supporting table disposed inside a processing container;
supplying a doping gas and an inert gas for excitation of plasma into the processing container;
generating plasma inside the processing container by using microwave; and
implanting the dopant to the substrate to be processed without applying bias power to the supporting table.
The plasma doping method according to claim 11, wherein the frequency of the bias power supplied is set in a range of 13.56-300MHz.
The plasma doping method according to claim 11, wherein the dopant is implanted to the substrate to be processed by setting the pressure inside the processing container to not less than 50mTorr.
The plasma doping method according to claim 11, wherein the substrate to be processed is heated to a temperature at which the molecules or atoms of doping gas decomposed selectively by the plasma are adsorbed on the surface of the substrate to be processed that is to be doped.
The plasma doping method according to claim 11, wherein the inert gas is supplied to a surface of the substrate to be processed that is to be doped prior to the supply of the doping gas.
The plasma doping method according to claim 11, wherein the inert gas is supplied to a surface of the doped substrate to be processed after the supply of the doping gas to the substrate to be processed.
The plasma doping method according to claim 11, wherein the plasma generated by using microwave is generated by a radial line slot antenna.
A method for manufacturing a semiconductor element manufactured by implanting a dopant to a substrate to be processed by using plasma, the method comprising the steps of:
supporting the substrate to be processed on a supporting table disposed inside a processing container;
supplying a doping gas and an inert gas for excitation of plasma into the processing container;
generating plasma inside the processing container by using microwave;
supplying a bias power to the supporting table such that an ion energy of the dopant is less than 100eV; and
implanting the dopant to the substrate to be processed.
A method for manufacturing a semiconductor element manufactured by implanting a dopant to a substrate to be processed by using plasma, the method comprising the steps of:
supporting the substrate to be processed on a supporting table disposed inside a processing container;
supplying a doping gas and an inert gas for excitation of plasma into the processing container;
generating plasma inside the processing container by using microwave; and
implanting a dopant to the substrate to be processed without applying bias power to the supporting table.
A semiconductor element manufactured by implanting a dopant to a substrate to be processed by using plasma, the semiconductor element manufactured by:
supporting the substrate to be processed on a supporting table disposed inside a processing container;
supplying a doping gas and an inert gas for excitation of plasma into the processing container;
generating plasma inside the processing container by using microwave;
supplying a bias power to the supporting table such that an ion energy of the dopant is less than 100eV; and
implanting the dopant to the substrate to be processed.
A semiconductor element manufactured by implanting a dopant to a substrate to be processed by using plasma, the semiconductor element manufactured by:
supporting the substrate to be processed on a supporting table disposed inside a processing container;
supplying a doping gas and an inert gas for excitation of plasma into the processing container;
generating plasma inside the processing container by using microwave; and
implanting a dopant to the substrate to be processed without applying bias power to the supporting table.