WO2011090863A1 - Nano-films semi-conducteurs à structure âme-enveloppe ii-vi - Google Patents
Nano-films semi-conducteurs à structure âme-enveloppe ii-vi Download PDFInfo
- Publication number
- WO2011090863A1 WO2011090863A1 PCT/US2011/021039 US2011021039W WO2011090863A1 WO 2011090863 A1 WO2011090863 A1 WO 2011090863A1 US 2011021039 W US2011021039 W US 2011021039W WO 2011090863 A1 WO2011090863 A1 WO 2011090863A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- core
- nanowires
- shell
- semiconductor
- growth
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
- H10D62/118—Nanostructure semiconductor bodies
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02469—Group 12/16 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02469—Group 12/16 materials
- H01L21/02474—Sulfides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02469—Group 12/16 materials
- H01L21/02477—Selenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02485—Other chalcogenide semiconducting materials not being oxides, e.g. ternary compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02551—Group 12/16 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02551—Group 12/16 materials
- H01L21/02557—Sulfides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02551—Group 12/16 materials
- H01L21/0256—Selenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02551—Group 12/16 materials
- H01L21/02562—Tellurides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02568—Chalcogenide semiconducting materials not being oxides, e.g. ternary compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02603—Nanowires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
- H01L21/02645—Seed materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02653—Vapour-liquid-solid growth
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
- H10D62/118—Nanostructure semiconductor bodies
- H10D62/119—Nanowire, nanosheet or nanotube semiconductor bodies
- H10D62/122—Nanowire, nanosheet or nanotube semiconductor bodies oriented at angles to substrates, e.g. perpendicular to substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
- H10D62/118—Nanostructure semiconductor bodies
- H10D62/119—Nanowire, nanosheet or nanotube semiconductor bodies
- H10D62/123—Nanowire, nanosheet or nanotube semiconductor bodies comprising junctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/86—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group II-VI materials, e.g. ZnO
- H10D62/8603—Binary Group II-VI materials wherein cadmium is the Group II element, e.g. CdTe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/817—Bodies characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous
- H10H20/818—Bodies characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous within the light-emitting regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/012—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group II-IV materials
- H10H20/0125—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group II-IV materials with a substrate not being Group II-VI materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/811—Bodies having quantum effect structures or superlattices, e.g. tunnel junctions
- H10H20/812—Bodies having quantum effect structures or superlattices, e.g. tunnel junctions within the light-emitting regions, e.g. having quantum confinement structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/822—Materials of the light-emitting regions
- H10H20/823—Materials of the light-emitting regions comprising only Group II-VI materials, e.g. ZnO
Definitions
- the present invention relates to high quality II-VI core-shell semiconductor nano wires.
- LED light-emitting diode
- OLED Organic-based LEDs
- LEDs inorganic LEDs
- the two pressing issues are high cost and the sub-par performance of green LEDs.
- a large part of the high cost is associated with conventional LEDs being grown on crystalline substrates. More specifically, sapphire or SiC for blue and green LEDs and GaAs for red LEDs.
- the sticking point associated with creating efficient InGaN-based LEDs is that incorporating In into the active region results in significant strain relative to the cladding layers (W. Lee et al, J. Display Technol. 3, 126 (2007)).
- nanowire -based LEDs where the nanowires are grown using MOVPE techniques by either a template (S. Hersee et al, Electron. Lett. 45, 75 (2009)) or vapor liquid solid (VLS) approach (S. Lee et al. Philosophical Magazine 87, 2105 (2007)).
- the advantages of employing nanowires as LED elements are that they can be grown on inexpensive substrates (such as glass) and the amount of lattice mismatch that can be tolerated between LED layers is significantly higher when the crystalline material is a 20-100 nm thick nanowire as compared to bulk heterostructure growth (D. Zubia et al, J. Appl. Phys. 85, 6492 (1999)).
- Green LEDs can be formed by two ways, incorporating InGaN emissive layers in GaN- based pin nanowires, or by forming II- VI material based pin nanowires. Progress has been made on both fronts, but many issues still remain unresolved. For GaN- based nanowires, efficient doping is still problematic and the quantum efficiency of the emitters remains sub-par (S. Hersee et al, Nano Lett. 6, 1808 (2006)). For II- VI material based pin nanowires, green LEDs can be formed by employing CdZnSe or ZnSeTe in the active region; however, the number of unresolved issues is even larger.
- the photo luminescence (PL) of high quality epi-material should show band gap exciton features and a very small amount of mid-gap defect emission.
- All reported ZnSe nanowires show large levels of defect emission in their PL response (X. Zhang et al, J. Appl. Phys. 95, 5752 (2004)).
- the one article (U. Philipose et al, J. Appl. Phys. 100, 084316 (2006)) in which the defect emission was reduced was where added Zn was post- growth diffused into the ZnSe nanowires in order to reduce the large amount of Zn vacancies present after nanowire growth. Performing an extra diffusion step is costly and unworkable when the emitter layer is part of a pin diode device structure. Consequently, in spite of the technological importance of device quality II- VI nanowires, problems remain.
- a plurality of core-shell semiconductor nanowires each being fixed to a support includes II- VI materials for both the cores and the shells.
- the present invention provides high quality II- VI core-shell semiconductor nanowires.
- Conventional unshelled II-VI nanowires are grown using gold catalysts. They suffer from the disadvantages of numerous native defects, difficulty in controllably doping n- or p-type, and very low emissive efficiency.
- the two former characteristics result from the usage of gold catalysts, while the latter characteristic stems from the core nanowires being unshelled.
- II-VI core-shell semiconductor nanowires terminate in a free end with metal alloy nanoparticles fixed to each nanowire.
- the usage of metal alloy nanoparticles provides an advantage of reduced native defects. As a result the II-VI core-shell
- semiconductor nanowires can be controllably doped p- or n-type by using conventional substitutional dopants. Additionally, the presence of the
- semiconductor shell(s) enables a very large enhancement in the quantum efficiency of the nanowires, and enhanced transport of the electrons and holes in the core regions of the nanowires. All of these properties are highly desirable for numerous electronic, optoelectronic, and optical applications, such as, LEDs, lasers, rectifiers, solar cells, transistors, or phosphors.
- FIG. 1 shows a schematic of a prior art II-VI semiconductor nanowire
- FIGS. 2a and 2b show a schematic of a II-VI core-shell semiconductor nanowire wherein attached at the free end is a metal alloy nanoparticle;
- FIG. 3 shows a schematic of a II-VI core-shell semiconductor nanowire which includes discrete heterostructure units
- FIG. 4 shows a schematic of a II-VI core-shell semiconductor nanowire which includes doped discrete heterostructure units;
- FIGS. 5a and 5b show the photoluminescence intensity of an array of unshelled ZnSe nanowires;
- FIGS. 6a and 6b show the photoluminescence intensity of an array of ZnSe/ZnSeS core-shell nanowires
- FIGS. 7a and 7b show scanning electron microscope images of ZnSe:Cl/ZnSeS core-shell nanowires
- FIGS. 8a and 8b show the photoluminescence intensity of an array of ZnSe:Cl/ZnSeS core-shell nanowires.
- FIGS. 9a and 9b show the photoluminescence intensity of an array of ZnSe/ZnSeS core-shell nanowires where the core nanowires contain multiple quantum wells of ZnSeTe.
- semiconductor optoelectronic and electronic devices that not only have good performance, but also are low cost and can be deposited on arbitrary substrates.
- II-VI semiconductor nanowires as the building blocks for semiconductor devices would result in optoelectronic and electronic devices that confer these advantages.
- semiconductor nanowires can be grown by both colloidal and vapor-based VLS processes. The colloidal processes have some advantages with respect to cost, however, at this time, it is difficult to custom tailor their composition. Vapor- based VLS techniques have been performed using either molecular beam epitaxy (MBE) or metal-organic vapor phase epitaxy (MOVPE).
- MBE molecular beam epitaxy
- MOVPE metal-organic vapor phase epitaxy
- the MBE technique can result in very high quality semiconductors being formed, however, it is a very expensive growth technique and as a result is limited to research scale investigations.
- MOVPE is currently being used worldwide to form commercial high quality III-V LEDs and lasers.
- the focus below will be on II-VI semiconductor nanowires grown by VLS techniques using MOVPE equipment.
- FIG. 1 A prior art II-VI semiconductor nanowire is shown in FIG. 1.
- the substrate is 100
- the semiconductor nanowire is 110
- the metal nanoparticle is 120.
- the typical metal nanoparticle 120 is composed of gold.
- others have also used metals, such as, Ag, Ni, and Ti.
- gold compounds have also been used as catalyst, such as, AuCl 3 (R.
- the metal nanoparticles 120 need to be distributed on the substrate 100 surface.
- Well known techniques for forming a distribution of metal nanoparticles 120 on the substrate 100 are drop or spin casting a dispersion of metallic nanoparticles 120, and depositing a thin metal (by sputtering or thermal evaporation) on the substrate surface. With regard to the latter procedure, very thin metal layers ( ⁇ 5 nm) typically deposit in discrete nano-islands instead of continuous films. Sometimes the substrates containing the thin metal deposits are heated in order to aid in the formation of metal nanoparticles 120 having particular sizes.
- MOVPE deposition of the semiconductor nanowires 110 occurs at the growth temperature.
- the growth temperature is typically chosen such that the metal nanoparticles 120 or catalysts are molten at that temperature.
- Semiconductor nanowires can be formed using MOVPE via a VSS (vapor solid solid) process; however, it has been found that the quality of nanowires is inferior to that formed when the catalyst are liquid during the growth step.
- VSS vapor solid solid
- typical II-VI semiconductor nanowire MOVPE growth temperatures are ⁇ 550°C. This temperature is significantly above the preferred growth temperature (270- 340°C) of crystalline II-VI semiconductors, such as, ZnSe.
- the ensuing II-VI semiconductor nanowires contain large numbers of undesirable native defects, which impacts both the quality of the emission (for undoped nanowires) and the ability to modulate the doping of the nanowires.
- MBE the growth temperature of ZnSe nanowires by VLS has been lowered to the low 300°C range; however, the morphology of the resultant nanowires has been average at best (Y. Ohno et al, Appl. Phys. Lett. 87, 043105 (2005); A. Colli et al, Appl. Phys. Lett. 86, 153103 (2005)).
- An important aspect for growing II-VI semiconductor nanowires with reduced native defects is to engineer the metal catalysts such that the nanowires can be grown at the preferred growth temperatures (270-340°C).
- the engineered metal catalysts must be such that they act as preferred growth sites for the II-VI semiconductor materials, and, secondly, the metal atoms don't diffuse into the II-VI semiconductor nanowires during the growth sequence and form unwanted impurities (which impact the emission or ability to dope the nanowires).
- the metal catalysts should be non-toxic. Given all of these constraints, possible choices are metal alloys of Au (since Au acts as an excellent catalyst site), such as, Au-In, Au-Ga, Au-Sn, and Au-Pb.
- Thin Au-In films were formed by sequential thermal evaporation of gold, followed by indium. Upon flowing Zn and Se precursors via MOVPE at a Zn:Se ratio of ⁇ 1 :3.6 (found to be ideal for forming high quality epitaxial crystalline films) and heating the substrate to a temperature of 330°C, it was found that nanowire arrays can be formed.
- Photoluminescence of the nanowires revealed two sets of peaks, one associated with bandgap region emission and the other associated with n-type substitutional dopants.
- Au-Ga catalysts were determined to be an equally unattractive choice.
- the column IV elements of Sn and Pb were considered. Both have low melting points and form alloys with Au in all proportions. In addition, both are not known to be dopants in II-VI materials. Lead alloys were not tried due to their known toxicity.
- results are given to show that high quality II-VI core-shell semiconductor nanowires can be formed using Au-Sn catalysts in MOVPE-based VLS growth. Photoluminescence at 77° K reveals bandgap excitonic features and the absence of sub-bandgap defect emission (indicating that native defects are not formed and that the Sn did not dope the nanowires).
- FIGS. 2a and 2b illustrate the semiconductor nanowires of the present invention.
- the II-VI core semiconductor nanowires 220 can either be grown directly on a support 200 or on the surface of a low energy surface film 210.
- the support 200 can be any material structure which can withstand the MOVPE growth temperatures (up to -400° C for the shell materials).
- glass, semiconductor substrates, such as Si or GaAs, metal foils, and high temperature plastics can be used as supports.
- the optional low energy surface film 210 is deposited on the support 200 in order to enhance the selectivity of the core nanowire growth.
- typical low energy surface films 210 are oxides, such as, silicon oxide and aluminum oxide.
- each II-VI core semiconductor nanowire 220 is attached to the support 200 (or the optional low energy surface film 210) at one end. The free end of each II-VI core semiconductor nanowire 220 is terminated in a metal alloy nanoparticle 230.
- the metal alloy nanoparticle 230 should: 1) have a reduced melting point of ⁇ 330°C and less; 2) enable localized growth of the nanowires; 3) not dope the nanowires; and 4) be non-toxic.
- Au-Sn metallic alloys were found to meet all of these criteria. Even though Au-Sn alloys are reported in this disclosure, other metal alloy nanoparticle 230 candidates are equally valid as long as they meet the four criteria discussed above. It should also be noted that in certain applications the toxicity constraint could be relaxed.
- II-VI core-shell semiconductor nanowires 215 can be obtained by forming II-VI semiconductor shell(s) 240 surrounding the II-VI core
- each of the semiconductor shells 240 can be either singular (one material composition) or multiple (two or greater).
- the thickness of each of the semiconductor shells 240 can range from 1-2 nm to hundreds of nanometers, with the preferred thickness range being 1 to 20 nm.
- each shell section can be either uniform or graded (from ZnSeo.sSo.s to ZnSeo.25So.75, for example) in material composition.
- the goal of shelling is to remove the surface states from the core region of the nanowires where radiative recombination, as well as transport, of the electrons and holes occurs.
- the semiconductor shells 240 need to be crystalline and typically are constructed such that both the electrons and holes are confined to the core nanowire region. As such, the number and material composition of the semiconductor shells 240 are mainly dictated by these two criteria. Nonetheless, as is well known in the art, there are cases where electron and hole recombination occurs in different regions of the nanowires.
- the holes in the core recombine with the electrons in the II-VI semiconductor shell 240 nearest the core (e.g.., ZnTe core and ZnSe inner shell).
- the material compositions are chosen such that electron and hole recombination occurs in one of the semiconductor shells 240.
- the II-VI semiconductor shell 240 in which recombination occurs is typically chosen such that its width is less than the exciton radius of the electron-hole pair (and thus the shell is a quantum well).
- the II-VI semiconductor shells 240 of the present invention can be simple binary compounds, such as, ZnS or MgS, more complex ternary compounds, such as, ZnSeS or ZnMgTe, or quaternary compounds, such as, ZnMgSSe or
- the II-VI core semiconductor nanowires 220 of the present invention can be simple binary compounds, such as, ZnSe or CdTe, more complex ternary compounds, such as, ZnSeS or CdZnSe, or quaternary compounds, such as, CdZnSSe or CdZnSeTe.
- the material composition of the II-VI core semiconductor nanowire 220 will be uniform along its length; in others the material composition will be varied either smoothly or discretely along its length, using MOVPE growth techniques that are well known in the art.
- II-VI core-shell semiconductor nanowires 215 are illustrated in which the II-VI core semiconductor nanowires 220 contain discrete heterostructure units 222.
- the discrete hetero structure units 222 will be uniform in composition, in others the material content (II-VI binary, ternary, or quaternary compositions) will smoothly vary from one composition to another, such as, from ZnSeo.sS 0.5 to ZnS.
- Each of the discrete heterostructure units 222 can be composed of the same composition (in which case the II-VI core semiconductor nanowire 220 will have a uniform composition) or they can vary, as is well known in the art, in order to produce nanowires with specific properties.
- the discrete heterostructure units 222 can vary in number from 1 (in which case the II -VI core semiconductor nanowire 220 will have a uniform composition) to hundreds, as is well known in the art.
- the lengths of the discrete heterostructure units 222 can vary from many microns down to quantum well dimensions of 1 to 10 nm. In general the discrete heterostructure units 222 can vary in both length and in composition along the extent of the II-VI core semiconductor nanowires 220 in order to produce II-VI core semiconductor nanowires 220 with desired physical attributes.
- the overall lengths of the II-VI core-shell semiconductor nanowires 215 can range from 500 nm to tens of microns, with the preferred length range being 2 to 10 microns.
- the thicknesses of the II-VI core-shell semiconductor nanowires 215 they are typically less than 500 nm, with a preferred thickness being less than 100 nm.
- 10 nm thick nanowires can be made routinely by methods well known in the art. Sub 10 nm thick nanowires are more difficult to produce since they require equally small metal alloy nanoparticles 230.
- FIG. 4 illustrates II-VI core-shell semiconductor nanowires 215 where dopants 224 are included in either some of the discrete heterostructure units 222, some of the shell(s), or both in order to modify the conductivity or spectral response of the nanowires.
- dopants 224 that modulate the conductivity can be either n-type or p-type.
- some of the demonstrated n-type dopants 224 are Al, In, Ga, CI, Br, and I.
- the highest n-type doping levels are typically obtained with the column VII elements substituting for the chalcogens, for example, CI substituting for Se in ZnSe.
- An effective dopant 224 for MOVPE applications is CI since precursors, such as, butyl chloride, are easy to use, readily available, and doping levels in the 10 18 cm "3 range can be obtained.
- column I or column V elements have been successfully implemented for II-VI materials. Representative column I elements are Li and Cu, while representative column V elements are N, P, and As. In addition to these elements, LiN has been demonstrated to be an effective p-type dopant 224 for II- VI materials. As discussed above, some dopants 224 strongly modify the spectral response of the host semiconductor.
- Mn and Cu can be used to obtain broad green-red and blue-green emission, respectively, when ZnSe is the host material (N. Pradhan et al., JACS 129, 3339 (2007)).
- the dopant concentration and types can differ between the various discrete heterostructure units 222 and
- each discrete heterostructure unit 222 or semiconductor shell(s) 240 can have a different dopant 224 species, type (n-type, p-type, or emissive), and concentration, with some discrete
- heterostructure units 222 or semiconductor shell(s) 240 being nominally undoped. Overall the distribution of dopants is selected, as is well known in the art, to obtain specific properties for the II -VI core-shell semiconductor nanowires 215.
- the following processes can be used to make core-shell nanowires in accordance with the present invention. Variations from the following procedures are also incorporated as part of this disclosure if they are natural variations well known to those practiced in the art.
- the support 200 needs to be chosen. As discussed above the support 200 can be any material structure which can withstand the MOVPE growth temperatures (up to ⁇ 400°C for the shell materials). Correspondingly, glass, semiconductor substrates, such as Si or GaAs, metal foils, and high temperature plastics are possible supports 200.
- a low energy surface film 210 on the surface of the support 200.
- the low energy surface film 210 can be deposited by processes, such as, sputtering, CVD, ALD, or electron-beam evaporation.
- Typical low energy surface films 210 are silicon oxide and aluminum oxide.
- the silicon oxide can also be formed by wet or dry thermal oxide processes. Appropriate cleaning procedures are followed prior to depositing the low energy surface films 210.
- Next metal alloy nanoparticles 230 need to be formed on the surface of the support 200 or low energy surface film 210.
- the metal alloy nanoparticles 230 can be formed by two different methods. In one instance dispersions of metal alloy nanoparticles 230 can be formed, followed by deposition of the dispersion on the surface of the support 200 or low energy surface film 210. For this case, the metal alloy nanoparticles 230 can be synthesized by wet chemistry processes, as are well known in the art. Given the difficulty in forming colloidal metal nanoparticles containing more than one metallic element, it is preferred to deposit thin metal films containing the metals of interest, since very thin metal layers ( ⁇ 5 nm) typically deposit in discrete nano- islands instead of continuous films.
- the two or more metals including the metal alloy nanoparticles 230 can be deposited either consecutively or simultaneously. In addition, following the metal deposition, sometimes it is beneficial to heat the support in order to aid in the formation of metal alloy nanoparticles 230 having particular sizes.
- the preferred metal alloy nanoparticles 230 are gold-tin alloys, where the preferred volume ratio of gold to tin ranges from 1 :5 to 5 : 1. Other metal alloys can be used instead of Au-Sn as long as they meet the four criteria discussed above. As is well known in the art, standard cleaning procedures are to be followed prior to forming the metal alloy nanoparticles 230 on the surface of the support 200 or the low energy surface film 210.
- the support 200 containing the optional low energy surface film 210 and the metal alloy nanoparticles 230 is placed in a II-VI growth chamber in order to grow the II-VI core-shell semiconductor nanowires 215 by the VLS process.
- the growth can occur either by MBE or MOVPE, with MOVPE being the preferred process due to the lower manufacturing costs associated with MOVPE growth processes.
- MOVPE being the preferred process due to the lower manufacturing costs associated with MOVPE growth processes.
- hydrogen can be flowed at 0.5 - 2 liters/minute for 10 to 20 minutes, with the support 200 at a temperature of 300 to 500°C.
- the preferred growth temperature for II-VI materials is between 270 and 340°C.
- the support is heated to between 270 and 340°C.
- MOVPE growth can take place at sub- atmospheric pressures. Accordingly, it is preferred that the core-shell
- semiconductor nanowires 215 be grown at MOVPE reactor pressures ranging from 50 torr to 760 torr.
- Appropriate combinations of II -VI semiconductor precursors are selectively flowed (in addition to the main carrier gas) in order to form the discrete heterostructure units 222 including the II- VI core semiconductor nanowires 220.
- the metal alloy nanoparticles 230 act as catalysts during the core nanowire growth and as a result cause localized growth of the II- VI core semiconductor nanowires 220 at the positions of the metal alloy nanoparticles 230.
- the low energy surface film 210 its purpose is to enhance the selectivity of the II -VI core semiconductor nanowire 220 growth.
- ideal core nanowire growth occurs when semiconductor growth only takes place at the positions of the metal alloy nanoparticles 230.
- semiconductor precursors want to grow on high energy surfaces in order to reduce the total energy of the system. Accordingly, when the precursors impinge on the low energy surface film 210, it is energetically favorable for them to diffuse to the positions of the metal catalysts where they collect inside of the catalysts at high concentrations. Once the concentration of precursors is beyond the solubility limit of the metal catalysts, they start forming the core semiconductor nanowires 220 from the bottom side of the catalysts (and thus initially on the growth surface). The core semiconductor nanowires 220 increase in length as a result of additional growth just below the metal catalysts, which remain on top of the semiconductor nanowires 220 as shown in FIG. 2.
- the deposition conditions are modified to engender non-localized growth of the semiconductor material. This results in forming semiconductor shells 240 surrounding the II- VI core semiconductor nanowires 220.
- typical techniques for turning off selective growth is to modify the growth temperature or switching to different combinations of precursors. With the II-VI core semiconductor nanowire 220 growth taking place at temperatures between 270 and 340°C, it was found that one approach for producing high quality II-VI core-shell semiconductor nanowires 215 was to raise the growth temperature to between 350 and 390°C (while maintaining the same set of precursors).
- II-VI semiconductor precursors include diethylzinc, dimethyl cadmium, bis(methyl- ⁇ -cyclopentadienyl)magnesium, tert-butyl selenide, tert-butyl sulfide, and di-isopropyl telluride, which are used to form the elements of Zn, Cd, Mg, Se, S, and Te.
- II-VI semiconductor precursors have been tried over the years. The previous list includes those precursors which have been found to be reactive at the growth temperatures between 270 and 340°C. To perform the shelling at temperatures between 310 and 390°C, the same group of precursors can be used.
- the preferred molar ratio of semiconductor precursors impinging on the growth surface ranges from 1 : 1 to 1 :4 of column II precursors to column VI precursors, respectively. It has been found that employing these ranges of molar ratios for both the core and shell growths results in the formation of high quality II-VI core-shell semiconductor nanowires 215.
- the II-VI core semiconductor nanowires 220 are composed of discrete heterostructure units 222 that vary in composition, thickness, and doping (type and concentration). Standard MOVPE growth procedures are followed to grow each discrete heterostructure unit 222, whereby the semiconductor and dopant precursors are selectively chosen and switched in order to get the proper composition, thickness, and doping.
- the semiconductor shell(s) 240 can also vary in composition, thickness, and doping (type and concentration). Standard MOVPE growth procedures are followed to grow each II-VI semiconductor shell 240, whereby the semiconductor and dopant precursors are selectively chosen and switched in order to get the proper composition, thickness, and doping.
- dopant precursors again it is desirable that they be chosen such that they are reactive at the growth temperatures between 270 and 390°C.
- appropriate CI, N, and P precursors are butyl chloride, tert-butyl amine, and tri-n-butylphosphine; however, as is well known in the art, other precursors can be chosen.
- the composition of either the discrete heterostructure units 222 or the semiconductor shell(s) 240 they can be either uniform or compositionally graded from one end to the other. In addition, they can be composed of binary, ternary, or quaternary II- VI semiconductor compounds.
- Some representative binary compounds are ZnSe, CdTe, and ZnS; some representative ternary compounds are ZnSeTe, CdZnSe, and ZnSeS; and some representative quaternary compounds are ZnMgSeS and CdZnSeTe.
- Both types of nanowires are formed on Si substrates, where a low energy surface film 210 of silicon oxide is on the surface of the Si.
- the Si substrates are degreased in a sonicator using consecutively acetone, methanol, and water.
- the Si substrates are placed in a conventional dry thermal oxide furnace where 1 micron of oxide is formed on the surface.
- metal alloy nanoparticles 230 of gold-tin the substrates are placed in a conventional thermal evaporator whose base pressure goes down to ⁇ 10 "6 torr.
- the substrates Prior to thermal evaporation the substrates are degreased in a sonicator using consecutively acetone, methanol, and water. To form the gold-tin nanoparticles, 1 nm of gold is thermally evaporated, followed by 3 nm of tin.
- the nanowires occurs in a home-built atmospheric pressure horizontal MOVPE apparatus.
- the samples Prior to loading the nanoparticle-covered Si samples into the water-cooled (4° C) glass reactor chamber, the samples are degreased consecutively in acetone, methanol, and water (no sonication).
- the Zn, Se, and S precursors are diethylzinc, tert-butyl selenide, and tert-butyl sulfide respectively.
- the carrier gas is He-H 2 (8% hydrogen), which flows at a rate of 1700 seem.
- the ratio of Zn to chalcogen precursors impinging on the samples is set to 1 :3.6.
- the substrates are heated to 320° C during the core growth, which occurs for 60 minutes by flowing 2.5 and 13.8 seem of He-H 2 through the Zn and Se bubblers, respectively.
- the ZnSe core nanowire growth conditions are the same as that for the unshelled case, except the growth time is 55 minutes.
- the shelling step substrate at 370° C
- two uniform ZnSeS shells are grown, one at a 35% molar ratio of S to Se for 12 minutes, the other at a 55% molar ratio of S to Se for 17 minutes.
- the molar ratios correspond to that of the Se and S precursors (the actual S incorporation in the nanowires is much less due to non-linearities in the ZnSeS growth process). More specifically, for the 35% ZnSeS shell, the Zn, Se, and S precursor flow rates are 2.5, 8.9, and 8.2, respectively, while for the 55% ZnSeS shell, the Zn, Se, and S precursor flow rates are 2.5, 6.2, and 12.9, respectively.
- the main carrier gas of He-H 2 flows at a rate of 1600 seem.
- the overall length of both sets of nanowires is on the order of 3-4 microns.
- FIGS. 5 and 6 Low temperature (77° K) photoluminescence results are given in FIGS. 5 and 6 for the unshelled and shelled nanowires, respectively.
- the pump beam is the 10 mW continuous output from a Nichia 405 nm laser diode which is focused to a spot size of -0.5 mm.
- the emission is detected by a Jobin-Yvon double monochrometer.
- FIGS. 5 a and 6a show details of the bandgap exciton region, while FIGS. 5b and 6b show the entire spectra.
- FIG. 5a shows exciton features at -444.3 and 450.5 nm.
- the latter feature corresponds to bulk ZnSe exciton emission due to the ZnSe nanowires emitting in the direction parallel to the long dimension of the nanowires.
- the shorter wavelength nanowire emission at 444.3 nm is due to the nanowires emitting in the perpendicular direction, and thus, quantum confined by the sides of the nanowires. Since the ZnSe nanowire diameters are on the order of 25-40 nm, the degree of quantum confinement is small.
- the sub-bandgap defect emission present (beyond 470 nm) in the spectra of FIG. 5b is due to traps at the surfaces of the nanowires since the ZnSe nanowires are not shelled or covered with passivating organic ligands.
- FIG. 5 shows that for unshelled ZnSe, the peak to defect emission ratio is 10: 1, which is very good for unshelled ZnSe nanowires grown under stoichiometric conditions.
- FIG. 6 shows that the impact of shelling with ZnSeS is to greatly increase the bandgap exciton feature, while minimizing the sub-bandgap defect emission. More specifically, FIG. 6 shows that the bulk ZnSe emission feature at 450.5 nm disappears, the quantized ZnSe emission feature at 444.3 nm blue shifts to -440 nm and increases by over 4 orders of magnitude, and the peak (440 nm) to defect (500 nm) ratio increases by 3 orders of magnitude.
- the blue shift is due to the greater quantum confinement resulting from the inclusion of ZnSeS shells; while the disappearance of the bulk ZnSe feature occurs since quantum confined states have a shorter radiative lifetime than bulk states as a result of the Purcell effect.
- the very large increases in the bandgap exciton feature and the peak to defect ratio occur since shelling with ZnSeS enables the transfer of defect-causing surface states from the core surface region to the outer shell surface region.
- ZnSe/ZnSeS core-shell nanowires are grown where the core ZnSe nanowire is doped with CI.
- the growth conditions are analogous to that described in Example 1 for the core-shell nanowires except for the following.
- the chlorine precursor is butyl chloride. Because small amounts of CI is required to dope ZnSe highly n-type, the butyl chloride bubbler was cooled to a temperature of -25 C.
- the ZnSe:Cl core nanowire growth 2.8, 15.4 and 0.4 seem of He-H 2 flows through the Zn, Se, and CI bubblers, respectively, for 65 minutes. Once more there are two ZnSeS shells (35% and 55%).
- 2.8, 10.0, and 9.2 seem of He-H 2 flows through the Zn, Se, and S bubblers, respectively, for 13 minutes.
- For the 55% ZnSeS shell 2.8, 6.9, and
- FIG. 7 shows representative scanning electron microscope (SEM) images of isolated ZnSe:Cl/ZnSeS core-shell nanowires at two different magnifications.
- FIG. 7a shows that a long (8.8 ⁇ ) core-shell nanowire is formed which has good thickness uniformity along its length.
- FIG. 7b reveals that the core-shell nanowire thickness is 52.2 nm.
- FIG. 8 photoluminescence results are given in FIG. 8 for the Cl-doped core-shell nanowires.
- FIG. 8a show details of the bandgap exciton region
- FIG. 8b shows the sub-bandgap region. Comparing the photoluminescence traces of FIGS. 6 and 8 shows that the impact of CI doping is to broaden and weaken the bandgap exciton emission at 440 nm while introducing a broad Cl-induced defect peak centered at 585 nm.
- FIG. 8b includes its spectra (dashed line). The position of the Cl-induced defect peak is very similar to that obtained when growing bulk epitaxial ZnSe films doped with CI.
- SU8 is spun cast on as-grown arrays of the core-shell nanowires in order to partially submerge the nanowires in SU8. After appropriate curing the wires are briefly placed in an oxygen plasma to remove any SU8 from the unsubmerged tops of the nanowires. Next 100 nm of In (for ohmic contact formation) followed by thick Ag is thermally evaporated on to the bare nanowires sticking out of the SU8. The entire array is then detached from the Si substrate, enabling patterned metal (In and Ag) to be thermally evaporated on the bottom side of the nanowire array encased in SU8.
- IV measurements are then performed to determine the electrical resistance of collections of nanowires (the patterned metal areas are ⁇ 0.04 mm 2 ). Measurements are performed on both doped and undoped ZnSe/ZnSeS core-shell nanowires.
- the extracted resistance is on the order of 50 Gohms, while for the Cl-doped core-shell nanowires the extracted resistance is ⁇ 2 Kohms, lower by over 7 orders of magnitude.
- the very high resistance of the undoped core-shell nanowires indicates that the core ZnSe nanowires are intrinsic (as occurs for good quality ZnSe epi material) and lack native defects which would result in unwanted doping of the nanowires.
- multiple quantum wells of ZnSeTe are grown in the core ZnSe nanowires, which once again are shelled with ZnSeS (35% followed by 55%).
- ZnSeS 35% followed by 55%).
- the Au/Sn nanoparticles are formed by thermally evaporating 1.5 nm of Au followed by 4.5 nm of Sn.
- the Te precursor is di- isopropyl telluride. Its bubbler is cooled to -18° C.
- the Te precursor flow (at 30 seem for the quantum wells, and 0 seem for the barrier sections).
- the substrate remains at 330°C, while the growth rate is increased in order to switch to delocalized growth. More specifically, for the 35% ZnSeS shell, 15.0, 7.4, and 6.8 seem of He-H 2 flows through the Zn, Se, and S bubblers, respectively, for 12 minutes.
- the 55% ZnSeS shell 15.0, 5.7, and 9.7 seem of He-H 2 flows through the Zn, Se, and S bubblers, respectively, for 17 minutes.
- the main He-H 2 carrier gas flows at 1600 seem.
- FIG. 9 shows the 77 K (a) and 300 K (b) photo luminescence from the ZnSe:ZnSeTe/ZnSeS core-shell nanowire arrays.
- FIG. 9a reveals that all of the excited electron-hole pairs recombine in the ZnSeTe quantum wells since the ZnSe bandgap exciton emission at 440 nm is gone. Comparisons between the highest intensity ZnSe/ZnSeS core-shell nanowire arrays with and without ZnSeTe quantum wells indicate that the integrated photoluminescence is highest for the quantum well samples.
- FIG. 9b shows the impact of measurement temperature (from 77 K to 300 K) on the photoluminescence intensity, resulting in a drop in integrated intensity of approximately a factor of 70, a red shift ( ⁇ 20 nm) in the peak intensity, and a broadening (from ⁇ 40 nm FWHM to ⁇ 50 nm FWHM) of the photo luminescence response. As is well known in the art, all of these effects are to be expected.
- the drop-off in the photoluminescence intensity from 77K to 300K can be accounted for by two effects: 1) The core nanowire region of ZnSeTe-ZnSe multiple quantum wells is a type II semiconductor, resulting in poor overlap of the electrons and holes; and 2) With the quantum wells being
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biophysics (AREA)
- Optics & Photonics (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Led Devices (AREA)
Abstract
Une pluralité de nano-films semi-conducteurs à structure âme-enveloppe qui sont fixés chacun à un support comprennent des matériaux II-VI tant pour l'âme que pour l'enveloppe. Chaque nano-film se termine par une extrémité libre sur laquelle est fixée une nanoparticule de métal.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/689,326 | 2010-01-19 | ||
| US12/689,326 US8377729B2 (en) | 2010-01-19 | 2010-01-19 | Forming II-VI core-shell semiconductor nanowires |
| US12/689,310 | 2010-01-19 | ||
| US12/689,310 US8212236B2 (en) | 2010-01-19 | 2010-01-19 | II-VI core-shell semiconductor nanowires |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2011090863A1 true WO2011090863A1 (fr) | 2011-07-28 |
Family
ID=43899625
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2011/021039 Ceased WO2011090863A1 (fr) | 2010-01-19 | 2011-01-13 | Nano-films semi-conducteurs à structure âme-enveloppe ii-vi |
Country Status (1)
| Country | Link |
|---|---|
| WO (1) | WO2011090863A1 (fr) |
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2778122A1 (fr) * | 2013-03-15 | 2014-09-17 | Dow Global Technologies LLC | Nanoparticules à hétérojonction multiple, procédés de fabrication et articles les comprenant |
| EP2778123A1 (fr) * | 2013-03-15 | 2014-09-17 | Rohm and Haas Electronic Materials LLC | Nanoparticules à hétérojonction multiple, procédés de fabrication et articles les comprenant |
| EP2778124A1 (fr) * | 2013-03-15 | 2014-09-17 | The University of Illinois | Nanoparticules à hétérojonction multiple, procédés de fabrication et articles les comprenant |
| US9966257B2 (en) | 2010-12-13 | 2018-05-08 | Norwegian University Of Science And Technology | Nanowire epitaxy on a graphitic substrate |
| WO2018122358A1 (fr) * | 2016-12-29 | 2018-07-05 | Aledia | Dispositif optoélectronique à diodes électroluminescentes |
| US10243104B2 (en) | 2012-01-10 | 2019-03-26 | Norwegian Univeresity Of Science And Technology (Ntnu) | Nanowire device having graphene top and bottom electrodes and method of making such a device |
| US10347781B2 (en) | 2012-06-21 | 2019-07-09 | Norwegian University Of Science And Technology (Ntnu) | Solar cells |
| US10347791B2 (en) | 2015-07-13 | 2019-07-09 | Crayonano As | Nanowires or nanopyramids grown on graphitic substrate |
| US10714337B2 (en) | 2015-07-31 | 2020-07-14 | Crayonano As | Process for growing nanowires or nanopyramids on graphitic substrates |
| US11239391B2 (en) | 2017-04-10 | 2022-02-01 | Norwegian University Of Science And Technology (Ntnu) | Nanostructure |
| US11261537B2 (en) | 2013-06-21 | 2022-03-01 | Norwegian University Of Science And Technology (Ntnu) | III-V or II-VI compound semiconductor films on graphitic substrates |
| US11594657B2 (en) | 2015-07-13 | 2023-02-28 | Crayonano As | Nanowires/nanopyramids shaped light emitting diodes and photodetectors |
| US12471405B2 (en) | 2019-09-23 | 2025-11-11 | Squidled SAS | Composition of matter |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020175408A1 (en) * | 2001-03-30 | 2002-11-28 | The Regents Of The University Of California | Methods of fabricating nanostructures and nanowires and devices fabricated therefrom |
| US20050054004A1 (en) * | 2003-09-10 | 2005-03-10 | The Regents Of The University Of California | Graded core/shell semiconductor nanorods and nanorod barcodes |
| WO2006016914A2 (fr) * | 2004-07-07 | 2006-02-16 | Nanosys, Inc. | Procedes de croissance de nanofils |
| EP1700935A1 (fr) * | 2005-03-09 | 2006-09-13 | Samsung Electronics Co., Ltd. | Nanofils et leur méthode de fabrication |
| WO2008140611A2 (fr) * | 2006-12-18 | 2008-11-20 | The Regents Of The University Of California | Diodes électroluminescentes et lasers à base d'un réseau de fils nanométriques |
| KR20090003840A (ko) * | 2007-07-05 | 2009-01-12 | 삼성전자주식회사 | 코어/쉘 형태의 나노와이어를 제조하는 방법, 그에 의해제조된 나노와이어 및 이를 포함하는 나노와이어 소자 |
-
2011
- 2011-01-13 WO PCT/US2011/021039 patent/WO2011090863A1/fr not_active Ceased
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020175408A1 (en) * | 2001-03-30 | 2002-11-28 | The Regents Of The University Of California | Methods of fabricating nanostructures and nanowires and devices fabricated therefrom |
| US20050054004A1 (en) * | 2003-09-10 | 2005-03-10 | The Regents Of The University Of California | Graded core/shell semiconductor nanorods and nanorod barcodes |
| WO2006016914A2 (fr) * | 2004-07-07 | 2006-02-16 | Nanosys, Inc. | Procedes de croissance de nanofils |
| EP1700935A1 (fr) * | 2005-03-09 | 2006-09-13 | Samsung Electronics Co., Ltd. | Nanofils et leur méthode de fabrication |
| WO2008140611A2 (fr) * | 2006-12-18 | 2008-11-20 | The Regents Of The University Of California | Diodes électroluminescentes et lasers à base d'un réseau de fils nanométriques |
| KR20090003840A (ko) * | 2007-07-05 | 2009-01-12 | 삼성전자주식회사 | 코어/쉘 형태의 나노와이어를 제조하는 방법, 그에 의해제조된 나노와이어 및 이를 포함하는 나노와이어 소자 |
| US20100327258A1 (en) * | 2007-07-05 | 2010-12-30 | Samsung Electronics Co., Ltd. | Method for producing core-shell nanowires, nanowires produced by the method and nanowire device comprising the nanowires |
Non-Patent Citations (15)
| Title |
|---|
| A. COLLI ET AL., APPL. PHYS. LETT., vol. 86, 2005, pages 153103 |
| C. BARRELET ET AL., JACS, vol. 125, 2003, pages 11498 |
| D. HARANATH, APPL. PHYS. LETT., vol. 89, 2006, pages 173118 |
| D. ZUBIA, J. APPL. PHYS., vol. 85, 1999, pages 6492 |
| J. SALFI ET AL., APPL. PHYS. LETT., vol. 89, 2006, pages 261112 |
| M. KRAMES ET AL., J. DISPLAY TECHNOL., vol. 3, 2007, pages 160 |
| R. THAPA, J. ALLOYS AND COMPOUNDS, vol. 475, 2008, pages 373 |
| S. HCRSEE ET AL., ELECTRON. LETT., vol. 45, 2009, pages 75 |
| S. HERSEE ET AL., NANO LETT., vol. 6, 2006, pages 1808 |
| S. LEE ET AL., PHILOSOPHICAL MAGAZINE, vol. 87, 2007, pages 2105 |
| TANG ET AL., APPL. PHYS. LETT., vol. 51, 1987, pages 913 |
| U. PHILIPOSE ET AL., J. APPL. PHYS., vol. 100, 2006, pages 084316 |
| W. LEE ET AL., J. DISPLAY TECHNOL., vol. 3, 2007, pages 126 |
| X. ZHANG ET AL., J. APPL. PHYS., vol. 95, 2004, pages 5752 |
| Y. OHNO, APPL. PHYS. LCTT., vol. 87, 2005, pages 043105 |
Cited By (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9966257B2 (en) | 2010-12-13 | 2018-05-08 | Norwegian University Of Science And Technology | Nanowire epitaxy on a graphitic substrate |
| US10861696B2 (en) | 2010-12-13 | 2020-12-08 | Norwegian University Of Science And Technology | Compositions comprising epitaxial nanowires on graphene substrates and methods of making thereof |
| US10243104B2 (en) | 2012-01-10 | 2019-03-26 | Norwegian Univeresity Of Science And Technology (Ntnu) | Nanowire device having graphene top and bottom electrodes and method of making such a device |
| US11257967B2 (en) | 2012-06-21 | 2022-02-22 | Norwegian University Of Science And Technology (Ntnu) | Solar cells |
| US10347781B2 (en) | 2012-06-21 | 2019-07-09 | Norwegian University Of Science And Technology (Ntnu) | Solar cells |
| CN104277852A (zh) * | 2013-03-15 | 2015-01-14 | 伊利诺斯大学科技管理办公室 | 多异质结纳米颗粒、其制备方法以及包含该纳米颗粒的制品 |
| EP2778124A1 (fr) * | 2013-03-15 | 2014-09-17 | The University of Illinois | Nanoparticules à hétérojonction multiple, procédés de fabrication et articles les comprenant |
| TWI556683B (zh) * | 2013-03-15 | 2016-11-01 | 伊利諾大學受託人董事會 | 多-異質接面奈米粒子、其製造方法及包含該粒子之製品 |
| JP2014195073A (ja) * | 2013-03-15 | 2014-10-09 | Dow Global Technologies Llc | マルチヘテロ接合ナノ粒子、その製造方法および同ナノ粒子を含む物品 |
| EP2778123A1 (fr) * | 2013-03-15 | 2014-09-17 | Rohm and Haas Electronic Materials LLC | Nanoparticules à hétérojonction multiple, procédés de fabrication et articles les comprenant |
| EP2778122A1 (fr) * | 2013-03-15 | 2014-09-17 | Dow Global Technologies LLC | Nanoparticules à hétérojonction multiple, procédés de fabrication et articles les comprenant |
| CN104046359A (zh) * | 2013-03-15 | 2014-09-17 | 伊利诺斯大学科技管理办公室 | 多异质结纳米颗粒、其制备方法以及包含该纳米颗粒的制品 |
| CN104046360A (zh) * | 2013-03-15 | 2014-09-17 | 伊利诺斯大学科技管理办公室 | 多异质结纳米颗粒、其制备方法以及包含该纳米颗粒的制品 |
| US10510924B2 (en) | 2013-03-15 | 2019-12-17 | The Board Of Trustees Of The University Of Illinois | Multi-heterojunction nanoparticles, methods of manufacture thereof and articles comprising the same |
| US11261537B2 (en) | 2013-06-21 | 2022-03-01 | Norwegian University Of Science And Technology (Ntnu) | III-V or II-VI compound semiconductor films on graphitic substrates |
| US11594657B2 (en) | 2015-07-13 | 2023-02-28 | Crayonano As | Nanowires/nanopyramids shaped light emitting diodes and photodetectors |
| US10347791B2 (en) | 2015-07-13 | 2019-07-09 | Crayonano As | Nanowires or nanopyramids grown on graphitic substrate |
| US11264536B2 (en) | 2015-07-13 | 2022-03-01 | Crayonano As | Nanowires or nanopyramids grown on a graphene substrate |
| US10714337B2 (en) | 2015-07-31 | 2020-07-14 | Crayonano As | Process for growing nanowires or nanopyramids on graphitic substrates |
| US11450528B2 (en) | 2015-07-31 | 2022-09-20 | Crayonano As | Process for growing nanowires or nanopyramids on graphitic substrates |
| FR3061607A1 (fr) * | 2016-12-29 | 2018-07-06 | Aledia | Dispositif optoelectronique a diodes electroluminescentes |
| US10916579B2 (en) | 2016-12-29 | 2021-02-09 | Aledia | Optoelectronic device with light-emitting diodes |
| WO2018122358A1 (fr) * | 2016-12-29 | 2018-07-05 | Aledia | Dispositif optoélectronique à diodes électroluminescentes |
| US11239391B2 (en) | 2017-04-10 | 2022-02-01 | Norwegian University Of Science And Technology (Ntnu) | Nanostructure |
| US12471405B2 (en) | 2019-09-23 | 2025-11-11 | Squidled SAS | Composition of matter |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8212236B2 (en) | II-VI core-shell semiconductor nanowires | |
| US8377729B2 (en) | Forming II-VI core-shell semiconductor nanowires | |
| WO2011090863A1 (fr) | Nano-films semi-conducteurs à structure âme-enveloppe ii-vi | |
| US8563395B2 (en) | Method of growing uniform semiconductor nanowires without foreign metal catalyst and devices thereof | |
| US8669544B2 (en) | High efficiency broadband semiconductor nanowire devices and methods of fabricating without foreign catalysis | |
| EP1388597B1 (fr) | PROCEDE DE FABRICATION DE MONOCRISTAUX DE COMPOSE SEMI-CONDUCTEUR ZNTE DE TYPE n SUR UN SUBSTRAT DE ZNTE ET DISPOSITIF SEMI-CONDUCTEUR METTANT EN OEUVRE UN TEL MONOCRISTAL | |
| JP4160000B2 (ja) | 発光ダイオードおよびその製造方法 | |
| JP4781821B2 (ja) | 量子ドット分散発光素子およびその製造方法 | |
| US6544870B2 (en) | Silicon nitride film comprising amorphous silicon quantum dots embedded therein, its fabrication method and light-emitting device using the same | |
| EP1563547B1 (fr) | Nanostructure, dispositif electronique comportant cette nanostructure et procede de preparation de nanostructures | |
| US7858419B2 (en) | Gallium nitride-based compound semiconductor multilayer structure and production method thereof | |
| US20050230673A1 (en) | Colloidal quantum dot light emitting diodes | |
| JP7551631B2 (ja) | シーディングまたは触媒を使わずにパルスレーザー堆積法によって成長させた無転位半導体ナノ構造 | |
| US8274138B2 (en) | II-VI semiconductor nanowires | |
| US6835962B2 (en) | Stacked layer structure, light-emitting device, lamp, and light source unit | |
| US20110076841A1 (en) | Forming catalyzed ii-vi semiconductor nanowires | |
| KR101956431B1 (ko) | 발광 다이오드 및 이의 제조 방법 | |
| KR100693129B1 (ko) | pn 접합 GaN 나노막대 LED 제조방법 | |
| JP2009111019A (ja) | 結晶軸配向性とファセット(結晶面)を制御した微結晶構造窒化物半導体光・電子素子 | |
| WO2005076373A1 (fr) | Corps semiconducteur et dispositif semiconducteur l’utilisant | |
| KR100693407B1 (ko) | p형 산화아연 반도체를 이용한 산화아연 단파장 발광소자 제작방법 | |
| RU2392695C1 (ru) | Светодиод белого свечения на основе нитрида элементов iii группы | |
| JP2006261620A (ja) | 固溶半導体発光素子用材料および発光素子 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 11703943 Country of ref document: EP Kind code of ref document: A1 |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 11703943 Country of ref document: EP Kind code of ref document: A1 |