WO2011078512A3 - Etchant and electronic device manufacturing method - Google Patents
Etchant and electronic device manufacturing method Download PDFInfo
- Publication number
- WO2011078512A3 WO2011078512A3 PCT/KR2010/008941 KR2010008941W WO2011078512A3 WO 2011078512 A3 WO2011078512 A3 WO 2011078512A3 KR 2010008941 W KR2010008941 W KR 2010008941W WO 2011078512 A3 WO2011078512 A3 WO 2011078512A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- electronic device
- etchant
- semiconductor layer
- device manufacturing
- transition metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
- C09K13/00—Etching, surface-brightening or pickling compositions
- C09K13/04—Etching, surface-brightening or pickling compositions containing an inorganic acid
- C09K13/08—Etching, surface-brightening or pickling compositions containing an inorganic acid containing a fluorine compound
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Organic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Inorganic Chemistry (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Weting (AREA)
- Thin Film Transistor (AREA)
Abstract
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012545844A JP2013516064A (en) | 2009-12-24 | 2010-12-14 | Etching solution and method for manufacturing electronic device |
| CN201080058576.3A CN102666780B (en) | 2009-12-24 | 2010-12-14 | Etching solution and electronic component manufacturing method |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR20090131253 | 2009-12-24 | ||
| KR10-2009-0131253 | 2009-12-24 | ||
| KR10-2010-0118966 | 2010-11-26 | ||
| KR1020100118966A KR101800803B1 (en) | 2009-12-24 | 2010-11-26 | Etchant and method for preparing electronic device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2011078512A2 WO2011078512A2 (en) | 2011-06-30 |
| WO2011078512A3 true WO2011078512A3 (en) | 2011-10-27 |
Family
ID=44196260
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/KR2010/008941 Ceased WO2011078512A2 (en) | 2009-12-24 | 2010-12-14 | Etchant and electronic device manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| WO (1) | WO2011078512A2 (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6200898B1 (en) * | 1999-10-25 | 2001-03-13 | Vanguard International Semiconductor Corporation | Global planarization process for high step DRAM devices via use of HF vapor etching |
| US20020009833A1 (en) * | 2000-06-15 | 2002-01-24 | Horng-Chih Lin | Thin film transistor with sub-gates and schottky source/drain and a manufacturing method of the same |
| US6753606B2 (en) * | 2000-03-06 | 2004-06-22 | International Business Machines Corporation | Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy |
| US20060027889A1 (en) * | 2004-08-05 | 2006-02-09 | International Business Machines Corporation | Isolated fully depleted silicon-on-insulator regions by selective etch |
-
2010
- 2010-12-14 WO PCT/KR2010/008941 patent/WO2011078512A2/en not_active Ceased
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6200898B1 (en) * | 1999-10-25 | 2001-03-13 | Vanguard International Semiconductor Corporation | Global planarization process for high step DRAM devices via use of HF vapor etching |
| US6753606B2 (en) * | 2000-03-06 | 2004-06-22 | International Business Machines Corporation | Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy |
| US20020009833A1 (en) * | 2000-06-15 | 2002-01-24 | Horng-Chih Lin | Thin film transistor with sub-gates and schottky source/drain and a manufacturing method of the same |
| US20060027889A1 (en) * | 2004-08-05 | 2006-02-09 | International Business Machines Corporation | Isolated fully depleted silicon-on-insulator regions by selective etch |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2011078512A2 (en) | 2011-06-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| WWE | Wipo information: entry into national phase |
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