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WO2010098486A1 - Convertisseur cc-cc - Google Patents

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Publication number
WO2010098486A1
WO2010098486A1 PCT/JP2010/053269 JP2010053269W WO2010098486A1 WO 2010098486 A1 WO2010098486 A1 WO 2010098486A1 JP 2010053269 W JP2010053269 W JP 2010053269W WO 2010098486 A1 WO2010098486 A1 WO 2010098486A1
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WO
WIPO (PCT)
Prior art keywords
voltage
circuit
switching
switching elements
timing
Prior art date
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Ceased
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PCT/JP2010/053269
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English (en)
Japanese (ja)
Inventor
希 丹
彰二 堀内
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Winz Corp
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Winz Corp
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Publication of WO2010098486A1 publication Critical patent/WO2010098486A1/fr
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to a DC-DC converter, and more particularly to an isolated DC-DC converter premised on the use of a power factor correction circuit.
  • a distributed power supply system that converts electric power from a distributed direct current power source, for example, a household fuel cell, a solar power generation system or a wind power generation system into a medium power capacity (0.3 kW to 10 kW) is a power conversion device such as an inverter.
  • a power conversion device such as an inverter.
  • insulation between the input (primary side) and the system (secondary side) is desired. Even if a high-frequency insulation type converter is used in such a power conversion device, there is a problem that efficiency is deteriorated as compared with a non-insulation type converter.
  • Patent Document 1 proposes a highly efficient DC-DC converter.
  • Patent Document 2 discloses a resonant switching power supply that can reduce switching loss by switching a switching element (FET) with zero voltage or zero current (ZVS or ZCS).
  • Patent Document 3 discloses a DC-DC converter that switches a switch of a switching power supply at zero voltage and zero current. Patent Document 3 describes that a current resonance circuit is provided between the switching power supply circuit and the transformer, and the switch of the switching power supply circuit is operated at a frequency near the resonance frequency fr.
  • Patent Documents 4 and 5 describe that not only the switching power supply is provided on the primary side of the transformer, but also the booster circuit provided on the secondary side is formed of switching elements.
  • Japanese Patent No. 3934654 Japanese Patent Application Laid-Open No. 07-274498 Japanese Patent Application Laid-Open No. 07-222444 JP 2005-318757 A Japanese Patent Laid-Open No. 06-311743
  • the DC-DC converters disclosed in Patent Documents 1 to 5 can achieve high efficiency. However, from the viewpoint of small energy, there is a demand for further improvement in the efficiency of an isolated DC-DC converter that can realize a DC-DC conversion with a higher switching efficiency and a higher efficiency. In particular, in a DC-DC converter in which a resonance current circuit is provided on the primary side of a high-frequency transformer and the primary side voltage can be boosted, it is desired that target power can be efficiently supplied according to output side load fluctuations. Yes. In particular, there is a demand for the appearance of a DC-DC converter circuit that is stable and has little loss even when a load change from small power to steady power occurs.
  • an isolated DC-DC converter it is important to improve efficiency in the entire operation range, and a fail-safe function for safety and a communication function as a network power source are becoming more important. Furthermore, in an isolated DC-DC converter, it is required to realize a low-cost digital power source on the premise of using an MPU or the like.
  • the present invention has been made to solve the above problems, and an object thereof is to provide a highly efficient DC-DC converter.
  • DC power is input from a low voltage DC power source including a first switching circuit composed of first switching elements connected to be alternately switched, and the output voltage varies.
  • a voltage resonant circuit that converts and outputs, and An insulated high-frequency transformer having a primary side and a secondary side;
  • a series resonance circuit comprising an inductance connected between the voltage resonance circuit and a first terminal on the primary side of the first transformer, and a capacitor connected in series with the inductance, via the series circuit
  • a rectifier circuit connected to the secondary side of the insulated high-frequency transformer;
  • a smoothing circuit connected to the rectifier circuit;
  • a first driver circuit that maintains voltage resonance in the voltage resonance circuit with a first switching signal that turns on and off the first switching element at a timing when the conduction current is zero and the applied voltage is substantially zero;
  • a control circuit that sets a frequency of the first switching signal depending on an output
  • the primary and secondary switching circuits perform soft switching in the entire operation region, the efficiency becomes high. Further, according to the DC-DC converter of the present invention, since the number of circuit components is small, the size and weight can be reduced, and not only the cost is reduced, but also the reliability against the component failure is improved.
  • a highly efficient DC-DC converter is provided.
  • FIG. 1 is a block diagram schematically showing a DC-DC converter according to an embodiment of the present invention.
  • FIG. 2 is a circuit diagram showing in detail the DC-DC converter shown in FIG.
  • FIG. 3 is a circuit diagram showing a half-bridge circuit according to a modification of the voltage resonance circuit shown in FIG.
  • FIG. 4 is a graph showing the relationship between the frequency of the pulse signal and the input voltage Vin for making the output power output constant in the circuit shown in FIG.
  • FIG. 5A is a graph showing the relationship between the output power and the frequency of a pulse signal that varies the output power output after the input voltage reaches a certain steady state in the circuit shown in FIG.
  • FIG. 5B is a graph showing the relationship between the duty ratio of the pulse signal and the output power in the circuit shown in FIG. FIG.
  • FIG. 6 is a circuit diagram showing a modification of the rectifier circuit shown in FIG.
  • FIG. 7 is a control block diagram for controlling the voltage resonance circuit shown in FIG.
  • FIG. 8 is a flowchart showing a control flow for controlling the voltage resonance circuit shown in FIG.
  • FIG. 9 shows the operation of each part in the DC-DC converter shown in FIG. 1 set to the rated input voltage mode.
  • FIG. 10 shows the operation of each part in the DC-DC converter shown in FIG. 1 set to the rated input voltage mode.
  • FIG. 11 shows the operation of each part in the DC-DC converter shown in FIG. 1 set to the rated input voltage mode.
  • FIG. 12 shows the operation of each part in the DC-DC converter shown in FIG. 1 set to the rated input voltage mode.
  • FIG. 10 shows the operation of each part in the DC-DC converter shown in FIG. 1 set to the rated input voltage mode.
  • FIG. 13 shows the operation of each part in the DC-DC converter shown in FIG. 1 set to the low power mode.
  • FIG. 14 shows the operation of each part in the DC-DC converter shown in FIG. 1 set in the low power mode.
  • FIG. 15 shows the operation of each part in the DC-DC converter shown in FIG. 1 set to the low power mode.
  • FIG. 16 shows the operation of each part in the DC-DC converter shown in FIG. 1 set in the low power mode.
  • FIG. 17 is a circuit diagram showing another modification of the rectifier circuit shown in FIG.
  • FIG. 18 is a circuit diagram showing still another modification of the rectifier circuit shown in FIG.
  • FIG. 1 is a block diagram of an isolated DC-DC converter according to an embodiment of the present invention. If the power factor correction circuit for performing the DC-DC converter and AC-DC conversion shown in FIG. 1 is connected to the input of the DC-DC converter, it can be applied to an AC-DC converter with high power factor and high efficiency. When the output voltage of the power factor correction circuit is about 370 V, the AC input voltage can be globally supported.
  • the DC-DC converter Since the output voltage of this power factor correction circuit becomes the input voltage, the DC-DC converter operates in a range where the input voltage fluctuation is relatively small, and there is no need to control a wide range of input fluctuation, which is different from a normal PWM circuit. Different operating principles can be applied.
  • this converter is a high-frequency insulation type DC-DC converter, and includes a high-frequency transformer T1, input terminals 10A and 10B connected to a DC power source, and a primary side of the high-frequency transformer T1.
  • a voltage resonance circuit 11 that outputs a high-frequency voltage, a leakage inductor L1 included in the high-frequency transformer T1, and a resonance capacitor C8, and generates a current resonance at a certain resonance frequency fr.
  • the synchronous rectifier circuit 13 disposed on the secondary side of the transformer T1 and the smoothing circuit 16 that smoothes the output current from the synchronous rectifier circuit 13 are configured. Output voltages are output from the output terminals 20A and 20B of the smoothing circuit 16. .
  • the resonance frequency fr of the current resonance circuit 14 mainly depends on the inductance of the leakage inductor L1 and the capacitance of the resonance capacitor C8.
  • the leakage inductor L1 in the current resonance circuit 14 the leakage inductor L1 included in the high-frequency transformer T1 may be used, or the inductor L1 may be separately connected to the primary side of the high-frequency transformer T1.
  • the converter shown in FIGS. 1 and 2 includes a drive buffer 17 that controls the voltage resonance circuit 11, a drive buffer 18 that controls the synchronous rectification circuit 13, a reference table 36 that stores a pulse signal corresponding to an operation mode, and a reference.
  • a switching control unit 12 comprising a CPU 30 that outputs a pulse width modulation signal PWM to the drive buffers 17 and 18 with reference to the table 36 is further provided.
  • the voltage resonance circuit 11 arranged on the primary side can be constituted by a full bridge voltage resonance circuit as shown in FIG.
  • the switching element Q1 and the switching element Q3 are connected in series, and the switching element Q2 and the switching element Q4 are connected in series.
  • a series circuit of the switching elements Q1 and Q2 and a series circuit of the switching elements Q3 and Q4 are connected in parallel to the input capacitor C7 and are connected in parallel to the DC power sources on the input sides 10A and 10B so as to form a full bridge circuit. .
  • the input capacitor C7 is connected between the positive side 10A and the negative side 10B of the power source, the drains of the switching elements Q1, Q2 are connected to the positive side 10A of the power source, and the sources of the switching elements Q3, Q4 are the negative side 10B of the power source. It is connected to the. Further, the connection between the switching element Q1 and the switching element Q3 is connected to one end of the output-side transformer T1, and the connection between the switching element Q2 and the switching element Q4 is a leakage inductor or inductor L1 included in the resonance capacitor C8 and the transformer T1. To the other end of the transformer T1.
  • Each of these switching elements Q1 to Q4 is composed of a switching element such as an FET (field effect transistor) or an IGBT (insulated gate / bipolar transistor), and is parasitic between a drain and a source (between an emitter and a collector in the case of IGBT). Capacitors C1 to C4 and parasitic diodes D1 to D4 are provided.
  • the gates of the switching elements Q1 to Q4 are connected to a drive buffer 17 that turns on and off the switching elements Q1 to Q4 at the timing of substantially zero voltage and zero supply current.
  • the voltage at the output terminal 20A is detected as an output voltage signal and input to the CPU 30 via an interface (not shown).
  • the output voltage signal is referred to the reference output voltage stored in the reference table 36 by the CPU 30, and a pulse signal having a switching period and a pulse width corresponding to the reference output voltage is selected.
  • This pulse signal is supplied from the CPU 30 to the drive buffer 17, and a switching signal is output from the drive buffer 17 to the switching elements Q1 to Q4. That is, the switching pulse output from the drive buffer 17 has its frequency and duty ratio (ratio of the on period with respect to the duty cycle) selected according to the output voltage signal, so that each of the switching elements Q1 to Q4 is substantially effective. ON and OFF at the timing of a zero voltage and a zero supply current.
  • the voltage resonance circuit 11 shown in FIGS. 1 and 2 may be a half-bridge voltage resonance circuit (not shown) as shown in FIG.
  • the switching elements Q1 and Q3 in the full-bridge voltage resonance circuit shown in FIG. 2 are removed, a series circuit of the switching elements Q2 and Q4 is connected in parallel to the capacitor C7, and the switching elements Q2 and Q4
  • the connection point is connected to one end of the output-side transformer T1 via the resonant capacitor C8 and the leakage inductor or inductor L1 of the transformer T1, and the input terminal 10B is connected to the other end of the transformer T1.
  • a synchronous rectifier circuit 13 is connected to the secondary side of the transformer T1.
  • a switching element Q6 constituting the synchronous rectifier circuit 13 is connected between the secondary high voltage terminal of the transformer T1 and the ground terminal 20B, and the transformer T1 2
  • a switching element Q5 constituting the synchronous rectifier circuit 13 is connected between the low voltage terminal on the next side and the ground terminal 20B.
  • An output terminal 20A is connected to the intermediate terminal of the transformer T1, and a capacitor C9 of the smoothing circuit 16 is connected between the output terminal 20A and the ground terminal 20B.
  • the switching elements Q5 and Q6 include parasitic capacitors C5 and C6 and parasitic diodes D5 and D6 connected in parallel between the drain (emitter in the case of IGBT) and the source (collector in the case of IGBT), respectively. ing.
  • a driver buffer 18 is connected to the switching elements Q5 and Q6. That is, the drain (emitter in the case of IGBT) of the switching element Q6 is connected to the secondary high-voltage side terminal of the transformer T1, and the source (collector in the case of IGBT) of the switching element Q6 is connected to the ground-side output terminal 20B. Has been.
  • the drain (emitter in the case of IGBT) of the switching element Q5 is connected to the secondary low voltage side terminal of the transformer T1, and the source (collector in the case of IGBT) of the switching element Q5 is connected to the ground side output terminal 20B. It is connected to the.
  • the gates of the switching element Q5 and the switching element Q6 are connected to the drive buffer 18 to turn on and off the switching element Q5 and the switching element Q6 at a predetermined timing, and the output voltage signal Vout is output from the output terminals 20A and 20B.
  • the output voltage detected at the output terminal 20A is input to the CPU 30 as an output voltage signal through an electrically insulating circuit element 32, for example, a photocoupler and an interface (not shown).
  • the CPU 30 refers to the reference table 36 with the input voltage signal input from the input terminal 10A and the output voltage signal output between the output terminals 20A and 20B, and switches the switching element Q5 and the switching element according to each mode described below.
  • the reference table 36 stores the optimum frequency of the pulse signal and the duty ratio of the pulse signal from the relationship shown in FIG. 4 and FIGS. 5A and 5B.
  • a pulse signal selected from the stored table is applied to the switching elements Q5 and Q6, and the synchronous rectification circuit 13 is optimally controlled.
  • FIG. 4 is a graph showing the relationship between the frequency of the pulse signal and the output voltage Vout for making the output power Vout output from the output terminals 20A and 20B constant, and the duty ratio of the pulse signal (the ON period with respect to the duty cycle). It is a graph which shows the relationship between an input voltage and an input voltage. As apparent from FIG.
  • the primary side input voltage of the transformer T1 decreases. Accordingly, the frequency of the pulse signal is lowered to increase the ON time in the voltage resonance circuit 11 functioning as a booster circuit on the secondary side of the transformer T1, and the duty ratio is selected to be large so that the switching elements Q1, Q2, Q3 are selected. , Q4 are set to be long and the OFF period is set to be short so that the boosting ratio in the switching elements Q1, Q2, Q3, and Q4 is increased.
  • the input voltage Vin is high, the primary side input voltage of the transformer T1 is increased.
  • the frequency of the pulse signal is increased in order to shorten the ON time in the voltage resonance circuit 11 functioning as a booster circuit on the secondary side of the transformer T1, and the duty ratio is selected to be small so that the switching elements Q1, Q2, Q3 are selected.
  • Q4 are set to be short and the off period is set to be long so that the step-up ratio in the switching elements Q1, Q2, Q3, Q4 is lowered.
  • 5A and 5B show the frequency of the pulse signal that makes the output power Vout output from between the output terminals 20A and 20B variable after the input voltage reaches a constant steady state and the output power (correlation with the output voltage Vout). And a graph showing a relationship between the duty ratio of the pulse signal (the ratio of the on period to the duty cycle) and the output power (correlated to the output voltage Vout).
  • the duty ratio of the pulse signal the ratio of the on period to the duty cycle
  • the output power correlated to the output voltage Vout
  • the input voltage Vin is constant without depending on the setting of the pulse signal, so that the output voltage Vout is also kept constant. Accordingly, when the frequency of the pulse signal is varied, the output voltage signal Vout output from between the output terminals 20A and 20B is varied. Therefore, the frequency of the pulse signal is varied according to the load connected to the output terminals 20A and 20B, and the output voltage is output from the output terminals 20A and 20B.
  • the frequency of the switching pulse for switching the switching elements Q1 to Q4 of the voltage resonance circuit 11 is variably set within a frequency range lower than the resonance frequency f0 of the current resonance circuit 14, and is from the DC-DC converter. The power supplied to the load is controlled.
  • the emitted current emitted can be controlled.
  • the power (voltage) output from the DC-DC converter can be controlled to reach the target power (target voltage).
  • the switching pulse is turned on / off with a switching pulse having a switching frequency fs higher than the resonance frequency fr.
  • a secondary side resonance current is generated by the primary side resonance current supplied from the resonance current circuit 14 to the primary side of the transformer T1.
  • the switching elements Q5 and Q6 of the synchronous rectifier circuit 13 are turned on / off by a switching pulse in synchronization with the secondary side resonance current. Therefore, the switching pulse for turning on / off the switching elements Q5 and Q6 has an on-time corresponding to a half cycle (half cycle) of the resonance current.
  • the switching elements Q5 and Q6 are driven by switching pulses so as to be switched in synchronization with the switching elements Q1 and Q4 and the switching elements Q2 and Q3, respectively.
  • the synchronous rectifier circuit 13 is not limited to the synchronous rectifier circuit 13 using the intermediate terminal shown in FIG. 1, but may be configured by a bridge synchronous rectifier circuit 13 as shown in FIG. As shown in FIG. 5, in the bridge synchronous rectifier circuit 13, the series circuit of the switching elements Q5 and Q7 and the series circuit of the switching elements Q6 and Q8 are connected in parallel to the capacitor C9, and the connection part of the switching elements Q5 and Q7 Is connected to the secondary high voltage terminal of the transformer T1, and the connection of the switching elements Q6 and Q8 is connected to the secondary low voltage terminal of the transformer T1.
  • a capacitor C9 of the smoothing circuit 16 is connected between the output terminal 20A and the ground terminal 20B.
  • the switching elements Q5, Q6, Q7, Q8 are parasitic capacitors C5, C6, C7, C8 and a parasitic diode connected in parallel between the drain (emitter in the case of IGBT) and the source (collector in the case of IGBT), respectively. D5, D6, D7, and D8 are included.
  • a driver buffer 18 is connected to the switching elements Q5, Q6, Q7, and Q8. More specifically, the drains (collector in the case of IGBT) of switching elements Q5 and Q6 are connected to output terminal 20A, and the sources (emitters in the case of IGBT) of switching elements Q6 and Q8 are connected to ground side output terminal 20B. It is connected.
  • the source of the switching element Q5 (emitter in the case of IGBT) and the drain of the switching element Q7 (collector in the case of IGBT) are connected to the secondary high-voltage side terminal of the transformer T1
  • the source of the switching element Q6 in the case of IGBT
  • the drain in the case of IGBT
  • the drain are connected to the secondary low-voltage side terminal of the transformer T1.
  • the gates of the switching elements Q5, Q6, Q7 and Q8 are connected to the drive buffer 18 to turn on and off the switching elements Q5, Q6, Q7 and Q8 at a predetermined timing, and the output voltage signal Vout is output to the output terminals 20A, 20A, 20B.
  • the output voltage detected at the output terminal 20A is input to the CPU 30 as an output voltage signal through an electrically insulating circuit element 32, for example, a photocoupler and an interface (not shown).
  • the switching elements Q5, Q6, Q7, and Q8 are turned on / off according to each mode by referring to the reference table 36 with the output voltage signal output from between the output terminals 20A, 20B.
  • the duty ratio of the pulse signal (ratio of the on period to the duty cycle) and the frequency are set and the switching elements Q5, Q6, Q7 and Q8 are turned on at the timing of substantially zero current and zero voltage under the optimum conditions.
  • the switching elements Q5 and Q8 and the switching elements Q6 and Q7 are alternately turned on by the switching pulse in synchronization with the secondary side resonance current flowing on the secondary side of the transformer T1.
  • the switching pulses for turning on / off the switching elements Q5, Q6, Q7, and Q8 have an on-time that matches the half cycle (half cycle) of the resonance current.
  • Switching elements Q5 and Q8 and switching elements Q6 and Q7 are driven by switching pulses so as to be switched in synchronization with switching elements Q1 and Q4 and switching elements Q2 and Q3, respectively.
  • the target voltage Vref is input to the CPU 30 by an input device (not shown) as shown in FIG. 7 and output from the rectifier circuit 13 as shown in FIG.
  • the voltage Vout is input through the electrically insulating circuit element 32 as shown in step S2.
  • the target voltage Vref and the output voltage Vout are compared by the CPU 30 as shown in step S3, the reference table 36 is referred to by the difference voltage, and the primary of the transformer T1 is shown in the frequency table in the reference table 36 as shown in step S4.
  • the switching frequencies of the switching elements Q1 to Q4 on the side and the switching elements Q5 to Q6 on the secondary side of the transformer T1 are determined.
  • the CPU 30 determines the ON period (time) of the pulse width modulation signal PWM. Based on the determined frequency and on-period, the CPU 30 operates as a pulse generator as shown in step S7, and a pulse signal (pulse width modulation signal) PWM is supplied to the driver buffer 17 and stored therein. Based on the determined frequency and on-period, the CPU 30 operates as a pulse generator as shown in step S7, and the pulse signal (pulse width modulation signal) PWM is supplied to the driver buffer 18 via the electrical insulation circuit element 34. Is given and stored.
  • the driver buffers 17 and 18 switch the switching elements Q1 to Q4 by applying the first to fourth gate pulses to the primary side switching elements Q1 to Q4 as shown in steps S8 to S11. Similarly, the driver buffers 17 and 18 switch the switching elements Q5 to Q6 by applying fifth and sixth gate pulses to the secondary side switching elements Q5 and Q6 as shown in steps S12 and S13. As a result, as will be described later, a target voltage is output from the smoothing circuit 16.
  • the switching pulse for turning on / off the switching elements Q5, Q6 or the switching elements Q1-Q4 is selected so that the on-time is matched with the half cycle (half cycle) of the resonance current.
  • the target output voltage is first set as shown in FIG. (Step S21)
  • a switching frequency fs serving as a reference corresponding to the target output voltage is set in advance.
  • the primary side switching elements Q1 to Q5 are switched at this switching frequency.
  • the output voltage Vout from the rectifier circuit 13 is detected and compared with the target voltage in step S22.
  • switching is continued at the switching frequency fs.
  • step S24 it is determined whether the output voltage Vout is larger than the target voltage.
  • step S25 When the output voltage Vout is higher than the target voltage, a frequency (fs + ⁇ f ⁇ fr) higher than the set frequency fs is set as shown in step S25, and step S22 is executed again.
  • the frequency (fs + ⁇ f) is set high, the period during which the excitation current flows is reduced, the excitation energy of the reactance L1 is reduced, the primary terminal voltage of the transformer T1 is reduced, and the boosting effect is reduced. As a result, the output voltage Vout is reduced.
  • a frequency (fs ⁇ f ⁇ fr) lower than the set frequency fs is set as shown in step S26, and step S22 is executed again.
  • the secondary side current is rectified (synchronous rectification) in synchronization with the primary side switching, and the secondary side switching elements Q5, Q6 are only in the period when the resonance current is flowing in the resonance circuit 14. Is turned on.
  • the switching frequency fs is determined such that the ON period of the primary side switching elements Q1 to Q4 is larger than the period Tr in which the resonance current flows (Ts> 2Tr). Therefore, in the rated input voltage mode, the excitation energy of the inductance of the transformer T1 is actively used, and the terminal voltage on the primary side of the transformer T1 is boosted.
  • the switching elements Q1 to Q6 are switched by setting the frequency (fs + ⁇ f) higher than that in the rated input voltage mode (fs).
  • the switching frequency is set high until it becomes equal to the period during which the resonance current flows. Therefore, in the resonance circuit 14, the period during which the excitation current flows through the transformer T1 is reduced and the excitation energy is reduced. As a result, the boost of the primary terminal voltage of the transformer T1 is reduced, and the output voltage can be controlled. It becomes possible.
  • the cycle (Ts) is variable, and this variable range can set a maximum cycle longer than 50% with respect to the minimum cycle.
  • the maximum period (Tsmax) with respect to the minimum period (Tsmin) is set too large, the ratio of the current resonance time during which the resonance circuit 14 supplies the output current to the transformer T1 is decreased. Therefore, the resonance current increases and the communication loss increases, and as a result, improvement in efficiency cannot be expected.
  • the maximum period (Tsmax) with respect to the minimum period (Tsmin) is set to a range of 30% or less, and it is desirable to perform frequency control within this range.
  • the excitation energy of the transformer T1 is charged in the resonance capacitor C8, and the voltage appearing at the primary side terminal of the transformer T1 when the charged energy is discharged.
  • the voltage can be boosted by the transformer T1, and the output can be made variable by using discharge energy. Accordingly, the ripple voltage or the fluctuation of the input voltage appearing at the input terminals 10A and 10B is absorbed by the current resonance circuit. As a result, fluctuations in output voltage can be improved.
  • the output voltage of the power factor correction circuit is basically constant, but slightly fluctuates due to ripple voltage or input fluctuation.
  • the DC-DC converter shown in FIGS. 1 and 2 operates with high efficiency because the primary and secondary switching elements Q1 to Q6 are soft-switched in the entire operation region.
  • the size and weight can be reduced, and not only the cost is reduced, but also the reliability against component failure is improved.
  • the drain voltages of the switching elements Q1 and Q4 are gently increased from time t2 to time t3 as shown in FIG. 9B.
  • the drain voltages of the switching elements Q1 and Q4 are zero at the time point t2, the switching elements Q1 and Q4 are switched at zero voltage.
  • the exciting current flowing from the exciting inductance L1 of the transformer T1 corresponds to a reactive current, and the current supplied from the input side (Vin) at time t2 is zero. From this viewpoint, the switching elements Q1 and Q4 are At t2, switching is performed with zero supply current.
  • the other switching elements Q2 and Q3 constituting the bridge circuit are in the OFF state from time t2 to time t3 as shown in FIG. 9D, and the transformers are turned off as the switching elements Q1 and Q4 are turned off.
  • the exciting current flows from the exciting inductance L1 of T1
  • the capacitors C2 and C3 between the drain and source of the switching elements Q2 and Q3 are discharged as shown in FIG. Therefore, the drain voltages of the switching elements Q2 and Q3 are gently lowered from the time point t2 to the time point t3 as shown in FIG.
  • the drain voltages of the switching elements Q2 and Q3 are similarly zero, so that the switching elements Q2 and Q3 are switched at zero voltage.
  • a secondary side voltage boosted with a change in the primary side excitation voltage VT1 appears on the secondary side of the transformer T1.
  • the switching elements Q5 and Q6 are turned off between time t2 and time t3 as shown in FIGS. 11A and 11D, the switching element Q6 is based on the intermediate terminal of the transformer T1.
  • a drain voltage that rises gently as shown in FIG. 11B is applied to the drain of FIG. 11, and a drain voltage that gently decreases as shown in FIG. 11E is applied to the drain of the switching element Q5. Applied.
  • the exciting current iT1 is supplied to the primary side of the transformer T1.
  • the current flowing through the drain between time t3 and time t6 corresponds to the resonance current, and the resonance current is generated in synchronization with the switching elements Q2 and Q3 being turned on. Yes.
  • the period of the resonance current that flows between time t3 and time t6 is set to a half cycle of the ON period of switching elements Q2 and Q3. Further, since the exciting current is used to charge the resonance capacitor C8 between the time point t6 and the time point t9, the voltage of the transformer T1 is gradually decreased.
  • the switching frequency (fs ⁇ fr) is set so that the ON period of the primary side switching elements Q1 to Q4 is larger than the period during which the resonance current flows. Is set. Therefore, in the rated input voltage mode, the excitation energy of the excitation inductor of the transformer T1 is positively used, and the terminal voltage on the primary side of the transformer T1 is boosted.
  • the exciting current iT1 is supplied to the primary side of the transformer T1
  • a boosted voltage is generated on the secondary side of the transformer T1
  • the drain of the switching element Q6 is connected to the drain of the switching element Q6 with reference to the intermediate terminal of the transformer T1.
  • a substantially constant drain voltage is applied.
  • an ON signal is applied to the gate of the applied switching element Q5 to turn on the switching element Q5. Therefore, as shown in FIG. 11 (e).
  • the drain voltage of the switching element Q5 is reduced to substantially zero and a sinusoidal half-wave resonance current flows through the intermediate terminal of the transformer T1, and is synchronized with this resonance current as shown in FIG.
  • a drain current (diode current) flows through the switching element Q5 that is turned on. This diode current is output as an output current I0 from the rectifier circuit 13 as shown in FIG.
  • the gate signal applied to the gate of the applied switching element Q5 is turned off, and the excitation current charges the resonance capacitor C8 between time t6 and time t9.
  • the voltage of the transformer T1 is decreased.
  • the drain voltage of the switching element Q5 is slightly increased from the time point t6 to the time point t9.
  • the voltage charged in the resonance capacitor C8 is opposite to the terminal voltage of the transformer T1 when the diagonal switching elements Q1 and Q4 are turned on at the timing of the time point t10. That is, since the voltage of the resonance capacitor C8 is generated in the addition direction with respect to the input voltage, it is applied to the transformer T1 with the input voltage boosted.
  • the switching frequency (fs ⁇ fr) is set so that the ON period of the primary side switching elements Q1 to Q4 is larger than the period during which the resonance current flows. Is set. Therefore, in the rated input voltage mode, the excitation energy of the excitation inductor of the transformer T1 is positively used, and the terminal voltage on the primary side of the transformer T1 is boosted.
  • a boosted voltage is generated on the secondary side of the transformer T1
  • the drain of the switching element Q5 is connected to the drain of the switching element Q5 with reference to the intermediate terminal of the transformer T1.
  • a substantially constant drain voltage is applied.
  • an ON signal is applied to the gate of the applied switching element Q6 to turn on the switching element Q6.
  • the drain voltage of the switching element Q6 is reduced to substantially zero, and a sinusoidal half-wave resonance current flows through the intermediate terminal of the transformer T1, and is synchronized with this resonance current as shown in FIG.
  • a drain current (diode current) flows through the switching element Q6 that is turned on. This diode current is output as an output current I0 from the rectifier circuit 13 as shown in FIG.
  • the gate signal applied to the gate of the applied switching element Q6 is turned off, and the excitation current charges the resonance capacitor C8 between time t13 and time t16.
  • the voltage of the transformer T1 is decreased.
  • the drain voltage of the switching element Q6 is slightly increased from the time point t13 to the time point t16.
  • one cycle of operation is completed from time t2 to time t16.
  • FIG. 13 (a) to FIG. 16 (g) show the operation of each part in the low power mode with constant input power in the DC-DC converter shown in FIG. The operation of the DC-DC converter shown in FIG. 1 will be described with reference to FIGS. 13 (a) to 16 (g).
  • the drain voltages of the switching elements Q1 and Q4 are gently increased from the time point t2 to the time point t3 as shown in FIG. 13B.
  • the switching elements Q1 and Q4 are switched at zero voltage.
  • the exciting current flowing from the exciting inductance L1 of the transformer T1 corresponds to a reactive current, and the current supplied from the input side (Vin) at time t2 is zero. From this viewpoint, the switching elements Q1 and Q4 are At t2, switching is performed with zero supply current.
  • the other switching elements Q2 and Q3 constituting the bridge circuit are in the OFF state from the time point t2 to the time point t3 as shown in FIG. 13D, and the transformers are turned off as the switching elements Q1 and Q4 are turned off.
  • the exciting current flows from the exciting inductance L1 of T1
  • the capacitors C2 and C3 between the drains and sources of the switching elements Q2 and Q3 are discharged as shown in FIG. Therefore, the drain voltages of the switching elements Q2 and Q3 are gently lowered from the time point t2 to the time point t3 as shown in FIG.
  • the drain voltages of the switching elements Q2 and Q3 are similarly zero, so that the switching elements Q2 and Q3 are switched at zero voltage.
  • a secondary side voltage boosted with a change in the primary side excitation voltage VT1 appears on the secondary side of the transformer T1.
  • the switching elements Q5 and Q6 are turned off between the time point t2 and the time point t3 as shown in FIGS. 15A and 15D, the switching element Q6 is based on the intermediate terminal of the transformer T1.
  • a drain voltage that rises gently as shown in FIG. 15B is applied to the drain of FIG. 15, and a drain voltage that gently decreases as shown in FIG. 15E is applied to the drain of the switching element Q5. Applied.
  • the period of the resonance current that flows between the time point t3 and the time point after the time point t5 is set to a period longer than the half cycle of the ON period of the switching elements Q2 and Q3.
  • the exciting current is used to charge the resonance capacitor C8 from the time point after the time point t5 to the time point t6, the voltage of the transformer T1 is gradually decreased.
  • the voltage charged in the resonant capacitor C8 is opposite to the terminal voltage of the transformer T1 when the diagonal switching elements Q1 and Q4 are turned on at the timing of the time point t7. That is, since the voltage of the resonance capacitor C8 is generated in the addition direction with respect to the input voltage, it is applied to the transformer T1 with the input voltage boosted.
  • the exciting current iT1 is supplied to the primary side of the transformer T1.
  • the current flowing through the drain between time t7 and time t9 corresponds to the resonance current, and the resonance current is generated in synchronization with the switching elements Q1 and Q4 being turned on.
  • the period of the resonance current flowing between the time point t7 and the time point after the time point t9 is set to a period longer than the half cycle of the ON period of the switching elements Q1 and Q4.
  • the exciting current is used to charge the resonant capacitor C8 from the time point after the time point t9 to the time point t10, the voltage of the transformer T1 is gradually reduced.
  • the frequency (fs + ⁇ f) is set higher than the rated input voltage mode fs, and the switching elements Q1 to Q6 are switched.
  • the switching frequency (fs ⁇ fr) is set high until it becomes equal to the period during which the resonance current flows. Therefore, in the resonance circuit 14, the period during which the exciting current flows through the leakage inductor L1 is reduced and the excitation energy is reduced. As a result, the boosting of the primary side terminal voltage of the transformer T1 is reduced, and the output voltage is controlled. Is possible.
  • a boosted voltage is generated on the secondary side of the transformer T1
  • the drain of the switching element Q5 is connected to the drain of the switching element Q5 with reference to the intermediate terminal of the transformer T1.
  • a substantially constant drain voltage is applied.
  • an ON signal is applied to the gate of the applied switching element Q6 to turn on the switching element Q6.
  • the drain voltage of the switching element Q6 is reduced to substantially zero and a sinusoidal half-wave resonance current flows through the intermediate terminal of the transformer T1, and is synchronized with the resonance current as shown in FIG.
  • a drain current (diode current) flows through the switching element Q6 that is turned on. This diode current is output as an output current I0 from the rectifier circuit 13 as shown in FIG.
  • the gate signal applied to the gate of the applied switching element Q6 is turned off, and the excitation current charges the resonance capacitor C8 between time t10 and time t11.
  • the voltage of the transformer T1 is decreased.
  • the drain voltage of the switching element Q6 is slightly increased from the time point t10 to the time point t11.
  • the voltage charged in the resonant capacitor C8 is opposite to the terminal voltage of the transformer T1 when the diagonal switching elements Q2 and Q3 are turned on at the time t11. That is, since it is in the addition direction with respect to the input voltage, it can be applied to the transformer T1 in a state where the input voltage is boosted.
  • one cycle of operation is completed from time t2 to time t11.
  • the switching elements used on the input / output sides (primary and secondary sides) of the isolation transformer are all controlled by soft switching, a highly efficient DC -It can be a DC converter.
  • the leakage inductance of the transformer is used as the resonance reactor. Therefore, although it is a high-efficiency DC-DC converter, it is possible to realize low cost without requiring individual components.
  • leakage inductance has a large individual difference and variation in the value of the resonance frequency, but since switching control is performed by software, individual adjustment values can be recorded, and ideal resonance and control can be realized. . Further, since the switching element is controlled by lowering the switching frequency, the loss in switching or the core loss of the transformer can be reduced, and higher efficiency can be realized.
  • 1 employs a center tap rectification method, but a bridge rectification circuit method may be employed as will be described later. 1 uses the rectification action of the diodes D5 and D6 of the switching elements Q5 and Q6, the switching elements Q5 and Q6 may be replaced with the rectification diodes D5 and D6.
  • the synchronous rectifier circuit 13 may be configured as the intermediate tap rectifier circuit 13 with diodes D5 and D6 as shown in FIG. 17 instead of the switching elements Q5 and Q6 shown in FIG.
  • the bridge rectifier circuit 13 may be constituted by diodes D5 to D8 as shown in FIG.
  • the rectifier circuit 13 constituted by diodes D5 and D6 instead of the switching elements Q5 and Q6 shown in FIG. 17
  • the rectifier circuit 13 constituted by diodes D5 to D8 instead of the switching elements Q5 to Q8 shown in FIG.
  • the circuit Since D5, D6 or the diodes D5 to D8 are automatically turned off as the voltage decreases, the circuit operates in the same manner as the circuit employing the switching elements Q5, Q6 or the switching elements Q5 to Q8. However, since the power consumed in the synchronous rectifier circuit 13 is generated as compared with the case where the switching elements Q5, Q6 or the switching elements Q5 to Q8 are forcibly turned off, the synchronous rectifier circuit 13 includes the switching elements Q5, Q6 or It is preferable to configure with switching elements Q5 to Q8.
  • a rectifier diode D6 constituting the synchronous rectifier circuit 13 is connected between the secondary high voltage terminal of the transformer T1 and the ground terminal 20B, and the secondary side of the transformer T1
  • a rectifier diode D5 constituting the synchronous rectifier circuit 13 is connected between the low voltage terminal and the ground terminal 20B.
  • An output terminal 20A is connected to the intermediate terminal of the transformer T1
  • a capacitor C9 of the smoothing circuit 16 is connected between the output terminal 20A and the ground terminal 20B.
  • the cathode of the rectifier diode D6 is connected to the secondary high-voltage side terminal of the transformer T1, and the anode of the rectifier diode D6 is connected to the ground-side output terminal 20B.
  • the cathode of the rectifier diode D5 is connected to the secondary low-voltage side terminal of the transformer T1, and the anode of the rectifier diode D5 is connected to the ground-side output terminal 20B.
  • a series circuit of rectifier diodes D5 and D7 and a series circuit of rectifier diodes D6 and D8 are connected in parallel to the capacitor C9, and the rectifier diodes D5 and D7 are connected.
  • the connecting portion is connected to the secondary high voltage terminal of the transformer T1
  • the connecting portion of the rectifier diodes D6 and D8 is connected to the secondary low voltage terminal of the transformer T1.
  • a capacitor C9 of the smoothing circuit 16 is connected between the output terminal 20A and the ground terminal 20B.
  • a highly efficient DC-DC converter is provided.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

L'invention porte sur un convertisseur CC-CC qui comprend un transformateur d'isolement haute fréquence, et un circuit résonant série composé d'une bobine d'induction et d'un condensateur est connecté entre un circuit de résonance en tension, qui est composé d'un circuit de commutation, et la borne côté primaire d'un premier transformateur. Sur le côté secondaire du transformateur d'isolement haute fréquence, un circuit de redressement et un circuit de lissage sont connectés. Ce circuit de résonance en tension est commuté au moyen des premiers signaux de commutation, et la fréquence des premiers signaux de commutation est réglée plus haute que la fréquence de référence lorsque la tension de sortie est supérieure à une tension cible, et est réglée plus basse que la fréquence de référence lorsque la tension de sortie est inférieure à la tension cible.
PCT/JP2010/053269 2009-02-27 2010-03-01 Convertisseur cc-cc Ceased WO2010098486A1 (fr)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101976952A (zh) * 2010-10-08 2011-02-16 刘闯 光伏发电系统的串联谐振dc/dc变换器
CN103441684A (zh) * 2013-09-13 2013-12-11 刘闯 波动电能回收的高精度dc/dc变换器
JP2020202645A (ja) * 2019-06-10 2020-12-17 新電元工業株式会社 コンバータ及びコンバータの制御方法
JP2020202644A (ja) * 2019-06-07 2020-12-17 新電元工業株式会社 コンバータ
CN112673561A (zh) * 2018-09-13 2021-04-16 日产自动车株式会社 电力变换装置以及电力变换装置的控制方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06311743A (ja) * 1993-04-23 1994-11-04 Sanken Electric Co Ltd Ｄｃ−ｄｃコンバータ
JPH07274498A (ja) * 1994-03-31 1995-10-20 Sanken Electric Co Ltd 共振型スイッチング電源
JP2006204048A (ja) * 2005-01-24 2006-08-03 Shindengen Electric Mfg Co Ltd 直列共振形コンバータ

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06311743A (ja) * 1993-04-23 1994-11-04 Sanken Electric Co Ltd Ｄｃ−ｄｃコンバータ
JPH07274498A (ja) * 1994-03-31 1995-10-20 Sanken Electric Co Ltd 共振型スイッチング電源
JP2006204048A (ja) * 2005-01-24 2006-08-03 Shindengen Electric Mfg Co Ltd 直列共振形コンバータ

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101976952A (zh) * 2010-10-08 2011-02-16 刘闯 光伏发电系统的串联谐振dc/dc变换器
CN103441684A (zh) * 2013-09-13 2013-12-11 刘闯 波动电能回收的高精度dc/dc变换器
CN112673561A (zh) * 2018-09-13 2021-04-16 日产自动车株式会社 电力变换装置以及电力变换装置的控制方法
CN112673561B (zh) * 2018-09-13 2024-05-31 日产自动车株式会社 电力变换装置以及电力变换装置的控制方法
JP2020202644A (ja) * 2019-06-07 2020-12-17 新電元工業株式会社 コンバータ
JP7329971B2 (ja) 2019-06-07 2023-08-21 新電元工業株式会社 コンバータ
JP2020202645A (ja) * 2019-06-10 2020-12-17 新電元工業株式会社 コンバータ及びコンバータの制御方法
JP7329972B2 (ja) 2019-06-10 2023-08-21 新電元工業株式会社 コンバータ及びコンバータの制御方法

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