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WO2009128142A1 - Appareil d’enregistrement et de lecture d’informations - Google Patents

Appareil d’enregistrement et de lecture d’informations Download PDF

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Publication number
WO2009128142A1
WO2009128142A1 PCT/JP2008/057365 JP2008057365W WO2009128142A1 WO 2009128142 A1 WO2009128142 A1 WO 2009128142A1 JP 2008057365 W JP2008057365 W JP 2008057365W WO 2009128142 A1 WO2009128142 A1 WO 2009128142A1
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WO
WIPO (PCT)
Prior art keywords
recording layer
layer
recording
central portion
reproducing apparatus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/057365
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English (en)
Japanese (ja)
Inventor
塚本　隆之
親義 鎌田
豪 山口
隆大 平井
伸也 青木
久保　光一
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Toshiba Corp
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Toshiba Corp
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Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to PCT/JP2008/057365 priority Critical patent/WO2009128142A1/fr
Priority to JP2010508057A priority patent/JP5300839B2/ja
Priority to TW098112393A priority patent/TWI404203B/zh
Publication of WO2009128142A1 publication Critical patent/WO2009128142A1/fr
Priority to US12/889,558 priority patent/US8288748B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0009—RRAM elements whose operation depends upon chemical change
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H10B63/84—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/021—Formation of switching materials, e.g. deposition of layers
    • H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/061—Shaping switching materials
    • H10N70/063—Shaping switching materials by etching of pre-deposited switching material layers, e.g. lithography
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H10N70/245—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies the species being metal cations, e.g. programmable metallization cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/841—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/72—Array wherein the access device being a diode

Definitions

  • the present invention relates to a nonvolatile semiconductor random storage device having a large capacity.
  • NAND flash memory and small HDD hard disk drive
  • a PRAM phase change memory
  • an amorphous state is created by applying a high power pulse to the recording material, and a crystalline state is created by applying a small power pulse to the recording material.
  • Reading is performed by passing a small read current that does not cause writing / erasing to the recording material and measuring the electrical resistance of the recording material.
  • the resistance value of the recording material in the amorphous state is larger than the resistance value of the recording material in the crystalline state, and the difference is about 10 3 .
  • a typical example of a recording material for recording data is nickel oxide, and a high power pulse and a small power pulse are used for writing / erasing as in the case of PRAM.
  • the power consumption at the time of writing / erasing is smaller than that of the PRAM.
  • an information recording / reproducing apparatus having high repetition stability is provided.
  • a recording layer capable of reversibly transitioning between a first state having a low resistance and a second state having a high resistance by a supplied current, and a peripheral portion of the recording layer includes:
  • the information recording / reproducing apparatus is characterized by having a composition different from that of the central portion.
  • an information recording / reproducing apparatus having high repetition stability can be provided.
  • FIG. 1 is a diagram showing an example of an information recording / reproducing apparatus according to the present invention.
  • FIG. 2 is a diagram showing an example of a cross section of the recording layer according to the present invention.
  • FIG. 3 is a diagram showing an example of a cross section of the recording layer according to the present invention.
  • FIG. 4 is a diagram showing an example of a cross section of the recording layer according to the present invention.
  • FIG. 5 is a diagram showing an example of a cross section of the recording layer according to the present invention.
  • FIG. 6 is a diagram showing an example of a cross section of the recording layer according to the present invention.
  • FIG. 7 is a diagram showing an example of a cross section of the recording layer according to the present invention.
  • FIG. 1 is a diagram showing an example of an information recording / reproducing apparatus according to the present invention.
  • FIG. 2 is a diagram showing an example of a cross section of the recording layer according to the present invention.
  • FIG. 3 is a diagram showing an example of
  • FIG. 8 is a diagram showing an example of a recording layer manufacturing method according to the present invention.
  • FIG. 9 is a diagram showing a cross-section in one step of the recording layer manufacturing method according to the present invention.
  • FIG. 10 is a diagram showing a cross-section in one step of the recording layer manufacturing method according to the present invention.
  • FIG. 11 is a diagram showing an example of a plane of the recording layer according to the present invention.
  • FIG. 12 is a diagram showing a semiconductor memory according to an example of the present invention.
  • FIG. 13 is a diagram illustrating an example of a memory cell array structure of a semiconductor memory.
  • FIG. 14 is a diagram illustrating an example of a memory cell array structure of a semiconductor memory.
  • FIG. 15 is a diagram illustrating an example of a memory cell array structure of a semiconductor memory.
  • FIG. 1 shows an example of the structure of a memory cell included in the information recording / reproducing apparatus according to the present invention.
  • 1A and 1B show examples of the planar shape of the memory cell
  • FIG. 1C shows an example of a cross section taken along the line II in FIGS. 1A and 1B. .
  • the recording layer 13 includes a central portion 13A and a peripheral portion 13B.
  • the first and second barrier layers 12 and 14 may be electrode layers.
  • these electrode layers are provided above and below the recording layer 13 and provide electrical connection to the recording layer 13, such as a barrier layer or a conductive layer having a function as a barrier layer. It shall mean that.
  • the rectifying element 11 has a rectifying characteristic and is provided to give directionality to the polarity of the potential difference between the bit line 10 and the word line 15.
  • the first barrier layer 12 and the second barrier layer 14 are provided above and below the recording layer 13 and provide electrical connection to the recording layer 13. Further, the first barrier layer 12 and the second barrier layer 14 may have a function as a barrier layer for preventing diffusion of elements between the recording layer 13 and its upper and lower components, for example. .
  • the rectifying element 14 for example, a Zener diode, a PN junction diode, a Schottky diode, a MIM (metal-insulator-metal) element, or the like can be used. It is desirable that the rectifying element 14 has a resistance value in a non-selected state (off) of 10 times or more of a resistance value in a selected state (on).
  • the central portion 13A of the recording layer is a composite compound having at least two kinds of cation elements, and at least one of the cation elements is deficiently filled with electrons. It is good also as a 1st compound which is a transition element which has an orbit, and the shortest distance between the said adjacent cation elements is 0.32 nm or less.
  • a 1st compound which is a transition element which has an orbit
  • the shortest distance between the said adjacent cation elements is 0.32 nm or less.
  • the peripheral portion 13B of the recording layer is a region in which the amount of one cation element is reduced from the two kinds of cation elements contained in the central portion 13A of the recording layer.
  • a small white circle in the recording layer 13 represents a first cation, and a large white circle represents an anion (oxygen ion).
  • a small black circle represents a second cation.
  • the initial state of the recording layer 13A is an insulator (high resistance state), and for recording, the recording layer 13A is phase-shifted by a potential gradient to make the recording layer 13A conductive (low). Resistance state). This will be described with reference to FIG.
  • bit line 10 is set to a fixed potential (for example, ground potential), a negative potential may be applied to the word line 15.
  • the first cation in the recording layer 13A moves to the second barrier layer 14 (cathode) side, and the first cation in the recording layer (crystal) 13A is relatively relative to the anion. Decrease.
  • the first cations that have moved to the second barrier layer 14 side receive electrons from the second barrier layer 14 and precipitate as metal, thereby forming the metal layer 17.
  • the recording layer 13A In the recording layer 13A, anions become excessive, and as a result, the valence of transition element ions (first cation or second cation) in the recording layer 13A is increased. That is, since the recording layer 13A has electron conductivity due to carrier injection, recording (set operation) is completed.
  • Reproduction can be easily performed by flowing a current pulse through the recording layer 13 and detecting the resistance value of the recording layer 13.
  • the current pulse needs to be a minute value that does not cause a change in resistance of the material constituting the recording layer 13A.
  • the above process is a kind of electrolysis, and an oxidizing agent is generated by electrochemical oxidation on the first barrier layer (anode) 12 side, and a reducing agent is generated by electrochemical reduction on the second barrier layer 14 side. Can be considered.
  • the recording layer 13 is Joule-heated by a large current pulse to promote the oxidation-reduction reaction of the recording layer 13A. Good. That is, the recording layer 13A returns to the insulator due to the residual heat after the interruption of the large current pulse (reset operation).
  • the reset operation can be performed by applying an electric field in the opposite direction to the set time. That is, if the bit line 10 is set to a fixed potential as in the setting, a positive potential may be applied to the word line 15. Then, in addition to the oxidation-reduction reaction by Joule heat, the metal layer in the vicinity of the second barrier layer 14 is oxidized to become the first cation, and returns to the host structure due to the potential gradient in the recording layer 13A. As a result, the transition element ion whose valence has increased is reduced to the same value as before the setting, and thus returns to the initial insulator. In order to apply the reverse electric field, for example, when a pn junction diode is used, Zener breakdown is used.
  • the former can be dealt with by setting the valence of the first cation to 2 or more.
  • the first cation is monovalent such as Li ion
  • sufficient ion migration resistance cannot be obtained in the set state, and the first cation element is immediately transferred from the metal layer 17 to the recording layer 13A. Will return to. In other words, a sufficiently long retention time cannot be obtained.
  • the first cation is trivalent or higher, the voltage required for the set operation increases, and in the worst case, it may cause crystal collapse.
  • the information recording / reproducing apparatus it is preferable for the information recording / reproducing apparatus that the first cation has a valence of two.
  • the layer of the first cation element is disposed in the direction connecting the electrodes.
  • the c-axis is preferably arranged in parallel with the recording layer.
  • the a-axis is arranged in parallel with the recording layer. Preferably it is.
  • the following materials may be mentioned as the first compound that can easily change resistance with low power consumption.
  • a spinel structure represented by A x M y X 4 (0.1 ⁇ x ⁇ 2.2,1.5 ⁇ y ⁇ 2).
  • a and M are different elements, and at least one of them is a transition element having a d orbital incompletely filled with electrons.
  • X is an element containing at least one selected from the group consisting of O (oxygen) and N (nitrogen).
  • A is Na, K, Rb, Be, Mg, Ca, Sr, Ba, Al, Ga, Mn, Fe, Co, Ni, Cu, Zn, S, P, S, Se, Ge, Ag, Au, Cd. , Sn, Sb, Pt, Pd, Hg, Tl, Pb, Bi. At least one element selected from the group.
  • A is preferably at least one element selected from the group consisting of Mg, Mn, Fe, Co, Ni, Zn, Cd, and Hg. This is because, when these elements are used, the ionic radius for maintaining the crystal structure is optimal, and the ion mobility can be sufficiently secured. Further, it becomes easy to control the valence of ions to be divalent.
  • A is more preferably at least one element selected from Zn, Cd, and Hg. This is because the use of these elements facilitates the movement of cations.
  • M is at least one element selected from the group consisting of Al, Ga, Ti, Ge, Sn, V, Cr, Mn, Fe, Co, Ni, Nb, Ta, Mo, W, Re, Ru, and Rh. is there.
  • M is at least one element selected from the group consisting of Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Mn, Re, Fe, Co, Ni, Al, and Ga. Is preferred. This is because the use of these elements makes it easier to control the electronic state in the crystal.
  • M is more preferably at least one kind of transition element selected from the group of Cr, Mo, W, Mn, and Re (referred to as “group 1” for convenience). This is because when these elements are used, the matrix structure is stably maintained, so that switching can be stably repeated.
  • M includes at least one element selected from the group of Fe, Co, Ni, Al, and Ga in addition to the transition element of group 1. This is because when these elements are used in place of some of the elements of group 1, switching can be repeated more stably by maintaining the host structure more stably.
  • a delafossite structure represented by A x M y X 2 (0.1 ⁇ x ⁇ 1.1,0.9 ⁇ y ⁇ 1.1).
  • a and M are different elements, and at least one of them is a transition element having a d orbital incompletely filled with electrons.
  • X is an element containing at least one selected from the group consisting of O (oxygen) and N (nitrogen).
  • A is at least one element selected from the group of Li, Na, Be, Mg, Ca, Cu, Ag, Au, Pt, Pd, Rh, Hg, and Tl.
  • A is more preferably at least one element selected from the group consisting of Mg, Mn, Fe, Co, Ni, Cu, Ag, and Zn. This is because, when these elements are used, the ionic radius for maintaining the crystal structure is optimal, and the ion mobility can be sufficiently secured. Further, it becomes easy to control the coordination number to 2.
  • A is preferably at least one element selected from the group of Cu and Ag. This is because when these elements are used, a delafossite structure can be easily obtained.
  • M is Al, Ga, Sc, In, Y, La, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Tb, Lu, Ti, Ge, Sn, V, Cr, Mn , Fe, Co, Ni, Nb, Ta, Mo, W, Ru, Rh, and Pd. More preferably, M is at least one element selected from the group consisting of Y, Sc, V, Cr, Mn, Fe, Co, Ni, Al, and Ga. This is because the use of these elements makes it easier to control the electronic state in the crystal.
  • M is at least one element selected from the group of Fe, Co, and Al. This is because when these elements are used, a delafossite structure can be easily obtained.
  • a wolframite structure represented by A x M y X 4 (0.5 ⁇ x ⁇ 1.1, 0.7 ⁇ y ⁇ 1.1).
  • a and M are different elements, and at least one of them is a transition element having a d orbital incompletely filled with electrons.
  • X is an element containing at least one selected from the group consisting of O (oxygen) and N (nitrogen).
  • A is Na, K, Rb, Be, Mg, Ca, Sr, Ba, Al, Ga, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Si, P, S, Se, Ge , Ag, Au, Cd, Sn, Sb, Pt, Pd, Hg, Tl, Pb, Bi.
  • A is preferably at least one element selected from the group consisting of Ti, V, Mn, Fe, Co, and Ni. This is because, when these elements are used, the ionic radius for maintaining the crystal structure is optimal, and the ion mobility can be sufficiently secured. Further, it becomes easy to control the valence of ions to be divalent.
  • A is more preferably at least one element selected from the group consisting of Mn, Fe, Co, and Ni. This is because the use of these elements can easily cause a resistance change.
  • M is at least one element selected from the group of V, Nb, Ta, Cr, Mn, Mo, W.
  • M is at least one element selected from the group of Cr, Mo, W. This is because when these elements are used, a wolframite structure can be easily obtained.
  • a and M are different elements, and at least one of them is a transition element having a d orbital incompletely filled with electrons.
  • X is an element containing at least one selected from the group consisting of O (oxygen) and N (nitrogen).
  • A is Na, K, Rb, Be, Mg, Ca, Sr, Ba, Al, Ga, Mn, Fe, Co, Ni, Cu, Zn, Si, P, S, Se, Ge, Ag, Au, Cd. , Sn, Sb, Pt, Pd, Hg, Tl, Pb, Bi.
  • A is preferably at least one element selected from the group consisting of Mg, Mn, Fe, Co, Ni and Zn. This is because, when these elements are used, the ionic radius for maintaining the crystal structure is optimal, and the ion mobility can be sufficiently secured. Further, it becomes easy to control the valence of ions to be divalent.
  • A is more preferably at least one element selected from the group of Fe and Ni. This is because when these elements are used, an ilmenite structure can be easily obtained.
  • M is at least one element selected from the group of Al, Ga, Ti, Ge, Sn, V, Cr, Mn, Fe, Co, Ni, Nb, Ta, Mo, W, Re, Ru, and Rh. is there.
  • M is more preferably at least one element selected from the group consisting of Ti, Zr, Hf, V, Nb, Ta, Cr, Mn, Fe, Co, and Ni. This is because the use of these elements makes it easier to control the electronic state in the crystal.
  • M is preferably at least one element selected from the group of Ti, Zr, Hf, V. This is because when these elements are used, an ilmenite structure can be easily obtained.
  • the barrier layer is required to have a function of preventing reaction with the recording layer, preventing diffusion of constituent elements of the recording layer, and electrically joining the recording layer and the adjacent layer.
  • the electrode layer is preferably formed from a material having no ion conductivity such as Ag or Cu.
  • the main point is to exclude materials having ion conductivity.
  • materials having ion conductivity For example, Ag, Cu, and the like are widely known as materials having ion conductivity.
  • EDX energyersdispersive X-ray fluorescence spectrometer
  • Examples of materials suitably used for the barrier layer include those shown below.
  • ⁇ MN M is at least one element selected from the group consisting of Ti, Zr, Hf, V, Nb, Ta, Mo, and W.
  • N is nitrogen.
  • ⁇ MO x M is selected from the group of Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Hf, Ta, W, Re, Ir, Os, Pt At least one element.
  • the molar ratio x shall satisfy 1 ⁇ x ⁇ 4.
  • ⁇ AMO 3 A is at least one element selected from the group consisting of La, K, Ca, Sr, Ba, and Ln (Lanthanide).
  • M is selected from the group of Ti, V, Cr, Mn, Fe, Co, Cu, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Hf, Ta, W, Re, Ir, Os, Pt At least one element.
  • O is oxygen
  • a 2 MO 4 A is at least one element selected from the group of K, Ca, Sr, Ba, and Ln (Lanthanide).
  • M is selected from the group of Ti, V, Cr, Mn, Fe, Co, Cu, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Hf, Ta, W, Re, Ir, Os, Pt At least one element.
  • O is oxygen
  • the A ions diffuse to the insulating film material 16 side, and the materials contained in the recording layer and the insulating film may diffuse.
  • a barrier layer for preventing diffusion may be provided in advance between the first compound contained in the recording layer and the insulating film.
  • the peripheral portion 13B of the recording layer is formed for such a purpose and preferably has the following characteristics.
  • the A ions When A ions are present in the peripheral portion of the recording layer, the A ions are likely to diffuse into the insulating film material. Therefore, the A ions have a cation ratio with respect to B ions in the peripheral portion of the recording layer, and a cation ratio in the central portion. It is preferable that it is significantly smaller than. In this case, it is preferable that the cation ratio at the central portion of the recording layer is about 1/3 or less because the diffusion of A ions hardly occurs. (See Figure 2) Further, as shown in FIG. 3, the peripheral portion of the recording layer may have a different crystal structure from the central portion of the recording layer.
  • the first compound having a crystal structure in which the diffusion path of A ions is formed in a linear shape is preferable in the central portion of the recording layer, but the crystal structure in which the diffusion path is not formed in a linear shape in the peripheral portion of the recording layer. It is preferable that it is the 3rd compound which has. In this case, the first compound and the third compound may be mixed in the peripheral portion, which is the same as the central portion of the recording layer.
  • the cation volume density of B ions is improved. Since B ions have a higher valence than A ions, they are less likely to diffuse due to repulsion due to Coulomb force. Accordingly, when the volume density of B ions in the peripheral portion increases, atomic mixing is unlikely to occur between the recording layer and the insulating film.
  • the average distance between B ions may be small. This is also because the diffusion of A ions hardly occurs in this case.
  • the A ions are divalent or less and the A ions are likely to diffuse in the central portion of the recording layer, it is preferable that the A ions decrease in the peripheral portion of the recording layer.
  • the B ions are trivalent or more and difficult to diffuse in the central portion of the recording layer, it is preferable that the B ions increase in the peripheral portion of the recording layer.
  • the width of the peripheral portion of the recording layer is preferably about 1 nm to 5 nm.
  • the peripheral portion of the recording layer is 1/3 or less of the central portion of the recording layer. This is because, as a result of considering the change in the diffusion coefficient of A ions and the total amount of A ions, if the amount is 1/3 or less, the diffusion amount of A ions can be kept sufficiently small.
  • the peripheral portion of the recording layer may contain a third cation that is not included in the central portion of the recording layer.
  • the A ions that easily diffuse in the central portion of the recording layer are selected so that the ion radius is optimized and diffusion is likely to occur.
  • ions having a large ion radius are formed as A2 ions in the peripheral portion of the recording layer. If it is included, it becomes possible to prevent the A ions left in the central portion of the recording layer from diffusing into the insulating film material through the peripheral portion of the recording layer.
  • the A2 ion for example, Sr, Ba, Cd, Hg, La (lanthanoid) or the like can be used.
  • the peripheral part of the recording layer has the same crystal structure as the central part of the recording layer and the A2 ion occupies the position occupied by the A ion in the central part of the recording layer, the diffusion of A ions It is possible to cut off the path.
  • the volume of the periphery of the recording layer may change. Therefore, even when the recording layer is etched so as to be flat with the wall surfaces of the first barrier layer and the second barrier layer, the wall surface of the peripheral portion of the recording layer is flat with the wall surfaces of the first barrier layer and the second barrier layer. It may disappear.
  • the edge of the peripheral part of the recording layer is the interface between the B ions contained in the central part of the recording layer and the insulating film material. In general, this interface can be determined with an accuracy of about 1 nm.
  • FIG. 8 is a flowchart for illustrating Manufacturing Method Example 1.
  • 9 and 10 are schematic process cross-sectional views for illustrating Manufacturing Method Example 1. FIG. Hereinafter, a description will be given with reference to FIGS. 9 and 10.
  • a Si substrate protected by a thermal oxide film is planarized by using, for example, CMP (Chemical Mechanical Polishing) to form a substrate 21.
  • CMP Chemical Mechanical Polishing
  • a first wiring 10 (bit line) made of a conductive material is deposited on the substrate 21.
  • a metal such as W, Ta, Al, or Cu or an alloy thereof, a metal silicide, a nitride or carbide such as TiN or WC, or a highly doped silicon layer can be used.
  • the rectifying element 11 is deposited on the first wiring 10.
  • the rectifying element 11 is made of a diode, for example.
  • a semiconductor layer such as Si, Ge, or GaAs is provided.
  • the semiconductor layer is typically a polycrystalline silicon layer, but may be an amorphous layer.
  • a semiconductor layer for example, an n-type semiconductor layer that is lightly doped with a dopant (for example, n-type) opposite to this is provided.
  • a diode layer is formed.
  • a first barrier layer 12 is deposited on the rectifying element 11.
  • the material mentioned above is mentioned.
  • a recording layer 13 is deposited on the first barrier layer 12.
  • various materials can be used as the recording layer 13, but here, for example, the recording layer 13 made of ZnCr 2 O 4 having a spinel structure is deposited.
  • a deposition method for example, using a raw material (target) whose composition is adjusted so that ZnCr 2 O 4 is deposited, a temperature of 300 to 600 ° C., Ar (argon) 95%, O 2 (oxygen) 5% In this atmosphere, RF magnetron sputtering (radio frequency magnetron sputter) is performed to form ZnCr 2 O 4 having a thickness of about 20 nm.
  • the first barrier layer 12 is a layer having large crystal grains and the ratio of the lattice constant of the first barrier layer 12 to the lattice constant of the first compound 12A in the recording layer 13 is close to an integer, the crystal grains It is easy to obtain a large and oriented first compound 12A.
  • (110) -oriented TiN is used as the first barrier layer 12
  • the ratio of the lattice constant to the (110) -oriented spinel structure is almost an integer, so that the recording layer 13 is (110) -oriented.
  • a spinel structure is easily obtained.
  • a second barrier layer 14 is deposited on the recording layer 13.
  • Examples of the material of the second barrier layer 14 include the materials described above.
  • a mask material 18 is deposited on the second barrier layer 14.
  • a noble metal such as Pt can be used.
  • etching is performed along the first direction (X direction) by a pattern having a predetermined dimension, for example, by RIE (Reactive Ion Etching). Etching is performed to the depth of the interface between the substrate 21 and the first wiring 10. In this way, the first wiring 10, the rectifying element 11, the first barrier layer 12, the recording layer 13, and the second barrier layer 14 are patterned.
  • RIE Reactive Ion Etching
  • the processed body is oxidized.
  • the vicinity of the side surface of the recording layer 13 is oxidized.
  • the recording layer 13 when viewed from the X direction, structure 13A of the inner to the recording layer in the main surface: ZnCr has 2 O 4, Cr and Zn in the outer A region consisting of configuration 13B with a reduced ratio to.
  • the oxidation treatment is performed by heating the atmospheric temperature to about 300 degrees, it becomes easy to greatly change the ratio of the number of ions in the outer region, and a region containing a large amount of Cr 2 O 3 is formed.
  • an insulating material is deposited in the space generated by the etching, for example, by CVD (Chemical Vapor Deposition) to form the inter-element insulating layer 16.
  • CVD Chemical Vapor Deposition
  • planarization is performed by CMP, for example, so that the second barrier layer 14 is exposed.
  • a second wiring 15 made of a conductive material is uniformly deposited on the processed body.
  • a metal such as W, Ta, Al, or Cu or an alloy thereof, a metal silicide, a nitride or carbide such as TiN or WC, or a highly doped silicon layer can be used.
  • FIG. 10B corresponds to a cross-sectional view taken along the line AA in FIG.
  • etching is performed, for example, by RIE along the second direction (Y direction) with a pattern having a predetermined dimension. Etching is performed to the depth of the interface between the first wiring 10 and the rectifying element 11. In this manner, the rectifying element 11, the first barrier layer 12, the recording layer 13, the second barrier layer 14, and the second wiring 15 are patterned.
  • the recording layer 13 has the recording layer configuration 13 ⁇ / b> A: ZnCr 2 O 4 on the inner side in the main surface, as viewed from the Y direction, and Zn Cr on the outer side.
  • an insulating material is deposited by, for example, CVD in a space generated by etching, and the inter-element insulating layer 16 is formed. Thereby, the principal part of the cross-point type information recording / reproducing apparatus according to the specific example 1 is formed.
  • FIG. 11 is a plan view of an information recording / reproducing apparatus manufactured by Manufacturing Method Example 1. As shown in FIG. 11, in the information recording / reproducing apparatus, a recording unit is provided at a portion (cross point) where the first wiring 10 and the second wiring 15 intersect. This is a so-called cross-point cell array structure.
  • the recording layer 13 has a portion composed of the recording layer structure 13A on the inner side in the main surface when viewed from the X direction and the Y direction, and the M ions of A ions are relatively formed on the outer side from the structure of the recording layer 13A. It has the structure which has the part which consists of the structure 13B where the ratio with respect to decreased. Thereby, the effect mentioned above is acquired. That is, it becomes possible to cause a resistance change repeatedly and stably.
  • the diffusing first cation (A ion) and the second cation (M ion) constituting the base may be formed of the same element.
  • the valence of A ions needs to be smaller than the valence of M ions. This is a condition for the diffusion of A ions to occur more easily than the diffusion of M ions.
  • a material having a spinel structure represented by A x M y O 4 (0.1 ⁇ x ⁇ 2.2, 1.5 ⁇ y ⁇ 2) can be used as the first compound.
  • a ion and the M ion are one selected from Mn, Fe, and Co
  • a spinel in which the A ion is divalent and the M ion is trivalent can be easily formed.
  • the valence of M ions is on average 3 or more and 4 or less.
  • a part or all of the Mn ions (A ions) in the divalent state are oxidized to change into an ⁇ -Mn 2 O 3 structure. it can.
  • the ratio of the number of Mn ions in the divalent state to the number of Mn ions in the trivalent or higher state is reduced compared to the central region of the recording layer.
  • the average distance between trivalent Mn ions is reduced as compared with the central portion of the recording layer.
  • the width of the peripheral portion of the recording layer is preferably about 1 nm to 5 nm.
  • Hollandite structure ramsdellite structure, anatase structure, brookite structure, pyrolusite structure, ReO3 structure, MoO 1.5 PO 4 structure, TiO 0.5 PO 4 structure, FePO 4 structure, BetaMnO 2 structure, GanmaMnO 2 structure, RamudaMnO 2 structure Or a spinel structure intentionally provided with void sites.
  • first compound layer and the second compound layer may be laminated as shown in FIG.
  • the recording layer 13C made of the second compound having a void site that accommodates the A ions of the recording layer 13A is provided in contact with the first compound, the diffused A ion element tends to exist stably.
  • the power consumption required for resistance change is reduced, and the heat is stable. Can increase the sex.
  • a recording density of Pbpsi (peta bit per square inch) class can be realized, and further, low power consumption can be achieved. .
  • small white circles in the recording layer 13A represent A ions (for example, diffusion ions), small black circles in the recording layer 13A represent M ions (for example, host ions), and Large white circles represent X ions (eg, anions).
  • the white circle in the thick line in the recording layer 13C represents M2 ions (for example, transition element ions), and the shaded circle in the recording layer 13C represents X2 ions (for example, negative ions).
  • the first and second layers 13A and 13C constituting the recording layer 13 may be formed by alternately laminating two or more layers.
  • the A ions that have moved from the first layer 13A containing the first compound are accommodated in the void sites. Accordingly, in the second layer 13C, the valence of a part of A ions or M2 ions decreases, and in the first layer 13A, the valence of A ions or M ions increases. Therefore, at least one of the A ion and the M ion needs to be a transition element having a d orbital in which electrons are incompletely filled so that the valence can be easily changed.
  • the information recording / reproducing apparatus it is preferable for the information recording / reproducing apparatus to reduce the coordination number of A ions (ideally 2 or less) or to reduce the valence to two.
  • the first barrier layer 12 is not easily oxidized and does not have ionic conductivity (for example, electric conduction). It is desirable to use a functional oxide).
  • ionic conductivity for example, electric conduction.
  • a functional oxide The gist of using such a material and preferred examples thereof are as described above.
  • the reset operation may be performed by heating the recording layer 12 and promoting the phenomenon that the A ions stored in the void sites of the second layer 13C return to the first layer 13A.
  • the recording layer 13 can be easily returned to the original high resistance state (insulator) by using Joule heat generated by applying a large current pulse to the recording layer 13 and its residual heat. it can.
  • the reset operation can be performed by applying an electric field in the opposite direction to that at the time of setting.
  • a x M y X 4 (0.1 ⁇ x ⁇ 2.2, 1.5 ⁇ y ⁇ 2) having a structure like the recording portion shown in the first example and the second example.
  • the first compound 13A when the first compound 13A is oriented so that the movement path is arranged in the direction connecting the electrodes, it is preferable because the movement of the A ions in the first compound 13A becomes easy. Further, when the lattice constant of the first compound 13A and the lattice constant of the second compound 13C coincide with each other, even when a material that has a void site and is difficult to form is used, the orientation is easily controlled to form a film. This is preferable because it can be performed.
  • the film thickness of the second compound is preferably 1 nm or more.
  • the number of void sites in the second compound is larger than the number of A ions in the first compound, the resistance change effect of the second compound is reduced, so the number of void sites in the second compound is within the same cross-sectional area.
  • the number of A ions in a certain first compound is preferably the same or less.
  • the film thickness of the second compound should be the same as or smaller than the film thickness of the first compound. Is preferred.
  • a heater layer (a material having a resistivity of about 10 ⁇ 5 ⁇ cm or more) for further promoting the reset operation may be provided on the cathode side.
  • FIG. 12 shows a cross-point type semiconductor memory according to an example of the present invention.
  • bit lines BLi-1, BLi, BLi + 1 extend in the X direction
  • word lines WLj-1, WLj, WLj + 1 extend in the Y direction.
  • bit lines BLi-1, BLi, BLi + 1 is connected to the bit line driver & decoder 31 via a MOS transistor RSW as a selection switch, and one end of the word lines WLj-1, WLj, WLj + 1 is used as a selection switch.
  • the MOS transistor CSW is connected to the word line driver & decoder & read circuit 32.
  • Selection signals Ri-1, Ri, Ri + 1 for selecting one bit line (row) are inputted to the gate of the MOS transistor RSW, and one word line (column) is inputted to the gate of the MOS transistor CSW.
  • the selection signals Ci-1, Ci, Ci + 1 for selecting are input.
  • the memory cell 33 is arranged at the intersection of the bit lines BLi-1, BLi, BLi + 1 and the word lines WLj-1, WLj, WLj + 1. This is a so-called cross-point cell array structure.
  • a diode 34 for preventing a sneak current during recording / reproduction is added to the memory cell 33.
  • FIG. 13 shows the structure of the memory cell array portion of the semiconductor memory of FIG.
  • bit lines BLi-1, BLi, BLi + 1 and word lines WLj-1, WLj, WLj + 1 are arranged, and memory cells 33 and diodes 34 are arranged at intersections of these wirings.
  • cross-point type cell array structure is that it is advantageous for high integration because it is not necessary to individually connect a MOS transistor to the memory cell 33.
  • FIGS. 14 and 15 it is possible to stack the memory cells 33 to make the memory cell array have a three-dimensional structure.
  • the memory cell 33 has a stack structure of a first barrier layer 12, a recording layer 13, and a second barrier layer 14, for example, as shown in FIG.
  • One memory cell 33 stores 1-bit data.
  • a diode 34 is used as the rectifying element 14.
  • bit line BLi is set to a fixed potential (for example, ground potential)
  • a negative potential may be applied to the word line WLj.
  • the first cation is diffused in the recording layer 13 and the anion becomes excessive inside the recording layer 13.
  • the valence of the transition element ions in the recording layer 13 is increased.
  • the recording layer 13 becomes conductive, and the recording (setting operation) ends.
  • the unselected bit lines BLi ⁇ 1, BLi + 1 and the unselected word lines WLj ⁇ 1, WLj + 1 are all biased to the same potential.
  • bit lines BLi ⁇ 1, BLi, and BLi + 1 and all the word lines WLj ⁇ 1, WLj, and WLj + 1 are preferable to precharge all the bit lines BLi ⁇ 1, BLi, and BLi + 1 and all the word lines WLj ⁇ 1, WLj, and WLj + 1 during standby before information recording.
  • the voltage pulse for recording information may be generated by creating a state in which the potential of the bit line BLi is relatively higher than the potential of the word line WLj.
  • Information reproduction is performed by passing a voltage pulse through the memory cell 33 and detecting the resistance value of the memory cell 33.
  • the voltage pulse has a minute amplitude that does not cause a phase change in the material constituting the memory cell 33.
  • the read current generated by the read circuit is passed from the word line WLj to the memory cell 33, and the resistance value of the memory cell 33 is measured by the read circuit.
  • the memory cell 33 may be Joule-heated with a large current pulse to promote the oxidation-reduction reaction of the recording layer 13. That is, the recording layer 13 returns to the insulator due to the residual heat after the association of the large current pulse. (Reset operation) According to such a semiconductor memory, it is possible to realize higher recording density and lower power consumption than current hard disks and flash memories.
  • the example of the present invention is not limited to the above-described embodiment, and can be embodied by modifying each component without departing from the scope of the invention.
  • Various inventions can be configured by appropriately combining a plurality of constituent elements disclosed in the above-described embodiments. For example, some constituent elements may be deleted from all the constituent elements disclosed in the above-described embodiments, or constituent elements of different embodiments may be appropriately combined.
  • the example of the present invention has a great industrial advantage as a next generation memory having a higher recording density than the current nonvolatile memory.

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Abstract

Dispositif de mémoire à résistance programmable dont la consommation d’énergie d’une cellule de mémoire peut être réduite. Ce dispositif d’enregistrement et de lecture d’informations comprend une première couche, une seconde couche, et une couche d’enregistrement intercalée entre la première et la seconde couche, qui peuvent passer d’un premier état de faible résistance à un second état de forte résistance, et inversement, à l’aide d’un courant fourni par l’intermédiaire de la première couche et de la seconde couche, une partie périphérique de la couche d’enregistrement ayant une composition différente de la partie centrale de la couche d’enregistrement.
PCT/JP2008/057365 2008-04-15 2008-04-15 Appareil d’enregistrement et de lecture d’informations Ceased WO2009128142A1 (fr)

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JP2010508057A JP5300839B2 (ja) 2008-04-15 2008-04-15 情報記録再生装置
TW098112393A TWI404203B (zh) 2008-04-15 2009-04-14 Information recording and reproducing device
US12/889,558 US8288748B2 (en) 2008-04-15 2010-09-24 Information recording and reproducing device

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8450714B2 (en) 2010-03-19 2013-05-28 Kabushiki Kaisha Toshiba Semiconductor memory device including variable resistance element or phase-change element
US8574957B2 (en) 2010-11-12 2013-11-05 Panasonic Corporation Method for manufacturing nonvolatile semiconductor memory element
JP2013541204A (ja) * 2010-09-16 2013-11-07 ヒューレット−パッカード デベロップメント カンパニー エル．ピー． ナノスケールスイッチングデバイス
JP2014528656A (ja) * 2011-10-17 2014-10-27 マイクロン テクノロジー， インク． メモリセルおよびメモリセルアレイ
US8889478B2 (en) 2010-11-19 2014-11-18 Panasonic Corporation Method for manufacturing nonvolatile semiconductor memory element, and nonvolatile semiconductor memory element
EP2549535B1 (fr) * 2010-03-19 2015-11-04 Panasonic Intellectual Property Management Co., Ltd. ÉLÉMENT DE MÉMOIRE NON VOLATILE Et SON PROCÉDÉ DE FABRICATION

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8830725B2 (en) * 2011-08-15 2014-09-09 International Business Machines Corporation Low temperature BEOL compatible diode having high voltage margins for use in large arrays of electronic components
JP7675523B2 (ja) * 2021-01-22 2025-05-13 キオクシア株式会社 半導体記憶装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007533118A (ja) * 2004-04-16 2007-11-15 松下電器産業株式会社 可変抵抗を有するメモリデバイス
JP2008503425A (ja) * 2004-06-16 2008-02-07 コーニング インコーポレイテッド ナノ結晶子ガラスセラミックおよびその製造方法
JP2008084512A (ja) * 2005-12-13 2008-04-10 Toshiba Corp 情報記録再生装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR890004230B1 (ko) * 1984-08-24 1989-10-27 가부시끼가이샤 도오시바 광(光) 디스크 메모리
US4757492A (en) * 1984-12-26 1988-07-12 Kabushiki Kaisha Toshiba Method for recording and reproducing information on or from an optical recording medium
KR100242859B1 (ko) * 1991-06-20 2000-02-01 가나이 쓰도무 광특성 변형방법, 광학장치, 정보기록매체 그리고 정보기록 방법 및 장치
US5889756A (en) * 1996-07-25 1999-03-30 Kabushiki Kaisha Toshiba Phase change optical recording medium
JP4249992B2 (ja) 2002-12-04 2009-04-08 シャープ株式会社 半導体記憶装置及びメモリセルの書き込み並びに消去方法
JP2005122872A (ja) * 2003-09-22 2005-05-12 Ricoh Co Ltd ２層相変化型情報記録媒体及びその記録再生方法
JP2006080259A (ja) 2004-09-09 2006-03-23 Matsushita Electric Ind Co Ltd 抵抗変化素子およびそれを用いた不揮発性メモリ、ならびにこれらの製造方法
US7733684B2 (en) * 2005-12-13 2010-06-08 Kabushiki Kaisha Toshiba Data read/write device
JPWO2009104239A1 (ja) * 2008-02-18 2011-06-16 株式会社東芝 不揮発性記憶装置及びその製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007533118A (ja) * 2004-04-16 2007-11-15 松下電器産業株式会社 可変抵抗を有するメモリデバイス
JP2008503425A (ja) * 2004-06-16 2008-02-07 コーニング インコーポレイテッド ナノ結晶子ガラスセラミックおよびその製造方法
JP2008084512A (ja) * 2005-12-13 2008-04-10 Toshiba Corp 情報記録再生装置

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8450714B2 (en) 2010-03-19 2013-05-28 Kabushiki Kaisha Toshiba Semiconductor memory device including variable resistance element or phase-change element
EP2549535B1 (fr) * 2010-03-19 2015-11-04 Panasonic Intellectual Property Management Co., Ltd. ÉLÉMENT DE MÉMOIRE NON VOLATILE Et SON PROCÉDÉ DE FABRICATION
JP2013541204A (ja) * 2010-09-16 2013-11-07 ヒューレット−パッカード デベロップメント カンパニー エル．ピー． ナノスケールスイッチングデバイス
US9040948B2 (en) 2010-09-16 2015-05-26 Hewlett-Packard Development Company, L.P. Nanoscale switching device
US8574957B2 (en) 2010-11-12 2013-11-05 Panasonic Corporation Method for manufacturing nonvolatile semiconductor memory element
US8889478B2 (en) 2010-11-19 2014-11-18 Panasonic Corporation Method for manufacturing nonvolatile semiconductor memory element, and nonvolatile semiconductor memory element
JP2014528656A (ja) * 2011-10-17 2014-10-27 マイクロン テクノロジー， インク． メモリセルおよびメモリセルアレイ
US9123888B2 (en) 2011-10-17 2015-09-01 Micron Technology, Inc. Memory cells and memory cell arrays
US9214627B2 (en) 2011-10-17 2015-12-15 Micron Technology, Inc. Memory cell arrays

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TW201007940A (en) 2010-02-16
JPWO2009128142A1 (ja) 2011-08-04

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