WO2009119968A1

WO2009119968A1 - Oxide semiconductor thin film and fabrication method thereof

Info

Publication number: WO2009119968A1
Application number: PCT/KR2008/007840
Authority: WO
Inventors: Joo Ho Moon; Dong Jo Kim; Changyoung Koo; Youngmin Jeong; Keun Kyu Song
Original assignee: Industry Academic Cooperation Foundation of Yonsei University
Current assignee: Industry Academic Cooperation Foundation of Yonsei University
Priority date: 2008-03-27
Filing date: 2008-12-31
Publication date: 2009-10-01
Anticipated expiration: 2010-09-27

Abstract

Ga-doped zinc oxide based amorphous semiconductor thin film is presented. The thin film includes indium or tin as an additional dopant, and is fabricated by solution process such as spin-coating or ink-jet printing, using inorganic precursor solution with metal nitride or metal acetate.

Description

[DESCRIPTION]

[Invention Title] OXIDE SEMICONDUCTOR THIN FILM AND FABRICATION METHOD THEREOF

[Technical Field]

The present invention relates to oxide semiconductor thin film and fabrication method thereof using a precursor solution of the oxide. The present invention can be applied to low-cost fabrication of electronic devices such as thin film transistor.

[Background Art]

As a demand for thin-film display such as LCD or OLED has increased, recent research has been focused on next generation flexible display which is bendable or foldable without deterioration in device performance.

Commonly used photolithography including in series of vacuum deposition, exposure and etching processes requires much expensive apparatuses, which has been one of the main causes of high manufacturing cost in semiconductor industry. Moreover, patterning through photolithography is limited to solid substrate and cannot be applied to fabrication of flexible devices.

Polycrystal 1 ine silicon has some merits in view of property, lifetime, and performance stability for thin film transistors. However, it needs vacuum processing and laser annealing for depositing thin film thereto, which resultant Iy increases the production cost of display. Inorganic zinc-oxide (ZnO) thin-films have drawn significant attention as active channel layer for thin film transistor (TFT) applications due to their wide energy band gap and optical transparency. For better transistor performance, it is necessary to control carrier concentration by reducing the defect density of the ZnO film itself and to enhance the quality of interfaces, such as those between the electrodes and the ZnO layer and between the ZnO film and the gate dielectrics.

However, in spite of such excellent device performances, the fabrication methods of ZnO related metal-oxide thin-films involve high-cost vacuum processes, such as sputtering, pulsed laser deposition (PLD), and so on.

For mass-producible and cost-effective manufacturing, thin-film transistors need to be processed by low-cost solution-based techniques, such as spin coating and ink-jet printing. The precursor materials used in solution process methods should produce the TFT at lower processing temperatures, showing high field effect mobility and clear switching characteristic with a high on/off (I_on/off) ratio. Specially, it is particularly important to achieve high-quality ZnO films with high mobility and a reasonable on/off ratio at low annealing temperature under 300^°C . However, it is generally difficult to obtain good TFT performance derived from a chemical solution due to the large amount of residual organics contained in the precursors, solvents and other additives.

In addition, the threshold voltage of a thin film transistor formed on oxide semiconductor may be greatly changed as bias stress is induced thereto. Since the instability of threshold voltage seriously influences the switching performance of a thin film transistor, oxide semiconductor has been difficult to be used as actual devices.

[Disclosure]

[Technical Problem]

Therefore, the present invention has been made to solve the above problems, and it is an aspect of the present invention to provide a semiconductor device for flexible substrate based electronics. It is another aspect of the present invention to provide an oxide semiconductor thin film by solution process.

It is another aspect of the present invention to provide an oxide semiconductor thin film with improved stability over bias stress.

[Technical Solution]

One aspect of the present invention is to provide an amorphous oxide semiconductor thin film comprising ZnO, 10 - 130 mol of Ga2U3 for 100 mol of said ZnO, and 10 - 150 mol of In^Os or Snθ2 for 100 mol of said ZnO. The oxide semiconductor thin film is fabricated by heating a precursor solution comprising a first precursor including Zn, a second precursor including Ga, and a third precursor including In or Sn. Another aspect of the present invention is to provide an precursor solution for an oxide semiconductor thin film comprising an inorganic precursor, such as metal nitride and/or metal acetate, consisting of a first precursor including Zn, a second precursor including Ga, and a third precursor including In or Sn; and 90 ~ 99 parts by mol of an organic solvent for every 100 parts by mol of total solution, wherein the inorganic precursor includes 10 - 130 mol of the second precursor and 10 ~ 150 mol of the third precursor for 100 mol of the first precursor.

A thin film may be fabricated using the precursor solution by solution process such as ink-jet printing, dispensing, spin-coating, nano- imprinting, gravure printing, or offset printing. Heating the thin film generates conductive carriers in the film to change the film to be semiconductive.

The precursor solution may be used for ink-jet printing sol-gel solution (ink-jet printing ink) to fabricate various electronic devices.

[Advantageous Effects]

In accordance with the present invention, novel flexible substrate based electronics can be fabricated. Especially, the present invention provides low cost method for forming a thin film by using solution- based techniques instead of vacuum process with high cost equipments. Also, the present invention provides a low temperature process for a thin film transistor on a plastic substrate.

Further, the oxide thin film according to the present invention has improved operating stability and excellent semiconductor performance. Moreover, the present invention may be applied to thin film transistor and other various devices for display, memory, and so on.

[Description of Drawings]

Figure 1 shows the processing steps for the oxide thin film in accordance with the present invention.

Figure 2 is a cross sectional view of the oxide semiconductor thin film transistor in accordance with the present invention. Figure 3 is a graph showing the XRD pattern of the oxide thin film in accordance with the present invention.

Figures 4 and 5 are the SEM image and AFM image of the oxide thin film in accordance with the present invention.

Figure 6 the TFT transfer characteristics of the oxide thin film in accordance with the present invention.

Figures 7 and 8 are graphs showing the transfer characteristics and the output characteristics of the oxide thin film in accordance with the present invention. Figures 9 and 10 are graphs showing the bias-stress-induced effect on the transfer and the output characteristics of the GIZO TFT. Figure 11 is a graph showing I_D ^~V_G curve as a function of the annealing temperature of the GIZO TFT.

Figure 12 is a graph showing the transfer characteristic of the GIZO TFT as a function of Ga content.

Figures 13 and 14 are graphs showing the device performance of the GIZO TFT (Ga : In : Zn = 0.3 : 1.1 : 0.9)

Figures 15 and 16 are graphs showing the device performance of the GSZO thin film.

Figures 17 and 18 are graphs showing the change of device performance of GSZO thin film and ZTO thin film depending on the bias stress time. Figure 19 is a graph showing the bias stress-induced threshold voltage shift as a function of stress time of GSZO thin film and ZTO thin film. Figures 20 and 21 are graphs showing the change of the device performance of GSZO thin film and ZTO thin film depending on applied voltage.

Figure 22 is a graph showing the change of threshold voltage of GSZO thin film and ZTO thin film depending on gate voltage. Figure 23 is a graph showing the device performance of GSZO thin film transistor. [Mode for Invention] The present invention provides sol-gel solution based amorphous ZnO thin film doped with Ga and In, or Ga and Sn (also denoted as GIZO or GSZO). The present invention also provides the effect of the dopant content and annealing temperature on the characteristic of the amorphous oxide thin film transistor. The oxide semiconductor thin film transistor in accordance with the present invention has an excellent device performance with mobility of more than 0.5 cπr/Vs and on/off ratio of more than 10^b, and may be effectively used for glass or flexible substrate based electronic devices.

In the method for fabricating the oxide semiconductor of the present invention, firstly a precursor solution is prepared (step 1) as shown in Figure 1. The precursor solution comprises 0.1 - 1 M of an inorganic precursor, such as metal nitride and/or metal acetate, consisting of a first precursor including Zn, a second precursor including Ga, and a third precursor including In or Sn; and 90 ~ 99 parts by mol of an organic solvent for every 100 parts by mol of total solution, wherein the inorganic precursor includes 10 ~ 130 mol of the second precursor and 10 ~ 150 mol of the third precursor for 100 mol of the first precursor.

If Ga is doped below the lower limit, the oxide semiconductor thin film will have excessive carriers therein and, consequently, the thin film will become conductive and cannot exhibit on/off switching property. On the contrary, if Ga is doped over the upper limit, Ga will reduce the carrier generation due to Ga' s higher bonding force with oxygen than that of Zn or In. As a result, the electronic property of the oxide semiconductor thin film will be deteriorated.

If In is doped below the lower limit, decreased carrier generation from In dopant will lead to deterioration of the oxide semiconductor thin film. On the contrary, excessive carriers from In dopants over the upper limit cause the oxide semiconductor thin film to be conductive.

The precursor solution according to claim 1, wherein the organic solvent may be selected from 2-methoxyethanol , isopropanol, ethanol, ethylene glycol , butanediol, 1-butandiol, and 2-butandiol .

The precursor solution may includes 2 - 10 M of stabilizing agent selected from ethanolamine, dimethyl amine, triethanol amine, acetylacetone, and acetic acid, and may further include 2 ~ 15 M formamide for uniformity of film formation.

A thin film is formed on a substrate using the precursor solution by solution process such as ink-jet printing or spin-coating (step 2).

The thin film is then dried to remove the solvent from the film (step

3). Next, the thin film is annealed to remove residual organic matter from the film and to generate carriers in the film (step 4).

In the fabrication process, the drying step may be performed at 100 ~ 500 ^°C under oxygen atmosphere, nitrogen atmosphere, plasma, or vapor, and the annealing step may be at 100 - 600 ^°C under vacuum, or reducing atmosphere. If necessary, further annealing at 100 ~ 300 ^°C may be added after the first annealing.

Figure 2 shows the oxide semiconductor thin film transistor in accordance with the present invention. An oxide thin film (130) is formed as a channel layer on gate (120) and gate dielectric (110) of a substrate (100). Source (122) and drain (124) are formed on both sides of the surface of the oxide thin film (130). The oxide thin film and the electrodes (source and drain) may be formed by solution process. The foregoing aspects and many of the attendant advantages of the present invention are more readily appreciated as the same become better understood by reference to the following detailed description

Example 1

The precursor solution for Ga and In doped ZnO was prepared by a sol- gel reaction using Ga nitrate, In nitrate and Zn acetate as starting materials. The relative molar concentration ratio of Ga : In : Zn was x : 1.1 : 0.9 (x = 0.3 ~ 1.1). Low-viscosity alcohol was used as a solvent, and a small amount of ethanolamine complexation and coating agent were added into the precursor solution for long-term sol stability. The GIZO precursor solution was deposited on (highly n-type doped) 200 nm-thick Si(VSi substrate by using a spin-coating method. The precursor solution was spin-coated at 4000 rpm for 20 sec, followed by drying at 200 ^°C for 10 min. 20nm-thick GIZO thin-films were formed on the substrate.

Then, the films were annealed at 300 - 600 ^°C for 30 min in a furnace in an atmospheric environment. The source and drain electrode (50 nm- thick Au) was deposited by using a thermal evaporation method with a patterned metal shadow mask in which the channel W/L (width/length) ratio was 50.

The GIZO channel thickness, surface roughness, and morphology were measured by using cross-sectional scanning electron microscopy (SEM), and atomic force microscopy (AFM). The crystal linity and the orientation of the GIZO film were investigated using X-ray diffraction (XRD), and the GIZO TFT performance was measured using an Agilent 5263A source-measure unit.

Figure 3 shows the XRD patterns of GIZO thin-films annealed at 450 "C for 30 min. The Ga contents in the GIZO (x/1.1/0.9) was varied from x = 0.3 to x = 1.1. All samples show no crystalline diffraction peaks, except for a sharp peak resulting from the Si substrate, indicating that all GIZO films were amorphous regardless of their compositions. Even when annealed at 600 ^°C for 30 min., the GIZO films were still in the amorphous phase. No second phase peaks, such as Ga2U3 and In2θ3 phase and their compounds, were found. These results show that excellent amorphous GIZO films can be obtained by the present invention.

In general, the film's orientation is an important factor for inorganic semiconductors, but amorphous-phase semiconductors are preferred over polycrystalline ones for active channel layers from the viewpoint of processing temperature and uniformity of device characteristics.

Figure 4 and 5 show SEM and AFM images of a 20 nnrthick GIZO (Ga contents : 1.1) thin-film on SiU2/Si substrate. The SEM image shows a clear and uniform surface morphology.

There were no grains and grain boundaries due to its amorphous nature.

The surface roughness of the amorphous GIZO film was about 0.7 nm (rms. value), and no second phase was observed in the SEM and the AFM analyses.

Figure 6 shows the TFT transfer characteristics (I_D-VG curve) of a GIZO transistor as a function of annealing temperature. The ID-VG curve shows insufficient on/off characteristics for annealing temperatures over 500 °C , indicating that GIZO (Ga = 1.1) films become conductive and show high current leakages through the semiconductor and the dielectric layers. However, as the annealing temperature is reduced to 450 ^°C , a clear and distinct transfer curve is observed. Figures 7 and 8 show the transfer characteristics U_D-V_G curve) and the output characteristics ( ID-V_D curve) of a GIZO TFT annealed at 450 °C for 30 min. From Figures 6 to 8, the GIZO film with Ga : In : Zn = 1.1 : 1.1 : 0.9 annealed at higher temperatures is more conductive than those annealed at lower temperatures. It is also shown that the conductive GIZO film may transform and become semiconductive when the annealing temperatures is reduced to below 450 ^°C . The conductive- semiconductive transition might be caused by a decreased defect density within the GIZO film and/or less interaction at the interface between the ZnO film and the S1O2 dielectric layer as the annealing temperature is decreased. This observation is consistent with previous reports in which a higher processing temperature increases the mobility value due to the increased carrier concentration. The device performance of the GIZO (Ga : In : Zn = 1.1 ^'• 1.1 : 0.9) TFT annealed at 450 ^°C is reasonable, and the field effect mobility and the threshold voltage were 9.97 * 10^"2 cmVV.s and 5.4 V at V₀ = 30 V, respectively.

Figures 9 and 10 show the bias-stress-induced effect on the transfer (ID^~VG) and the output (ID-VD) characteristics of the GIZO TFT annealed at 450 °C for 30 min. As the number of measurement was increased (over 5th times after the l_st measurement), the off-currents slightly increases and the output drain currents decrease at the same V_D. This might be caused by injected and/or trapped mobile charges, such as electrons and/or holes.

As the number of measurement was increased, mobile charges were trapped at defect sites, such as interfaces between the metal electrodes (for source/drain and gate contact) and the GIZO semiconductor layer and between Si0₂ gate dielectric layer and GIZO semiconductor layer. In general, the charge carrier trapping effect would result in a serious hysteresis problem in the I_D-VG transfer curves of organic thin-film transistors (OTFTs), but in the GIZO TFT by the present invention, charge trapping just causes the off-currents to increase and the output drain currents to decrease. It is possible to enhance these values by introducing oxide electrodes, instead of metal electrodes, in order to control the interface states. To investigate the effect of lower temperature annealing on the performance of GIZO (Ga : In : Zn = 1.1 : 1.1 : 0.9), we compared TFTs with those annealed at 450 ^°C ; the GIZO films were annealed at 300 ~ 400 ^°C for 30 min.

Figure 11 shows I_D-V_G curve as a function of the annealing temperature of GIZO TFTs. The off-current was reduced, and the threshold voltage was shifted towards positive voltage (+VG) with decreasing process temperatures. We speculate that lowering the annealing temperature both suppresses charge carrier generation in the oxide semi-conductor and induces a higher density of point defects into the channel layer, which can affect the field effect mobility.

If the performance of GIZO TFTs is to be enhanced at a lower process temperature, it is necessary to control the Ga and the In content ratios. The dopant type and concentration can play a role in either suppressing or activating charge carrier generation in the semiconducting ZnO system. From this point of view, GIZO films with Ga contents from 0.3 to 1.1 were investigated while keeping the In : Zn content ratio (In : Zn = 1.1 : 0.9) constant.

Figure 12 shows the transfer (I_D-V_G) characteristic of GIZO TFTs as a function of Ga content. The on/off switching behavior of GIZO TFTs became insufficient as the Ga content in the GIZO system was decreased. Incorporated Ga ions would be important in the Ga~and the In-co-doped ZnO system in terms of suppression of the charge carrier generation via oxygen vacancy formation because the Ga ion forms stronger chemical bonds with oxygen than Zn and In ions do. In addition, the GIZO films with lower Ga contents showed unclear and less distinct on/off switching characteristics, and even at Ga = 0.3, the GIZO TFT act as a conducting oxide, such as indium tin oxide (ITO), as the fraction of In ions was increased relative to Ga ions. Thus, more than 50 mol% of Ga compared to that of In is preferable for better GIZO thin film transistor performance.

Figures 13 and 14 show the output (I_D-VD) and the transfer (ID-VG) characteristics of the GIZO TFT (Ga : In : Zn = 0.3 : 1.1 : 0.9) firstly annealed at 400 ^°C under oxygen atmosphere and secondly annealed at 200 ^°C under reducing atmosphere. It is understood that the GIZO TFT has excellent performance similar to the previous embodiment's result.

Reference is made in detail to another embodiment of the present invention.

Example 2

GSZO soI-ReI solution

Precursor solutions for the GSZO semiconductor film were synthesized from zinc acetate dehydrate

tin acetate

(Sn(02CCH₃)₄), and gallium nitrate hydrate(Ga(N03)3(H20)_x) dissolved in

12.64 ml 2-methoxyethanol , described in detail as below. After 0.8 ml ethanolamine as a stabilizing agent was added, the solution was stirred for 5 minutes.

Firstly, 1.53 g of tin acetate was dissolved in the solvent and stirred for 10 minutes, and then 2.215 g of zinc acetate dehydrate was added to the solution. Raising the temperature of the solution at 60°C , the solution was stirred for 10 minutes. Next, 0.192 g of gallium nitrate hydrate was added to the solution. When the three precursor salts were fully dissolved, the solution became transparent. With maintaining the temperature of the solution, 2 ml acetic acid was added to the solution and stirred for 5 minute. And then, 1 ml 2- methoxyethanol was further added to balance the volume of the solution. Finally, 1.2 ml formamide together with 2-methoxyethanol was added to the solution and stirred for 12 hours at room temperature so that the semiconductive ink in accordance with the present invention was prepared.

ZTO sol-gel solution

Using 2.35 g of zinc acetate dehydrate and 1.61 g of tin acetate, ZTO (Zinc Tin Oxide) sol-gel solution was synthesized in the same way as GSZO sol-gel solution (except using gallium nitrate hydrate)

GSZO thin film

Before spin-coating the GSZO sol-gel solution, heavily doped silicon substrate with 200nm-thick Siθ2 was ultrasonically cleaned in piranha solution (Sulfur Acid : Hydroperoxide = 4:1), methyl alcohol, isopropyl alcohol (IPA), ethyl alcohol, DI-Water, for 5 minutes respectively. Next, the silicon substrate was dried for 30 minutes using IR-Lamp, and ultraviolet rays was irradiated to the substrate for 30 minutes to modify the surface of the substrate hydrophi lically.

Prepared GSZO ink was spin-coated on the substrate at 500rpm for 5 seconds and at 3000rpm for 20 seconds. The GSZO film obtained was then heat-treated at 500^°C for 4 hours with heating rate of 5^°C .

Figure 15 shows the transfer (I_D-V_G) characteristic of the fabricated

GSZO thin film where VG was changed from -40 to 40 V with V_D being fixed at 20 V, and figure 16 shows the output (I_D-V_D) characteristic of the GSZO film where V_D was changed from -20 to 40 V with V_G being fixed at 0, 10, 20, 30, 40 V.

In these performance test, the GSZO thin film exhibited reasonable characteristic with mobility of 1.03 cπr/Vs, threshold voltage of 3 V, and on/off ratio of 10⁷. Thus, it is found that semiconductor thin film with excellent device performance can be fabricated by solution process according to the present invention.

Figures 17 and 18 show the change of device performance of GSZO thin film and ZTO thin film depending on the bias stress time (0, 1, 5, 10,

30, 60 min), respectively.

Figure 19 shows the bias stress-induced threshold voltage shift as a function of stress time of GSZO thin film and ZTO thin film. The GSZO thin film shows stability of threshold voltage without serious change during bias stress, but the threshold voltage of the ZTO thin film is found to be largely increased by induced bias stress. Tables 1 and 2 show threshold voltage and its variation depending on time. In contrast with ZTO thin film, GSZO thin film shows little change of threshold voltage regardless of bias stress time. Table 1

Figures 20 and 21 show the change of device performance of GSZO thin film and ZTO thin film depending on the bias stress (0, 10, 20, 30V) at fixed bias time (lOmin).

Figure 22 shows the change of threshold voltage of GSZO thin film and

ZTO thin film depending on the bias stress magnitude. Also in this case, the GSZO thin film shows stability of threshold voltage, but the threshold voltage of the ZTO thin film is getting increased as bias stress grows higher.

Tables 3 and 4 show threshold voltage and its variation depending on bias stress. In contrast with ZTO thin film, GSZO thin film shows little change of threshold voltage regardless of bias stress magnitude.

Table 3

Table 4

GSZO thin film transistor

GSZO thin film transistor was fabricated using spin-coated GSZO layer.

Al source/drain electrodes were deposited on top of the GSZO layer, and then heat-treated at 200 °C under hydrogen atmosphere for 1 minute.

Figure 23 shows the device performance of GSZO thin film transistor at fixed VD (20V). During repeated measurement, the GSZO thin film shows reliable characteristic without increase of threshold voltage.

Table 5 shows the electrical properties of the GSZO TFT for various

GSZO compositions.

Table 5

The GSZO composition is preferable to include under 20 mol% of Ga, since too much Ga content reduces mobility. Excessive Sn content compared to Zn lowers on/off ration and increase subthreshold slope.

Thus, Sn content is preferable to be limited to less than 50 mol% or less.

From these results, the GSZO composition preferably includes 40 ~ 90 mol Zn precursor, 10 ~ 50 mol Sn precursor, and 0 - 20 mol Ga precursor for 100 mol of total metal salt precursors.

It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.

Claims

[CLAIMS]

[Claim 1]

A precursor solution for an oxide semiconductor thin film comprising: a precursor mixture consisting of a first precursor including Zn, a second precursor including Ga, and a third precursor including In or Sn;

90 ~ 99 parts by mol of an organic solvent for every 100 parts by mol of total solution; and a sol-stabilizing agent, wherein the concentration of the precursor mixture is 0.1 - 1 M, and the concentration of the sol-stabilizing agent is 2 - 10 M.

[Claim 2]

The precursor solution according to claim 1, wherein the precursor mixture includes 10 ~ 130 mol of the second precursor and 10 ~ 150 mol of the third precursor for 100 mol of the first precursor.

[Claim 3]

The precursor solution according to claim 1, wherein the organic solvent is one selected from the group consisting of 2-methoxyethanol , isopropanol, ethanol, ethylene glycol, butanediol, 1-butandiol, and 2- butandiol .

[Claim 4] The precursor solution according to claim 1, wherein the sol- stabilizing agent is one selected from the group consisting of ethanolamine, dimethyl amine, triethanol amine, acetyl acetone, and acetic acid.

[Claim 5]

The precursor solution according to claim 1, wherein the solution further includes 2 - 15 mol of formamide.

[Claim 6]

The precursor solution according to claim 1, wherein the precursor mixture includes metal nitride precursor or metal acetate precursor.

[Claim 7]

An oxide semiconductor thin film comprising^'- ZnO;

10 - 130 mol of Ga₂O₃ for 100 mol of said ZnO; and 10 - 150 mol of In₂O₃ or SnO₂ for 100 mol of said ZnO, wherein the oxide semiconductor thin film is an amorphous thin film which is fabricated by heating a precursor solution comprising a first precursor including Zn, a second precursor including Ga, and a third precursor including In or Sn.

[Claim 8]

A fabricating method for An oxide semiconductor thin film comprising: preparing a precursor solution comprising 90 - 99 parts by mol of an organic solvent for every 100 parts by mol of total solution, a first precursor including Zn, a second precursor including Ga, and a third precursor including In or Sn; forming a thin film on a substrate by using the precursor solution; drying the thin film to remove the solvent from the film; annealing the thin film to remove residual organic matter from the film and to generate carriers in the film.

[Claim 9]

The fabricating method according to claim 8, wherein the temperature of the annealing is 100 - 600 ^°C .

[Claim 10]

The fabricating method according to claim 9, wherein the thin film is further annealed at 100 - 300 ⁰C.