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WO2009017146A1 - Cu wiring film - Google Patents

Cu wiring film Download PDF

Info

Publication number
WO2009017146A1
WO2009017146A1 PCT/JP2008/063642 JP2008063642W WO2009017146A1 WO 2009017146 A1 WO2009017146 A1 WO 2009017146A1 JP 2008063642 W JP2008063642 W JP 2008063642W WO 2009017146 A1 WO2009017146 A1 WO 2009017146A1
Authority
WO
WIPO (PCT)
Prior art keywords
wiring film
cu2o
plane
ray diffraction
diffraction peak
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/063642
Other languages
French (fr)
Japanese (ja)
Inventor
Hideo Murata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Proterial Ltd
Original Assignee
Hitachi Metals Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Metals Ltd filed Critical Hitachi Metals Ltd
Priority to CN2008800226157A priority Critical patent/CN101689502B/en
Priority to JP2009525427A priority patent/JP5360595B2/en
Priority to KR1020097026478A priority patent/KR101088744B1/en
Publication of WO2009017146A1 publication Critical patent/WO2009017146A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Liquid Crystal (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Physical Vapour Deposition (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

Provided is a novel Cu wiring film having improved adhesiveness to a substrate. The Cu wiring film has a Cu oxide formed on a glass substrate, and has a strength ratio of Cu(111)/Cu2O(111) within a range of 0.8-2.5, wherein, Cu(111) is an X-ray diffraction peak strength of a (111) plane of a Cu main crystal plane, and Cu2O(111) is an X-ray diffraction peak strength of a (111) plane of a Cu2O main crystal plane. The Cu wiring film preferably has a film thickness of 200-500nm.
PCT/JP2008/063642 2007-07-31 2008-07-30 Cu wiring film Ceased WO2009017146A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN2008800226157A CN101689502B (en) 2007-07-31 2008-07-30 Cu wiring film
JP2009525427A JP5360595B2 (en) 2007-07-31 2008-07-30 Cu-based wiring film
KR1020097026478A KR101088744B1 (en) 2007-07-31 2008-07-30 Cu-based wiring film

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2007-198939 2007-07-31
JP2007198939 2007-07-31
JP2008-001374 2008-01-08
JP2008001374 2008-01-08

Publications (1)

Publication Number Publication Date
WO2009017146A1 true WO2009017146A1 (en) 2009-02-05

Family

ID=40304376

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/063642 Ceased WO2009017146A1 (en) 2007-07-31 2008-07-30 Cu wiring film

Country Status (4)

Country Link
JP (2) JP5360595B2 (en)
KR (1) KR101088744B1 (en)
CN (1) CN101689502B (en)
WO (1) WO2009017146A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013507782A (en) * 2009-10-15 2013-03-04 アプライド マテリアルズ インコーポレイテッド Method and equipment for manufacturing semiconductor device and semiconductor device
JP2018512736A (en) * 2015-04-06 2018-05-17 コーニング精密素材株式会社Corning Precision Materials Co., Ltd. Integrated circuit package substrate

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101227288B1 (en) * 2010-07-14 2013-02-07 알프스 덴키 가부시키가이샤 Input device and method for manufacturing same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08158036A (en) * 1994-09-30 1996-06-18 Internatl Business Mach Corp <Ibm> Method and apparatus for controlling tensile and compressive stresses and mechanical problems in thin films on substrates
JPH11204521A (en) * 1998-01-09 1999-07-30 Toshiba Corp Semiconductor device and manufacturing method thereof

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH034214A (en) * 1989-05-31 1991-01-10 Sharp Corp Liquid crystal display device
JP2001144092A (en) * 1999-11-15 2001-05-25 Toshiba Corp Method for manufacturing semiconductor device
KR100379566B1 (en) * 2000-08-30 2003-04-10 엘지.필립스 엘시디 주식회사 Method For Fabricating Liquid Crystal Display Device
JP2002305198A (en) * 2001-04-06 2002-10-18 Toshiba Corp Electronic device manufacturing method
JP2007005628A (en) * 2005-06-24 2007-01-11 Sharp Corp Wiring structure and manufacturing method thereof
JP2007072428A (en) * 2005-08-09 2007-03-22 Tohoku Univ Planar electronic display device and manufacturing method thereof
JPWO2007060984A1 (en) * 2005-11-28 2009-05-07 株式会社アライドマテリアル Resin bond superabrasive wheel and method of manufacturing the same
TWI499466B (en) * 2007-03-22 2015-09-11 Hitachi Chemical Co Ltd Metal particle and fabricating method thereof, and metal particle dispersion solution and fabricating method thereof
US10231344B2 (en) * 2007-05-18 2019-03-12 Applied Nanotech Holdings, Inc. Metallic ink

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08158036A (en) * 1994-09-30 1996-06-18 Internatl Business Mach Corp <Ibm> Method and apparatus for controlling tensile and compressive stresses and mechanical problems in thin films on substrates
JPH11204521A (en) * 1998-01-09 1999-07-30 Toshiba Corp Semiconductor device and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013507782A (en) * 2009-10-15 2013-03-04 アプライド マテリアルズ インコーポレイテッド Method and equipment for manufacturing semiconductor device and semiconductor device
JP2018512736A (en) * 2015-04-06 2018-05-17 コーニング精密素材株式会社Corning Precision Materials Co., Ltd. Integrated circuit package substrate

Also Published As

Publication number Publication date
JPWO2009017146A1 (en) 2010-10-21
CN101689502B (en) 2011-09-28
KR101088744B1 (en) 2011-12-01
KR20100009640A (en) 2010-01-28
JP5360595B2 (en) 2013-12-04
JP5656135B2 (en) 2015-01-21
CN101689502A (en) 2010-03-31
JP2014059559A (en) 2014-04-03

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