WO2009066954A2

WO2009066954A2 - Apparatus and method for up-converting frequency in wireless communication system

Info

Publication number: WO2009066954A2
Application number: PCT/KR2008/006874
Authority: WO
Inventors: Yo-An Jung
Original assignee: Posdata Co Ltd
Current assignee: Posdata Co Ltd
Priority date: 2007-11-21
Filing date: 2008-11-21
Publication date: 2009-05-28
Anticipated expiration: 2010-05-21
Also published as: WO2009066954A3

Abstract

The present invention relates a frequency up-conversion apparatus and method for converting a baseband signal into an Intermediate Frequency (IF) signal in a wireless communication system. The present invention performs channel filtering on an I signal and a Q signal having a baseband frequency, received from a channel card, performs half -band filtering on an I signal and Q signal performed the channel filtering, modulates an I signal and Q signal performed the half-band filtering into an IQ signal having a first Intermediate Frequency (IF), up-con verts the IQ signal having the first IF into an IQ signal having a second IF higher than the first IF, and converts one of the up-converted IQ signal and the I signal and Q signal performed the half-band filtering into an analog signal.

Description

Apparatus and method for up-converting frequency in wireless communication system Technical Field

[1] The present invention relates generally to a wireless communication system, and in particular, to a frequency up-conversion apparatus and method for converting a baseband signal into an Intermediate Frequency (IF) signal in a wireless communication system. Background Art

[2] Research on the next-generation wireless communication system is being conducted to provide users with various Quality-of-Service (QoS) services at a high data rate. Particularly, for the next- generation wireless communication system, study of a Base Station (BS) that provides services to users and of a network system consisting of BS's upper parts, is now made to transmit a large volume of service data to users at high speed, and research into frequency up-conversion of a signal is also being carried out to support data transmission in the network system.

[3] For the wireless communication systems, a data transmission/reception scheme has been proposed that uses Multi-Input Multi- Output (MIMO) between a BS and a Mobile Station (MS) to more effectively transmit service data to users, and study of frequency up-conversion of multi-Frequency Assignment (FA) signals is made to support BS's multiple FAs for MIMO-based data transmission/reception. The BS includes various network units, and must convert baseband signals outputted from the network units, e.g., Digital Channel Card Unit (DCCU), into Intermediate Frequency (IF) signals and transfer them to a Radio Frequency (RF) unit in order to transmit service data to the users. Especially, in order to support multiple FAs, the BS should convert baseband signals for the multiple FAs outputted from the DCCU into an IF signal, and transfer it to the RF unit.

[4] FIG. 1 is a diagram schematically illustrating a frequency up-conversion apparatus in a general wireless communication system, FIG. 2 is a diagram schematically illustrating baseband signals outputted from a DCCU.

[5] Referring to FIG. 1, baseband I signal and Q signal (DCCU FA I, DCCU FA Q) outputted from a DCCU are inputted to Digital to Analog Converters (DACs) 110 and 120 after undergoing data latching. The baseband I signal and Q signal outputted from the DACs 110 and 120 are inputted to a direct converter 150 that uses a mixer or performs a direct conversion function, passing through Low Pass Filters (LPFs) 130 and 140. The direct converter 150 receives local signals outputted from Phase Locked Loops (PLLs) 182, 184 and 186, frequency up-con verts the baseband I signal and Q signal into an IF IQ signal (FA IQ) using the local signals, and outputs the frequency up-converted IF IQ signal to an RF unit. The frequency up-conversion apparatus should remove image signals included in the baseband I signal and Q signal outputted from the DCCU, and it must increase a sampling frequency of the baseband I signal and Q signal in order to remove the image signals.

[6] However, the frequency up-conversion apparatus may not be used in a transmission scheme using a Common Public Radio Interface (CPRI) since the sampling frequency is different from a data rate of the baseband I signal and Q signal. Further, as the frequency up-conversion apparatus performs frequency up-conversion on baseband signals with multiple FAs separately for each FA path and outputs an IF signal for multiple FAs by means of addition of the frequency up-converted signals in order to support the multiple FAs, the number of paths for FA-by-FA frequency up-conversion increases and the number of PLLs increases that generate local signals of the multiple FAs for frequency up-conversion.

[7] In addition, as the number of paths and PLLs for FA-by-FA frequency up-conversion increases, the frequency up-conversion apparatus is complex in its structure and design, and increases in size and complexity of a backboard where its constituent elements are mounted, making it difficult to implement the apparatus and increasing the time required for debugging of the backboard. Further, since the frequency up- conversion apparatus increases in the number of signal processing modules for the multiple FAs and in the number of connection lines between actually implemented Field Programmable Gate Array (FPGA) and signal processing modules during frequency up-conversion, its interface and design is complex, and the size and complexity of the backboard increases, making it difficult to implement the apparatus. Disclosure of Invention Technical Problem

[8] Accordingly, an aspect of the present invention is to provide an apparatus and method for frequency up-converting a baseband signal into an IF signal for data transmission between network units in a wireless communication system.

[9] Another aspect of the present invention is to provide an apparatus and method for outputting a baseband I signal and Q signal by performing channel filtering and half- band filtering on baseband I signal and Q signal which are outputted from a DCCU via a CPRI, or frequency up-converting the baseband I signal and Q signal into an IF IQ signal in a wireless communication system.

[10] Further another aspect of the present invention is to provide an apparatus and method for frequency up-converting baseband signals with multiple FAs into an IF signal to support the multiple FAs in a wireless communication system.

[11] Further another aspect of the present invention is to provide an apparatus and method for reducing complexity by digitally performing frequency up-conversion on baseband signals with the multiple FAs, and stably frequency up-converting the baseband signals into an IF signal for the multiple FAs in a wireless communication system. Technical Solution

[12] According to one aspect of the present invention, there is provided an apparatus for up-converting a frequency in a wireless communication system. The apparatus includes a channel filter part for performing first interpolation on an I signal and Q signal having a baseband frequency, received from a channel card, and performing channel filtering on an I signal and Q signal performed the first interpolation; a half- band filter part for performing second interpolation on an I signal and Q signal performed the channel filtering, and performing half-band filtering on an I signal and Q signal performed the second interpolation; a modulation part for frequency up- converting an I signal and Q signal performed the half-band filtering into an IQ signal having a first Intermediate Frequency (IF); and a conversion part for converting an I signal and Q signal performed the half -band filtering into analog signals, or up- modulating the IQ signal having the first IF into an IQ signal having a second IF higher than the first IF and converting the IQ signal having the second IF into an analog signal.

[13] According to another aspect of the present invention, there is provided a method for up-converting a frequency in a wireless communication system. The method includes performing channel filtering on an I signal and a Q signal having a baseband frequency, received from a channel card; performing half -band filtering on an I signal and Q signal performed the channel filtering; modulating an I signal and Q signal performed the half-band filtering into an IQ signal having a first Intermediate Frequency (IF); and up-converting the IQ signal having the first IF into an IQ signal having a second IF higher than the first IF, and converting one of the up-converted IQ signal and the I signal and Q signal performed the half -band filtering into an analog signal.

Advantageous Effects

[14] In a wireless communication system, the present invention removes image signals form baseband signals by performing filtering, and then frequency up-converts the baseband signals performed the filtering into IF signals, thereby digitally performing frequency up-conversion. As a result, use of filters in the DCCU and the RF unit decreases, ensuring the simple construction and design of the frequency up-conversion apparatus, facilitating debugging, and contributing to a decrease in size of the board. Further, in the wireless communication system, the present invention performs multiplexing on baseband signals with multiple FAs, performs filtering on the signals performed the multiplexing, and then digitally performs frequency up-conversion on an IF signal, thus contributing to a reduction in device complexity and facilitating simple implementation. Accordingly, the present invention can stably frequency up- convert the baseband signals with the multiple FAs into an IF signal for the multiple FAs, ensuring simple debugging and contributing to a decrease in size of the board. Brief Description of Drawings

[15] The above and other aspects, features and advantages of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings in which:

[16] FIG. 1 is a diagram schematically illustrating a frequency up-conversion apparatus in a general wireless communication system;

[17] FIG. 2 is a diagram schematically illustrating baseband signals outputted from a

DCCU;

[18] FIG. 3 is a diagram schematically illustrating a structure of a frequency up- conversion apparatus in a wireless communication system according to an embodiment of the present invention;

[19] FIG. 4 is a diagram illustrating frequency spectra of input/output signals of constituent elements in a frequency up-conversion apparatus for a wireless communication system according to an embodiment of the present invention;

[20] FIG. 5 is a diagram illustrating an exemplary implementation of an FPGA for some constituent elements of a frequency up-conversion apparatus in a wireless communication system according to an embodiment of the present invention;

[21] FIG. 6 is a diagram schematically illustrating an exemplary implementation of a frequency up-conversion apparatus in a wireless communication system according to an embodiment of the present invention;

[22] FIG. 7 is a diagram schematically illustrating an operating process of a frequency up- conversion apparatus according to an embodiment of the present invention;

[23] FIG. 8 is a graph illustrating outputs of a half-band filter part in a frequency up- conversion apparatus for a wireless communication system according to an embodiment of the present invention;

[24] FIG. 9 is a graph illustrating outputs of a modulation part in a frequency up- conversion apparatus for a wireless communication system according to an embodiment of the present invention;

[25] FIG. 10 is a diagram schematically illustrating a structure of a frequency up- conversion apparatus in a wireless communication system according to another embodiment of the present invention;

[26] FIG. 11 is a diagram schematically illustrating a structure of a DeMUX of a frequency up-conversion apparatus in a wireless communication system according to another embodiment of the present invention;

[27] FIG. 12 is a diagram schematically illustrating a structure of a modulation block in a frequency up-conversion apparatus for a wireless communication system according to another embodiment of the present invention;

[28] FIG. 13 is a diagram illustrating an exemplary implementation of an FPGA for some constituent elements of a frequency up-conversion apparatus in a wireless communication system according to another embodiment of the present invention;

[29] FIG. 14 is a diagram schematically illustrating an exemplary implementation of a frequency up-conversion apparatus in a wireless communication system according to another embodiment of the present invention;

[30] FIG. 15 is a diagram schematically illustrating an operating process of a frequency up-conversion apparatus according to another embodiment of the present invention;

[31] FIG. 16 is a graph illustrating outputs of a half-band filter part in a frequency up- conversion apparatus for a wireless communication system according to another embodiment of the present invention; and

[32] FIG. 17 is a graph illustrating outputs of a modulation part in a frequency up- conversion apparatus for a wireless communication system according to another embodiment of the present invention. Mode for the Invention

[33] Preferred embodiments of the present invention will now be described in detail with reference to the annexed drawings. In the drawings, the same or similar elements are denoted by the same reference numerals even though they are depicted in different drawings. In the following description, a detailed description of known functions and configurations incorporated herein has been omitted for clarity and conciseness.

[34] The present invention provides a frequency up-conversion apparatus and method for supporting data transmission between network units constituting a system in a wireless communication system. An embodiment of the present invention frequency up- converts a signal having a baseband frequency (hereinafter referred to as 'baseband signal') into a signal having an Intermediate Frequency (IF) (hereinafter referred to as IF signal') which is higher than the baseband frequency. Further, the present invention provides a frequency up-conversion apparatus and method for supporting multiple Frequency Assignments (FAs) in a wireless communication system. An embodiment of the present invention, when it receives two or more signals for supporting multiple FAs, frequency up-converts the two or more signals having the multiple FAs, e.g., FA signals into one signal having one FA, e.g., multi-FA signal. Herein, the FA signal means a single signal having one of the multiple FAs, and the multi-FA signal means a single signal having one FA, which is combined the multiple FAs into by performing multiplexing on multiple signals with the multiple FAs to support multiple FAs.

[35] In addition, an embodiment of the present invention provides an apparatus and method for frequency up-converting FA signals having a baseband frequency (hereinafter referred to as 'baseband FA signals') into a multi-FA signal having an IF (hereinafter referred to as IF multi-FA signal'), the baseband FA signals being outputted from network units, for example, Digital Channel Card Units (DCCUs), forming a Base Station (BS) or BS's upper parts. In particular, the present invention frequency up-converts two or more baseband FA signals into one IF multi-FA signal to support multiple FAs for Multi-Input Multi- Output (MIMO)-based data transmission/ reception between a BS and a Mobile Station (MS) in a wireless communication system. Herein, the one IF multi-FA signal is inputted to a Radio Frequency (RF) unit.

[36] The present invention digitally frequency up-converts FA I signals and Q signals having a baseband frequency (hereinafter referred to as 'baseband FA I signals and Q signals'), and outputs a multi-FA IQ signal having an IF (hereinafter referred to as IF multi-FA IQ signal') by combining the frequency up-converted signals. In the following description, for convenience, multiple FAs are assumed to be 3 FAs, so the multi-FA signal means a 3FA signal having one FA, which is combined the multiple FAs into by performing multiplexing on a first FA signal (FAl), a second FA signal (FA2) and a third FA signal (FA3). Further, when FAl I signal and Q signal, FA2 I signal and Q signal, and FA3 I signal and Q signal having a baseband are received, an embodiment of the present invention performs multiplexing on the received signals, performs interpolation and filtering thereon, performs demultiplexing thereon, frequency up-converts thereon, combines the frequency up-converted signals, and outputs a 3FA IQ signal having an IF. With reference to FIG. 3, a detailed description will now be made of a frequency up-conversion apparatus in a wireless communication system.

[37] FIG. 3 is a diagram schematically illustrating a structure of a frequency up- conversion apparatus in a wireless communication system according to an embodiment of the present invention, and FIG. 4 is a diagram illustrating frequency spectra of input/output signals of constituent elements in the frequency up-conversion apparatus.

[38] Referring to FIG. 3, a frequency up-conversion apparatus includes a channel filter part 310, a half -band filter part 320, a Direct Digital Synthesizer (DDS) 330, a modulation part 340, a selector 350, and a Digital to Analog Converter (DAC) part 360.

[39] The channel filter part 310, including a channel filter 1 312 and a channel filter2 314, receives signals having a baseband frequency outputted from a DCCU, for example, baseband I signal and Q signal (DCCU FA I, DCCU FA Q), performs first interpolation on the received baseband I signal and Q signal, and performs channel filtering thereon. The channel filterl 312 performs first interpolation on the baseband I signal, performs channel filtering image signals from the I signal performed the first interpolation, and outputs a data rate-increased baseband I signal. The channel filter2 314 performs first interpolation on the baseband Q signal, performs channel filtering image signals from the Q signal performed first interpolation, and outputs a data rate- increased baseband Q signal. Herein, the first interpolation is performed at a predetermined level such that the channel filter part 310 can easily perform filtering image signals except for the baseband I signal and Q signal.

[40] Reference numerals 410 and 420 in FIG. 4 represent frequency spectra of input signals and output signals of the channel filter part 310. Reference numeral 410 in FIG. 4 represents a frequency spectrum of DCCU's output signals having a data rate of 10 Mbps, which are outputted from the DCCU via a Common Public Radio Interface (CPRI; not shown). The DCCU's output signals (DCCU FA I, DCCU FA Q) having the data rate of 10 Mbps include a baseband signal, the center frequency of which is 0 MHz in the frequency domain, and also include image signals which are symmetrically formed and separated in units of 10 MHz, centering on the baseband signal.

[41] Reference numeral 420 in FIG. 4 represents a frequency spectrum of the signals that the channel filter part 310 outputs by performing channel filtering after performing first interpolation, for example, 2-times interpolation, on the 10 Mbps DCCU's output signals. The first interpolation is performed to up-convert the center frequency so that the image signals can be easily performed channel filtering. The signals obtained by performing 2-times interpolation on the 10 Mbps baseband signals include a baseband signal and image signals whose center frequencies are separated in units of 20 MHz in the frequency domain, and the image signals symmetrically appear centering on the baseband signal. The signals outputted from the channel filter part 310 are signals, from which the image signals are removed, a data rate of which is increased to 20 Mbps. Therefore, the output signal, a data rate of which is increased to 20 Mbps, is a baseband signal, the center frequency of which is 0 MHz in the frequency domain, and image signals symmetrically appear which are separated in units of 20 MHz, centering on the baseband signal.

[42] The half -band filter part 320, including a half -band filterl 322 and a half -band filter2

324, performs second interpolation on the baseband I signal and Q signal performed the channel filtering, and performs half-band filtering thereon. The half-band filterl 322 performs second interpolation on the baseband I signal performed the channel filtering by the channel filterl 312, performs half-band filtering image signals from the baseband I signal performed the second interpolation, and outputs a data rate-increased baseband I signal. The half -band filter2 324 performs second interpolation on the baseband Q signal performed the channel filtering by the channel filter2 314, performs half-band filtering image signals from the baseband Q signal performed the second interpolation, and outputs a data rate-increased baseband Q signal. Herein, the second interpolation by the half -band filter part 320 is performed at a level higher than the first interpolation so that a frequency of the frequency up-converted IF IQ signal is higher than or equal to a predetermined level when the DAC part 360 frequency up-converts the baseband I signal and Q signal into signal having an IF, e.g., IF IQ signal. For example, 5-times interpolation is performed so that a frequency of the IF IQ signal becomes higher than or equal to 100 MHz, and the half-band filter part 320 removes image signals occurring at a sampling frequency using at least the Filter tap with Fpass=4.5 MHz and Fstop=15 MHz.

[43] Reference numeral 430 in FIG. 4 represents a frequency spectrum of output signals of the half -band filter part 320. The signals obtained by performing 5-times interpolation on the 20 Mbps signals include a baseband signal and image signals, the center frequencies of which are separated in units of 100 MHz in the frequency domain, and the image signals symmetrically appear centering on the baseband signal. The output signals performed the half-band filtering by the half -band filter part 320 are signals, from which the third image signals are removed, a data rate of which is increased to 100 Mbps.

[44] The DDS 330 generates a sine (sin) signal and a cosine (cos) signal, and outputs them to the modulation part 340. For example, to output a 15 MHz IF signal, the DDS 330 generates 15 MHz sin signal and cos signal, and outputs them to the modulation part 340.

[45] The modulation part 340 receives the baseband I signal and Q signal performed the half-band filtering from the half-band filter part 320, and the cos signal and sin signal from the DDS 330. The modulation part 340, including a multiplierl 342, a multiplied 344 and an adder 346, modulates using the received baseband I signal and Q signal and the received cos signal and sin signal, i.e., frequency up-converts the baseband I signal and Q signal into an IF IQ signal. The multiplierl 342 multiplies the baseband I signal performed the half-band filtering by the cos signal, and the multiplied 344 multiplies the baseband Q signal performed the half-band filtering by the sin signal. The adder 346 adds an output signal of the multiplierl 342 to an output signal of the multiplied 344, and outputs a first-IF IQ signal. Herein, when the output signals of the DDS 330 are 15 MHz sin signal and cos signal, the adder 346 outputs a 15 MHz IF IQ signal (FA IQ).

[46] Reference numeral 440 in FIG. 4 represents a frequency spectrum of output signal of the modulation part 340. Shown is a frequency spectrum of 15 MHz IF signal obtained by multiplying the 100 Mbps baseband signal by the 15 MHz cos and sin signals outputted from the DDS 330.

[47] The selector 350 receives the baseband I signal and Q signal (FA I, FA Q) performed the half -band filtering from the half -band filter part 320, and the frequency up- converted IF IQ signal (FA IQ) from the modulation part 340, and selects at least one of the received signals.

[48] The DAC part 360, including a DACl 362 and a DAC2 364, converts the output signal of the selector 350 into an analog signal. When the baseband I signal and Q signal are received from the selector 350, the DACl 362 converts the baseband I signal and Q signal (FAl, FA Q) into analog signals. When the frequency up-converted IF IQ signal is received from the selector 350, the DAC2 364 outputs an analog signal obtained by up-modulating the IF IQ signal (FA IQ) to a second IF higher than the first-IF. For example, when a 15 MHz IF IQ signal is received, the DAC2 364 performs up-sampling the received signal so that its frequency becomes a target frequency, and performs quadrature modulation thereon, outputting an up-converted IF IQ signal. Herein, when the target frequency is 115 MHz, the DAC2 364 performs up- sampling the 15 MHz IQ signal using a 100 MHz sampling signal, and then, outputs a 115 MHz IF IQ signal. In addition, when the target frequency is 115 MHz, the DAC2 364 performs 1/4-modulation a 400 MHz sampling signal using the 400 MHz sampling signal, and then performs up-sampling the 15 MHz IF IQ signal, outputting a 115 MHz IF IQ signal. The 100 MHz or 400 MHz sampling signal is outputted from an internal Phase Locked Loop (PLL) of the DAC part 360, or outputted from other external devices.

[49] Reference numeral 450 in FIG. 4 shows a frequency spectrum of an output signal when a 15 MHz IF IQ signal is inputted to the DAC2 364, especially shows an exemplary case where for the output signal, its target frequency is preset as 115 MHz. Herein, the frequency up-conversion apparatus can also be implemented with a Field Programmable Gate Array (FPGA) including a Giga Transceiver Port (GTP) and a CPRI, with the DAC part 360 excluded, as shown in FIG. 5. FIG. 5 is a diagram illustrating an exemplary implementation of an FPGA for some constituent elements of a frequency up-conversion apparatus in a wireless communication system according to an embodiment of the present invention. Further, the frequency up-conversion apparatus executes its all functions that processes analog signals in the FPGA, using digital signal processing, and for this, it may use a system generator. With reference to FIG. 6, a description will now be made of a frequency up-conversion apparatus designed using an FPGA system generator.

[50] FIG. 6 is a diagram schematically illustrating an exemplary implementation of a frequency up-conversion apparatus in a wireless communication system according to an embodiment of the present invention.

[51] Referring to FIG. 6, reference numeral 610 represents the DDS 330 in FIG. 3, reference numeral 620 represents the modulation part 340 in FIG. 3, reference numeral 630 represents the half -band filter part 320 in FIG. 3, and reference numeral 640 represents the channel filter part 310 in FIG. 3.

[52] The channel filter part 640 performs first interpolation on the baseband I signal and

Q signal received from the DCCU, and then performs channel filtering thereon. Herein, the channel filter part 640 performs 2-times interpolation on the baseband I signal and Q signal having a data rate of 10 Mbps, performs channel filtering image signals formed in units of 10 MHz from the baseband I signal and Q signal performed the 2-times interpolation, and outputs baseband I signal and Q signal, a data rate of which is increased to 20 Mbps. The half-band filter part 630 performs second interpolation on the baseband I signal and Q signal performed the channel filtering, and then performs half-band filtering thereon. Herein, the half-band filter part 630 performs 5-times interpolation on the 20 Mbps baseband I signal and Q signal outputted from the channel filter part 640, performs half-band filtering image signals formed in units of 120 MHz from the baseband I signal and Q signal performed the 5-times interpolation, and outputs baseband I signal and Q signal, a data rate of which is increased to 100 Mbps. The DDS 610 generates 15 MHz sin and cos signals. The modulation part 620 modulates, i.e., frequency up-converts, the baseband I signal and Q signal performed the half-band filtering using the cos and sin signals. Herein, the modulation part 620 multiplies the 100 Mbps I signal performed the half -band filtering by the 15 MHz cos signal, multiplies the 100 Mbps Q signal performed the half -band filtering by the 15 MHz sin signal, adds the multiplied I signal and Q signal, and outputs a 15 MHz IF IQ signal. With reference to FIG. 7, a detailed description will now be made of an operating process of a frequency up-conversion apparatus in a wireless communication system according to an embodiment of the present invention.

[53] FIG. 7 is a diagram schematically illustrating an operating process of a frequency up- conversion apparatus according to an embodiment of the present invention.

[54] Referring to FIG. 7, in step S710, a frequency up-conversion apparatus receives baseband I signal and Q signal from a DCCU via a CPRI, performs first interpolation on the received baseband I signal and Q signal so that channel filtering on the received baseband I signal and Q signal can be easily performed, and then performs channel filtering on the baseband I signal and Q signal performed the first interpolation. Herein, the baseband I signal and Q signal are outputted from the DCCU, which are digital signals having a predetermined data rate, include baseband I signal and Q signal, and image signals. For example, when baseband I signal and Q signal are received from the DCCU at a data rate of 10 Mbps, the baseband I signal and Q signal, together with image signals formed in units of 10 MHz, are included in the frequency domain. When the baseband I signal and Q signal outputted from the DCCU are 10 Mbps signals, the frequency up-conversion apparatus performs 2-times interpolation thereon, removes image signals formed in units of 10 MHz by performing channel filtering on the baseband I signal and Q signal performed 2-times interpolation, and outputs baseband I signal and Q signal, a data rate of which is increased to 20 Mbps, and image signals are included in the data rate-increased baseband I signal and Q signal in units of 20 MHz.

[55] Next, in step S720, the frequency up-conversion apparatus performs second interpolation on the baseband I signal and Q signal performed the channel filtering, and then performs half-band filtering on the baseband I signal and Q signal performed the second interpolation. When the baseband I signal and Q signal performed the channel filtering are signals up-converted to 20 Mbps, the frequency up-conversion apparatus performs 5-times interpolation so that an IF IQ signal, frequency up-converted during frequency up-conversion to an IF, can be 100 MHz or higher, removes image signals formed in units of 20 MHz by performing half-band filtering the baseband I signal and Q signal performed the 5-times interpolation, and outputs baseband I signal and Q signal, a data rate of which is increased to 100 Mbps. Waveforms of the baseband I signal and Q signal performed the half -band filtering are as shown in FIG. 8. FIG. 8 shows actual data in the frequency domain, which is the baseband signal outputted from the half-band filter part 320.

[56] In step S730, the frequency up-conversion apparatus modulates the baseband I signal and Q signal performed the half-band filtering into IF I signal and Q signal, i.e., frequency up-converts the baseband I signal and Q signal to an IF IQ signal. The baseband I signal and Q signal performed the half-band filtering are frequency up- converted to IF I signal and Q signal after they are multiplied by sin signal and cos signal outputted from the DDS 330, and the frequency up-converted IF I signal and Q signal are added, outputting an IF IQ signal. For example, when the baseband I signal and Q signal performed the half-band filtering are 20 Mbps signals, the frequency up- conversion apparatus frequency up-converts them to 15 MHz IF I signal and Q signal using 15 MHz sin signal and cos signal, and then adds the frequency up-converted IF I signal and Q signal, outputting a 15 MHz IF IQ signal. Waveforms of the IF IQ signal are as shown in FIG. 9. FIG. 9 is a diagram illustrating the 15 MHz IF IQ signal outputted from the modulation part 340.

[57] Thereafter, in step S740, the frequency up-conversion apparatus selects at least one of the baseband I signal and Q signal (FA I, FA Q) performed the half -band filtering, and the IF IQ signal (FA IQ). In step S750, the frequency up-conversion apparatus converts the selected signal into an analog signal. More specifically, when the baseband I signal and Q signal are selected in step S740, the frequency up-conversion apparatus converts the selected baseband I signal and Q signal into analog signals in step S750. When the IF IQ signal is selected in step S740, the frequency up-conversion apparatus converts modulates the IF IQ signal to an IF IQ signal having a higher band, and then converts the modulated IF IQ signal into an analog signal. For example, when the selected IF IQ signal is 15 MHz, the frequency up-conversion apparatus modulates the 15 MHz IF IQ signal into a 115 MHz IF IQ signal using a 100 MHz sampling signal, and then converts the modulated 115 MHz IQ signal into an analog signal. A detailed description will now be made of frequency up-conversion for supporting multiple FAs in a wireless communication system according to another embodiment of the present invention. With reference to FIG. 10, a detailed description will be made of a frequency up-conversion apparatus for supporting multiple FAs in a wireless communication system according to another embodiment of the present invention.

[58] FIG. 10 is a diagram schematically illustrating a structure of a frequency up- conversion apparatus in a wireless communication system according to another embodiment of the present invention.

[59] Referring to FIG. 10, a frequency up-conversion apparatus includes a multiplexer part 1010 for performing multiplexing on baseband FA I signals and Q signals with the multiple FAs (DCCU FAl I, DCCU FA2 I, DCCU FA3 I, DCCU FAl Q, DCCU FA2 Q, DCCU FA3 Q) outputted from a DCCU, a channel filter part 1020 for performing channel filtering on the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the multiplexing, and outputted from the multiplexer part 1010, a half-band filter part 1030 for performing half -band filtering on the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the channel filtering, and outputted from the channel filter part 1020, a demultiplexer part 1040 for performing demultiplexing on the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the half -band filtering, and outputted from the half -band filter part 1030, a modulation block 1050 for modulating the baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) performed the demultiplexing, and outputted from the demultiplexer p art 1040 into IF FA IQ signals (FAl IQ, FA2 IQ, FA3 IQ), and a combiner part 1060 for combining the modulated IF FA IQ signals (FAl IQ, FA2 IQ, FA3 IQ) outputted from the modulation block 1050, and outputs an IF multi-FA IQ signal with the one FA (3FA IQ).

[60] The modulation block 1050 includes a DDS part for generating cos signals and sin signals, and a modulation part for frequency up-converting the baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) performed the demultiplexing using the cos signals and sin signals, and a detailed description thereof will be given with reference to FIG. 12. The baseband FA I signals and Q signals (DCCU FAl I, DCCU FA2 I, DCCU FA3 I, DCCU FAl Q, DCCU FA2 Q, DCCU FA3 Q) are outputted from the DCCU after performing IQ-demultiplexing on FA IQ signals (DCCU FAl IQ, DCCU FA2 IQ, DCCU FA3 IQ) by an IQ demultiplexer (DeMUX; not shown). The frequency conversion apparatus shown in FIG. 10 can further include a selector 350 and a DAC part 360, like the frequency conversion apparatus shown in FIG. 3.

[61] In this case, the selector 350 receives baseband multi-FA I signal and Q signal (3FA

I, 3FA Q) performed the half-band filtering from the half-band filter part 1030, receives an IF multi-FA IQ signal (3FA IQ) from the combiner part 1060, selects at least one of the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the half-band filtering, and the IF multi-FA IQ signal (3FA IQ), and outputs the selected signal to the DAC part 360. When the selector 350 selects the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the half -band filtering, the DAC part 360 converts the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the half -band filtering into analog signals. When the selector 350 selects the IF multi- FA IQ signal (3FA IQ), the DAC part 360 up-modulates the IF multi-FA IQ signal (3FA IQ) into a multi-FA IQ signal (3FA IQ) having a second IF higher than the first IF, and then converts the modulated multi-FA IQ signal (3FA IQ) into an analog signal. A DACl 362 in the DAC part 360 converts the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) into analog signals, and a DAC2 364 up-modulates the first- IF multi-FA IQ signal (3FA IQ) into a second-IF multi-FA IQ signal (3FA IQ), and converts the up-modulated multi-FA IQ signal (3FA IQ) into an analog signal.

[62] The multiplexer part 1010 includes a multiplexer 1 (MUXl) 1012 for performing multiplexing on the baseband FA I signals (DCCU FAl I, DCCU FA2 I, DCCU FA3 I) outputted from the DCCU, and a MUX2 1014 for performing multiplexing on the baseband FA Q signals (DCCU FAl Q, DCCU FA2 Q, DCCU FA3 Q) outputted from the DCCU.

[63] The MUXs 1012 and 1014 receive baseband FA I signals and Q signals (DCCU FAl

I, DCCU FA2 I, DCCU FA3 I, DCCU FAl Q, DCCU FA2 Q, DCCU FA3 Q) outputted from the DCCU, perform third interpolation, e.g., 3-times interpolation, thereon so that the baseband FA I signals and Q signals (DCCU FAl I, DCCU FA2 I, DCCU FA3 I, DCCU FAl Q, DCCU FA2 Q, DCCU FA3 Q) can be easily performed multiplexing, perform multiplexing on the baseband FA I signals and Q signals, a data rate of which is increased 3 times, and output the multi-FA I signal and Q signal (3FA I, 3FA Q) to the channel filter part 1020. Herein, when 10 Mbps baseband FA I signals and Q signals (DCCU FAl I, DCCU FA2 I, DCCU FA3 I, DCCU FAl Q, DCCU FA2 Q, DCCU FA3 Q) are received from the DCCU, the MUXs 1012 and 1014 output 30 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) to the channel filter part 1020. The MUXs 1012 and 1014 output a reference signal to the channel filter part 1020 so that the channel filter part 1020 can perform channel filtering for removing image signals, and the channel filter part 1020 performs channel filtering based on the reference signal.

[64] The channel filter part 1020 includes a channel filter 1 1022 for performing channel filtering on the baseband multi-FA I signal (3FA I) performed the multiplexing using the reference signal received from the MUXl 1012 in the multiplexer part 1010, and a channel filter2 1024 for performing channel filtering on the baseband multi-FA Q signal (3FA Q) performed the multiplexing using the reference signal received from the MUX2 1014 in the multiplexer part 1010. Herein, the channel filter part 1020, like the channel filter part 310 shown in FIG. 3, performs first interpolation so that it can easily perform channel filtering on input signals, performs channel filtering to remove image signals, and outputs the signals performed the channel filtering to the half -band filter part 1030. A frequency spectrum of the input signals to the channel filter part 1020 is shown by reference numeral 410 of FIG. 4, and a frequency spectrum of the output signals is shown by reference numeral 420 of FIG. 4.

[65] The channel filters 1022 and 1024 receive the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) and the reference signal from the MUXs 1012 and 1014, perform first interpolation, e.g., 2-times interpolation, on the received multi-FA I signal and Q signal (3FA I, 3FA Q), perform channel filtering on the baseband multi- FA I signal and Q signal performed the first interpolation, a data rate of which is doubled, and output the results to the half-band filter part 1030. Herein, when 30 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) are received from the MUXs 1012 and 1014, the channel filters 1022 and 1024 perform channel filtering on 60 Mbps multi-FA I signal and Q signal (3FA I, 3FA Q) by performing the first interpolation according to the reference signal, and output the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the channel filtering to the half-band filter part 1030.

[66] The half -band filter part 1030 includes a half-band filterl 1032 for performing half- band filtering on the baseband multi-FA I signal (3FA I) performed the channel filtering, received from the channel filterl 1022 in the channel filter part 1020, and a half-band filter2 1034 for performing half -band filtering on the baseband multi-FA Q signal (3FA Q) performed the channel filtering, received from the channel filter2 1024 in the channel filter part 1020. Herein, the half-band filter part 1030, like the half -band filter part 320 shown in FIG. 3, performs second interpolation so that it can easily perform half-band filtering on input signals, performs half-band filtering to remove image signals, and outputs the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed to half-band filtering to the demultiplexer part 1040 and the selector 350. A frequency spectrum of the output signals of the half -band filter part 1030 is shown by reference numeral 430 of FIG. 4.

[67] The half -band filters 1032 and 1034 receive the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the channel filtering from the channel filters 1022 and 1024, perform second interpolation, e.g., 5-times interpolation, on the received multi-FA I signal and Q signal (3FA I, 3FA Q), perform half -band filtering on the baseband multi-FA I signal and Q signal performed the second interpolation, a data rate of which is increased 5 times, and output the results to the demultiplexer part 1040 and the selector 350. Herein, when 60 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) are received from the channel filters 1022 and 1024, the half-band filters 1032 and 1034 perform half -band filtering on 300 Mbps multi-FA I signal and Q signal (3FA I, 3FA Q) by performing the second interpolation, and output the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the half-band filtering to the demultiplexer part 1040 and the selector 350. Further, the half -band filters 1032 and 1034 output to the demultiplexer part 1040 synchronization signals determined by performing the half -band filtering of the multi-FA I signal and Q signal (3FA I, 3FA Q), and the demultiplexer part 1040 performs demultiplexing using the synchronization signals.

[68] The demultiplexer part 1040 includes a DeMUXl 1042 for performing demultiplexing on the multi-FA I signal (3FA I) performed the half -band filtering, received from the half-band filterl 1032 in the half-band filter part 1030, and a DeMUX2 1044 for performing demultiplexing the multi-FA Q signal (3FA Q) performed the half -band filtering, received from the half-band filter2 1034 in the half-band filter part 1030.

[69] The DeMUXs 1042 and 1044 receive the multi-FA I signal and Q signal (3FA I, 3FA

Q) performed the half-band filtering and the synchronization signals from the half- band filters 1032 and 1034, perform demultiplexing the multi-FA I signal and Q signal (3FA I, 3FA Q) performed the half -band filtering according to the synchronization signals, perform inverse-interpolation (or decimation), e.g., 3-times inverse-interpolation (or 3-times decimation) corresponding to the 3-times interpolation, on the FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) performed the demultiplexing, and output the results to the modulation block 1050. Herein, in opposition to the MUXs 1012 and 1014, the DeMUXs 1042 and 1044 perform 3-times inverse-interpolation after performing demultiplexing on the multi-FA I signal and Q signal (3FA I, 3FA Q) performed the half -band filtering, and perform demultiplexing on the multi-FA I signal and Q signal (3FA I, 3FA Q) according to the synchronization signals received from the half -band filters 1032 and 1034. Further, the DeMUXs 1042 and 1044 perform 3-times inverse-interpolation on the signals performed the demul- tiplexing, and then output FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q), a data rate of which is decreased 3 times, to the modulation block 1050. Herein, when 300 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) are received from the half-band filters 1032 and 1034, the DeMUXs 1042 and 1044 perform demultiplexing on the multi-FA I signal and Q signal (3FA I, 3FA Q), perform 3-times inverse-interpolation thereon, and output 100 Mbps FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) to the modulation block 1050. With reference to FIG. 11, a detailed description will now be made of the demultiplexer part 1040 in a wireless communication system according to another embodiment of the present invention.

[70] FIG. 11 is a diagram schematically illustrating a structure of a DeMUX 1042/1044 of a frequency up-conversion apparatus in a wireless communication system according to another embodiment of the present invention.

[71] Referring to FIG. 11, the DeMUX 1042/1044 includes register units 1122, 1124 and

1126 for receiving the multi-FA I signal/Q signal (3FA 1/3 FA Q) performed the half- band filtering from the half-band filter 1032/1034 and outputting FA I signals/Q signals (FAl I/FA1 Q, FA2 I/FA2 Q, FA3 I/FA3 Q), operation units 1112, 1114 and 1116 for outputting enable signals for the register units 1122, 1124 and 1126, and a setting unit 1102 for outputting setting signals for an AND operation of the operation units 1112, 1114 and 1116. When the DeMUX 1042/1044 receive a synchronization signal sync from the half -band filter 1032/1034 as described above, the synchronization signal is inputted to each of the operation units 1112, 1114 and 1116. The synchronization signal is a signal determined for synchronization of FA I signals/Q signals (FAl I/FA1 Q, FA2 I/FA2 Q, FA3 I/FA3 Q) in the multi-FA I signal/Q signal (3FA I/3FA Q) according to the half-band filtering of the half -band filter 1032/1034. The DeMUX 1042/1044, though not illustrated in detail, further includes inverse- interpolation units (or decimation units) for performing 3-times inverse-interpolation on the FA I signals/Q signals (FAl I/FA1 Q, FA2 I/FA2 Q, FA3 I/FA3 Q) outputted from the register units 1122, 1124 and 1126, and outputting the FA I signals/Q signals (FAl I/FA1 Q, FA2 I/FA2 Q, FA3 I/FA3 Q) performed demultiplexing to the modulation block 1050.

[72] The register units 1122, 1124 and 1126 each receive the multi-FA I signal/Q signal

(3FA I/3FA Q) performed the half -band filtering from the half -band filter 1032/1034, and when the register units 1122, 1124 and 1126 are enabled by the enable signals outputted from the operation units 1112, 1114 and 1116, they separate the multi-FA I signal/Q signal (3FA I/3FA Q) according to FA, and output corresponding FA I signals/Q signals. In other words, when the register unitl 1122 is enabled as an enable signal is received from the operation unitl 1112, the register unitl 1122 separates an FAl I signal/Q signal (FAl I/FA1 Q) from the multi-FA I signal/Q signal (3FA I/3FA Q). When the register unit2 1124 is enabled as an enable signal is received from the operation unit2 1114, the register unit2 1124 separates an FA2 I signal/Q signal (F A2 I/FA2 Q) from the multi-FA I signal/Q signal (3FA I/3FA Q). When the register unit3 1126 is enabled as an enable signal is received from the operation unit3 1116, the register unit3 1126 separates an FA3 I signal/Q signal (FA3 I/FA3 Q) from the multi- FA I signal/Q signal (3FA I/3FA Q).

[73] The operation units 1112, 1114 and 1116 receive the synchronization signal from the half-band filter 1032/1034, receive setting signals from the setting unit 1102, and perform AND operation on a synchronization value of the synchronization signal and setting values of the setting signals. The operation units 1112, 1114 and 1116 output the enable signals to the register units 1122, 1124 and 1126 according to the result values of the AND operation.

[74] The setting unit 1102 sets setting values for an AND operation of the operation units

1112, 1114 and 1116, and outputs setting signals including the setting values to the operation units 1112, 1114 and 1116. An operation of the DeMUX 1042/1044 will now be described in detail by way of example.

[75] The half -band filter 1032/1034 by performing the half-band filtering on the multi-FA

I signal/Q signal (3FA I/3FA Q) outputs a synchronization signal sync having in sequence a different synchronization value for each FA to the DeMUX 1042/1044. In other words, the half -band filter 1032/1034 outputs to the DeMUX 1042/1044 a synchronization signal sync that has in sequence a synchronization value corresponding to FAl, a synchronization value corresponding to FA2 and a synchronization value corresponding to FA3, according to the half-band filtering for FAl, FA2 and FA3. For convenience, it will be assumed herein that the synchronization value corresponding to FAl is 0, the synchronization value corresponding to FA2 is 1, and the synchronization value corresponding to FA3 is 2.

[76] The synchronization signal sync including the synchronization values for individual

FAs is inputted to the operation units 1112, 1114 and 1116. The setting unit 1102 sets different setting values for individual FAs, and outputs setting signals including the setting values to the operation units 1112, 1114 and 1116. Herein, the setting unit 1102 separately sets a setting value corresponding to FAl, a setting value corresponding to FA2, and a setting value corresponding to FA3, and outputs setting signals including only one setting value to corresponding operation units. The setting value corresponding to FAl is 0, the setting value corresponding to FA2 is 1, and the setting value corresponding to FA3 is 2. A setting signal with a setting value 0 is inputted to the operation unitl 1112, a setting signal with a setting value 1 is inputted to the operation unit2 1114, and a setting signal with a setting value 2 is inputted to the operation unit3 1116.

[77] The operation units 1112, 1114 and 1116 perform an AND operation on the synchronization values in the received synchronization signal (sync) and the setting values in the received setting signals, and output enable signals to the corresponding register units 1122, 1124 and 1126 according to the result values of the AND operation. Herein, when the setting value and synchronization value corresponding to FAl are received, the operation unitl 1112 outputs an enable signal to the register unitl 1122 by means of an AND operation, and the register unitl 1122 is enabled and outputs an FAl I signal/Q signal (FAl I/FA1 Q) to the modulation block 1050. Similarly, when the setting value and synchronization value corresponding to FA2 are received, the operation unit2 1114 outputs an enable signal to the register unit2 1124 by means of an AND operation, and the register unit2 1124 is enabled and outputs an FA2 I signal/Q signal (FA2 I/FA2 Q) to the modulation block 1050. In addition, when the setting value and synchronization value corresponding to FA3 are received, the operation unit3 1116 outputs an enable signal to the register unit3 1126 by means of an AND operation, and the register unit3 1126 is enabled and outputs an FA3 I signal/Q signal (FA3 I/FA3 Q) to the modulation block 1050. With reference to FIG. 12, a description will now be made of the modulation block 1050 of the frequency up-con version apparatus in the wireless communication system according to another embodiment of the present invention.

[78] FIG. 12 is a diagram schematically illustrating a structure of a modulation block

1050 in a frequency up-con version apparatus in a wireless communication system according to another embodiment of the present invention.

[79] Referring to FIG. 12, the modulation block 1050 includes a DDS part 1210 for generating sin signals and cos signals, and a modulation part 1220 for frequency up- converting the FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) performed the multiplexing by the demultiplexer part 1040 into IF FA IQ signals (FAl IQ, FA2 IQ, FA3 IQ) using the sin signals and cos signals. Herein, the FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) being inputted to the modulation part 1220 from the demultiplexer part 1040, are baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q), a data rate of which is increased 10 times compared with the baseband FA I signals and Q signals (DCCU FAl I, DCCU FA2 I, DCCU FA3 I, DCCU FAl Q, DCCU FA2 Q, DCCU FA3 Q) which are outputted from the DCCU by means of the multiplexer part 1010, the channel filter part 1020, the half -band filter part 1030 and the demultiplexer part 1040. The DDS part 1210 generates cos signals and sin signals for frequency up-con version like the DDS 330 of FIG. 3, and the modulation part 1220 frequency up-converts signals having the baseband frequency into signals having the IF using the cos signals and sin signals outputted from the DDS part 1210, like the modulation part 340 of FIG. 3.

[80] The DDS part 1210 includes an FAl DDS 1212 for generating a sin signal and a cos signal corresponding to FAl, an FA2 DDS 1214 for generating a sin signal and a cos signal corresponding to FA2, and an FA3 DDS 1216 for generating a sin signal and a cos signal corresponding to FA3. The DDSs 1212, 1214 and 1216 output the generated sin signals and cos signals to corresponding multipliers so that they can be multiplied by the corresponding FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q). Herein, the DDS part 1210 generates 15 MHz sin signals and cos signals, and outputs them to the modulation part 1220 to output 15 MHz IF FA IQ signals (FAl IQ, FA2 IQ, FA3 IQ).

[81] The modulation part 1220 includes multipliers 1222, 1224, 1232, 1234, 1242 and

1244 for multiplying the FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) outputted from the demultiplexer part 1040 by the cos signals and sin signals outputted from the DDS part 1210, and adders 1226, 1236 and 1246 for adding output signals of the multipliers 1222, 1224, 1232, 1234, 1242 and 1244 separately for their corresponding FAs, and outputting the FA IQ signals (FAl IQ, FA2 IQ, FA3 IQ) to the combiner part 1060. Herein, a first multiplication part, including a multiplier 1 1222, a multiplier3 1232 and a multiplier5 1242, multiplies the FA I signals (FAl I, FA2 I, FA3 I) outputted from the DeMUXl 1042 by the cos signals outputted from the DDS part 1210 to frequency up-convert baseband FA I signals (FAl I, FA2 I, FA3 I) into IF FA I signals (FAl I, FA2 I, FA3 I). A second multiplication part, including a multiplied 1224, a multiplied 1234 and a multiplierό 1244, multiplies the FA Q signals (FAl Q, FA2 Q, FA3 Q) outputted from the DeMUX2 1044 by the sin signals outputted from the DDS part 1210 to frequency up-convert baseband FA Q signals (FAl Q, FA2 Q, FA3 Q) into IF FA Q signals (FAl Q, FA2 Q, FA3 Q). The adders 1226, 1236 and 1246 add the frequency up-converted IF FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) separately for individual FAs, and output FA IQ signals (FAl IQ, FA2 IQ, FA3 IQ) to the combiner part 1060.

[82] When the output signals of the DDS part 1210 are 15 MHz cos signals and sin signals, the adders 1226, 1236 and 1246 output 15 MHz IF FA IQ signals (FAl IQ, FA2 IQ, FA3 IQ). A frequency spectrum of the output signal of the modulation part 1220 is shown by reference numeral 440 of FIG. 4.

[83] The combiner part 1060 includes a combinerl 1062 for combining the frequency up- converted IF FAl IQ signal (FAl IQ) and FA2 IQ signal (FA2 IQ) received from the modulation part 1220 in the modulation block 1050, a delay 1064 for delaying the frequency up-converted IF FA3 IQ signal (FA3 IQ) received from the modulation part 1220 in the modulation block 1050, and a combiner2 1066 for combining the combined 2FA IQ signal (2FA IQ) received from the combiner 1 1062 with the delayed FA3 IQ signal (FA3 IQ) received from the delay 1064. Herein, the combiner part 1060 outputs an IF multi-FA IQ signal (3FA IQ) to the selector 350 via the combiner 2 1066 as described above.

[84] The combinerl 1062 receives the frequency up-converted IF FAl IQ signal (FAl IQ) and FA2 IQ signal (FA2 IQ) from the modulation part 1220, combines the received FAl IQ signal (FAl IQ) with the FA2 IQ signal (FA2 IQ), and outputs the results to the combiner2 1066. The delay 1064 receives the frequency up-converted IF FA3 IQ signal (FA3 IQ) from the modulation part 1220, and delays the received FA3 IQ signal (FA3 IQ) while the combinerl 1062 combines the FAl IQ signal (FAl IQ) with the FA2 IQ signal (F A2 IQ). When the combiner2 1066 receives a delay signal which is synchronized with the combined signal outputted from the combinerl 1062 by the delay of the delay 1064, the combiner2 1066 combines the output signal of the combinerl 1062 with the output signal of the delay 1064, and outputs a multi-FA IQ signal (3FA IQ) frequency up-converted from the baseband to the IF, to the selector 350.

[85] The frequency up-conversion apparatus according to another embodiment of the present invention can be realized with an FPGA including a GTP and a CPRI except for a DAC, as shown in FIG. 13. FIG. 13 is a diagram illustrating an exemplary implementation of an FPGA for some constituent elements of a frequency up-conversion apparatus in a wireless communication system according to another embodiment of the present invention. The frequency up-conversion apparatus performs all functions of processing analog signals in the FPGA in a digital signal processing manner, and for this, the frequency up-conversion apparatus can use a system generator. With reference to FIG. 14, a description will now be made of a frequency up-conversion apparatus designed using the FPGA system generator.

[86] FIG. 14 is a diagram schematically illustrating an exemplary implementation of a frequency up-conversion apparatus in a wireless communication system according to another embodiment of the present invention.

[87] Referring to FIG. 14, reference numeral 1410 represents the multiplexer part 1010 of

FIG. 10, reference numeral 1420 represents the channel filter part 1020 of FIG. 10, reference numeral 1430 represents the half-band filter part 1030 of FIG. 10, and reference numeral 1440 represents the demultiplexer part 1040 of FIG. 10.

[88] When the baseband FA I signals and Q signals (DCCU FAl I, DCCU FA2 I, DCCU

FA3 I, DCCU FAl Q, DCCU FA2 Q, DCCU FA3 Q) outputted from the DCCU are received, the multiplexer part 1410 performs the multiplexing on them after performing third interpolation thereon. Herein, the multiplexer part 1410 performs 3-times interpolation on 10 Mbps baseband FA I signals and Q signals (DCCU FAl I, DCCU FA2 I, DCCU FA3 I, DCCU FAl Q, DCCU FA2 Q, DCCU FA3 Q), performs the multiplexing on 30 Mbps baseband FA I signals and Q signals (DCCU FAl I, DCCU FA2 I, DCCU FA3 I, DCCU FAl Q, DCCU FA2 Q, DCCU FA3 Q) performed the 3-times interpolation, and outputs multi-FA I signal and Q signal (3FA I, 3FA Q) to the channel filter part 1420.

[89] When the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) are received from the multiplexer part 1410, the channel filter part 1420 performs the channel filtering on them after performing first interpolation thereon. Herein, the channel filter part 1420 performs 2-times interpolation on 30 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q), performs the channel filtering image signals from 60 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the 2-times interpolation, and outputs the baseband multi-FA I signal and Q signal (3FA I, 3FA Q), a data rate of which is increased to 60 Mbps, to the half -band filter part 1430.

[90] The half -band filter part 1430 performs second interpolation on the baseband multi-

FA I signal and Q signal (3FA I, 3FA Q) performed the channel filtering, and performs half-band filtering thereon. Herein, the half-band filter part 1430 performs 5-times interpolation on 60 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q), performs the half-band filtering image signals from 300 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the 5-times interpolation, and outputs the baseband multi-FA I signal and Q signal (3FA I, 3FA Q), a data rate of which is increased to 300 Mbps, to the demultiplexer part 1440.

[91] The demultiplexer part 1440 performs demultiplexing on the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the half -band filtering, and performs inverse-interpolation (or decimation) thereon. Herein, the demultiplexer part 1440 performs demultiplexing on 300 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q), performs 3-times inverse-interpolation (or 3-times decimation) on 300 Mbps baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) performed demultiplexing, and outputs the baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q), a data rate of which is decreased to 100 Mbps, to the modulation block 1050. With reference to FIG. 15, a detailed description will now be made of an operating process of a frequency up-conversion apparatus in a wireless communication system according to another embodiment of the present invention.

[92] FIG. 15 is a diagram schematically illustrating an operating process of a frequency up-conversion apparatus according to another embodiment of the present invention.

[93] Referring to FIG. 15, in step S1510, a frequency up-conversion apparatus performs third interpolation on the baseband FA I signals and Q signals outputted from a DCCU through a IQ MUX, and performs multiplexing on the baseband I signals and Q signals performed the third interpolation. Herein, the baseband FA I signals and Q signals outputted from the DCCU are digital signals having a predetermined data rate, and include baseband FA I signals and Q signals, and image signals. For example, when the baseband FA I signals and Q signals are received from the DCCU at 10 Mbps, the frequency up-conversion apparatus performs third interpolation, e.g., 3-times interpolation, thereon, performs multiplexing on the baseband FA I signals and Q signals performed the 3-times interpolation, and outputs baseband multi-FA I signal and Q signal, a data rate of which is increased to 30 Mbps.

[94] Thereafter, in step S 1520, the frequency up-conversion apparatus performs first interpolation on the baseband multi-FA I signal and Q signal performed the multiplexing so that the baseband multi-FA I signal and Q signal can be easily performed channel filtering, and then performs channel filtering on the baseband multi-FA I signal and Q signal performed the first interpolation. Herein, when the baseband multi-FA I signal and Q signal are 30 Mbps signals, the frequency up-conversion apparatus performs 2-times interpolation thereon, removes image signals by performing channel filtering on the baseband multi-FA I signal and Q signal performed the 2-times interpolation, and outputs the baseband multi-FA I signal and Q signal, a data rate of which is increased to 60 Mbps.

[95] Next, in step S 1530, the frequency up-conversion apparatus performs second interpolation on the baseband multi-FA I signal and Q signal performed the channel filtering, and then performs half -band filtering on the baseband multi-FA I signal and Q signal performed the second interpolation. Herein, when the baseband multi-FA I signal and Q signal performed the channel filtering is increased to 60 Mbps, the frequency up-conversion apparatus performs 5-times interpolation thereon so that the IF IQ signals frequency up-converted during frequency up-conversion to an IF become 100MHz or higher, removes image signals by performing half -band filtering on the baseband multi-FA I signal and Q signal performed the 5-times interpolation, and outputs the baseband multi-FA I signal and Q signal, a data rate of which is increased to 300 Mbps. Waveforms of the baseband multi-FA I signal and Q signal performed the half -band filtering are as shown in FIG. 16, and FIG. 16 shows actual data in the frequency domain, which is the baseband multi-FA I signals and Q signals outputted from the half-band filter part 1030. The baseband multi-FA I signal and Q signal performed the half-band filtering are outputted to the demultiplexer part 1040 and the selector 350.

[96] In step S 1540, the frequency up-conversion apparatus performs demultiplexing on the baseband multi-FA I signal and Q signal performed the half -band filtering, and then performs inverse-interpolation (or decimation) on the baseband FA I signals and Q signals performed the demultiplexing. Herein, when the baseband multi-FA I signal and Q signal performed the half-band filtering are 300 Mbps signals, the frequency up- conversion apparatus performs demultiplexing on the baseband multi-FA I signal and Q signal in opposition to the multiplexing, performs 3-times inverse-interpolation on the baseband FA I signals and Q signals performed the multiplexing according to the third interpolation, and outputs the baseband FA I signals and Q signals, a data rate of which is decreased to 100 Mbps.

[97] Thereafter, in step S 1550, the frequency up-con version apparatus modulates the baseband FA I signals and Q signals performed the inverse-interpolation into IF FA I signals and Q signals, i.e., frequency up-converts the baseband FA I signals and Q signals into IF FA IQ signals. Herein, the baseband FA I signals and Q signals performed the inverse-interpolation are frequency up-converted into IF FA I signals and Q signals after being multiplied by sin signals and cos signals outputted from the DDS part 1210, and the frequency up-converted IF FA I signals and Q signals are added, outputting IF FA IQ signals.

[98] Next, in step S 1560, the frequency up-con version apparatus combines the frequency up-converted IF FA IQ signals, and outputs the combined IF multi-FA IQ signal. Waveforms of the multi-FA IQ signal, frequency up-converted to the IF, are as shown in FIG. 17. FIG. 17 shows actual data in the frequency domain, which is the frequency up-converted IF signal outputted from the combiner part 1060. The IF multi-FA IQ signal is inputted to a selector 350 as described above, and the selector 350 selects at least one of the baseband multi-FA I signal and Q signal performed the half -band filtering, shown in FIG. 16, and the IF multi-FA IQ signal shown in FIG. 17, and the selected signal is inputted to a DAC part 360. The DAC part 360 converts the baseband multi-FA I signal and Q signal into analog signals, or up-converts the IF multi-FA IQ signal (3FA IQ) into a signal having a frequency higher than the IF, and converts it into an analog signal.

[99] While the invention has been shown and described with reference to a certain preferred embodiment thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

[1] An apparatus for up-converting a frequency in a wireless communication system, the apparatus comprising: a channel filter part for performing first interpolation on an I signal and Q signal having a baseband frequency, received from a channel card, and performing channel filtering on an I signal and Q signal performed the first interpolation; a half -band filter part for performing second interpolation on an I signal and Q signal performed the channel filtering, and performing half-band filtering on an I signal and Q signal performed the second interpolation; a modulation part for frequency up-converting an I signal and Q signal performed the half-band filtering into an IQ signal having a first Intermediate Frequency (IF); and a conversion part for converting an I signal and Q signal performed the half -band filtering into analog signals, or up-modulating the IQ signal having the first IF into an IQ signal having a second IF higher than the first IF and converting the IQ signal having the second IF into an analog signal.

[2] The apparatus of claim 1, wherein the channel filter part comprises: a first channel filter for performing the first interpolation on the I signal having the baseband frequency so that a data rate is increased, and removing an image signal from the I signal performed the first interpolation; and a second channel filter for performing the first interpolation on the Q signal having the baseband frequency so that a data rate is increased, and removing an image signal from the Q signal performed the first interpolation.

[3] The apparatus of claim 1, wherein the channel filter part performs 2-times interpolation on the I signal and the Q signal having the baseband frequency, and performs channel filtering on an I signal and Q signal performed the 2-times interpolation.

[4] The apparatus of claim 1, wherein the half-band filter part comprises: a first half -band filter for performing the second interpolation on the I signal performed the channel filtering so that a data rate is increased, and removing an image signal from the I signal performed the second interpolation; and a second half-band filter for performing the second interpolation on the Q signal performed the channel filtering so that a data rate is increased, and removing an image signal from the Q signal performed the second interpolation.

[5] The apparatus of claim 1, wherein the half-band filter part performs 5-times interpolation on the I signal and Q signal performed the channel filtering, and performs half -band filtering on an I signal and Q signal performed the 5-times in- terpolation.

[6] The apparatus of claim 1, further comprising: a Direct Digital Synthesizer (DDS) for generating a cosine (cos) signal and sine (sin) signal on the I signal and Q signal performed the half -band filtering, and outputting the generated cos signal and sin signal to the modulation part; wherein the modulation part frequency up-converts the I signal performed the half-band filtering into an I signal having the first IF using the cos signal, and frequency up-converts the Q signal performed half -band filtering into a Q signal having the first IF using the sin signal.

[7] The apparatus of claim 6, wherein the modulation part comprises: a first multiplier for multiplying the I signal performed the half-band filtering by the cos signal; a second multiplier for multiplying the Q signal performed the half-band filtering by the sin signal; and an adder for adding an output signal of the first multiplier and an output signal of the second multiplier, and outputting the IQ signal having the first IF.

[8] The apparatus of claim 1, further comprising: a selector for selecting one of the IQ signal having the first IF and the I signal and Q signal performed the half-band filtering, and outputting the selected signal to the conversion part; wherein the conversion part comprises a first converter for converting the I signal and Q signal performed the half -band filtering into analog signals; and a second converter for up-modulating the IQ signal having the first IF into an IQ signal having the second IF, and converting the up-modulated IQ signal into an analog signal.

[9] The apparatus of claim 1, further comprising: a multiplexer part for performing multiplexing Frequency Assignment (FA) I signals and Q signals having the baseband frequency with multiple FAs, received from the channel card, into multi-FA I signal and Q signal having the baseband frequency with one FA, which is combined the multiple FAs into, and outputting the multi-FA I signal and Q signal performed the multiplexing to the channel filter part; and a demultiplexer part for performing demultiplexing a multi-FA I signal and Q signal received from the half-band filter part into FA I signals and Q signals, and outputting the FA I signals and Q signals performed the demultiplexing to the modulation part.

[10] The apparatus of claim 9, wherein the multiplexer part comprises: a first multiplexer for performing third interpolation on the FA I signals so that a data rate is increased, and performing multiplexing on FA I signals performed the third interpolation; and a second multiplexer for performing third interpolation on the FA Q signals so that a data rate is increased, and performing multiplexing on FA Q signals performed the third interpolation.

[11] The apparatus of claim 9, wherein the multiplexer part performs 3-times interpolation on the FA I signals and Q signals, and performs multiplexing FA I signals and Q signals performed the 3-times interpolation into the multi-FA I signal and Q signal.

[12] The apparatus of claim 11, wherein the demultiplexer part performs demultiplexing on the multi-FA I signal and Q signal received from the half -band filter part separately for individual FAs, performs 3-times inverse-interpolation on FA I signals and Q signals performed the demultiplexing, and outputs the FA I signals and Q signals.

[13] The apparatus of claim 9, wherein the channel filter part comprises: a first channel filter for performing the first interpolation on the multi-FA I signal performed the multiplexing so that a data rate is increased, and removing an image signal from multi-FA I signal performed the first interpolation by performing the channel filtering based on a reference determined according to the multiplexing by the multiplexer part; and a second channel filter for performing the first interpolation on the multi-FA Q signal performed the multiplexing so that a data rate is increased, and removing an image signal from multi-FA Q signal performed the first interpolation by performing the channel filtering based on a reference determined according to the multiplexing by the multiplexer part.

[14] The apparatus of claim 13, wherein the half-band filter part comprises: a first half -band filter for performing the second interpolation on the multi-FA I signal performed the channel filtering so that a data rate is increased, removing an image signal from multi-FA I signal performed the second interpolation by performing the half -band filtering, and outputting the multi-FA I signal performed the half-band filtering to the demultiplexer part; and a second half-band filter for performing the second interpolation on the multi-FA Q signal performed the channel filtering so that a data rate is increased, removing an image signal from multi-FA Q signal performed the second interpolation by performing the half -band filtering, and outputting the multi-FA Q signal performed the half-band filtering to the demultiplexer part.

[15] The apparatus of claim 9, wherein the demultiplexer part comprises: a first demultiplexer for performing demultiplexing on the multi-FA I signal received from the half -band filter part, performing inverse-interpolation on the FA I signals performed the demultiplexing so that a data rate is decreased, and outputting the FA I signals to the modulation part; and a second demultiplexer for performing demultiplexing on the multi-FA Q signal received from the half -band filter part, performing inverse-interpolation on the FA Q signals performed the demultiplexing so that a data rate is decreased, and outputting the FA Q signal to the modulation part.

[16] The apparatus of claim 9, wherein the demultiplexer part comprises: a setting unit for outputting setting signals for the multi-FA I signal and Q signal; operation units for generating an enable signal using the setting signals and a synchronization signal for synchronization of the FA I signals and Q signals; register units for separating the multi-FA I signal and Q signal into FA I signals and Q signals, and outputting the FA I signals and Q signals in response to the enable signal; and inverse-interpolation units for performing inverse-interpolation on the outputted FA I signals and Q signals, and outputting the FA I signals and Q signals performed the demultiplexing to the modulation part.

[17] The apparatus of claim 9, further comprising: a Direct Digital Synthesizer (DDS) for generating cosine (cos) signals and sine (sin) signals for the FA I signals and Q signals, and outputting the generated cos signals and sin signals to the modulation part; wherein the modulation part frequency up-converts the FA I signals performed the multiplexing into FA I signals having the first IF with the multiple FAs using the cos signals, and frequency up-converts the FA Q signals performed the multiplexing into FA Q signals having the first IF with the multiple FAs using the sin signals.

[18] The apparatus of claim 17, wherein the modulation part comprises: a first multiplier for multiplying the FA I signals performed the multiplexing by the cos signals; a second multiplier for multiplying the FA Q signals performed the multiplexing by the sin signals; and an adder for adding an output signal of the first multiplier and an output signal of the second multiplier, and outputting FA IQ signals having the first IF with the multiple FAs.

[19] The apparatus of claim 18, further comprising: a combiner part for combining the FA IQ signals, and outputting a multi-FA IQ signal having the first IF with the one FA; and a selector for selecting one of the multi-FA IQ signal and the multi-FA I signal and Q signal received from the half -band filter part.

[20] The apparatus of claim 19, wherein the conversion part comprises: a first converter for converting the multi-FA I signal and Q signal received from the half -band filter part into analog signals; and a second converter for up-modulating the multi-FA IQ signal into a multi-FA IQ signal having the second IF with the one FA, and converting the multi-FA IQ signal into an analog signal.

[21] A method for up-converting a frequency in a wireless communication system, the method comprising: performing channel filtering on an I signal and a Q signal having a baseband frequency, received from a channel card; performing half-band filtering on an I signal and Q signal performed the channel filtering; modulating an I signal and Q signal performed the half -band filtering into an IQ signal having a first Intermediate Frequency (IF); and up-converting the IQ signal having the first IF into an IQ signal having a second

IF higher than the first IF, and converting one of the up-converted IQ signal and the I signal and Q signal performed the half-band filtering into an analog signal.

[22] The method of claim 21, wherein the step of performing channel filtering performs 2-times interpolation on the I signal and Q signal received from the channel card, and removes an image signal from an I signal and Q signal performed the 2-times interpolation by performing the channel filtering.

[23] The method of claim 21, wherein the step of performing half-band filtering performs 5-times interpolation on the I signal and Q signal performed the channel filtering, and removes an image signal from an I signal and Q signal performed the 5-times interpolation by performing the half-band filtering.

[24] The method of claim 21, wherein the step of modulating comprises: generating a cosine (cos) signal and a sine (sin) signal for the I signal and Q signal performed the half -band filtering; multiplying the I signal performed the half-band filtering by the cos signal, and multiplying the Q signal performed the half-band filtering by the sin signal; and generating the IQ signal having the first IF by adding the multiplied I signal and

Q signal.

[25] The method of claim 21, wherein the step of performing channel filtering further comprises: combining Frequency Assignment (FA) I signals having the baseband frequency with multiple FAs into a multi-FA I signal having the baseband frequency with one FA, which is combined the multiple FAs into; and combining FA Q signals having the baseband frequency with multiple FAs into a multi-FA Q signal having the baseband frequency with the one FA, when the FA I signals and Q signals having a baseband frequency are received from the channel card; wherein the step of performing channel filtering performs channel filtering on the combined multi-FA I signal and Q signal.

[26] The method of claim 25, wherein the steps of combining performs 3-times interpolation on the FA I signals and Q signals so that a data rate is increased 3 times, and generates the multi-FA I signal and Q signal by performing multiplexing on FA I signals and Q signals performed the 3-times interpolation.

[27] The method of claim 25, wherein the step of performing channel filtering performs 5-times interpolation on the combined multi-FA I signal and Q signal so that a data rate is increased 5 times, and removes an image signal from a multi-FA I signal and Q signal performed the 5-times interpolation by performing the channel filtering based on a reference determined according to the combination.

[28] The method of claim 27, wherein the step of performing half-band filtering comprises: performing 2-times interpolation on the multi-FA I signal and Q signal performed the channel filtering so that a data rate is increased 2 times, removing an image signal from a multi-FA I signal and Q signal performed the 2-times interpolation by performing the half-band filtering, and generating multi-FA I signal and Q signal having the baseband frequency with the one FA; and separating the generated multi-FA I signal into FA I signals having the baseband frequency with the multiple FAs, and separating the generated multi-FA Q signal into FA Q signals having the baseband frequency with the multiple FAs.

[29] The method of claim 28, wherein the step of separating separates the generated multi-FA I signal and Q signal into the FA I signals and Q signals in sync with the half -band filtering, performs inverse-interpolation thereon so that a data rate is increased 3 times, and generating the separated FA I signals and Q signals.

[30] The method of claim 29, wherein the step of modulating comprises: generating cosine (cos) signals and sine (sin) signals for the separated FA I signals and Q signals; multiplying the separated FA I signals by the cos signals, and multiplying the separated FA Q signals by the sin signals; and generating FA IQ signals having the first IF with the multiple FAs by adding the multiplied FA I signals and Q signals.

[31] The method of claim 30, wherein the step of converting further comprises generating a multi-FA IQ signal having the first IF with one FA by combining the FA IQ signals; and up-con verts the multi-FA IQ signal into a multi-FA IQ signal having a second IF with one FA, and converts at least one of the up- converted multi-FA IQ signal and the generated multi-FA I signal and Q signal, into an analog signal.