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WO2009057275A1 - 不揮発性記憶装置および不揮発性データ記録メディア - Google Patents

不揮発性記憶装置および不揮発性データ記録メディア Download PDF

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Publication number
WO2009057275A1
WO2009057275A1 PCT/JP2008/003055 JP2008003055W WO2009057275A1 WO 2009057275 A1 WO2009057275 A1 WO 2009057275A1 JP 2008003055 W JP2008003055 W JP 2008003055W WO 2009057275 A1 WO2009057275 A1 WO 2009057275A1
Authority
WO
WIPO (PCT)
Prior art keywords
resistance value
nonvolatile storage
nonvolatile
electric pulse
storage device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/003055
Other languages
English (en)
French (fr)
Inventor
Zhiqiang Wei
Takeshi Takagi
Ken Kawai
Kazuhiko Shimakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Priority to US12/529,466 priority Critical patent/US8094482B2/en
Priority to CN2008800074648A priority patent/CN101627438B/zh
Priority to JP2009522265A priority patent/JP4464462B2/ja
Publication of WO2009057275A1 publication Critical patent/WO2009057275A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5685Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using storage elements comprising metal oxide memory material, e.g. perovskites
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B63/00Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • G11C2013/0054Read is performed on a reference element, e.g. cell, and the reference sensed value is used to compare the sensed value of the selected cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • G11C2013/0073Write using bi-directional cell biasing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • G11C2013/009Write using potential difference applied between cell electrodes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/564Miscellaneous aspects
    • G11C2211/5646Multilevel memory with flag bits, e.g. for showing that a "first page" of a word line is programmed but not a "second page"
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30Resistive cell, memory material aspects
    • G11C2213/31Material having complex metal oxide, e.g. perovskite structure
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30Resistive cell, memory material aspects
    • G11C2213/32Material having simple binary metal oxide structure
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30Resistive cell, memory material aspects
    • G11C2213/34Material includes an oxide or a nitride
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70Resistive array aspects
    • G11C2213/79Array wherein the access device being a transistor

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)

Abstract

【課題】本発明の不揮発性記憶装置および不揮発性データ記録メディアは、電気的パルスの印加により抵抗変化する不揮発性記憶素子を有した不揮発性記憶装置であって、不揮発性記憶素子に第一の電気的パルスを印加することにより不揮発性記憶素子の抵抗値は第一抵抗値から第二抵抗値に変化し、第一の電気的パルスとは逆極性である第二の電気的パルスを印加することにより第二抵抗値から第一抵抗値に変化する第一の書き込みを行う第一の書き込み回路(106)と、不揮発性記憶素子に第三の電気的パルスを印加することにより不揮発性記憶素子の抵抗値は第三抵抗値から第四抵抗値に変化し、第三の電気的パルスとは同極性である第四の電気的パルスを印加することにより第四の抵抗値から第五の抵抗値に変化する第二の書き込みを行う第二の書き込み回路(108)とを備える。
PCT/JP2008/003055 2007-10-29 2008-10-28 不揮発性記憶装置および不揮発性データ記録メディア Ceased WO2009057275A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US12/529,466 US8094482B2 (en) 2007-10-29 2008-10-28 Nonvolatile memory apparatus and nonvolatile data storage medium
CN2008800074648A CN101627438B (zh) 2007-10-29 2008-10-28 非易失性存储装置以及非易失性数据记录介质
JP2009522265A JP4464462B2 (ja) 2007-10-29 2008-10-28 不揮発性記憶装置および不揮発性データ記録メディア

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007279876 2007-10-29
JP2007-279876 2007-10-29

Publications (1)

Publication Number Publication Date
WO2009057275A1 true WO2009057275A1 (ja) 2009-05-07

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PCT/JP2008/003055 Ceased WO2009057275A1 (ja) 2007-10-29 2008-10-28 不揮発性記憶装置および不揮発性データ記録メディア

Country Status (4)

Country Link
US (1) US8094482B2 (ja)
JP (1) JP4464462B2 (ja)
CN (1) CN101627438B (ja)
WO (1) WO2009057275A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016194175A1 (ja) * 2015-06-03 2016-12-08 株式会社日立製作所 ストレージシステム

Families Citing this family (18)

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JP5362010B2 (ja) * 2009-07-29 2013-12-11 パナソニック株式会社 メモリ装置、ホスト装置およびメモリシステム
JP5657876B2 (ja) * 2009-10-07 2015-01-21 ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. 半導体メモリ装置
JP5032611B2 (ja) * 2010-02-19 2012-09-26 株式会社東芝 半導体集積回路
WO2011121971A1 (ja) * 2010-03-30 2011-10-06 パナソニック株式会社 不揮発性記憶装置及び不揮発性記憶装置への書き込み方法
JP5508944B2 (ja) 2010-06-08 2014-06-04 株式会社東芝 半導体記憶装置
JP5560944B2 (ja) * 2010-06-18 2014-07-30 ソニー株式会社 記憶素子の駆動方法
US8462580B2 (en) * 2010-11-17 2013-06-11 Sandisk 3D Llc Memory system with reversible resistivity-switching using pulses of alternatrie polarity
JP5602175B2 (ja) * 2012-03-26 2014-10-08 株式会社東芝 不揮発性半導体記憶装置及びそのデータ書き込み方法
US9190149B2 (en) * 2012-08-24 2015-11-17 Infineon Technologies Ag Method and system for switchable erase or write operations in nonvolatile memory
US9171616B2 (en) * 2013-08-09 2015-10-27 Macronix International Co., Ltd. Memory with multiple levels of data retention
KR102061343B1 (ko) * 2013-11-06 2020-02-11 에스케이하이닉스 주식회사 반도체 장치
US9484094B2 (en) * 2015-01-21 2016-11-01 Ememory Technology Inc. Control method of resistive random-access memory
US9443587B1 (en) * 2015-07-21 2016-09-13 Winbond Electronics Corp. Resistive memory apparatus and writing method thereof
JP2019071577A (ja) * 2017-10-11 2019-05-09 ソニーセミコンダクタソリューションズ株式会社 半導体回路およびその制御方法
US10665313B1 (en) * 2019-05-02 2020-05-26 Sandisk Technologies Llc Detecting short circuit between word line and source line in memory device and recovery method
US10726897B1 (en) * 2019-05-14 2020-07-28 International Business Machines Corporation Trimming MRAM sense amp with offset cancellation
CN110708793B (zh) * 2019-09-26 2021-03-23 深圳市明微电子股份有限公司 一种级联设备的级联控制方法、级联设备及光照系统
JP7150787B2 (ja) * 2020-07-31 2022-10-11 ウィンボンド エレクトロニクス コーポレーション 抵抗変化型クロスバーアレイ装置

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016194175A1 (ja) * 2015-06-03 2016-12-08 株式会社日立製作所 ストレージシステム

Also Published As

Publication number Publication date
JPWO2009057275A1 (ja) 2011-03-10
CN101627438A (zh) 2010-01-13
CN101627438B (zh) 2013-10-09
US20100014343A1 (en) 2010-01-21
JP4464462B2 (ja) 2010-05-19
US8094482B2 (en) 2012-01-10

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