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WO2008126747A1 - 試験装置、試験方法、および電子デバイス - Google Patents

試験装置、試験方法、および電子デバイス Download PDF

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Publication number
WO2008126747A1
WO2008126747A1 PCT/JP2008/056612 JP2008056612W WO2008126747A1 WO 2008126747 A1 WO2008126747 A1 WO 2008126747A1 JP 2008056612 W JP2008056612 W JP 2008056612W WO 2008126747 A1 WO2008126747 A1 WO 2008126747A1
Authority
WO
WIPO (PCT)
Prior art keywords
test
pattern
device under
order
testing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/056612
Other languages
English (en)
French (fr)
Inventor
Tatsuya Yamada
Kiyoshi Murata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Priority to JP2009509283A priority Critical patent/JP5175840B2/ja
Priority to DE112008001032T priority patent/DE112008001032T5/de
Publication of WO2008126747A1 publication Critical patent/WO2008126747A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/31813Test pattern generators
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/10Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

 被試験デバイスを試験する試験装置であって、被試験デバイスを試験するための試験シーケンスを定める試験命令列を圧縮形式で記憶するパターンメモリと、パターンメモリから読み出された試験命令列を非圧縮形式に展開する展開部と、展開部により展開された試験命令列をキャッシングする命令キャッシュと、命令キャッシュに格納された命令を順次読み出して実行し、実行される命令に対する試験パターンを発生するパターン発生部と、試験パターンに基づく試験信号を生成し、被試験デバイスに供給する信号出力部とを備える試験装置を提供する。
PCT/JP2008/056612 2007-04-09 2008-04-02 試験装置、試験方法、および電子デバイス Ceased WO2008126747A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009509283A JP5175840B2 (ja) 2007-04-09 2008-04-02 試験装置、試験方法、および電子デバイス
DE112008001032T DE112008001032T5 (de) 2007-04-09 2008-04-02 Prüfgerät, Prüfverfahren und elektronische Vorrichtung

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/733,174 US7603604B2 (en) 2007-04-09 2007-04-09 Test apparatus and electronic device
US11/733,174 2007-04-09

Publications (1)

Publication Number Publication Date
WO2008126747A1 true WO2008126747A1 (ja) 2008-10-23

Family

ID=39828028

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/056612 Ceased WO2008126747A1 (ja) 2007-04-09 2008-04-02 試験装置、試験方法、および電子デバイス

Country Status (6)

Country Link
US (1) US7603604B2 (ja)
JP (1) JP5175840B2 (ja)
KR (1) KR20090131676A (ja)
DE (1) DE112008001032T5 (ja)
TW (1) TW200841033A (ja)
WO (1) WO2008126747A1 (ja)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7539902B2 (en) * 2006-10-19 2009-05-26 Sun Microsystems, Inc. Application level testing of instruction caches in multi-processor/multi-core systems
CN101398752B (zh) * 2007-09-29 2011-08-31 国际商业机器公司 重叠指令存取单元和重叠指令存取方法
JP5153670B2 (ja) * 2009-01-30 2013-02-27 株式会社アドバンテスト 診断装置、診断方法および試験装置
US8706439B2 (en) * 2009-12-27 2014-04-22 Advantest Corporation Test apparatus and test method
CN102142284A (zh) * 2010-01-29 2011-08-03 京元电子股份有限公司 可扩充样本储存器的储存器测试设备
JPWO2012073395A1 (ja) * 2010-11-29 2014-05-19 株式会社アドバンテスト 通信システムおよび試験装置
JP7208448B2 (ja) * 2019-02-01 2023-01-19 富士通株式会社 情報処理装置、情報処理プログラム、及び情報処理方法
CN112433765B (zh) * 2020-11-26 2023-09-08 海光信息技术股份有限公司 一种数据存储方法、装置、处理器及电子设备
CN116643140A (zh) * 2022-02-15 2023-08-25 华为技术有限公司 集成电路及集成电路的测试方法
CN116110491A (zh) * 2023-01-18 2023-05-12 上海华岭集成电路技术股份有限公司 一种生成对于存储器进行测试的测试向量的方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0269685A (ja) * 1988-09-06 1990-03-08 Hitachi Ltd Ic試験装置
JPH0742150Y2 (ja) * 1989-12-11 1995-09-27 株式会社アドバンテスト テストパタン発生器
JP2000040389A (ja) * 1998-07-24 2000-02-08 Advantest Corp 半導体試験装置の試験方法
JP2000162287A (ja) * 1998-11-24 2000-06-16 Advantest Corp パターン信号を生成するパターン発生器
JP2002521698A (ja) * 1998-07-30 2002-07-16 クリーダンス システムズ コーポレイション アルゴリズミックパターン発生器
JP2003028936A (ja) * 2001-07-16 2003-01-29 Mitsubishi Electric Corp 半導体装置のテストパターン編集方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0742150A (ja) 1993-07-27 1995-02-10 Taisei Corp 山留め用鋼管の打込み装置と打込み方法
US5737512A (en) * 1996-05-22 1998-04-07 Teradyne, Inc. Fast vector loading for automatic test equipment
DE19955380C2 (de) * 1998-11-10 2003-10-30 Advantest Corp Prüfmustergenerator, Prüfvorrichtung und Verfahren zum Erzeugen von Prüfmustern
JP4285816B2 (ja) 1999-01-19 2009-06-24 株式会社アドバンテスト パターン発生器、パターン発生方法及び試験装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0269685A (ja) * 1988-09-06 1990-03-08 Hitachi Ltd Ic試験装置
JPH0742150Y2 (ja) * 1989-12-11 1995-09-27 株式会社アドバンテスト テストパタン発生器
JP2000040389A (ja) * 1998-07-24 2000-02-08 Advantest Corp 半導体試験装置の試験方法
JP2002521698A (ja) * 1998-07-30 2002-07-16 クリーダンス システムズ コーポレイション アルゴリズミックパターン発生器
JP2000162287A (ja) * 1998-11-24 2000-06-16 Advantest Corp パターン信号を生成するパターン発生器
JP2003028936A (ja) * 2001-07-16 2003-01-29 Mitsubishi Electric Corp 半導体装置のテストパターン編集方法

Also Published As

Publication number Publication date
DE112008001032T5 (de) 2010-03-11
JP5175840B2 (ja) 2013-04-03
TW200841033A (en) 2008-10-16
JPWO2008126747A1 (ja) 2010-07-22
TWI365996B (ja) 2012-06-11
US7603604B2 (en) 2009-10-13
KR20090131676A (ko) 2009-12-29
US20080250291A1 (en) 2008-10-09

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